Renesas HD74LVC1G98CPE Configurable multiple-function gate Datasheet

HD74LVC1G98
Configurable Multiple–Function Gate
REJ03D0013–0400Z
Rev.4.00
Jun. 30, 2004
Description
The HD74LVC1G98 has configurable multiple–function gate in a 6-pin package. The Output state is determined by
eight patterns of 3–bit input. The user can choose the logic functions AND, NAND, OR, NOR, INVERTER, Non–
Inverted Buffer, Data Selector. Low voltage and high-speed operation is suitable for the battery powered products (e.g.,
notebook computers), and the low power consumption extends the battery life.
Features
• The basic gate function is lined up as Renesas uni logic series.
• Supply voltage range: 1.65 to 5.5 V
Operating temperature range: –40 to +85°C
• All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V)
All outputs VO (Max.) = 5.5 V (@VCC = 0 V)
• Output current:
±4 mA (@VCC = 1.65 V)
±8 mA (@VCC = 2.3 V)
±24 mA (@VCC = 3.0 V)
±32 mA (@VCC = 4.5 V)
• All the logical input has hysteresis voltage for the slow transition.
• Ordering Information
Part Name
HD74LVC1G98CPE
HD74LVC1G98CLE
Package Type
WCSP-6 pin
Package Code
TBS-6V
TBS-6AV
Package
Abbreviation
CP
CL
Article Indication
Marking
Year code
Month code
K1YM
Rev.4.00 Jun. 30, 2004 page 1 of 10
Taping Abbreviation
(Quantity)
E (3,000 pcs/reel)
HD74LVC1G98
Function Table
Inputs
IN1
IN2
L
L
L
L
H
H
H
H
H: High level
L: Low level
Output
Y
IN0
L
L
H
H
L
L
H
H
L
H
L
H
L
H
L
H
H
H
L
L
H
L
H
L
Pin Arrangement
Height 0.5 mm
0.5 mm pitch
0.17 mm 6–Ball (CP) IN0
0.23 mm 6–Ball (CL)
3
4
Y
GND
2
5
VCC
IN1
1
6
(Bottom view)
1.4 mm
0.9 mm
Pin#1 INDEX
IN2
(Top view)
Logic Diagram
IN0
Y
IN1
IN2
Rev.4.00 Jun. 30, 2004 page 2 of 10
HD74LVC1G98
Function Selection Table
Logic Function
2 to 1 data Selector
2–inputs NAND
2–inputs NOR with one input inverted
2–inputs AND with one input inverted
2–inputs NAND with one input inverted
2–inputs OR with one input inverted
2–inputs NOR
Non–Invert Buffer
Inverter
Rev.4.00 Jun. 30, 2004 page 3 of 10
Figure No.
1
2
3
3
4
4
5
6
7
HD74LVC1G98
Logic Configurations
VCC
A/B
A
B
A
Y
1 (IN1)
(IN2) 6
A/B
2 (GND) (VCC) 5
B
3 (IN0)
(Y) 4
Y
Figure 1. 2 to 1 Data Selector
VCC
VCC
A
B
A
B
1 (IN1)
(IN2) 6
A
Y
2 (GND) (VCC) 5
Y
B
3 (IN0)
(Y) 4
1 (IN1)
A
B
Y
A
B
Y
(IN2) 6
A
2 (GND) (VCC) 5
B
Y
3 (IN0)
(Y) 4
Y
Figure 3. 2–inputs NOR Gate
with A input inverted
Figure 2. 2–inputs NAND Gate
VCC
VCC
A
B
A
B
B
1 (IN1)
(IN2) 6
A
Y
2 (GND) (VCC) 5
Y
3 (IN0)
(Y) 4
Y
A
B
Y
A
B
Y
B
1 (IN1)
(IN2) 6
A
2 (GND) (VCC) 5
3 (IN0)
Figure 4. 2–inputs NAND Gate
with A input inverted
(Y) 4
Y
Figure 5. 2–inputs NOR Gate
VCC
1 (IN1)
A
Y
(IN2) 6
A
2 (GND) (VCC) 5
3 (IN0)
(Y) 4
Figure 6. Non–Invert Buffer
Rev.4.00 Jun. 30, 2004 page 4 of 10
VCC
A
A
Y
Y
1 (IN1)
(IN2) 6
2 (GND) (VCC) 5
3 (IN0)
Figure 7. Inverter
(Y) 4
Y
HD74LVC1G98
Absolute Maximum Ratings
Item
Supply voltage range
Input voltage range *1
Output voltage range *1, 2
Input clamp current
Output clamp current
Continuous output current
Continuous current through
VCC or GND
Package Thermal impedance
Symbol
VCC
VI
VO
IIK
IOK
IO
ICC or IGND
Ratings
–0.5 to 6.5
–0.5 to 6.5
–0.5 to VCC + 0.5
–0.5 to 6.5
–50
–50
±50
±100
Unit
V
V
V
mA
mA
mA
mA
Test Conditions
Output : H or L
VCC : OFF
VI < 0
VO < 0
VO = 0 to VCC
θja
143
°C/W
CP
123
CL
Storage temperature
Tstg
–65 to 150
°C
Notes:
The absolute maximum ratings are values, which must not individually be exceeded, and furthermore no two
of which may be realized at the same time.
1. The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are
observed.
2. This value is limited to 5.5 V maximum.
Recommended Operating Conditions
Item
Supply voltage range
Input voltage range
Output voltage range
Output current
Symbol
VCC
VI
VO
IOL
IOH
Input transition rise or fall rate
∆t / ∆v
Min
1.65
0
0
—
—
—
—
—
—
—
—
—
—
0
5.5
5.5
VCC
4
8
16
24
32
3
–4
–
–8
–
–16
–24
–32
20
0
0
10
5
Operating free-air temperature
Ta
–40
Note: Unused or floating inputs must be held high or low.
Rev.4.00 Jun. 30, 2004 page 5 of 10
Max
85
Unit
V
V
V
mA
Conditions
VCC = 1.65 V
VCC = 2.3 V
VCC = 3.0 V
VCC = 4.5 V
VCC = 1.65 V
VCC = 2.3 V
VCC = 3.0 V
ns / V
VCC = 4.5 V
VCC = 1.65 to 1.95 V,
2.3 to 2.7 V
VCC = 3.0 to 3.6 V
VCC = 4.5 to 5.5 V
°C
HD74LVC1G98
Electrical Characteristics
Ta = –40 to 85°C
Item
Threshold voltage
Symbol
VCC (V)
Min
1.8
2.5
3.3
5.0
1.8
2.5
3.3
5.0
1.8
2.5
3.3
5.0
1.65 to 5.5
1.65
2.3
3.0
0.8
1.2
1.6
2.3
0.4
0.6
0.9
1.5
0.4
0.4
0.4
0.4
VCC–0.1
1.2
1.9
2.4
2.3
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
1.4
1.7
2.3
3.0
0.7
1.0
1.4
2.0
0.7
0.8
0.9
1.0
—
—
—
—
—
4.5
1.65 to 5.5
1.65
2.3
3.0
3.8
—
—
—
—
—
—
—
—
—
IIN
ICC
4.5
0 to 5.5
5.5
—
—
—
—
—
—
—
0.1
0.45
0.3
0.4
0.55
0.55
±5
10
∆ICC
3 to 5.5
—
—
500
IOFF
CIN
0
3.3
—
—
—
3.5
±10
±
—
VT+
VT–
∆VT
Output voltage
VOH
VOL
Input current
Quiescent
supply current
Output leakage current
Input capacitance
Typ
Max
Unit
Test condition
V
V
µA
µA
µA
pF
IOH = –100 µA
IOH = –4 mA
IOH = –8 mA
IOH = –16 mA
IOH = –24 mA
IOH = –32 mA
IOL = 100 µA
IOL = 4 mA
IOL = 8 mA
IOL = 16 mA
IOL = 24 mA
IOL = 32 mA
VIN = 5.5 V or GND
VIN = VCC or GND,
IO = 0
One input at VCC–0.6 V,
Other input at VCC or
GND
VIN or VO = 0 to 5.5 V
VIN = VCC or GND
Note: For conditions shown as Min or Max, use the appr
appropriate values under recommended operating conditions.
Rev.4.00 Jun. 30, 2004 page 6 of 10
HD74LVC1G98
Switching Characteristics
VCC = 1.8±0.15 V
Item
Propagation delay time
Ta = –40 to 85°C
Min
Max
Symbol
tPLH
tPHL
3.2
14.4
Unit
ns
FROM
(Input)
Test Conditions
CL = 30 pF,
RL = 1.0 kΩ
IN
TO
(Output)
Y
VCC = 2.5±0.2 V
Item
Propagation delay time
Ta = –40 to 85°C
Min
Max
Symbol
tPLH
tPHL
2.0
8.3
Unit
ns
FROM
(Input)
Test Conditions
CL = 30 pF,
RL = 500 Ω
IN
TO
(Output)
Y
VCC = 3.3±0.3 V
Item
Propagation delay time
Ta = –40 to 85°C
Min
Max
Symbol
tPLH
tPHL
1.5
6.3
Unit
ns
FROM
(Input)
Test Conditions
CL = 50 pF,
RL = 500 Ω
IN
TO
(Output)
Y
VCC = 5.0±0.5 V
Item
Propagation delay time
Symbol
tPLH
tPHL
Ta = –40 to 85°C
Min
Max
1.1
5.1
Unit
ns
FROM
(Input)
Test Conditions
CL = 50 pF,
RL = 500 Ω
IN
TO
(Output)
Y
Operating Characteristics
Item
Symbol
Power dissipation capacitance
CPD
VCC (V)
1.8
2.5
3.3
5.0
Min
—
—
—
—
Ta = 25°C
Typ
Max
23
—
23
—
23
—
26
—
Unit
pF
Test Circuit
Measurement point
From Output
CL *
RL
Note: CL includes probe and jig capacitance.
Rev.4.00 Jun. 30, 2004 page 7 of 10
Test Conditions
f = 10 MHz
HD74LVC1G98
• Waveforms
tr
tf
Vref
Input
VI
90%
90%
Vref
10%
10%
t PLH
GND
t PHL
VOH
In phase output
Vref
Vref
VOL
VOH
Vref
Vref
Out of phase output
t PHL
VOL
t PLH
INPUTS
VCC (V)
Vref
CL
RL
≤ 2 ns
VCC / 2
30 pF
1.0 kΩ
≤ 2 ns
VCC / 2
30 pF
500 Ω
3 V ≤ 2.5 ns
1.5 V
50 pF
500 Ω
VCC ≤ 2.5 ns
VCC / 2
50 pF
500 Ω
VI
tr / tf
1.8±0.15
VCC
2.5±0.2
VCC
3.3±0.3
5.0±0.5
Notes: 1. Input waveform : PRR ≤ 10 MHz, Zo = 50 Ω.
2. The output are measured one at a time with one transition per measurement.
Rev.4.00 Jun. 30, 2004 page 8 of 10
HD74LVC1G98
Package Dimensions
TBS-6V
EIAJ Package Code

Mass (g)
0.001
JEDEC Code

Lead Material

D
e
ZD
ZE
C
E
B
e
B
A
Pin #1 index area
1
2
C
// y1 C
6×φb
φx M C A B
φx M C
C
Symbol
Rev.4.00 Jun. 30, 2004 page 9 of 10
A
A2
y C
A1
Seating plane
A
A1
A2
b
D
E
e
x
y
y1
ZD
ZE
Dimension in Millimeters
Min
Typ
Max
0.50
0.10
0.15
0.35
0.19
0.15
0.17
0.90
1.40
0.50
0.05
0.05
0.20
0.20
0.20
HD74LVC1G98
TBS-6AV
EIAJ Package Code

Mass (g)
0.001
JEDEC Code

Lead Material

D
e
ZD
ZE
C
E
B
e
B
A
Pin #1 index area
1
2
C
// y1 C
6×φb
φx M C A B
φx M C
C
Symbol
*Reference value.
Rev.4.00 Jun. 30, 2004 page 10 of 10
A
A2
y C
A1
Seating plane
A
A1
A2
b
D
E
e
x
y
y1
ZD
ZE
Dimension in Millimeters
Min
Nom
Max
0.50
0.155
0.185
(0.315)*
0.25
0.20
0.90
1.40
0.50
0.05
0.05
0.20
0.20
0.20
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