LMP91300 www.ti.com SNOSCS3A – SEPTEMBER 2013 – REVISED OCTOBER 2013 LMP91300 Industrial Inductive Proximity Sensor AFE Check for Samples: LMP91300 FEATURES DESCRIPTION • • • • • • • The LMP91300 is a complete analog front end (AFE) optimized for use in industrial inductive proximity sensors. The LMP91300 directly converts the RP of the external LC tank into a digital value. 1 • • • • • • Post production Configuration and Calibration Programmable Decision Thresholds Programmable Hysteresis Flexible Overload Protection Digital Temperature Compensation Integrated LED driver Small Form Factor, Supports 4mm Sensors (DSBGA Package) Low Power Consumption Integrated Voltage Regulator 3 Wire Capability Supports NPN and PNP Modes Normally Open (NO) and Normally Closed (NC) Supported 16-bit Resolution Threshold Setting APPLICATIONS • • • Post manufacturing configuration and calibration is fully supported. The temperature dependence of the sensor is digitally compensated, using an external temperature sensor. The LMP91300 provides programmable thresholds, programmable temperature compensation and programmable oscillation frequency range. Due to its programmability, the LMP91300 can be used with a wide variety of external inductors and its detection thresholds can be adjusted to the desired detection distances. An internal voltage regulator allows the device to operate with a supply from 6.5V to 40V. The output can be programmed to drive an external transistor in either NPN or PNP mode. Available in 4×5mm 24-pin WQFN and 2.05×2.67mm 20-pin DSBGA packages, the LMP91300 operates from -40°C to +125°C. Industrial Proximity Detection Industrial Production Lines Industrial Automation EXT B V+/EXT E FUNCTIONAL BLOCK DIAGRAM OTP Memory Direct RP to Digital Converter Digital Temp Correction TEMP CFB CFA Temp Sensor Comparator SENSE1+ SENSE1+ SENSE2+ SENSE2+/ SWIF RX Driver LED Drive Serial Interface DRIVE SWDRV SENSE- SENSE- GND INB CBY Oscillator LED INA Voltage Regulator Figure 1. LMP91300 Block Diagram 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2013, Texas Instruments Incorporated LMP91300 SNOSCS3A – SEPTEMBER 2013 – REVISED OCTOBER 2013 www.ti.com TYPICAL APPLICATION 6.5V to 40V C1 REXT B CFB LED CFA CF EXT B CV+/EXT E V+/EXT E SENSE1+ SENSE2+ Load SWDRV + INA LMP91300 SENSE- INB CBY RSENSE TEMP+ NTC GND CBY 3 Wire NPN Figure 2. 3-Wire NPN Configuration 6.5V to 40V REXT B C1 RSENSE + R1 - CFB LED CFA CF EXT B CV+/EXT E Load V+/EXT E SWDRV INA LMP91300 SENSE1+ INB NTC CBY TEMP+ SENSE2+ GND SENSECBY 3 Wire PNP Figure 3. 3-Wire PNP Configuration For operation above 40V a series resistance must be added to SENSE1+ and SENSE2+. The mismatch in these resistors will affect the overload protection accuracy for the PNP configuration. These resistors must be chosen so that the SENSE1+ and SENSE2+ pins do not operate above 40V. 2 Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Product Folder Links: LMP91300 LMP91300 www.ti.com SNOSCS3A – SEPTEMBER 2013 – REVISED OCTOBER 2013 CBY TEMP+ TEMP- INB INA 24 23 22 21 20 PINOUT P1 1 19 GND P2 2 18 CFA P3 3 17 CFB P4 4 16 NC DAP (GND) 13 SENSE2+/SWIF RX 12 7 SENSE1+ LED 11 NC SENSE- 14 10 6 SWDRV GND 9 GND EXT B 15 8 5 V+/EXT E P5 Figure 4. LMP91300 WQFN Pinout Table 1. LMP91300 WQFN Pin Functions Pin Number Name Type 1-5 P1-5 G Description Connect to Ground 6 GND G Board Ground 7 LED O LED Driver Output 8 V+/EXT E P Chip V+/External transistor, emitter 9 EXT B P External transistor, base 10 SWDRV O Drive for external transistor switch 11 SENSE- I Negative Sense Input 12 SENSE1+ I Positive Sense Input 13 SENSE2+/SWIF RX I Positive Sense Input and Single Wire Interface receive 14 NC N/A 15 GND G 16 NC N/A 17 CFB I Filter capacitor value based on sensor oscillation frequency No connect Board ground No connect 18 CFA I Filter capacitor value based on sensor oscillation frequency 19 GND G Board ground 20 INA I External LC tank 21 INB I External LC tank 22 TEMP- G NTC ground, connect to board ground 23 TEMP+ I Analog Temperature Sensor Input 24 CBY O Bypass capacitor (56nF) DAP DAP G Connect to Ground Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Product Folder Links: LMP91300 3 LMP91300 SNOSCS3A – SEPTEMBER 2013 – REVISED OCTOBER 2013 www.ti.com 1 2 3 4 4 3 2 1 INA INB TEMP+ CBY CBY TEMP+ INB INA A1 A2 A3 A4 A4 A3 A2 A1 CFA P2 TEMP- P1 P1 TEMP- P2 CFA B3 B2 B1 A B1 B2 B3 B4 B4 CFB P5 P4 P3 P3 P4 P5 CFB C1 C2 C3 C4 C4 C3 C2 C1 S2+ S- GND LED LED GND S- S2+ D1 D2 D3 D4 D4 D3 D2 D1 S1+ SWDRV EXT B V+/EXT E V+/EXT E EXT B SWDRV S1+ E1 E2 E3 E4 E4 E3 E2 E1 B C D E A B C D E Bottom View Top View Figure 5. LMP91300 DSBGA Pinout Table 2. LMP91300 DSBGA Pin Functions 4 Pin Number Name Type A1 INA I Description External LC tank A2 INB I External LC tank A3 TEMP+ I Analog Temperature Sensor Input A4 CBY O Bypass capacitor (56nF) B1 CFA I Filter capacitor value based on sensor oscillation frequency B2 P2 G Connect to Ground B3 TEMP- G NTC ground, connect to board ground B4 P1 G Connect to Ground C1 CFB I Filter capacitor value based on sensor oscillation frequency C2 P5 G Connect to Ground C3 P4 G Connect to Ground C4 P3 G Connect to Ground D1 SENSE2+/SWIF RX I Positive Sense Input and Single Wire Interface receive D2 SENSE- I Negative Sense Input D3 GND G Board ground D4 LED O LED Driver Output E1 SENSE1+ I Positive Sense Input E2 SWDRV O Drive for external transistor switch E3 EXT B P External transistor, base E4 V+/EXT E P Chip V+/External transistor, emitter Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Product Folder Links: LMP91300 LMP91300 www.ti.com SNOSCS3A – SEPTEMBER 2013 – REVISED OCTOBER 2013 ABSOLUTE MAXIMUM RATINGS (1) Over operating free-air temperature range (unless otherwise noted) Voltage at pins 1-5, 7, 10, 11, 17, 18 (B1, B2, B4, C1, C2, C3, C4, D2, D4, E2) (V+) + 0.3V Voltage at pins 6, 15, 19, 22 (B3, D3) 0.3V Voltage at pin 8 (E4) 6V Voltage at pin 9 (E3) 7V Voltage at pins 12, 13 (D1, E1) 48V Current at pins 20, 21 (A1, A2) 8mA Voltage at pins 23, 24 (A3, A4) 1.6V Operating Temperature, TA −40°C to +125°C Storage Temperature, TSTG −65°C to +150°C Junction Temperature, TJ (2) +150°C ESD Rating (3) Human Body Model (HBM) 2000V Charge-Device Model (CDM) (1) (2) (3) 500V Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The maximum power dissipation is a function of TJ(MAX), θJA, and TA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(MAX) - TA)/ θJA . All numbers apply for packages soldered directly onto a PC board. Human Body Model, applicable std. MIL-STD-883, Method 3015.7. Field-Induced Charge-Device Model, applicable std. JESD22-C101C (ESD FICDM std. of JEDEC). THERMAL CHARACTERISTICS (1) (2) Over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS θJA Package Thermal Impedance 24-Pin WQFN θJA Package Thermal Impedance 20-Pin DSBGA (1) (2) MIN TYP MAX UNIT 33.2 °C/W 46 °C/W The maximum power dissipation is a function of TJ(MAX), θJA, and TA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(MAX) - TA)/ θJA . All numbers apply for packages soldered directly onto a PC board. The package thermal impedance is calculated in accordance with JESD 51-7. RECOMMENDED OPERATING CONDITIONS (1) Over operating free-air temperature range (unless otherwise noted) MIN VLOOP (1) Loop Voltage 6.5 NOM MAX UNIT 40 V Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Product Folder Links: LMP91300 5 LMP91300 SNOSCS3A – SEPTEMBER 2013 – REVISED OCTOBER 2013 ELECTRICAL CHARACTERISTICS www.ti.com (1) (2) Unless otherwise specified, all limits are ensured at TA = TJ = 25°C, Loop Voltage = 24V. (3). Boldface limits apply at the temperature extremes. Symbol Parameter Conditions Min (4) Typ (5) Max (4) Units POWER SUPPLY IV+ Supply Current tSTART Power On Start Time Does not include external currents such as LED, SWDRV, and LC tank current (6) (3) 3 mA LC Tank oscillation = 1MHz, RESPONSE_TIME = 001b (96), measured time starting from when supply is at 90% of operational value. (7) 50 ms OSCILLATOR fMIN Minimum Oscillation Frequency fMAX Maximum Oscillation Frequency 0.005 MHz 5 MHz OSCAMP1V Oscillator Amplitude OSC_AMP = 00b 1 VPP OSCAMP2V Oscillator Amplitude OSC_AMP = 01b 2 VPP OSCAMP4V Oscillator Amplitude OSC_AMP = 10b 4 vPP trec Recovery Time Oscillation start up time after low RP is removed. 10 oscillator periods RPMIN Minimum RP Value of LC Tank See OSC_CONFIG_2 entry in the Register Information section. 798 RPMAX Maximum RP Value of LC Tank See OSC_CONFIG_2 entry in the Register Information section. 3.93M Response time Settling time of digital filter to RP step. See RESPONSE_TIME in registers 0x71 and 0x77. SENSOR Ω Ω DETECTOR tRESP 96 6144 oscillator periods OUTPUT DRIVER ISOURCE, SINK Current source and sink capability on SWDRV pin SWDRV_CURRENT = 00b 2 2.5 3 SWDRV_CURRENT = 01b 3.25 3.75 4.25 SWDRV_CURRENT = 10b 4.5 5 5.5 SWDRV_CURRENT = 11b 9 10 11 mA OVERLOAD PROTECTION Over Current Detection Threshold NPN Configuration, Using external sense resistor 279 310 341 Over Current Detection Threshold PNP Configuration, Using external sense resistor 248 310 376 Over Current Limit NPN Configuration 432 480 528 mV Over Current Limit PNP Configuration 413 480 547 mV Output high time in short condition 25 30 35 µs mV mV INPUT SHORT CONDITION tOUT (1) (2) (3) (4) (5) (6) (7) 6 Output Switching Electrical Characteristics Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating of the device such that TJ = TA. Parametric performance shown in the electrical tables is not ensured under conditions of internal self-heating where TJ > TA. Electrical Characteristics apply only when SWIF is inactive. Glitches may appear on SWDRV during a SWIF transmission. There are tradeoffs between power consumption, switching speed, RP to Digital conversion and oscillation frequency. Limits are ensured by testing, design, or statistical analysis at 25°C. Limits over the operating temperature range are ensured through correlations using statistical quality control (SQC) method. Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary over time and will also depend on the application and configuration. The typical values are not tested and are not ensured on shipped production material. Supply current is higher when there is not an LC tank connected to pins INA and INB because an internal protection circuit is enabled. See the Supply Current vs Supply Voltage graphs in the TYPICAL PERFORMANCE CHARACTERISTICS section. The loop supply must be able to momentarily supply 30mA. Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Product Folder Links: LMP91300 LMP91300 www.ti.com SNOSCS3A – SEPTEMBER 2013 – REVISED OCTOBER 2013 ELECTRICAL CHARACTERISTICS (1)(2) (continued) Unless otherwise specified, all limits are ensured at TA = TJ = 25°C, Loop Voltage = 24V.(3). Boldface limits apply at the temperature extremes. Symbol Parameter Conditions Min Typ (4) (5) duty0.1% Output duty cycle during short condition During short, SHORTCKT_DUTY_CYCLE = 0b 0.1 duty0.8% Output duty cycle during short condition During short, SHORTCKT_DUTY_CYCLE = 1b 0.8 LEDBLINK LED Blinking Rate Blinking rate of the LED during a short condition or ECC error 2 Max (4) Units % % Hz LED DRIVER Sink Current LED_CURRENT = 0b 2 2.5 3 mA Sink Current LED_CURRENT = 1b 4 5 6 mA -2.5 1 2.5 TEMPERATURE SENSOR Accuracy Accuracy of the LMP91300 only, does not include the accuracy of the NTC °C SWIF TIMING Communication rate 1 10 “D” symbol duty cycle: THD/TP ½ “0” symbol duty cycle: TH0/TP 1/4 “1” symbol duty cycle: TH1/TP 3/4 kbits/s ³0´ TH0 ³'´ THD ³1´ TH1 TP Figure 6. Single-Wire Interface (SWIF) Timing Diagram Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Product Folder Links: LMP91300 7 LMP91300 SNOSCS3A – SEPTEMBER 2013 – REVISED OCTOBER 2013 www.ti.com TYPICAL PERFORMANCE CHARACTERISTICS At TA TJ = 25°C, Loop Voltage = 20V to 36V, unless otherwise specified. RP Resolution Temperature Accuracy 14500 5.0 Temperature Sensor Accuracy 4.0 14000 3.0 Accuarcy (C) RP (Dec) 13500 13000 12500 Register Settings RP_MAX = 0x12 RP_MIN = 0x18 RESONATOR_MIN_FREQ = 0x91 OSC_AMP = 4V RESPONSE_TIME = 6144 12000 11500 3.959mm 5000 10000 15000 25000 0.0 ±1.0 ±3.0 4.04mm 20000 1.0 ±2.0 4mm ±4.0 11000 0 2.0 30000 Samples 0.0 20.0 40.0 60.0 80.0 100.0 120.0 Temperature (C) C003 Figure 7. Figure 8. Supply Current vs Supply Voltage Supply Current vs Supply Voltage 4.5 C004 4.5 LC Tank connected to INA and INB RP_MAX = 0x12 RP_MIN = 0x18 RESONATOR_MIN_FREQ = 0x91 OSC_AMP = 1V LC Tank Oscillation Frequency with no Target = 317kHz 3.5 LC Tank connected to INA and INB RP_MAX = 0x12 RP_MIN = 0x18 RESONATOR_MIN_FREQ = 0x91 OSC_AMP = 2V LC Tank Oscillation Frequency with no Target = 317kHz 4.0 Supply Current (mA) 4.0 Supply Current (mA) Using Murata NTC: NCP03WF104F05RL ±5.0 ±40.0 ±20.0 -40C 3.0 +25C 2.5 3.5 -40C 3.0 +25C 2.5 +85C +85C +125C +125C 2.0 2.0 5 10 15 20 25 30 35 Supply (V) 40 5 10 15 20 25 30 35 Supply (V) C005 40 C005 Figure 9. Figure 10. Supply Current vs Supply Voltage SWDRV and SENSE- Waveforms During Short Condition, SHORTCKT_DUTY_CYCLE = 0.1% or 0.8% 4.5 -40C SENSE- Pin +25C Supply Current (mA) 4.0 SWDRV Pin +85C 3.5 2mA/DIV +125C LC Tank connected to INA and INB RP_MAX = 0x12 RP_MIN = 0x18 RESONATOR_MIN_FREQ = 0x91 OSC_AMP = 4V LC Tank Oscillation Frequency with no Target = 317kHz 3.0 2.5 200mV/DIV 2.0 5 10 15 20 25 Supply (V) 30 35 40 C005 Figure 11. 8 10µs/DIV C001 Figure 12. Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Product Folder Links: LMP91300 LMP91300 www.ti.com SNOSCS3A – SEPTEMBER 2013 – REVISED OCTOBER 2013 TYPICAL PERFORMANCE CHARACTERISTICS (continued) At TA TJ = 25°C, Loop Voltage = 20V to 36V, unless otherwise specified. 0.1% Duty Cycle Distribution, PNP Mode 0.1% Duty Cycle Distribution, NPN Mode 600 400 Loop Voltage = 24V Frequency (Count) 250 200 150 100 450 400 350 300 250 200 150 100 50 C011 Duty Cycle (%) 0.8% Duty Cycle Distribution, PNP Mode Duty Cycle (%) C013 Figure 15. 0.1 0.09998 0.09996 0.09994 Duty Cycle (%) 0.8 0.7998 0.7996 0.7994 0.8 0.7998 0.7996 0.7994 0.7992 0.799 0.7988 0.7986 0.7984 50 0.7992 100 0.799 150 0.7988 200 0.7986 250 0.7984 300 Loop Voltage = 24V 0.7982 350 700 650 600 550 500 450 400 350 300 250 200 150 100 50 0 0.798 Frequency (Count) 400 0.7982 0.09992 0.8% Duty Cycle Distribution, NPN Mode Loop Voltage = 24V 450 0.798 0.0999 Figure 14. 500 Frequency (Count) C012 Duty Cycle (%) Figure 13. 0 0.09988 0.09986 0.09984 0.09982 0 0.1 0.09998 0.09996 0.09994 0.09992 0.0999 0.09988 0.09986 0.09984 0.09982 0.0998 50 0.0998 Frequency (Count) 500 300 0 Loop Voltage = 24V 550 350 C014 Figure 16. Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Product Folder Links: LMP91300 9 LMP91300 SNOSCS3A – SEPTEMBER 2013 – REVISED OCTOBER 2013 www.ti.com TYPICAL PERFORMANCE CHARACTERISTICS (continued) At TA TJ = 25°C, Loop Voltage = 20V to 36V, unless otherwise specified. SWDRV and SENSE- Waveforms During Short Condition, SHORTCKT_DUTY_CYCLE = 0.1% SENSE- Pin SWDRV Pin 2mA/DIV 200mV/DIV 2ms/DIV C009 Figure 17. SWDRV and SENSE- Waveforms During Short Condition, SHORTCKT_DUTY_CYCLE = 0.8% SENSE- Pin SWDRV Pin 2mA/DIV 200mV/DIV 500µs/DIV C010 Figure 18. 10 Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Product Folder Links: LMP91300 LMP91300 www.ti.com SNOSCS3A – SEPTEMBER 2013 – REVISED OCTOBER 2013 APPLICATION INFORMATION Functional Description The LMP91300 is a complete analog front end (AFE) optimized for use in inductive proximity sensors. The LMP91300 detects the presence of a metal object based on the RP change of an LC oscillator, depending on the distance of the metal object. The LMP91300 is based on a novel architecture that directly converts the RP of the external LC tank to a digital value. Post manufacturing configuration and calibration is fully supported by the architecture of the LM91300. The temperature dependence of the sensor is digitally compensated, using an external temperature sensor. The LMP91300 provides programmable thresholds, programmable temperature compensation and programmable oscillation frequency range. Due to its programmability, the LMP91300 can be used with a wide variety of external inductors and its detection thresholds can be adjusted to the desired detection distances. The internal LDO has a high input voltage capability, while the architecture enables the use of a low supply as well. The output can be programmed to drive an external transistor in either NPN or PNP mode. Oscillator The oscillator, using an external LC tank (the detector), provides a wide oscillation range from 5kHz to 5MHz. The RP upper and lower limits are programmable, to support a wide range of LC combinations. Within the RP range of the LC tank, the oscillator amplitude is kept constant. When the LC tank RP drops below the lower programmed limit of RP the LMP91300 detects that the target is too close, the amplitude is reduced and the detector output will rail. See Figure 19. Oscillator dies Normal operation ADC saturated, RXWSXWLQJ³RQHV´ ADC saturated, 2XWSXWLQJ³]HURV´, Oscillator running Switch opens Switch closes Hysteresis 1 2 RP = 1.25k RP_MIN Threshold open 4 RP_MAX RP = 5M Threshold close ADC Out Full Scale 3 0 0 Distance to target : f Figure 19. Operating Region Detection The RP of the external LC tank is directly converted to a digital signal. With this approach the only temperature compensation needed is that for RP, which is done through the Look Up Table (Registers 0x00 to 0x5D). Comparator The internal digital comparator accepts the signal from the RP to digital converter, after temperature compensation, and makes a decision, based on the value written to the DET_H_MSB and DET_H_LSB registers. Programmable hysteresis is set by the value in the DET_L_MSB and DET_L_LSB registers. The detection threshold can be set within the programmed RP range. Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Product Folder Links: LMP91300 11 LMP91300 SNOSCS3A – SEPTEMBER 2013 – REVISED OCTOBER 2013 www.ti.com Programming the Switching Point and Hysteresis The typical procedure is that the user puts a target metal at the target distance in front of the manufactured sensor system. The PROXIMITY_MSB and PROXIMITY_LSB registers are read and the DET_H_MSB and DET_H_LSB registers are written with a value that causes the LMP91300 to switch. The metal target is then moved to another distance, farther away than the first distance, the PROXIMITY_MSB and PROXIMITY_LSB registers are read and a value is written to the DET_L_MSB and DET_L_LSB registers that causes the LMP91300 to switch the external transistor off. Low RP, Close Target, Under Range Switch Enable If RP drops below the detectable range, the LMP91300 remains functional. The following applies if at least one temperature conversion has been completed: 1. If RP < 798Ω (for example, the metal plate is against the sensor) before the fourth conversion of the RP to digital converter (after Power On Reset) the oscillation will stop and the switch will be activated regardless of the UNDER_RANGE_SWITCH_EN setting. 2. If RP < 798Ω after the fourth conversion the switch state depends on the setting of UNDER_RANGE_SWITCH_EN. (a) If UNDER_RANGE_SWITCH_EN = 1: The RP to digital converter will output full scale and the switch will be enabled. (b) If UNDER_RANGE_SWITCH_EN = 0: The previous switch state will be held until the oscillation restarts RP > 798Ω) and enough time has passed for a conversion to update the switch status. If a temperature conversion has not been completed the switch state will not be changed. The LMP91300 oscillator will begin to oscillate in less than 10 oscillator periods once the low RP condition is removed. Temperature Compensation As most of the integrated electronics are in the digital domain, close to perfect performance of the LMP91300 over temperature can be expected. As the RP factor of the external LC tank is measured, only the temperature coefficient of the LC tank losses need to be compensated for. The LMP91300 offers a digital temperature compensation feature that provides an accurate RP detection of the external LC tank when losses are introduced due to ambient temperature changes in the operating environment. This can be done by calibrating the Temperature Look-Up Table (LUT) located in registers 0x00 to 0x5D. The calibration involves the user generating gain correction factor coefficients (GCF) and is discussed in detail in the Look-Up Table Calibration section. These registers hold 2 bytes of information representing temperatures ranging from -48°C to 136°C in 4°C increments. The LMP91300 uses linear interpolation to provide 1°C temperature steps in between these 4°C points to improve accuracy. After the LUT has been properly programmed, the Detection Threshold registers need to be programmed for the switching distances desired. The external temperature sensor and the temperature coefficients stored in the LUT produce a functional temperature compensation system. The LUT was designed for an NTC with a beta factor β = 4250 such as the Murata NCP03WF104F05RL. Any other NTC used in the design will require additional adjustments which are explained in detail below. Look-Up Table Calibration 1. RP Measurement: Take RP measurements by reading the Proximity registers 0x7A and 0x7B from the lowest temperature of interest to the highest temperature within the predefined LUT values. The temperature range should fall within the LUT preset values of -48°C to 136°C in 4°C increments. Convert all the measured values from hex to decimal. (a) Proximity measurements at all temperatures between -48°C to 136°C will give the most accurate results. If the proximity measurement at some temperatures are skipped a value will need to be interpolated from the measured values. This is described in step 4. (b) To avoid uncertain conditions outside the temperature range of interest the user should duplicate the same value of RP for the temperature below and above those limits. For example, if the lowest temperature that a proximity measurement was made was -28°C, this value should be used for all lower temperatures. The same applies at the high temperature range of the LUT. 2. Temperature Correlation: For every RP measurement the temperature register TEMP64 (0x79) should be read to ensure that the ambient temperature correlates to the intended LUT preset temperature. The TEMP64 register is an 8 bit unsigned register that contains the temperature (in °C) + 64. Any discrepancy 12 Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Product Folder Links: LMP91300 LMP91300 www.ti.com SNOSCS3A – SEPTEMBER 2013 – REVISED OCTOBER 2013 between ambient temperature and preset LUT temperature during calibration will result in a temperature calibration error. 3. Normalizing RP: Once all RP values have been read and logged for the whole LUT temperature range as illustrated in Figure 20 the data must be normalized to the intended ambient operating temperature T0. This is done by dividing each RP data point by R0, the measured RP at the ambient operating temperature for each temperature of the LUT register. This ratio provides the gain correction factor coefficients (GCF) as shown in Figure 21. If the ambient operating temperature T0 does not fall on one of the 4°C incremental points of the LUT then R0 will need to interpolated. RP T0: Temperature of operating environment R0: RP at operating environment R-1 R0 R1 -48°C -44°C -40°C T-1 T0 T1 128°C 132°C 136°C Temperature Figure 20. RPMeasurement Example GCF GCF-1 = R-1 R0 GCF1 = R1 R0 T0: Temperature of operating environment GCF0: Normalized to 1 at operating environment 1 -48°C -44°C -40°C T-1 T0 T1 128°C 132°C 136°C Temperature Figure 21. GCF Normalized Example 4. Interpolating GCF values that have not been measured: Plot the measured GCF values vs temperature and then make a polynomial trend line of the data. Use the formula of the trend line to determine the GCF values for all temperatures that were not measured. 5. LUT Data Entry: Each GCF needs to be converted from decimal to a 16 bit binary word representing a decimal number between 0 and 4. An example illustrating this binary representation of the decimal number is shown in Figure 22. The conversion equation that scales the GCF into the 16 bit binary GCFBINARY is shown in Equation 1. Once the conversion has been calculated for each temperature the values are programmed into the appropriate registers in the LUT. The MSB of the LUT value consists of bits D15 to D8 as shown in Figure 22, the LSB are bits D7 to D0. Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Product Folder Links: LMP91300 13 LMP91300 SNOSCS3A – SEPTEMBER 2013 – REVISED OCTOBER 2013 D15 D14 D13 D12 www.ti.com D7 D6 D5 D4 D3 D2 D1 D0 Decimal Representation Figure 22. Binary Representation of Gain Correction Factor GCFBINARY = GCF × 216 4 (1) 6. NTCs with a β ≠ 4250: The temperature LUT has been internally hard coded based on a specific NTC with a β factor of 4250 (Murata NCP03WF104F05RL). The user must recalibrate the LUT when an NTC with a β factor other than 4250 is used. The LUT temperature range is extended past the LMP91300 operating range to facilitate recalibrating the LUT if using other off the shelf NTC components. The process for using a NTC that has β ≠ 4250 is as follows: (a) Put the finished system including the LC tank, NTC and LMP91300 into a temperature chamber. (b) Set the temperature of the chamber to a value, for this example we will use -40°C. (c) Read the temperature from register 0x79. For this example we will use -44°C. (d) Follow the process above to determine the gain. (e) The gain value will go into the -44°C position of the LUT. Power Supply An internal regulator with an external NPN transistor is used to power the LMP91300 directly from the loop. LED Drive An external LED can be driven with the LED pin. Red and Green LEDs are supported. The LED current can be programmed to 2.5mA or 5 mA. This LED indicates the state of the sensor. Typically the LED is on if the switch is closed, but this is programmable in the OUT_CONFIG_INIT and OUT_CONFIG_FNL registers. This LED will also indicate an output overload condition situation or ECC error. SWDRV The LMP91300 drives an external transistor, to implement a NPN or PNP function. During power up the drive pin (SWDRV) is pulled down using a high resistance to avoid turning on the external transistor, until the LMP91300 is fully functional. Overload Protection Short circuit detection and overload protection are implemented in the LMP91300, using an external sense resistor, RSENSE. When the voltage drop across RSENSE exceeds about 310 mV the LMP91300 detects a short circuit condition. If this condition persists, the switch is toggled between being open and closed. The switch will be on for about 30µs, with a duty cycle as set in OUT_CONFIG_INIT (0x72) bit 0 (SHORTCKT_DUTY_CYCLE) or OUT_CONFIG_FNL (0x78) bit 0 (SHORTCKT_DUTY_CYCLE) to protect the external BJT. For example, if SHORTCKT_DUTY_CYCLE is set to 0.1% the switch drive will be on for 30µs and off for 29.97ms (tOFF = (30µs/0.1%) - 30µs). During a short circuit event, the load current is limited to I=480mV/RSENSE. The LMP91300 will come out of the overload protection mode once the drop across RSENSE is less than 310mV. When designing the overload protection circuitry the user must select the appropriate transistors, SWDRV current setting, RSENSE resistor and short circuit duty cycle. The transistor should be selected to handle the load current and supply voltage both during normal operation and during an overload situation to ensure that it remains in the safe operating region at all times. The RSENSE resistor should be chosen to set the current limit and over current threshold. The SWDRV current should be selected to ensure that during a short circuit condition the SWDRV current is capable of sourcing or sinking the programmed current depending on NPN or PNP configuration. This ensures that the short circuit control loop remains regulated and enforces the current limit and over current threshold. Once overload protection design is complete the user has the option to choose between the two duty cycle options. 14 Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Product Folder Links: LMP91300 LMP91300 www.ti.com SNOSCS3A – SEPTEMBER 2013 – REVISED OCTOBER 2013 Configurations NPN and PNP 3 wire configurations as shown in the TYPICAL APPLICATION section are supported by the LMP91300. Component Selection and Layout The following PCB layout guidelines and suggested components should be used when designing a PCB. CF (CFA and CFB Pins) 10pF to 100nF, ≥10V, X7R ceramic capacitor. The traces connecting CFA and CFB to the capacitor should be as short as possible to minimize the parasitic capacitance. The value of this capacitor will be based on the time constant and resonating frequency of the LC tank. For optimal performance, the value of CF, needs to be as small as possible, but large enough such that the active filter does not saturate. The size of this capacitor depends on the time constant of the sense coil, which is given by L/RS, (L = inductance, RS = series resistance of the inductor at oscillation frequency). The larger this time constant becomes, the larger the value of filter capacitor that is required. Hence, this time constant reaches its maximum when there is no target present in front of the sensing coil. The following procedure can be used to determine CF: 1. Start with a default value of 10nF for CF. 2. Set RP_MAX, PADC_TIMEC, RP_MIN, RESONATOR_MIN_FREQ, OSC_AMP, and RESPONSE_TIME to the desired values as described in the Register Information section. 3. Move the metal target far away from the LC tank. 4. Connect a scope probe to the INB (pin 21) and CFB (pin 17) pins. Since the CFB pin is very sensitive to capacitive loading, it is recommended to use an active probe. As an alternative, a passive probe with a 1kΩ series resistance between the tip and the CFB pin can be used. 5. Set the time scale of the oscilloscope so that many periods of the signal on the INA pin can be seen. See Figure 23. 6. Set the CF capacitor value so that the AC portion of the waveform is about 1VPP maximum. Decreasing the capacitor value will make the AC portion of the waveform larger. This signal scales linearly with the reciprocal of the filter capacitance. For example, if a 100pF filter capacitor is used and the signal observed on the CFB pin has a peak-to-peak value of 200mV, the desired 1V peak-to-peak value is obtained using a 200mV / 1V × 100pF = 20pF filter capacitor. Figure 23 shows the waveforms on CFB and INA and Figure 24 shows the waveforms using a zoomed in horizontal scale. Note that the waveforms on CFB and INA are not a constant amplitude. The waveform on CFB should be adjusted so that the maximum value is 1VPP. CFB 1 V/DIV INA 1 V/DIV 50 µs/DIV Figure 23. Determining the Value of CF Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Product Folder Links: LMP91300 15 LMP91300 SNOSCS3A – SEPTEMBER 2013 – REVISED OCTOBER 2013 www.ti.com CFB 1 V/DIV INA 1 V/DIV 20 µs/DIV Figure 24. Determining the Value of CF NTC (TEMP+ Pin) The thermistor, such as the Murata NCP03WF104F05RL, should be placed as close to the LC tank as possible to minimize error introduced by temperature variation within the operating environment. The NTC should also be close to the LMP91300 to minimize the parasitic capacitance. It is connected between pins 22 and 23. There should be a ground trace separating the thermistor from the LC tank, to minimize the coupling from the signal on the LC tank. Ideally, the thermistor could be on one side of the PCB and the LC tank on the other side of the PCB with a ground plane between them. C1 0.1µF to 1µF, ≥50V, X7R ceramic capacitor. This is a bypass capacitor for the regulator. The value of this resistor will also affect the rising and falling edges of the SWIF signal. A good value to start with is 0.1µF. CV+/EXT E 100nF, ≥10V, X7R ceramic capacitor. If the loop voltage is ≤ 8V, 100nF is the maximum value that can be used. CBY (CBY Pin) 56nF, ≥5V, X7R ceramic capacitor. Connect between the CBY pin and ground. RSENSE The value of this resistor and power rating of the RSENSE resistor depends on the amount of current allowed through the switch transistor. The LMP91300 has an Over Current Detection Threshold of 310mV typical. When the LMP91300 detects ≥ 310mV across the sense resistor it will go into Overload Protection mode. In this mode it will periodically turn on the switch for 30µs to check if the overload condition is still there. If the LMP91300 detects a value ≥ 310mV (typical) across the sense resistor it will limit the current through the switch so that the voltage across RSENSE is ≤ 480mV. See the OVERLOAD PROTECTION entries in the ELECTRICAL CHARACTERISTICS section and Figure 12, Figure 17, and Figure 18. REXT B (EXT B Pin): The internal regulator along with the external NPN transistor will develop 5V on the V+/EXT E pin. The EXT B pin will be one diode drop above this at about 5.6V. The voltage across REXT B will be the difference between the loop voltage and the 5.6V on the EXT B pin. A value of between 10kΩ to 33kΩ can be used for REXT B. The user must ensure that the resistor has the correct power rating and that the regulated 5V on the V+/EXT E pin comes up correctly for the entire loop voltage range. R1 33kΩ, 1/8W resistor. 16 Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Product Folder Links: LMP91300 LMP91300 www.ti.com SNOSCS3A – SEPTEMBER 2013 – REVISED OCTOBER 2013 SENSE1+ and SENSE2+ Pins (RSENSE1+, RSENSE2+) If the supply is ≤ 40V these pins can be shorted to the supply. If the supply is > 40V resistors must be placed between the SENSE1+ and SENSE2+ pins and the supply. These resistors must drop enough voltage so that the pins of the LMP91300 are < 40V. The resistors will have 100µA going through them. For example, if the supply is at 50V, 10V will need to be dropped across these resistors so the resistance will be 10V/100µV = 100kΩ. These resistors must be matched resistors, 0.1% or better. Keep the trace between the LMP91300 and the resistors short. In NPN mode the SENSE1+ pin is not used. It should be connected to the supply as described above. NPN A SMBTA06 or similar transistor. PNP A FMMT593 or similar transistor. LED The LMP91300 can be programmed to supply 2.5 or 5mA. The LED chosen should have a voltage drop of less than 3V. If an LED is not needed the LED pin can be connected directly to the V+/EXT E pin. The LMP91300 uses the LED pin to talk back to the device controlling the SWIF interface by sinking current into the LED pin. LC Tank and INA and INB Pins There should be a ground trace between the INA and INB pins and the rest of the pins of the LMP91300 to decrease the coupling of the signal on the INA and INB pins to the other pins of the LMP91300. The trace between the LC tank and the INA and INB pins should be as short as possible as shown in part A of Figure 25. Longer traces between the LC tank and the INA and INB pins can cause ringing at the INA and INB pins which can produce very noisy proximity readings. If longer traces need to be used split the LC tank so that the capacitor is close to the LMP91300 as shown in part B of Figure 25. If both the L an C have to be located a longer distance away from the LMP91300 small capacitors (15 to 22pF) can be connected between INA and ground and INB and ground as shown in part C of Figure 25. Short Traces L Long Traces INA LMP91300 C Short Traces L C INB A Long Traces INA LMP91300 L INA LMP91300 C INB B INB C Figure 25. LC Tank Traces SWDRV Pin Keep the trace between the SWDRV pin and the transistor short. P1 to P5 Pins Connect to ground using short traces. GND Pins Connect to ground using short traces. Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Product Folder Links: LMP91300 17 LMP91300 SNOSCS3A – SEPTEMBER 2013 – REVISED OCTOBER 2013 www.ti.com NC Pins These pins do not connect to the silicon and can be left unconnected. Exposed DAP Connect to ground. The DAP area on the PCB can be used as the center of a star ground with all other ground pins connecting to it. SENSEIn PNP mode the SENSE- pin is not used. It should be connected to ground. Programming Through the 2-wire loop connection, all parameters such as the LUT, operation modes, output modes and detection thresholds can be programmed after the sensor manufacturing process is finished. The LMP91300 is one time programmable in a 3 step process. During the manufacturing process the configuration and calibration data will be written to the device and then a special code will be written that disables communication. Burning Programmed Values into the Registers There are three steps to burning values into the registers. 1. Burn the Temperature Look Up Table data (0x00 – 0x5D), initial registers, device information registers, and configuration registers (0x66 – 0x72). (a) Use SWIF to program values into these registers (0x00 – 0x72). (b) Use SWIF to write 0x08 to register 0x7F to permanently burn the values into the registers. (c) Optional: Wait 300ms and read back the status register (0x7E). It should read 0x21 if the registers have been successfully burned. 2. Burn final registers (0x73 – 0x78). (a) Use SWIF to program values into these registers (0x73 – 0x78). (b) Use SWIF to write 0x10 to register 0x7F to permanently burn the values into the registers. (c) Optional: Wait 300ms and read back the status register (0x7E). It should read 0x23 if the registers have been successfully burned. 3. Burn SWIF mode. After the device has been programmed the write function using SWIF needs to be disabled. (a) Read Only. The SWIF write function is disabled but registers can still be read back using SWIF. Use SWIF to write 0x40 to address 0x7F. After the device is power cycled it will be read only. (b) Disabled. The SWIF is completely disabled, both write and read functions are disabled. Use SWIF to write 0x80 to address 0x7F. After the device is power cycled SWIF will be disabled. (c) Optional: Before power cycling the device wait 300ms and read back the status register (0x7E). It should read 0x27 for read only or 0x2F for SWIF disabled. 4. 4. It is possible to combine steps 1 and 2 and burn the Look Up Table, initial registers, device information registers, configuration registers, and final registers (0x00 – 0x78) at one time. (a) Use SWIF to program values into these registers (0x00 – 0x78). (b) Use SWIF to write 0x20 to register 0x7F to permanently burn the values into the registers. (c) Optional: Wait 300ms and read back the status register (0x7E). It should read 0x23 if the registers have been successfully burned. Single-Wire Interface (SWIF) The LMP91300 uses a bi-directional Single Wire Interface protocol to program and read registers. To communicate with the LMP91300 (slave) through the SWIF interface, the micro controller (master) must transmit (write) data through the DC loop supply voltage that should be set to +8V during programming or communication. This superimposed signal of pulses transitions between 8V and 12V is on top of the +8V DC loop supply voltage. When the master transmits data into the LMP91300 the signal propagates into the SENSE2+ pin through the supply. The master receives data from the LMP91300 through the LED pin in the form of alternating current pulses. These current pulses will be 5mA in amplitude. The LED pin must be connected to ground, either through an LED or directly connected to ground for the LMP91300 to talk to the master. 18 Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Product Folder Links: LMP91300 LMP91300 www.ti.com SNOSCS3A – SEPTEMBER 2013 – REVISED OCTOBER 2013 The communication scheme utilizes various pulse width waveforms to represent different symbols as shown in Figure 26. The binary representation of a zero bit is represented by a 25% pulse duty cycle, a one bit is represented by a 75% pulse duty cycle, and idle bit is represented by a 50% duty cycle. All pulses transmitted must fall within the pulse width specifications provided within the electrical characteristics table. ZERO Bit IDLE Bit ONE Bit 1 Time Unit 1 Time Unit 1 Time Unit 25% Duty Cycle 50% Duty Cycle 75% Duty Cycle Figure 26. Single Wire Interface (SWIF) Symbol Diagram The LMP91300 can be programmed at an input transfer bit rate between 1kbps to 10kbps. There is no acknowledge signal during the input data transfer so the master should read back the data to ensure data integrity and a successful data transfer has occurred. A read transaction is executed by the master transmitting data to configure the pointer register resulting in data output transfer by the slave. The LMP91300 transmits read back data at a speed of about 7kbps. Write Operation A frame begins with a minimum of one IDLE bit. To perform a write operation, the master must send an IDLE bit followed by the R/W bit set to 0 and the 7-bit address of the register that is intended to be programmed. The data to be written into the address location follows with the Most Significant Bit first and the write operation is terminated with an IDLE bit. There are 8 bits in each data byte and the maximum number of data bytes can be up to 8 bytes. Data being transmitted from the master to the slave can be terminated by the master by sending an IDLE bit after any data byte. After communication, to initiate another communication, the master must transmit another IDLE. When an invalid bit that violates the SWIF symbol protocol is transferred, the SWIF will reset and wait for the IDLE bit. k: The total number of bytes, k = 8 (max) Complete frame for a Write Operation 8*k bits 8 bits IDLE R/W = 0 8 bits 7-bit Address D7 DATA C DATA D0 IDLE Figure 27. Complete Frame for a Write Command Read Operation The read signal is made by modulating the supply current. This can be read by using a sense resistor in the supply line. The LMP91300 modulates the supply current by sinking current into the LED pin. The V+/EXT and LED pins need to be connected by either an LED, resistor, or directly shorted for the Read operation to work. To perform a read operation, the master must send an IDLE bit to initiate communication, a R/W bit that should be set to 1, a 7-bit address, and another IDLE bit. Data is written back after the R/W and address byte are received so there must be a 9th rising edge to ensure that this condition is satisfied. After the last bit, A0, of the address is sent there should only be one rising edge to perform the IDLE bit. There are two valid methods of providing one rising edge, (1) a single pulse, or (2) a rising edge with the signal held high. See Figure 28 for a timing example of both cases. Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Product Folder Links: LMP91300 19 LMP91300 SNOSCS3A – SEPTEMBER 2013 – REVISED OCTOBER 2013 www.ti.com 9TH Rising Edge IDLE IDLE 7-bit Address R/W = 1 A6 A5 A4 A3 A2 A1 A0 (1) R/W = 1 A6 A5 A4 A3 A2 A1 A0 (2) End of Read Command: LMP91300 Enters Transmit Mode Start of Read Command Figure 28. Read Timing Example: (1) Single Pulse, (2) Hold Signal High After Last Rising Edge The LMP91300 goes into transmit mode 10μs plus a symbol length after the IDLE rising edge and no longer accepts any data until transmission is done. The master is not allowed to send anything until the slave has finished sending the data. Data is always written back on a read command with an IDLE bit, 8 bytes of data, and another IDLE bit. All transmitting is done in 8 byte blocks with the exception that only one byte is transmitted when the STATUS register (0x7E) is read. Since data transfer is always 8 bytes maximum (except for when register 0x7E, STATUS is read), there is a maximum wait time (8 bits*8 bytes + IDLE + IDLE + 10us) that the master must wait before taking ownership of the bus. The amount of time it takes for SWIF to switch from input to output is about one symbol. k: The total number of bytes, k = 8 (max) Complete frame for a Read Operation 8 bits IDLE R/W = 1 7-bit Address Symbol + 10s IDLE Master Initiates a Read Operation 8*k bits 8 bits IDLE D7 DATA C DATA D0 IDLE LMP91300 Enters Transmit Mode and Returns DATA Figure 29. Complete Frame for a Read Command The user has the option to set the LMP91300 into a read-only mode or SWIF disabled mode. When placed in read-only mode, the SWIF can only be used to read back the registers but all write capability is disabled. When placed in SWIF disabled mode, both read and write capabilities are disabled. Determining the RP of an LC Tank The method in the Quick Start section for setting the values in the LMP91300 registers requires that the RP of the LC tank be known at the switching point (the point that the switch is changed from the normal condition to the triggered condition). The best method is to use an impedance analyzer to characterize the RP of the LC tank over distance. If an impedance analyzer is not available the RP of the LC tank can be determined using the method below. 1. Set the target at the switching distance from the sensor. 2. Set PADC_TIMEC = 1, RESONATOR_MIN_FREQ as described in the Register Information section, OSC_AMP = 4V, and RESPONSE_TIME = 6144. 3. Put a scope probe on INA or INB. 4. Step RP_MIN up one step at a time until the amplitude of the signal on the oscilloscope becomes variable as shown in Figure 23 and Figure 24. Increase RP_MIN by two, for example if the amplitude becomes variable at 17, set RP_MIN to 19. 5. Step RP_MAX up one step at a time until the amplitude of the signal on the oscilloscope becomes steady. Decrease RP_MAX by two steps, for example if amplitude became steady at 16, set RP_MAX to 14. 6. Set the CF capacitor as described in the CF (CFA and CFB Pins) section. 20 Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Product Folder Links: LMP91300 LMP91300 www.ti.com SNOSCS3A – SEPTEMBER 2013 – REVISED OCTOBER 2013 7. Read the Proximity value in registers 0x7A and 0x7B and convert this value to decimal. 8. Use the formula RPLCTANK (Ω) = (RP_MAX × RP_MIN ) / ( RP_MIN × (1-Y) + RP_MAX × Y ), where Y = Proximity Data / 2^15 and RP_MAX and RP_MIN are the impedance values shown in Register Information section. This value can have a tolerance of ±25% when compared to the value from an impedance analyzer. Quick Start When a new sensor is being used the registers should be setup using the following procedure. Instructions on how to determine the value to put in each register are described in the Register Information section. 1. Set RP_MAX in the OSC_CONFIG_0 register. 2. Set PADC_TIMEC and RP_MIN in the OSC_CONFIG_1 register. 3. Set RESONATOR_MIN_FREQ in the OSC_CONFIG_2 register. 4. Set UNDER_RANGE_SWITCH_EN, OSC_AMP, and RESPONSE_TIME in the OSC_CONFIG_3_INIT and OSC_CONFIG_3_FNL registers. The same values should be written to both registers. Setting OSC_AMP to 4V and RESPONSE_TIME to 6144 should give the most accurate results. Note that the power on default for OSC_AMP is 11:Reserved so OSC_AMP must be changed to either 1V, 2V, or 4V. 5. Select the value of the CF capacitor as described in the CF (CFA and CFB Pins) section. 6. Set the values in the OUT_CONFIG_INIT and OUT_CONFIG_FNL registers as needed. The same values should be written to both registers. 7. Put the sensor at the target distance that the switch is supposed to turn on. Read the PROXIMITY_MSB and PROXIMITY_LSB multiple times. If needed, RP_MAX or RP_MIN can be adjusted up or down one step at a time to determine the combination that gives the most accurate setting for this specific sensor. 8. Put the sensor at the target distance that the switch is supposed to turn on. Read the PROXIMITY_MSB and PROXIMITY_LSB multiple times, take an average, and write this value into the DET_H_MSB_INIT and DET_H_LSB_INIT and DET_H_MSB_FNL and DET_H_LSB_FNL registers. This value may need to be adjusted. 9. Put the sensor at the target distance that the switch is supposed to turn off. Read the PROXIMITY_MSB and PROXIMITY_LSB multiple times, take an average, and write this value into the DET_L_MSB_INIT and DET_L_LSB_INIT and DET_L_MSB_FNL and DET_L_LSB_FNL registers. This value may need to be adjusted. Usage Priority of Registers When a LMP91300 is powered on the register values that are used depends on if the LMP91300 has had values burned into the registers. See register 0x7F, BURN_REQ. 1. No values have been burned into registers: (a) When powered on the LMP91300 will use the default values in registers 0x00-0x5D and 0x66-0x72. (b) If a value is written to any of these registers (0x00-0x5D and 0x66-0x72) the LMP91300 will use the value written instead of the power on default value. (c) If a value is written into a FNL register (0x73-0x78) the LMP91300 will continue to use the value in the INIT register instead of the corresponding FNL register. For example, if register OSC_CONFIG_3_FNL (0x77) has a value written to it, the LMP91300 will continue using the OSC_CONFIG_3_INIT (0x71) register and not use the value in the OSC_CONFIG_3_FNL (0x77) register. (d) If the LMP91300 is powered off and back on it will use the default values in registers 0x00-0x5D and 0x66-0x72. 2. Values have been burned into the LMP91300 memory using burn request 0x08. (a) When powered on the LMP91300 will use the burned values in registers 0x00-0x5D and 0x66-0x72. (b) If a value is written to any of these registers (0x00-0x5D and 0x66-0x72) the LMP91300 will use the written value instead of the burned value. (c) If a value is written into a FNL register (0x73-0x78) the LMP91300 will continue to use the value in the INIT register instead of the corresponding FNL register. For example, if register OSC_CONFIG_3_FNL (0x77) has a value written to it, the LMP91300 will continue using the OSC_CONFIG_3_INIT (0x71) register and not use the value in the OSC_CONFIG_3_FNL (0x77) register. (d) If the LMP91300 is powered off and back on the LMP91300 will use the burned values in registers 0x000x5D and 0x66-0x72. Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Product Folder Links: LMP91300 21 LMP91300 SNOSCS3A – SEPTEMBER 2013 – REVISED OCTOBER 2013 www.ti.com 3. Values have been burned into the LMP91300 memory using burn request 0x10 or 0x20. (a) When powered on the LMP91300 will use the burned values in registers 0x00-0x5D, 0x6A-0x70 and 0x73-0x78. (b) If a value is written to an INIT register (0x66-0x69, 0x71-0x72) it will be ignored and the corresponding FNL register (0x73-0x78) will be used. (c) If a value is written to a FNL register (0x73-0x78) the LMP91300 will use the written value instead of the burned value. (d) If the LMP91300 is powered off and then back on the LMP91300 will use the burned values in registers 0x00-0x5D, 0x6A-0x70 and 0x73-0x78. It is important to remember that the LMP91300 will always use the values in the initial registers (either temporary written values or permanently burned values) if the final registers have not had values burned into them. If the final registers have had values burned into them, the LMP91300 will always use the final registers (either the permanently burned value or a value that has been temporally written in a final register). The burn status of the LMP91300 can be determined by reading the STATUS register (0x7E) as long as a 0x80 burn request has not been issued. Each register can only have a value burned into it one time. It is not possible to burn a value into a register multiple times. Register Information Name Description Address Type Default LUT_x_GAIN_MSB, LSB Temperature Look Up Table, -48°C to +136°C in 4°C steps, 2 bytes - gain 0x00-0x5D RW 0x40 - even addresses, 0x00 - odd addresses RESERVED Reserved 0x5E-0x65 RO 0x00 DET_H_MSB_INIT Detection High Threshold MSB (Initial) 0x66 RW 0x00 DET_H_LSB_INIT Detection High Threshold LSB (Initial) 0x67 RW 0x00 DET_L_MSB_INIT Detection Low Threshold MSB (Initial) 0x68 RW 0x00 DET_L_LSB_INIT Detection Low Threshold LSB (Initial) 0x69 RW 0x00 INFO0 Device Information 0 0x6A RW 0x00 INFO1 Device Information 1 0x6B RW 0x00 INFO2 Device Information 2 0x6C RW 0x00 INFO3 Device Information 3 0x6D RW 0x00 OSC_CONFIG_0 Oscillator Configuration 0 0x6E RW 0x0E OSC_CONFIG_1 Oscillator Configuration 1 0x6F RW 0x14 OSC_CONFIG_2 Oscillator Configuration 2 0x70 RW 0x45 OSC_CONFIG_3_INIT Oscillator Configuration 3 (Initial) 0x71 RW 0x1B OUT_CONFIG_INIT Output Configuration (Initial) 0x72 RW 0xA2 DET_H_MSB_FNL Detection High Threshold MSB (Final) 0x73 RW 0x00 DET_H_LSB_FNL Detection High Threshold LSB (Final) 0x74 RW 0x00 DET_L_MSB_ FNL Detection Low Threshold MSB (Final) 0x75 RW 0x00 DET_L_LSB_ FNL Detection Low Threshold LSB (Final) 0x76 RW 0x00 OSC_CONFIG_3_FNL Oscillator Configuration 3 (Final) 0x77 RW 0x1B OUT_CONFIG_FNL Output Configuration (Final) 0x78 RW 0xA2 TEMP64 Temperature in °C + 64 0x79 RO NA PROXIMITY_MSB Proximity MSB 0x7A RO NA PROXIMITY_LSB Proximity LSB 0x7B RO NA RESERVED Reserved 0x7C-0x7D RO 0x00 STATUS Device Status 0x7E RO NA BURN_REQ Burn Request 0x7F WO NA 22 Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Product Folder Links: LMP91300 LMP91300 www.ti.com SNOSCS3A – SEPTEMBER 2013 – REVISED OCTOBER 2013 DET_H_MSB_INIT – Detection High Threshold MSB (Initial) (address 0x66) Bit Name Function (Default values in bold) [7:0] DET_H_MSB_INIT 0x00: Detection High Threshold MSB (Initial) See the Usage Priority of Registers section. A starting value to put in the DET_H_MSB_INIT and DET_H_LSB_INIT registers can be determined by first setting the correct values in the OSC_CONFIG_0, OSC_CONFIG_1, OSC_CONFIG_2, OSC_CONFIG_3_INIT, OUT_CONFIG_INIT registers, putting the target at the distance away from the target that it is supposed to switch on at, reading the values in the PROXIMITY_MSB and PROXIMITY_LSB registers, and writing these values into the DET_H_MSB_INIT and DET_H_LSB_INIT registers. This value can be then adjusted as needed. DET_H_LSB_INIT – Detection High Threshold LSB (Initial) (address 0x67) Bit Name Function (Default values in bold) [7:0] DET_H_LSB_INIT 0x00: Detection High Threshold LSB (Initial) See the Usage Priority of Registers section. DET_L_MSB_INIT – Detection Low Threshold MSB (Initial) (address 0x68) Bit Name Function (Default values in bold) [7:0] DET_L_MSB_INIT 0x00: Detection Low Threshold MSB (Initial) See the Usage Priority of Registers section. A starting value to put in the DET_L_MSB_INIT and DET_L_LSB_INIT registers can be determined by first setting the correct values in the OSC_CONFIG_0, OSC_CONFIG_1, OSC_CONFIG_2, OSC_CONFIG_3_INIT, OUT_CONFIG_INIT registers, putting the target at the distance away from the target that it is supposed to switch off at, reading the values in the PROXIMITY_MSB and PROXIMITY_LSB registers, and writing these values into the DET_L_MSB_INIT and DET_L_LSB_INIT registers. This value can be then adjusted as needed. DET_L_LSB_INIT – Detection Low Threshold LSB (Initial) (address 0x69) Bit Name Function (Default values in bold) [7:0] DET_L_LSB_INIT 0x00: Detection Low Threshold LSB (Initial) See the Usage Priority of Registers section. INFO0 – Device Information 0 (address 0x6A) Bit Name Function (Default values in bold) [7:0] INFO0 0x00: Device Information 0 This register can be used to store information such as assembly date, model number, revision number or any other data. INFO1 – Device Information 1 (address 0x6B) Bit Name Function (Default values in bold) [7:0] INFO1 0x00: Device Information 1 This register can be used to store information such as assembly date, model number, revision number or any other data. Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Product Folder Links: LMP91300 23 LMP91300 SNOSCS3A – SEPTEMBER 2013 – REVISED OCTOBER 2013 www.ti.com INFO2 – Device Information 2 (address 0x6C) Bit Name Function (Default values in bold) [7:0] INFO2 0x00: Device Information 2 This register can be used to store information such as assembly date, model number, revision number or any other data. INFO3 – Device Information 3 (address 0x6D) Bit Name Function (Default values in bold) [7:0] INFO3 0x00: Device Information 3 This register can be used to store information such as assembly date, model number, revision number or any other data. OSC_CONFIG_0 – Oscillator Configuration 0 Register (address 0x6E) Bit Name Function (Default values in bold) [7:5] Reserved 000 [4:0] RP_MAX 01110: Maximum RP, logarithmic scale The optimal setting for RP_MAX is the highest value for which the correct amplitude is maintained, with the target set at the maximum switching distance. 1. Determine RLCTANK as shown in the Determining the RP of an LC Tank section. 2. Multiply RPLCTANK by 2 and use the next higher value from the chart below. For example, if RPLCTANK measured at 4mm is 11113, 11113x2 = 22226, so 12 (27704) would be used for RP_MAX. 3. This value can be adjusted up or down as needed. Register Setting (Hex) RP (Ω) Register Setting (Hex) RP (Ω) Register Setting (Hex) RP (Ω) 0 3926991 B 193926 16 9235 1 3141593 C 145444 17 7182 2 2243995 D 109083 18 5387 3 1745329 E 83111 19 4309 4 1308997 F 64642 1A 3078 5 981748 10 48481 1B 2394 6 747998 11 38785 1C 1796 7 581776 12 27704 1D 1347 8 436332 13 21547 1E 1026 9 349066 14 16160 1F 798 A 249333 15 12120 24 Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Product Folder Links: LMP91300 LMP91300 www.ti.com SNOSCS3A – SEPTEMBER 2013 – REVISED OCTOBER 2013 OSC_CONFIG_1 – Oscillator Configuration 1 Register (address 0x6F) Bit Name Function (Default values in bold) [7:5] PADC_TIMEC 000: Sensor time constant range [4:0] RP_MIN 10100: Minimum RP, logarithmic scale The PADC_TIMEC (time constant), sets the damping of the readout circuitry. The higher this Parameter is set, the more damping it has. If programmed to zero (0), it has no damping, and the system is almost unstable. The oscillation amplitude (envelope) will vary a lot. If this parameter is set to max (7), the damping is maximum, but that also means the response becomes slow. The optimal setting is what in control theory is called "critical damping", that is the least damping required to prevent overshoot in the step response. In most cases set PADC_TIMEC = 1. The optimal setting for RP_MIN is the highest value for which the correct amplitude is maintained, with the target at the minimum switching distance. Some margin is given to the value. 1. Determine RPLCTANK as shown in the Determining the RP of an LC Tank section. 2. Divide the RPLCTANK value by 2 and then select the next lower RP value from the chart above. For example, if the finished Proximity Sensor is to detect at 4mm and the RPLCTANK measured at 4mm is 11113, 11113/2 = 5556.5, so 18 (5387) would be used for RP_MIN. 3. This value can be adjusted up or down as needed. OSC_CONFIG_2 – Oscillator Configuration 2 Register (address 0x70) Bit Name Function (Default values in bold) [7:0] RESONATOR_MIN_FREQ 01000101: Minimum frequency setting, logarithmic scale Determine the minimum oscillation frequency (fMIN) of the LC tank. This is when there is no target in front of the LC tank. Calculate a value 20% below the minimum oscillation frequency, f80% = fMIN x 0.8. Use the following formula to calculate the value for RESONATOR_MIN_FREQ: f80% 2000 255 × log 5000 log (2) Take this value, round up to the next integer and convert to hex. Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Product Folder Links: LMP91300 25 LMP91300 SNOSCS3A – SEPTEMBER 2013 – REVISED OCTOBER 2013 www.ti.com OSC_CONFIG_3_INIT – Oscillator Configuration 3 Register (Initial) (address 0x71) Bit Name Function (Default values in bold) [7:6] RESERVED 00 [5] UNDER_RANGE_SWITCH_EN 0: Off 1: On [4:3] OSC_AMP 00: 1V 01: 2V 10: 4V 11: Reserved [2:0] RESPONSE_TIME 000: Reserved 001: 96 010: 192 011: 384 100: 768 101: 1536 110: 3072 111: 6144 See the Usage Priority of Registers section. UNDER_RANGE_SWITCH_EN: The following applies if at least one temperature conversion has been completed: 1. If RP < 798Ω (for example, the metal plate is against the sensor) before the fourth conversion of the RP to digital converter (after a Power On Reset) the oscillation will stop and the switch will be activated regardless of the UNDER_RANGE_SWITCH_EN setting. 2. If RP < 798Ω after the fourth conversion the switch state depends on the setting of UNDER_RANGE_SWITCH_EN. (a) If UNDER_RANGE_SWITCH_EN = 1: The RP to digital converter will output full scale and the switch will be enabled. (b) If UNDER_RANGE_SWITCH_EN = 0: The previous switch state will be held until the oscillation restarts RP > 798Ω) and enough time has passed for a conversion to update the switch status. If a temperature conversion has not been completed the switch state will not be changed. OSC_AMP: The oscillation amplitude at pins INA and INB can be set to 1V, 2V, or 4V. If the LMP91300 has not been burned with user values, the power on value for OSC_AMP is 11: Reserved. This will need to be changed to either 1V, 2V or 4V before the LMP91300 is used. RESPONSE_TIME: Using a lower response time will shorten the settling time of the digital filter and give faster readings from the RP to digital converter but will increase the noise in the reading. A higher setting gives the digital filter more time to settle and will decrease the noise in the reading. 26 Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Product Folder Links: LMP91300 LMP91300 www.ti.com SNOSCS3A – SEPTEMBER 2013 – REVISED OCTOBER 2013 OUT_CONFIG_INIT – Output Configuration Register (Initial) (address 0x72) Bit Name Function (Default values in bold) [7:6] SWDRV_CURRENT 00: 2.5mA 01: 3.75mA 10: 5mA 11: 10mA 5 OUTPUT_MODE 0: 3 Wire NPN 1: 3 Wire PNP 4 DRIVE_MODE 0: Normally open 1: Normally closed 3 LED_ENABLE 0: On 1: Off 2 LED_MODE 0: Normally off 1: Normally on 1 LED_CURRENT 0: 2.5mA 1: 5mA 0 SHORTCKT_DUTY_CYCLE 0: 0.1% 1: 0.8% See the Usage Priority of Registers section. SWDRV_CURRENT: Used to set the amplitude of current from the SWDRV pin used to control the external transistor. DRIVE_MODE: Normally open and normally closed refer to the external NPN or PNP switch when a target is far away from the inductive sensor. When the switch is normally open the transistor is not conducting when the target is far away from the target (the distance is greater than the value in DET_L_MSB and DET_L_LSB). The switch is conducting when the target is close to the sensor (the distance is less than the value in DET_H_MSB and DET_H_LSB). When the switch is normally closed the transistor is conducting when the target is far away from the target (the distance is greater than the value in DET_L_MSB and DET_L_LSB). The switch is not conducting when the target is close to the sensor (the distance is less than the value in DET_H_MSB and DET_H_LSB). LED_ENABLE: When set to On the LED will function as set in Bit 2, LED_MODE. When set to Off the LED will always be off. LED_MODE: Normally off means that the LED is off when the target is far away from the sensor (the distance is greater than the value in DET_L_MSB and DET_L_LSB). The LED will turn on when the target is close (the distance is less than the value in DET_H_MSB and DET_H_LSB). Normally on means that the LED is on when the target is far away from the sensor (the distance is greater than the value in DET_L_MSB and DET_L_LSB). ). The LED will turn off when the target is close (the distance is less than the value in DET_H_MSB and DET_H_LSB). LED_CURRENT: Sets the current through the LED. SHORTCKT_DUTY_CYCLE: When the LMP91300 is in overload protection mode it will test to determine if the overload condition is still present. The switch will be on for about 30µs, with an on to off duty cycle as set by SHORTCKT_DUTY_CYCLE to protect the external BJT. For example, if SHORTCKT_DUTY_CYCLE is set to 0.1% the switch drive will be on for 30µs and off for 29.97ms (tOFF = (30µs/0.1%) - 30µs). Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Product Folder Links: LMP91300 27 LMP91300 SNOSCS3A – SEPTEMBER 2013 – REVISED OCTOBER 2013 www.ti.com DET_H_MSB_FNL – Detection High Threshold MSB (Final) (address 0x73) Bit Name Function (Default values in bold) [7:0] DET_H_MSB_FNL 0x00: Detection High Threshold MSB (Final) See the Usage Priority of Registers section. A starting value to put in the DET_H_MSB_FNL and DET_H_LSB_FNL registers can be determined by first setting the correct values in the OSC_CONFIG_0, OSC_CONFIG_1, OSC_CONFIG_2, OSC_CONFIG_3_INIT/FNL, OUT_CONFIG_INIT/FNL registers, putting the target at the distance away from the target that it is supposed to switch on at, reading the values in the PROXIMITY_MSB and PROXIMITY_LSB registers, and writing these values into the DET_H_MSB_INIT/FNL and DET_H_LSB_INIT/FNL registers. This value can be then adjusted as needed. DET_H_LSB_FNL – Detection High Threshold LSB (Final) (address 0x74) Bit Name Function (Default values in bold) [7:0] DET_H_LSB_FNL 0x00: Detection High Threshold LSB (Final) See the Usage Priority of Registers section. DET_L_MSB_FNL – Detection Low Threshold MSB (Final) (address 0x75) Bit Name Function (Default values in bold) [7:0] DET_L_MSB_FNL 0x00: Detection Low Threshold MSB (Final) See the Usage Priority of Registers section. A starting value to put in the DET_L_MSB_FNL and DET_L_LSB_FNL registers can be determined by first setting the correct values in the OSC_CONFIG_0, OSC_CONFIG_1, OSC_CONFIG_2, OSC_CONFIG_3_INIT/FNL, OUT_CONFIG_INIT/FNL registers, putting the target at the distance away from the target that it is supposed to switch off at, reading the values in the PROXIMITY_MSB and PROXIMITY_LSB registers, and writing these values into the DET_L_MSB_INIT/FNL and DET_L_LSB_INIT/FNL registers. This value can be then adjusted as needed. DET_L_LSB_FNL – Detection Low Threshold LSB (Final) (address 0x76) Bit Name Function (Default values in bold) [7:0] DET_L_LSB_FNL 0x00: Detection Low Threshold LSB (Final) See the Usage Priority of Registers section. 28 Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Product Folder Links: LMP91300 LMP91300 www.ti.com SNOSCS3A – SEPTEMBER 2013 – REVISED OCTOBER 2013 OSC_CONFIG_3_FNL – Oscillator Configuration 3 Register (Final) (address 0x77) Bit Name Function (Default values in bold) [7:6] RESERVED 00 [5] UNDER_RANGE_SWITCH_EN 0: Off 1: On [4:3] OSC_AMP 00: 1V 01: 2V 10: 4V 11: Reserved [2:0] RESPONSE_TIME 000: Reserved 001: 96 010: 192 011: 384 100: 768 101: 1536 110: 3072 111: 6144 See the Usage Priority of Registers section. UNDER_RANGE_SWITCH_EN: The following applies if at least one temperature conversion has been completed: 1. If RP < 798Ω (for example, the metal plate is against the sensor) before the fourth conversion of the RP to digital converter (after a Power On Reset) the oscillation will stop and the switch will be activated regardless of the UNDER_RANGE_SWITCH_EN setting. 2. If RP < 798Ω after the fourth conversion the switch state depends on the setting of UNDER_RANGE_SWITCH_EN. (a) If UNDER_RANGE_SWITCH_EN = 1: The RP to digital converter will output full scale and the switch will be enabled. (b) If UNDER_RANGE_SWITCH_EN = 0: The previous switch state will be held until the oscillation restarts RP > 798Ω) and enough time has passed for a conversion to update the switch status. If a temperature conversion has not been completed the switch state will not be changed. OSC_AMP: The oscillation amplitude at pins INA and INB can be set to 1V, 2V, or 4V. If the LMP91300 has not been burned with user values, the power on value for OSC_AMP is 11: Reserved. This will need to be changed to either 1V, 2V or 4V before the LMP91300 is used. RESPONSE_TIME: Using a lower response time will shorten the settling time of the digital filter and give faster readings from the RP to digital converter but will increase the noise in the reading. A higher setting gives the digital filter more time to settle and will decrease the noise in the reading. Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Product Folder Links: LMP91300 29 LMP91300 SNOSCS3A – SEPTEMBER 2013 – REVISED OCTOBER 2013 www.ti.com OUT_CONFIG_FNL – Output Configuration Register (Final) (address 0x78) Bit Name Function (Default values in bold) [7:6] SWDRV_CURRENT 00: 2.5mA 01: 3.75mA 10: 5mA 11: 10mA 5 OUTPUT_MODE 0: 3 Wire NPN 1: 3 Wire PNP 4 DRIVE_MODE 0: Normally open 1: Normally closed 3 LED_ENABLE 0: On 1: Off 2 LED_MODE 0: Normally off 1: Normally on 1 LED_CURRENT 0: 2.5mA 1: 5mA 0 SHORTCKT_DUTY_CYCLE 0: 0.1% 1: 0.8% See the Usage Priority of Registers section. SWDRV_CURRENT: Used to set the amplitude of current from the SWDRV pin used to control the external transistor. DRIVE_MODE: Normally open and normally closed refer to the external NPN or PNP switch when a target is far away from the inductive sensor. When the switch is normally open the transistor is not conducting when the target is far away from the target (the distance is greater than the value in DET_L_MSB and DET_L_LSB). The switch is conducting when the target is close to the sensor (the distance is less than the value in DET_H_MSB and DET_H_LSB). When the switch is normally closed the transistor is conducting when the target is far away from the target (the distance is greater than the value in DET_L_MSB and DET_L_LSB). The switch is not conducting when the target is close to the sensor (the distance is less than the value in DET_H_MSB and DET_H_LSB). LED_ENABLE: When set to On the LED will function as set in Bit 2, LED_MODE. When set to Off the LED will always be off. LED_MODE: Normally off means that the LED is off when the target is far away from the sensor (the distance is greater than the value in DET_L_MSB and DET_L_LSB). The LED will turn on when the target is close (the distance is less than the value in DET_H_MSB and DET_H_LSB). Normally on means that the LED is on when the target is far away from the sensor (the distance is greater than the value in DET_L_MSB and DET_L_LSB). ). The LED will turn off when the target is close (the distance is less than the value in DET_H_MSB and DET_H_LSB). LED_CURRENT: Sets the current through the LED. SHORTCKT_DUTY_CYCLE: When the LMP91300 is in overload protection mode it will test to determine if the overload condition is still present. The switch will be on for about 30µs, with an on to off duty cycle as set by SHORTCKT_DUTY_CYCLE to protect the external BJT. For example, if SHORTCKT_DUTY_CYCLE is set to 0.1% the switch drive will be on for 30µs and off for 29.97ms (tOFF = (30µs/0.1%) - 30µs). 30 Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Product Folder Links: LMP91300 LMP91300 www.ti.com SNOSCS3A – SEPTEMBER 2013 – REVISED OCTOBER 2013 TEMP64 – Temperature in °C + 64 (address 0x79) Bit Name Function (Default values in bold) [7:0] TEMP64 Temperature in °C + 64 Convert the value read from this register to decimal and subtract 64 to determine the temperature in °C. PROXIMITY_MSB – Proximity MSB (address 0x7A) Bit Name Function (Default values in bold) [7:0] PROXIMITY_MSB Proximity MSB When a command is issued to read the PROXIMITY_MSB register, values from the RP to Digital converter are placed in the PROXIMITY_MSB and PROXIMITY_LSB registers. The value in the PROXIMITY_LSB register will not change until another read command of PROXIMITY_MSB is given. It is recommended that both the PROXIMITY_MSB and PROXIMITY_LSB registers be read together. PROXIMITY_LSB – Proximity LSB (address 0x7B) Bit Name Function (Default values in bold) [7:0] PROXIMITY_LSB Proximity LSB STATUS – Device Status (address 0x7E) Bit Name Function (Default values in bold) 7 PADC_TIMEOUT 0: No timeout 1: Timeout 6 ECC_ERR 0: No error 1: Error 5 BUSY 0: Part is busy 1: Part is not busy 4 BURN_PROG 0: No burn in progress 1: Burn in progress [3:0] SWIF_STATUS 0x0: No burn has occurred, full SWIF access 0x1: Addresses 0x00 to 0x72 burned, full SWIF access 0x3: Addresses 0x00 to 0x78 burned, full SWIF access 0x7: Addresses 0x00 to 0x78 burned, SWIF is read only 0xF: Addresses 0x00 to 0x78 burned, SWIF is disabled When register 0x7E is read only one byte of data is transmitted from the LMP91300. BURN_REQ – Burn Request (address 0x7F) Bit Name Function (Default values in bold) [7:0] BURN_REQ 0x08: Burn Temperature Look Up Table data (0x00 – 0x5D), initial registers, device information registers, and configuration registers (0x66 – 0x72). 0x10: Burn final registers (0x73 – 0x78). 0x20: Burn all registers (0x00 – 0x78). 0x40: Set SWIF to read back mode. 0x80: Disable SWIF. Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Product Folder Links: LMP91300 31 LMP91300 SNOSCS3A – SEPTEMBER 2013 – REVISED OCTOBER 2013 www.ti.com REVISION HISTORY Rev A: Added CSP package, fixed formatting. Change to Production Data 32 Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Product Folder Links: LMP91300 PACKAGE OPTION ADDENDUM www.ti.com 13-Dec-2013 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) LMP91300NHZJ ACTIVE WQFN NHZ 24 4500 Green (RoHS & no Sb/Br) CU SN Level-3-260C-168 HR -40 to 125 L91300 LMP91300NHZR ACTIVE WQFN NHZ 24 1000 Green (RoHS & no Sb/Br) CU SN Level-3-260C-168 HR -40 to 125 L91300 LMP91300NHZT ACTIVE WQFN NHZ 24 250 Green (RoHS & no Sb/Br) CU SN Level-3-260C-168 HR -40 to 125 L91300 LMP91300YZRR ACTIVE DSBGA YZR 20 3000 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM -40 to 125 ATAA LMP91300YZRT ACTIVE DSBGA YZR 20 250 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM -40 to 125 ATAA (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 13-Dec-2013 (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2 MECHANICAL DATA NHZ0024B SQA24B (Rev A) www.ti.com MECHANICAL DATA YZR0020xxx 0.600±0.075 D E TLA20XXX (Rev D) D: Max = 2.706 mm, Min =2.646 mm E: Max = 2.084 mm, Min =2.024 mm 4215053/A NOTES: A. All linear dimensions are in millimeters. Dimensioning and tolerancing per ASME Y14.5M-1994. B. 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