ON MC14528BFEL Dual monostable multivibrator Datasheet

MC14528B
Dual Monostable
Multivibrator
The MC14528B is a dual, retriggerable, resettable monostable
multivibrator. It may be triggered from either edge of an input pulse,
and produces an output pulse over a wide range of widths, the duration
of which is determined by the external timing components,
CX and RX.
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MARKING
DIAGRAMS
Features
•
•
•
•
•
•
•
Separate Reset Available
Diode Protection on All Inputs
Triggerable from Leading or Trailing Edge Pulse
Supply Voltage Range = 3.0 Vdc to 18 Vdc
Capable of Driving Two Low−power TTL Loads or One Low−power
Schottky TTL Load Over the Rated Temperature Range
This part should only be used in new designs where the pulse width
is < 10 s
Note: For designs requiring a pulse width > 10 s, please see
MC14538, which is pin−for−pin compatible
Pb−Free Packages are Available*
MC14528BCP
AWLYYWWG
1
PDIP−16
P SUFFIX
CASE 648
14528BG
AWLYWW
1
SOIC−16
D SUFFIX
CASE 751B
MAXIMUM RATINGS (Voltages Referenced to VSS)
Rating
Symbol
Value
Unit
VDD
−0.5 to +18.0
V
Vin, Vout
−0.5 to VDD + 0.5
V
Iin, Iout
± 10
mA
Power Dissipation, per Package
(Note 1)
PD
500
mW
Ambient Temperature Range
TA
−55 to +125
°C
Storage Temperature Range
Tstg
−65 to +150
°C
Lead Temperature
(8−Second Soldering)
TL
260
°C
DC Supply Voltage Range
Input or Output Voltage Range
(DC or Transient)
Input or Output Current
(DC or Transient) per Pin
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
high−impedance circuit. For proper operation, Vin and Vout should be constrained
to the range VSS v (Vin or Vout) v VDD.
Unused inputs must always be tied to an appropriate logic voltage level
(e.g., either VSS or VDD). Unused outputs must be left open.
1
1
MC14528B
ALYWG
1
SOEIAJ−16
F SUFFIX
CASE 966
A
WL
YY, Y
WW, W
G
1
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2006
April, 2006 − Rev. 6
1
Publication Order Number:
MC14528B/D
MC14528B
PIN ASSIGNMENT
VSS
1
16
VDD
CX1/RX1
2
15
VSS
RESET 1
3
14
CX2/RX2
A1
4
13
RESET 2
B1
5
12
A2
Q1
6
11
B2
Q1
7
10
Q2
VSS
8
9
Q2
ONE−SHOT SELECTION GUIDE
MC14528B
MC14536B
MC14538B
MC14541B
100 ns
1 s
10 s
100 s
1 ms
10 ms
100 ms
1s
23 HR
5 MIN
MC4538A*
*LIMITED OPERATING VOLTAGE (2−6 V)
TOTAL OUTPUT PULSE WIDTH RANGE
RECOMMENDED PULSE WIDTH RANGE
BLOCK DIAGRAM
CX1
1
CX2
VDD
2
15
6
4
A1
5
B1
RESET 1
RX1
7
Q1
RESET 2
13
FUNCTION TABLE
A
H
H
L
H
H
H
H
H
L
Outputs
B
Q
Q
H
L
Not Triggered
Not Triggered
L, H,
L
H
L, H,
Not Triggered
Not Triggered
X
X
X
X
L
H
Not Triggered
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2
VDD
14
9
VDD = PIN 16
VSS = PIN 1, PIN 8, PIN 15
RX AND CX ARE EXTERNAL COMPONENTS
Inputs
RX2
10
12
A2
11
B2
Q1
3
Reset
10 s
Q2
Q2
MC14528B
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ELECTRICAL CHARACTERISTICS (Voltages Referenced to VSS)
− 55_C
25_C
VDD
125_C
Symbol
Vdc
Min
Max
Min
Typ
(Note 2)
Max
Min
Max
Unit
VOL
5.0
10
15
−
−
−
0.05
0.05
0.05
−
−
−
0
0
0
0.05
0.05
0.05
−
−
−
0.05
0.05
0.05
Vdc
VOH
5.0
10
15
4.95
9.95
14.95
−
−
−
4.95
9.95
14.95
5.0
10
15
−
−
−
4.95
9.95
14.95
−
−
−
Vdc
5.0
10
15
−
−
−
1.5
3.0
4.0
−
−
−
2.25
4.50
6.75
1.5
3.0
4.0
−
−
−
1.5
3.0
4.0
VIH
5.0
10
15
3.5
7.0
11
−
−
−
3.5
7.0
11
2.75
5.50
8.25
−
−
−
3.5
7.0
11
−
−
−
IOH
5.0
5.0
10
15
–1.2
–0.64
–1.6
–4.2
−
−
−
−
–1.0
–0.51
–1.3
–3.4
–1.7
–0.88
–2.25
–8.8
−
−
−
−
–0.7
–0.36
–0.9
–2.4
−
−
−
−
5.0
10
15
0.64
1.6
4.2
−
−
−
0.51
1.3
3.4
0.88
2.25
8.8
−
−
−
0.36
0.9
2.4
−
−
−
mAdc
IOL
Input Current
Iin
15
−
± 0.1
−
± 0.00001
± 0.1
−
± 1.0
Adc
Input Capacitance
(Vin = 0)
Cin
−
−
−
−
5.0
7.5
−
−
pF
Quiescent Current
(Per Package)
IDD
5.0
10
15
−
−
−
5.0
10
20
−
−
−
0.005
0.010
0.015
5.0
10
20
−
−
−
150
300
600
Adc
Characteristic
Output Voltage
Vin = VDD or 0
“0” Level
“1” Level
Vin = 0 or VDD
Input Voltage
“0” Level
(VO = 4.5 or 0.5 Vdc)
(VO = 9.0 or 1.0 Vdc)
(VO = 13.5 or 1.5 Vdc)
VIL
Vdc
Vdc
“1” Level
(VO = 0.5 or 4.5 Vdc)
(VO = 1.0 or 9.0 Vdc)
(VO = 1.5 or 13.5 Vdc)
Output Drive Current
(VOH = 2.5 Vdc)
(VOH = 4.6 Vdc)
(VOH = 9.5 Vdc)
(VOH = 13.5 Vdc)
(VOL = 0.4 Vdc)
(VOL = 0.5 Vdc)
(VOL = 1.5 Vdc)
mAdc
Source
Sink
Total Supply Current at an external
load Capacitance (CL) and at external timing capacitance (CX), use
the formula. (Note 3)
−
IT
IT(CL, CX) = [(CL + 0.36CX)VDDf + 2x10−8
RXCX(VDD−2)2f] x 10−3
where: IT in A (per circuit), CL and CX in pF, RX in megohms,
VDD in Vdc, f in kHz is input frequency.
2. Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.
3. The formulas given are for the typical characteristics only at 25_C.
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3
Adc
MC14528B
SWITCHING CHARACTERISTICS (CL = 50 pF, TA = 25_C) (Note 4)
Characteristic
Symbol
CX
pF
RX
k
−
VDD
Vdc
Min
Typ
(Note 5)
Max
5.0
10
15
−
−
−
100
50
40
200
100
80
5.0
10
15
−
−
−
325
120
90
650
240
180
5.0
10
15
−
−
−
705
290
210
−
−
−
Unit
Output Rise and Fall Time
tTLH, tTHL = (1.5 ns/pF) CL + 25 ns
tTLH, tTHL = (0.75 ns/pF) CL + 12.5 ns
tTLH, tTHL = (0.55 ns/pF) CL + 9.5 ns
tTLH,
tTHL
−
ns
Turn−Off, Turn−On Delay Time — A or B to Q or Q
tPLH, tPHL = (1.7 ns/pF) CL + 240 ns
tPLH, tPHL = (0.66 ns/pF) CL + 87 ns
tPLH, tPHL = (0.5 ns/pF) CL + 65 ns
tPLH,
tPHL
15
Turn−Off, Turn−On Delay Time — A or B to Q or Q
tPLH, tPHL = (1.7 ns/pF) CL + 620 ns
tPLH, tPHL = (0.66 ns/pF) CL + 257 ns
tPLH, tPHL = (0.5 ns/pF) CL + 185 ns
tPLH,
tPHL
1000
Input Pulse Width — A or B
tWH
15
5.0
5.0
10
15
150
75
55
70
30
30
−
−
−
ns
1000
10
5.0
10
15
−
−
−
70
30
30
−
−
−
ns
5.0
ns
10
tWL
ns
Output Pulse Width — Q or Q
(For CX < 0.01 F use graph for
appropriate VDD level.)
tW
15
5.0
5.0
10
15
−
−
−
550
350
300
−
−
−
ns
Output Pulse Width — Q or Q
(For CX > 0.01 F use formula:
tW = 0.2 RX CX Ln [VDD – VSS]) (Note 6)
tW
10,000
10
5.0
10
15
15
10
15
30
50
55
45
90
95
s
t1 – t2
10,000
10
5.0
10
15
−
−
−
6.0
8.0
8.0
25
35
35
%
15
5.0
5.0
10
15
−
−
−
325
90
60
600
225
170
ns
1000
10
5.0
10
15
−
−
−
1000
300
250
−
−
−
ns
15
5.0
5.0
10
15
0
0
0
−
−
−
−
−
−
ns
1000
10
5.0
10
15
0
0
0
−
−
−
−
−
−
ns
5.0
−
1000
k
Pulse Width Match between Circuits in the same
package
Reset Propagation Delay — Reset to Q or Q
tPLH,
tPHL
Retrigger Time
trr
External Timing Resistance
RX
−
−
−
External Timing Capacitance
CX
−
−
−
4.
5.
6.
7.
No Limits (Note 7)
The formulas given are for the typical characteristics only at 25_C.
Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.
If CX > 15 F, Use Discharge Protection Diode DX, per Figure 9.
RXis in , CX is in farads, VDD and VSS in volts, PWout in seconds.
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4
F
MC14528B
ORDERING INFORMATION
Device
Shipping †
Package
MC14528BCP
PDIP−16
MC14528BCPG
PDIP−16
(Pb−Free)
MC14528BD
SOIC−16
MC14528BDG
SOIC−16
(Pb−Free)
MC14528BDR2
SOIC−16
MC14528BDR2G
SOIC−16
(Pb−Free)
MC14528BF
SOEIAJ−16
MC14528BFG
SOEIAJ−16
(Pb−Free)
MC14528BFEL
SOEIAJ−16
MC14528BFELG
SOEIAJ−16
(Pb−Free)
25 Units / Rail
48 Units / Rail
2500 / Tape & Reel
50 Units / Rail
2000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
VDD
16
VDD
16
IOL
A
B
RESET
8
Q
A
OPEN
Q
Q
B
VOH
RESET
IOH
VSS
8
Figure 1. Output Source Current Test Circuit
Q
VOL
OPEN
VSS
Figure 2. Output Sink Current Test Circuit
VDD
500 pF
0.1 F
CERAMIC
ID
RX
R X′
CX
Vin
C X′
20 ns
20 ns
90%
A
B
Q
RESET
Q
A′
Q′
B′
Q′
RESET′
Vin
CL
10%
DUTY CYCLE = 50%
CL
CL
CL
VSS
Figure 3. Power Dissipation Test Circuit and Waveforms
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5
VDD
0V
MC14528B
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
VDD
*CX = 15 pF
*CL = 15 pF
RX = 5.0 k
R X′
RX
CX
C X′
INPUT CONNECTIONS
A
PULSE
GENERATOR
PULSE
GENERATOR
PULSE
GENERATOR
B
Q
RESET
Q
A′
Q′
B′
Q′
CL
CL
CL
CL
RESET′
Characteristics
Reset
A
B
tPLH, tPHL, tTLH, tTHL, tW
VDD
PG1
VDD
tPLH, tPHL, tTLH, tTHL, tW
VDD
VSS
PG2
tPLH(R), tPHL(R), tW
PG3
PG1
PG2
*Includes capacitance of probes,
wiring, and fixture parasitic.
PG1 =
NOTE: AC test waveforms for
PG1, PG2, and PG3 on
next page.
PG2 =
PG3 =
VSS
Figure 4. AC Test Circuit
A
90%
10%
tTHL
50%
tTLH
tWH
tTHL
B
tWL
tPHL
Q
50%
50%
tTLH
90%
10%
50%
50%
VSS
VDD
50%
VSS
tWL
trr
tPHL
50%
tTLH
tPHL
VDD
tTLH
90%
10%
tTHL
tTHL
tPHL
90%
10%
50%
50%
Figure 5. AC Test Waveforms
1000
t W, PULSE WIDTH ( s)
Q
50%
tTLH
tTHL
RESET
tPLH
VDD = 15 V
10 V
5.0 V
100
15 V
10 V
5.0 V
RX = 100 k
15 V
10 V
5.0 V
10
RX = 10 k
RX = 5.0 k
1.0
0.1
15 V
10 V
5.0 V
10
VSS
90%
10%
50%
tW
VDD
50%
100
1000
10,000
CX, EXTERNAL CAPACITANCE (pF)
Figure 6. Pulse Width versus CX
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6
100,000
VOH
VOL
VOH
VOL
MC14528B
TYPICAL APPLICATIONS
Cx
Cx
Rx
Rx
VDD
VDD
RISING EDGE
TRIGGER
A
Q
B
Q
RESET
VDD
RISING EDGE
TRIGGER
A
Q
B
Q
RESET
VDD
VDD
Cx
Cx
Rx
Rx
VDD
VDD
FALLING EDGE
TRIGGER
A
Q
B
Q
RESET
FALLING EDGE
TRIGGER
A
Q
B
Q
RESET
VDD
VDD
Figure 7. Retriggerable
Monostables Circuitry
Figure 8. Non−Retriggerable
Monostables Circuitry
DX
Cx
VDD
Rx
VDD
B
Q
RESET
VDD
VDD
Figure 9. Use of a Diode to Limit
Power Down Current Surge
2, 14
Q
NC
Q
RESET
NC
A
Q
VDD
NC
1, 15
VDD
Figure 10. Connection of Unused Sections
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7
MC14528B
PACKAGE DIMENSIONS
PDIP−16
CASE 648−08
ISSUE T
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS
WHEN FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE
MOLD FLASH.
5. ROUNDED CORNERS OPTIONAL.
−A−
16
9
1
8
B
F
C
L
DIM
A
B
C
D
F
G
H
J
K
L
M
S
S
−T−
SEATING
PLANE
K
H
G
D
M
J
16 PL
0.25 (0.010)
T A
M
M
INCHES
MIN
MAX
0.740 0.770
0.250 0.270
0.145 0.175
0.015 0.021
0.040
0.70
0.100 BSC
0.050 BSC
0.008 0.015
0.110 0.130
0.295 0.305
0_
10 _
0.020 0.040
MILLIMETERS
MIN
MAX
18.80 19.55
6.35
6.85
3.69
4.44
0.39
0.53
1.02
1.77
2.54 BSC
1.27 BSC
0.21
0.38
2.80
3.30
7.50
7.74
0_
10 _
0.51
1.01
SOIC−16
CASE 751B−05
ISSUE J
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
−A−
16
9
−B−
1
P
8 PL
0.25 (0.010)
8
M
B
S
G
R
K
F
X 45 _
C
−T−
SEATING
PLANE
J
M
D
16 PL
0.25 (0.010)
M
T B
S
A
S
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8
DIM
A
B
C
D
F
G
J
K
M
P
R
MILLIMETERS
MIN
MAX
9.80
10.00
3.80
4.00
1.35
1.75
0.35
0.49
0.40
1.25
1.27 BSC
0.19
0.25
0.10
0.25
0_
7_
5.80
6.20
0.25
0.50
INCHES
MIN
MAX
0.386
0.393
0.150
0.157
0.054
0.068
0.014
0.019
0.016
0.049
0.050 BSC
0.008
0.009
0.004
0.009
0_
7_
0.229
0.244
0.010
0.019
MC14528B
PACKAGE DIMENSIONS
SOEIAJ−16
CASE 966−01
ISSUE A
16
LE
9
Q1
M_
E HE
1
8
L
DETAIL P
Z
D
e
VIEW P
A
DIM
A
A1
b
c
D
E
e
HE
L
LE
M
Q1
Z
A1
b
0.13 (0.005)
c
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS D AND E DO NOT INCLUDE
MOLD FLASH OR PROTRUSIONS AND ARE
MEASURED AT THE PARTING LINE. MOLD FLASH
OR PROTRUSIONS SHALL NOT EXCEED 0.15
(0.006) PER SIDE.
4. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
5. THE LEAD WIDTH DIMENSION (b) DOES NOT
INCLUDE DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08 (0.003)
TOTAL IN EXCESS OF THE LEAD WIDTH
DIMENSION AT MAXIMUM MATERIAL CONDITION.
DAMBAR CANNOT BE LOCATED ON THE LOWER
RADIUS OR THE FOOT. MINIMUM SPACE
BETWEEN PROTRUSIONS AND ADJACENT LEAD
TO BE 0.46 ( 0.018).
M
0.10 (0.004)
MILLIMETERS
MIN
MAX
−−−
2.05
0.05
0.20
0.35
0.50
0.10
0.20
9.90
10.50
5.10
5.45
1.27 BSC
7.40
8.20
0.50
0.85
1.10
1.50
10 _
0_
0.70
0.90
−−−
0.78
INCHES
MIN
MAX
−−− 0.081
0.002
0.008
0.014
0.020
0.007
0.011
0.390
0.413
0.201
0.215
0.050 BSC
0.291
0.323
0.020
0.033
0.043
0.059
10 _
0_
0.028
0.035
−−− 0.031
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are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
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“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
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MC14528B/D