LTC3542-1 500mA, 2.25MHz 2.8V Output Synchronous Step-Down DC/DC Converter FEATURES DESCRIPTION n The LTC®3542-1 is a high efficiency, fixed output voltage of 2.8V, monolithic synchronous buck converter using a constant frequency, current mode architecture. Supply current during operation is only 26μA, dropping to <1μA in shutdown. The 2.5V to 5.5V input voltage range makes the LTC3542-1 ideally suited for single Li-Ion battery-powered applications. 100% duty cycle provides low dropout operation, extending battery life in portable systems. Internal power switches are optimized to provide high efficiency and eliminate the need for an external Schottky diode. n n n n n n n n n n n n n n APPLICATIONS n n n n n Cellular Telephones Wireless and DSL Modems Digital Cameras MP3 Players PDAs and Other Handheld Devices Switching frequency is internally set at 2.25MHz, allowing the use of small surface mount inductors and capacitors, and it can synchronize to an external clock signal with a frequency range of 1MHz to 3MHz through the MODE/SYNC pin. The LTC3542-1 is specifically designed to work well with ceramic output capacitors, achieving very low output voltage ripple and a small PCB footprint. The LTC3542-1 can be configured for the power saving Burst Mode® Operation. For reduced noise and RF interference, the MODE/SYNC pin can be configured for pulse skipping operation. L, LT, LTC, LTM and Burst Mode are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. Protected by U.S. Patents including 5481178, 6580258, 6304066, 6127815, 6498466, 6611131, 5994885. TYPICAL APPLICATION Efficiency and Power Loss vs Output Current 100 1000 90 2.2μH VIN 10μF SW LTC3542-1 RUN COUT 10μF CER VOUT MODE/SYNC GND 35421 TA01a 80 100 70 60 50 10 40 30 1 20 VIN = 3.6V VOUT = 2.8V 10 0 0.1 POWER LOSS (mW) VIN 3V TO 5.5V VOUT 2.8V 500mA EFFICIENCY (%) n High Efficiency: Up to 96% Fixed Output Voltage: 2.8V High Peak Switch Current: 1000mA Low Output Ripple (<20mVP-P Typical) Burst Mode Operation Very Low Quiescent Current: Only 26μA 2.5V to 5.5V Input Voltage Range 2.25MHz Constant Frequency Operation 1MHz to 3MHz External Frequency Synchronization Low Dropout Operation: 100% Duty Cycle No Schottky Diode Required Internal Soft-Start Limits Inrush Current Shutdown Mode Draws <1μA Supply Current ±2% Output Voltage Accuracy Current Mode Operation for Excellent Line and Load Transient Response Overtemperature Protected Available in 6-Lead 2mm × 2mm DFN 1 10 100 LOAD CURRENT (mA) 0.1 1000 35421 TA01b 35421f 1 LTC3542-1 ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION (Note 1) Input Supply Voltage (VIN) ........................... –0.3V to 6V VOUT, RUN Voltages......................................–0.3V to VIN MODE Voltage ................................–0.3V to (VIN + 0.3V) SW Voltage ....................................–0.3V to (VIN + 0.3V) Operating Temperature Range (Note 2).... –40°C to 85°C Junction Temperature (Note 7) ............................. 125°C Storage Temperature Range................... –65°C to 150°C Reflow Peak Body Temperature ............................ 260°C TOP VIEW 6 RUN VOUT 1 VIN 2 7 5 MODE/SYNC 4 SW GND 3 DC PACKAGE 6-LEAD (2mm s 2mm) PLASTIC DFN TJMAX = 125°C, θJA = 89°C/W, θJC = 18°C/W (SOLDERED TO A 4-LAYER BOARD, NOTE 3) EXPOSED PAD (PIN 7) IS GND, MUST BE SOLDERED TO PCB ORDER INFORMATION LEAD FREE FINISH TAPE AND REEL PART MARKING PACKAGE DESCRIPTION TEMPERATURE RANGE LTC3542EDC-1#PBF LTC3542EDC-1#TRPBF LDWC 6-Lead (2mm × 2mm) Plastic DFN –40°C to 85°C Consult LTC Marketing for parts specified with wider operating temperature ranges. Consult LTC Marketing for information on non-standard lead based finish parts. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 3.6V unless otherwise noted. SYMBOL PARAMETER VIN Operating Voltage Range CONDITIONS MIN TYP MAX UNITS l 2.5 504 840 1176 kΩ l 2.744 2.8 2.856 V 5.5 V RVOUT Input Resistance of VOUT Pin VOUT Output Feedback Voltage (Note 4) ΔVLINE_REG Reference Voltage Line Regulation (Note 4) VIN = 2.5V to 5.5V 0.04 0.2 %/V ΔVLOAD_REG Output Voltage Load Regulation (Note 4) ILOAD = 100mA to 500mA 0.02 0.2 % IS Input DC Supply Current (Note 5) Active Mode Sleep Mode Shutdown VOUT = 2.5V VOUT = 2.9V, MODE = 0V RUN = 0V 300 26 0.1 500 35 1 μA μA μA fOSC Oscillator Frequency VOUT = 2.8V 2.25 2.7 MHz fSYNC Synchronous Frequency VOUT = 2.8V 3 MHz ILIM Peak Switch Current VIN = 3V, VOUT = 2.5V, Duty Cycle < 35% RDS(ON) P-Channel On Resistance (Note 6) N-Channel On Resistance (Note 6) ISW = 100mA ISW = –100mA 0.5 0.35 0.65 0.55 Ω Ω ISW(LKG) Switch Leakage Current VIN = 5V, VRUN = 0V, VSW = 0V or 5V ±0.01 ±1 μA l 1.8 1 650 1000 mA 35421f 2 LTC3542-1 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 3.6V unless otherwise noted. SYMBOL PARAMETER CONDITIONS VUVLO Undervoltage Lockout Threshold VIN Rising VIN Falling VRUN RUN Threshold l IRUN RUN Leakage Current l VMODE/SYNC MODE/SYNC Threshold l IMODE/SYNC MODE/SYNC Leakage Current l Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. No pin should exceed 6V. Note 2: The LTC3542-1 is guaranteed to meet performance specifications from 0°C to 85°C. Specifications over the –40°C to 85°C operating temperature range are assured by design, characterization and correlation with statistical process controls. Note 3: Failure to solder the Exposed Pad of the package to the PC board will result in a thermal resistance much higher than 89°C/W. Note 4: The converter is tested in a proprietary test mode that connects MIN TYP MAX 2.3 1.8 2.0 1.9 0.3 ±0.01 0.3 ±0.01 UNITS V V 1.5 V ±1 μA 1.2 V ±1 μA the output of the error amplifier to the SW pin, which is connected to an external servo loop. Note 5: Dynamic supply current is higher due to the internal gate charge being delivered at the switching frequency. Note 6: The DFN switch on resistance is guaranteed by correlation to wafer level measurements. Note 7: TJ is calculated from the ambient temperature TA and power dissipation PD according to the following formula: TJ = TA + (PD) • (θJA). 35421f 3 LTC3542-1 TYPICAL PERFORMANCE CHARACTERISTICS Burst Mode Operation TA = 25°C unless otherwise specified. Pulse-Skip Mode Operation Start-Up from Shutdown SW 2V/DIV SW 2V/DIV RUN 2V/DIV VOUT 50mV/DIV AC COUPLED VOUT 50mV/DIV AC COUPLED VOUT 1V/DIV IL 100mA/DIV IL 100mA/DIV 35421 G01 VIN = 3.6V 2μs/DIV ILOAD = 25mA FIGURE 3a CIRCUIT VIN = 4.2V ILOAD = 0A Start-Up from Shutdown VOUT 1V/DIV IL 200mA/DIV IL 500mA/DIV IL 500mA/DIV ILOAD 500mA/DIV ILOAD 500mA/DIV VIN = 3.6V 20μs/DIV ILOAD = 30mA TO 500mA FIGURE 3a CIRCUIT VIN = 3.6V 20μs/DIV ILOAD = 0mA TO 500mA FIGURE 3a CIRCUIT VOUT (V) 2.81 2.79 2.77 100 125 LTC1520 G01 2.7 2.7 2.6 2.6 2.5 2.5 2.4 2.3 2.2 2.1 2.4 2.3 2.2 2.1 2.0 2.0 1.9 1.9 1.8 –50 –30 –10 10 30 50 70 TEMPERATURE (°C) 35421 G06 Oscillator Frequency vs Supply Voltage FREQUENCY (MHz) FREQUENCY (MHz) VIN = 3.6V PULSE-SKIP MODE NO LOAD 50 25 0 75 TEMPERATURE (°C) 35421 G05 Oscillator Frequency vs Temperature 2.85 35421 G03 Load Step VOUT 100mV/DIV AC COUPLED Reference Voltage vs Temperature –25 400μs/DIV VIN = 3.6V ILOAD = 0A FIGURE 3a CIRCUIT VOUT 100mV/DIV AC COUPLED 35421 G04 VIN = 3.6V 400μs/DIV ILOAD = 500mA FIGURE 3a CIRCUIT 2.75 –50 35421 G02 400ns/DIV Load Step RUN 2V/DIV 2.83 IL 200mA/DIV 1.8 90 110 35421 G08 2 3 5 4 SUPPLY VOLTAGE (V) 6 35421 G09 35421f 4 LTC3542-1 TYPICAL PERFORMANCE CHARACTERISTICS Output Voltage vs Supply Voltage 1.0 RDS(ON) vs Input Voltage Output Voltage vs Load Current 2.0 IOUT = 100mA FIGURE 3a CIRCUIT 0.8 TA = 25°C unless otherwise specified. 0.9 VIN = 3.6V VOUT = 2.8V 1.5 0.8 0.7 1.0 0.2 0 –0.2 –0.4 0.6 0.5 Burst Mode OPERATION RDS(ON) (Ω) 0.4 VOUT ERROR (%) VOUT ERROR (%) 0.6 0 PULSE SKIP –0.5 0.3 0.2 –1.5 0.1 –2.0 3 2 6 4 5 INPUT VOLTAGE (V) 10 100 LOAD CURRENT (mA) 1000 RDS(ON) vs Temperature 900 0.7 800 RDS(ON) (Ω) 0.5 0.4 SYNCHRONOUS SWITCH 0.2 0 –50 –25 0 25 50 75 TEMPERATURE (°C) 100 700 600 500 MAIN SWITCH 400 300 SYNCHRONOUS SWITCH 0 1 2 3 VIN (V) 4 100 100 90 90 80 EFFICIENCY (%) 80 30 3 3.5 5 4.5 4 INPUT VOLTAGE (V) MAIN SWITCH SYNCHRONOUS SWITCH 0 –50 –25 6 5 50 25 75 0 TEMPERATURE (°C) 100 125 35421 G15 Efficiency vs Load Current 100 VIN = 3.6V VIN = 4.2V VIN = 3.6V VOUT = 2.8V 90 70 60 50 40 80 Burst Mode OPERATION PULSE SKIP 70 30 IOUT = 0.1mA IOUT = 1mA IOUT = 10mA IOUT = 100mA IOUT = 500mA 40 100 Efficiency vs Load Current Efficiency vs Input Voltage 7 150 35421 G14 35421 G13 50 6 200 50 0 125 60 5 Switch Leakage vs Temperature 100 70 4 VIN (V) 250 200 VIN = 3.6V VIN = 4.2V 0.1 3 300 SWITCH LEAKAGE (nA) 0.8 LEAKAGE CURRENT (pA) 1000 MAIN SWITCH 2 35421 G12 Switch Leakage vs Input Voltage 0.9 0.3 1 35421 G11 35421 G10 0.6 SYNCHRONOUS SWITCH 0 1 EFFICIENCY (%) –1.0 EFFICIENCY (%) 0.4 –1.0 –0.6 –0.8 MAIN SWITCH 0.5 20 60 10 5.5 6 35421 G16 FIGURE 3a CIRCUIT 0 0.1 1 10 100 LOAD CURRENT (mA) 1000 35421 G17 50 0.1 1 10 100 LOAD CURRENT (mA) 1000 35421 G18 35421f 5 LTC3542-1 PIN FUNCTIONS VOUT (Pin 1): Output Pin. Receives the 2.8V output voltage to internal feedback resistors. VIN (Pin 2): Power Supply Pin. Must be closely decoupled to GND. GND (Pin 3): Ground Pin. SW (Pin 4): Switch Node Connection to Inductor. This pin connects to the drains of the internal main and synchronous power MOSFET switches. MODE/SYNC (Pin 5): Mode Selection and Oscillator Synchronization Pin. This pin controls the operation of the device. When tied to GND or VIN, Burst Mode operation or pulse skipping mode is selected, respectively. The oscillation frequency can be synchronized to an external oscillator applied to this pin and pulse skipping mode is automatically selected. Do not float this pin. RUN (Pin 6): Converter Enable Pin. Forcing this pin above 1.5V enables this part, while forcing it below 0.3V causes the device to shut down. In shutdown, all functions are disabled drawing <1μA supply current. This pin must be driven; do not float. GND (Pin 7): Exposed Pad. The Exposed Pad is ground. It must be soldered to PCB ground to provide both electrical contact and optimum thermal performance. 35421f 6 LTC3542-1 BLOCK DIAGRAM SLOPE COMPENSATION + OSC VIN ICOMP – VOUT R1 R2 0.6V + – – EA + VB + BURST LOGIC ANTISHOOT THROUGH SW MODE MODE/SYNC MODE DETECT VIN CLKIN + RUN 0.6V REF SHUTDOWN IRCMP – GND 35421 BD 35421f 7 LTC3542-1 OPERATION The LTC3542-1 uses a constant frequency, current mode, step-down architecture. The operating frequency is set at 2.25MHz and can be synchronized to an external oscillator. To suit a variety of applications, the selectable MODE/SYNC pin allows the user to trade off noise for efficiency. the sleep threshold and turns the top MOSFET on. This process repeats at a rate that is dependent on the load demand. By running cycles periodically, the switching losses which are dominated by the gate charge losses of the power MOSFETs are minimized. The output voltage is set by an internal resistor divider. An error amplifier compares the divided output voltage with a reference voltage of 0.6V and adjusts the peak inductor current accordingly. For lower ripple noise at low load currents, the pulse skip mode can be used. In this mode, the regulator continues to switch at a constant frequency down to very low load currents, where it will begin skipping pulses. Main Control Loop Dropout Operation During normal operation, the top power switch (P-channel MOSFET) is turned on at the beginning of a clock cycle when the divided output voltage is below the reference voltage. The current flows into the inductor and the load increases until the current limit is reached. The switch turns off and energy stored in the inductor flows through the bottom switch (N-channel MOSFET) into the load until the next clock cycle. The peak inductor current is controlled by the internally compensated output of the error amplifier. When the load current increases, the divided output voltage decreases slightly below the reference. This decrease causes the error amplifier to increase its output voltage until the average inductor current matches the new load current. The main control loop is shut down by pulling the RUN pin to ground. When the input supply voltage decreases toward the output voltage, the duty cycle increases to 100%, which is the dropout condition. In dropout, the PMOS switch is turned on continuously with the output voltage being equal to the input voltage minus the voltage drops across the internal P-channel MOSFET and the inductor. An important design consideration is that the RDS(ON) of the P-channel switch increases with decreasing input supply voltage (See Typical Performance Characteristics). Therefore, the user should calculate the power dissipation when the LTC3542-1 is used at 100% duty cycle with low input voltage (See Thermal Considerations in the Applications Information Section). Low Load Current Operation By selecting MODE/SYNC pin, two modes are available to control the operation of the LTC3542-1 at low load currents. Both modes automatically switch from continuous operation to the selected mode when the load current is low. To optimize efficiency, the Burst Mode operation can be selected. When the converter is in Burst Mode operation, the peak current of the inductor is set to approximately 125mA regardless of the output load. Each burst event can last from a few cycles at light loads to almost continuously cycling with short sleep intervals at moderate loads. In between these burst events, the power MOSFETs and any unneeded circuitry are turned off, reducing the quiescent current to 26μA. In this sleep state, the load current is being supplied solely from the output capacitor. As the output voltage drops, the EA amplifier’s output rises above Low Supply Operation To prevent unstable operation, the LTC3542-1 incorporates an undervoltage lockout circuit which shuts down the part when the input voltage drops below about 2V. Internal Soft-Start At start-up when the RUN pin is brought high, the internal reference is linearly ramped from 0V to 0.6V in about 1ms. The regulated feedback voltage follows this ramp resulting in the output voltage ramping from 0% to 100% in 1ms. The current in the inductor during soft-start is defined by the combination of the current needed to charge the output capacitance and the current provided to the load as the output voltage ramps up. The start-up waveform, shown in the Typical Performance Characteristics, shows the output voltage start-up from 0V to 2.8V with a 500mA load and VIN = 3.6V (refer to Figure 3a). 35421f 8 LTC3542-1 APPLICATIONS INFORMATION A general LTC3542-1 application circuit is shown in Figure1. External component selection is driven by the load requirement and begins with the selection of the inductor L. Once the inductor is chosen, CIN and COUT can be selected. L VIN VIN CIN SW LTC3542-1 RUN VOUT MODE/SYNC VOUT COUT 35421 F01 GND Figure 1. LTC3542-1 General Schematic Inductor Selection The inductor value has a direct effect on ripple current ΔIL, which decreases with higher inductance and increases with higher VIN or VOUT , as shown in following equation: ΔIL = VOUT ⎛ VOUT ⎞ 1– ƒO • L ⎜⎝ VIN ⎟⎠ where fO is the switching frequency. A reasonable starting point for setting ripple current is ΔIL = 0.4 • IOUT(MAX), where IOUT(MAX) is 500mA. The largest ripple current ΔIL occurs at the maximum input voltage. To guarantee that the ripple current stays below a specified maximum, the inductor value should be chosen according to the following equation: L= VOUT ⎛ VOUT ⎞ ⎜ 1– ⎟ ƒO • ΔIL ⎝ VIN(MAX ) ⎠ The DC current rating of the inductor should be at least equal to the maximum load current plus half the ripple current to prevent core saturation. Thus, a 600mA rated inductor should be enough for most applications (500mA + 100mA). For better efficiency, chose a low DC-resistance inductor. The inductor value will also have an effect on Burst Mode operation. The transition to low current operation begins when the inductor’s peak current falls below a level set by the burst clamp. Lower inductor values result in higher ripple current which causes the transition to occur at lower load currents. This causes a dip in efficiency in the upper range of low current operation. In Burst Mode operation, lower inductance values cause the burst frequency to increase. Inductor Core Selection Different core materials and shapes change the size/current and price/current relationships of an inductor. Toroid or shielded pot cores in ferrite or permalloy materials are small and don’t radiate much energy, but generally cost more than powdered iron core inductors with similar electrical characteristics. The choice of which style inductor to use often depends more on the price vs size requirements and any radiated field/EMI requirements than on what the LTC3542-1 requires to operate. Table 1 shows some typical surface mount inductors that work well in LTC3542-1 applications. Input Capacitor (CIN) Selection In continuous mode, the input current of the converter is a square wave with a duty cycle of approximately VOUT/VIN. To prevent large voltage transients, a low equivalent series resistance (ESR) input capacitor sized for the maximum RMS current must be used. The maximum RMS capacitor current is given by: IRMS ≈ IMAX VOUT ( VIN – VOUT ) VIN where the maximum average output current IMAX equals the peak current minus half the peak-to-peak ripple current, IMAX = ILIM – ΔIL/2. This formula has a maximum at VIN = 2VOUT , where IRMS = IOUT/2. This simple worst-case is commonly used to design because even significant deviations do not offer much relief. Note that capacitor manufacturer’s ripple current ratings are often based on only 2000 hours life time. This makes it advisable to further derate the capacitor, or choose a capacitor rated at a higher temperature than required. Several capacitors may also be paralleled to meet the size or height requirements of the 35421f 9 LTC3542-1 APPLICATIONS INFORMATION Table 1. Representative Surface Mount Inductors MANUFACTURER Sumida Murata TDK PART NUMBER VALUE (μH) MAX DC CURRENT (A) DCR (Ω) SIZE (mm3) CDRH2D11-2RM 2.2 0.780 0.098 3.2 × 3.2 × 1.2 CDRH3D16 2.2 1.2 0.075 3.8 × 3.8 × 1.8 CMD4D11 2.2 0.95 0.116 4.4 × 5.8 × 1.2 CDH2D09B 3.3 0.85 0.15 2.8 × 3 × 1 CLS4D09 4.7 0.75 0.15 4.9 × 4.9 × 1 LQH32CN 2.2 0.79 0.097 2.5 × 3.2 × 1.55 LQH43CN 4.7 0.75 0.15 4.5 × 3.2 × 2.6 IVLC453232 2.2 0.85 0.18 4.8 × 3.4 × 3.4 VLF3010AT2R2M1R0 2.2 1.0 0.12 2.8 × 2.6 × 1 design. An additional 0.1μF to 1μF ceramic capacitor is also recommended on VIN for high frequency decoupling, when not using an all ceramic capacitor solution. T495 series, and Sprague 593D and 595D series. Consult the manufacturer for other specific recommendations. Ceramic Input and Output Capacitors Output Capacitor (COUT) Selection The selection of COUT is driven by the required ESR to minimize voltage ripple and load step transients. Typically, once the ESR requirement is satisfied, the RMS current rating generally far exceeds the IRIPPLE(P-P) requirement, except for an all ceramic solution. The output ripple (ΔVOUT) is determined by: ⎛ ⎞ 1 ΔVOUT ≈ ΔIL ⎜ ESR + 8 • ƒO • COUT ⎟⎠ ⎝ where fO is the switching frequency, COUT is the output capacitance and ΔIL is the inductor ripple current. For a fixed output voltage, the output ripple is highest at maximum input voltage since ΔIL increases with input voltage. If tantalum capacitors are used, it is critical that the capacitors are surge tested for use in switching power supplies. An excellent choice is the AVX TPS series of surface mount tantalums, available in case heights ranging from 2mm to 4mm. These are specially constructed and tested for low ESR so they give the lowest ESR for a given volume. Other capacitor types include Sanyo POSCAP, Kemet T510 and Higher value, lower cost ceramic capacitors are now becoming available in smaller case sizes. Their high ripple current rating, high voltage rating and low ESR are tempting for switching regulator use. However, the ESR is so low that it can cause loop stability problems. Since the LTC3542-1’s control loop does not depend on the output capacitor’s ESR for stable operation, ceramic capacitors can be used to achieve very low output ripple and small circuit size. X5R or X7R ceramic capacitors are recommended because these dielectrics have the best temperature and voltage characteristics of all the ceramics for a given value and size. Great care must be taken when using only ceramic input and output capacitors. When a ceramic capacitor is used at the input and the power is being supplied through long wires, such as from a wall adapter, a load step at the output can induce ringing at the VIN pin. At best, this ringing can couple to the output and be mistaken as loop instability. At worst, the ringing at the input can be large enough to damage the part. For more information, see Application Note 88. The recommended capacitance value to use is 10μF for both input and output capacitors. 35421f 10 LTC3542-1 APPLICATIONS INFORMATION Mode Selection and Frequency Synchronization The MODE/SYNC pin is a multipurpose pin that provides mode selection and frequency synchronization. Connecting this pin to GND enables Burst Mode operation, which provides the best low current efficiency at the cost of a higher output voltage ripple. Connecting this pin to VIN selects pulse skip mode operation, which provides the lowest output ripple at the cost of low current efficiency. The LTC3542-1 can also be synchronized to an external clock signal with range from 1MHz to 3MHz by the MODE/SYNC pin. During synchronization, the mode is set to pulse skip and the top switch turn-on is synchronized to the falling edge of the external clock. Efficiency Considerations The efficiency of a switching regulator is equal to the output power divided by the input power times 100%. It is often useful to analyze individual losses to determine what is limiting the efficiency and which change would produce the most improvement. Efficiency can be expressed as: Efficiency = 100% – (L1 + L2 + L3 + ...) where L1, L2, etc. are the individual losses as a percentage of input power. Although all dissipative elements in the circuit produce losses, three main sources usually account for most of POWER LOSS (mW) 1000 the losses in LTC3542-1 circuits: 1) VIN quiescent current, 2) I2R loss and 3) switching loss. VIN quiescent current loss dominates the power loss at very low load currents, whereas the other two dominate at medium to high load currents. In a typical efficiency plot, the efficiency curve at very low load currents can be misleading since the actual power loss is of no consequence as illustrated in Figure 2. 1) The VIN quiescent current is the DC supply current given in the Electrical Characteristics which excludes MOSFET charging current. VIN current results in a small (<0.1%) loss that increases with VIN, even at no load. 2) I2R losses are calculated from the DC resistances of the internal switches, RSW, and external inductor, RL. In continuous mode, the average output current flows through inductor L, but is “chopped” between the internal top and bottom switches. Thus, the series resistance looking into the SW pin is a function of both top and bottom MOSFET RDS(ON) and the duty cycle (D) as follows: RSW = (RDS(ON)TOP)(D) + (RDS(ON)BOT)(1 – D) The RDS(ON) for both the top and bottom MOSFETs can be obtained from the Typical Performance Characteristics curves. Thus, to obtain I2R losses: I2R losses = IOUT2(RSW + RL) VIN = 3.6V FIGURE 3a CIRCUIT 10 0.1 0.1 1 10 100 LOAD CURRENT (mA) 1000 35421 F02 Figure 2. Power Loss vs Load Current 35421f 11 LTC3542-1 APPLICATIONS INFORMATION 3) The switching current is MOSFET gate charging current, that results from switching the gate capacitance of the power MOSFETs. Each time a MOSFET gate is switched from low to high to low again, a packet of charge dQ moves from VIN to ground. The resulting dQ/dt is a current out of VIN that is typically much larger than the DC bias current. In continuous mode, IGATECHG = fO(QT + QB), where QT and QB are the gate charges of the internal top and bottom MOSFET switches. The gate charge losses are proportional to VIN and thus their effects will be more pronounced at higher supply voltages. Other “hidden” losses such as copper trace and internal battery resistances can account for additional efficiency degradations in portable systems. The internal battery and fuse resistance losses can be minimized by making sure that CIN has adequate charge storage and very low ESR at the switching frequency. Other losses include diode conduction losses during dead-time and inductor core losses generally account for less than 2% total additional loss. The junction temperature, TJ, is given by: TJ = TA + TR where TA is the ambient temperature. As an example, consider the LTC3542-1 at an input voltage of 3.6V, a load current of 500mA and an ambient temperature of 70°C. From the typical performance graph of switch resistance, the RDS(ON) of the P-channel switch at 70°C is approximately 0.6Ω. Therefore, power dissipated by the part is: PD = ILOAD2 • RDS(ON) = 150mW For the DFN package, the θJA is 89°C/W. Thus, the junction temperature of the regulator is: TJ = 70°C + 0.150 • 89 = 83.4°C which is below the maximum junction temperature of 125°C. Note that at higher supply voltages, the junction temperature is lower due to reduced switch resistance (RDS(ON)). Thermal Considerations Checking Transient Response In most applications the LTC3542-1 does not dissipate much heat due to its high efficiency. But in applications where the LTC3542-1 is running at high ambient temperature with low supply voltage and high duty cycles, such as in dropout, the heat dissipated may exceed the maximum junction temperature of the part. If the junction temperature reaches approximately 160°C, both power switches will be turned off and the SW node will become high impedance. The regulator loop response can be checked by looking at the load transient response. Switching regulators take several cycles to respond to a step in load current. When a load step occurs, VOUT immediately shifts by an amount equal to ΔILOAD • ESR, where ESR is the effective series resistance of COUT. ΔILOAD also begins to charge or discharge COUT, generating a feedback error signal used by the regulator to return VOUT to its steady-state value. During this recovery time, VOUT can be monitored for overshoot or ringing that would indicate a stability problem. To avoid the LTC3542-1 from exceeding the maximum junction temperature, the user need to do some thermal analysis. The goal of the thermal analysis is to determine whether the power dissipated exceeds the maximum junction temperature of the part. The temperature rise is given by: TR = (PD)(θJA) where PD is the power dissipated by the regulator and θJA is the thermal resistance from the junction of the die to the ambient. The output voltage settling behavior is related to the stability of the closed-loop system and will demonstrate the actual overall supply performance. For a detailed explanation of optimizing the compensation components, including a review of control loop theory, refer to Application Note 76. In some applications, a more severe transient can be caused by switching loads with large (>1μF) bypass capacitors. The discharged bypass capacitors are effectively put in 35421f 12 LTC3542-1 APPLICATIONS INFORMATION parallel with COUT, causing a rapid drop in VOUT. No regulator can deliver enough current to prevent this problem, if the switch connecting the load has low resistance and is driven quickly. The solution is to limit the turn-on speed of the load switch driver. A Hot SwapTM controller is designed specifically for this purpose and usually incorporates current limit, short circuit protection and soft-start. Design Example As a design example, assume the LTC3542-1 is used in a single lithium-ion battery-powered cellular phone application. The VIN will be operating from a maximum of 4.2V down to 2.8V. The load current requirement is a maximum of 0.5A, but most of the time it will be in standby mode, requiring only 2mA. Efficiency at both low and high load currents is important. Output voltage is 2.8V. With this information we can calculate L using: ⎛ V ⎞ 1 L= • VOUT • ⎜ 1– OUT ⎟ f • ΔIL VIN ⎠ ⎝ Substituting VOUT = 2.8V, VIN = 4.2V, ΔIL = 200mA and f = 2.25MHz gives: 2.8 V ⎛ 2.8 V ⎞ L= • ⎜ 1– = 2.07μH 2.25MHz • 200mA ⎝ 4.2V ⎟⎠ CIN will require an RMS current rating of at least 0.25A ≅ ILOAD(MAX)/2 at temperature and COUT will require ESR of less than 0.2Ω. In most cases, ceramic capacitors will satisfy these requirements. Select COUT = 10μF and CIN = 10μF. Figure 3 shows the complete circuit along with its efficiency curve, load step response and recommended layout. PC Board Layout Checklist When laying out the printed circuit board, the following checklist should be used to ensure proper operation of the LTC3542-1. These items are also illustrated graphically in Figure 3b. Check the following in your layout: 1. The power traces, consisting of the GND trace, the SW trace and the VIN trace should be kept short, direct and wide. 2. Does the VOUT pin connect directly to the (+) plate of COUT? 3. Does the (+) plate of CIN connect to VIN as closely as possible? This capacitor provides the AC current to the internal power MOSFETs. 4. Keep the (–) plates of CIN and COUT as close as possible. Hot Swap is a trademark of Linear Technology Corporation. Choosing a vendor’s closest inductor value of 2.2μH results in a maximum ripple current of: ΔIL = 2.8 V ⎛ 2.8 V ⎞ • ⎜1 – = 188.66mA 2.25MHz • 2.2μH ⎝ 4.2V ⎟⎠ 35421f 13 LTC3542-1 APPLICATIONS INFORMATION L* 2.2μH VIN 3V TO 5.5V VIN CIN** 10μF VOUT 2.8V 500mA SW LTC3542-1 RUN VOUT COUT** 10μF MODE/SYNC GND 35421 F03a *SUMIDA CDRH2D18HP-2R2NC **TDK C2012X5R0J106M Figure 3a. Typical Application GND VOUT 1 VIN VIN 2 CIN VIA TO VOUT 6 RUN 5 MODE/ SYNC GND GND 3 4 SW L GND COUT VOUT 35421 F03b Figure 3b. Layout Diagram 100 90 VIN = 3.6V VOUT 100mV/DIV AC COUPLED EFFICIENCY (%) 80 70 IL 500mA/DIV 60 50 40 ILOAD 500mA/DIV 30 20 VIN = 3.6V 20μs/DIV ILOAD = 30mA TO 500mA FIGURE 3a CIRCUIT 10 FIGURE 3a CIRCUIT 0 0.1 1 10 100 LOAD CURRENT (mA) 35421 G05 1000 Figure 3d. Load Step 35421 F03c Figure 3c. Efficiency Curve 35421f 14 LTC3542-1 PACKAGE DESCRIPTION DC Package 6-Lead Plastic DFN (2mm × 2mm) (Reference LTC DWG # 05-08-1703) 0.675 p0.05 2.50 p0.05 1.15 p0.05 0.61 p0.05 (2 SIDES) PACKAGE OUTLINE 0.25 p 0.05 0.50 BSC 1.42 p0.05 (2 SIDES) RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS R = 0.115 TYP 0.56 p 0.05 (2 SIDES) 0.38 p 0.05 4 6 2.00 p0.10 (4 SIDES) PIN 1 BAR TOP MARK (SEE NOTE 6) PIN 1 CHAMFER OF EXPOSED PAD 3 0.200 REF 0.75 p0.05 1 (DC6) DFN 1103 0.25 p 0.05 0.50 BSC 1.37 p0.05 (2 SIDES) 0.00 – 0.05 BOTTOM VIEW—EXPOSED PAD NOTE: 1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WCCD-2) 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 35421f Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 15 LTC3542-1 TYPICAL APPLICATION Using Low Profile Components, <1mm Height 2 VIN 3V TO 5.5V CIN** 10μF CER 6 5 VIN SW LTC3542-1 RUN VOUT 4 2.2μH* VOUT 2.8V 500mA 1 COUT** 10μF CER MODE/SYNC GND 3 35421 TA02a *TDK VLF3010AT-2R2MIR0 **TDK C2012X5R0J106M Efficiency vs Load Current 100 EFFICIENCY (%) 90 80 70 60 50 0.1 VIN = 3.6V VOUT = 2.8V Burst Mode OPERATION 1 10 100 LOAD CURRENT (mA) 1000 35421 TA02b RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LTC3405/LTC3405B 300mA IOUT, 1.5MHz, Synchronous Step-Down DC/DC Converter 95% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 0.8V, IQ = 20μA, ISD < 1μA, ThinSOT Package LTC3406/LTC3406B 600mA IOUT, 1.5MHz, Synchronous Step-Down DC/DC Converter 96% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 0.6V, IQ = 20μA, ISD < 1μA, ThinSOT Package LTC3407/LTC3407-2 Dual 600mA/800mA IOUT, 1.5MHz/2.25MHz, Synchronous 95% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 0.6V, IQ = 40μA, Step-Down DC/DC Converter ISD < 1μA, MS10E, DFN Packages LTC3409 600mA IOUT, 1.7MHz/2.6MHZ, Synchronous Step-Down DC/DC Converter 96% Efficiency, VIN: 1.6V to 5.5V, VOUT(MIN) = 0.6V, IQ = 65μA, ISD < 1μA, DFN Package LTC3410/LTC3410B 300mA IOUT, 2.25MHz, Synchronous Step-Down DC/DC Converter 95% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 0.8V, IQ = 26μA, ISD < 1μA, SC70 Package LTC3411 1.25A IOUT, 4MHz, Synchronous Step-Down DC/DC Converter 95% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 0.8V, IQ = 60μA, ISD < 1μA, MS10, DFN Packages LTC3548 Dual 400mA/800mA IOUT, 2.25MHz, Synchronous Step-Down DC/DC Converter 95% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 0.6V, IQ = 40μA, ISD < 1μA, MS10, DFN Packages LTC3561 1A IOUT, 4MHz Synchronous Step-Down DC/DC Converter 95% Efficiency, VIN: 2.6V to 5.5V, VOUT(MIN) = 0.8V, IQ = 240μA, ISD < 1μA, 3mm × 3mm DFN Package 35421f 16 Linear Technology Corporation LT 0708 • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com © LINEAR TECHNOLOGY CORPORATION 2008