Rohm BD7684FJ-LB Low noise quasi-resonant control dc/dc converter ic for ac/dc converter Datasheet

Datasheet
Low Noise Quasi-Resonant Control
DC/DC converter IC for AC/DC Converter
BD7682FJ-LB
BD7683FJ-LB
BD7684FJ-LB
General Description
BD7685FJ-LB
Key Specifications
This is the product guarantees long time support in the
Industrial market.
BD768xFJ series is a Quasi-resonant controller type
DC/DC converters that provide an optimum system for
all products that include an electrical outlet.
Quasi-resonant operation enables soft switching and
helps to keep EMI low. Design with a high degree of
flexibility is achieved with switching MOSFETs and
current detection resistors as external devices.
The built-in brown out function monitors the input
voltage as part of system optimization. The burst mode
function reduces input power at low power.
BD768xFJ series include various protection functions,
such as a soft start function, burst function, per-cycle
over-current limiter function, overvoltage protection
function, overload protection function, and brown out
function.
BD768xFJ series include a gate-clamp circuit for
optimal driving SIC-MOSFET.





Operating Power Supply Voltage Range:
VCC 15.0V to 27.5V
Normal Operating Current:
0.80mA(Typ)
Burst Operating Current:
0.50mA(Typ)
Maximum Frequency:
120kHz(Typ)
Operating Temperature:
-40°C to +105°C
Package
4.90mm x 6.00mm x 1.65mm
(Typ.)
(Typ.)
(TYP.)
SOP-J8
4.90mm x 6.00mm x 1.65mm
Features















pitch 1.27mm
(TYP.)
Pin 8 : SOP-J8 Package
(6.00mm × 4.90mm : 1.27mm pitch <TYP>)
Quasi-resonant type (low EMI)
Frequency reduction mode
Low current consumption (19µA), during standby
Low current consumption when no load (burst
operation when light load)
Maximum frequency (120kHz)
CS Pin Leading-Edge Blanking
VCC UVLO (Under Voltage Drop Out protection)
VCC OVP (Over Voltage Protection)
Per-cycle over-current protection circuit
Soft start
ZT trigger mask function
Voltage protection function (brown out)
ZT OVP (Over Voltage Protection)
Gate-clamp circuit
Lineup
BD7682FJ
BD7683FJ
BD7684FJ
BD7685FJ
FBOLP
AutoRestart
Latch
AutoRestart
Latch
VCCOVP
Latch
Latch
AutoRestart
AutoRestart
Applications
Industrial equipment, AC Adaptor, Household appliances
Typical Application Circuit
○Product structure：Silicon monolithic integrated circuit
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Datasheet
BD768xFJ-LB Series
Pin Descriptions
No.
Pin Name
I/O
1
2
3
4
5
6
7
8
ZT
FB
CS
GND
OUT
MASK
VCC
BO
I
I
I
I/O
O
O
I
O
Function
Zero Current Detect pin
Feedback signal input pin
Current Sense pin
GND pin
MOSFET drive pin
External TR drive
Power Supply pin
Brown IN/OUT monitor pin
ESD Diode
VCC
GND
✓
✓
✓
✓
✓
✓
✓
✓
✓
✓
✓
-
Block Diagram
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Datasheet
BD768xFJ-LB Series
Absolute Maximum Ratings (Ta= 25 °C)
Parameter
Symbol
Rating
Unit
Maximum Applied Voltage 1
Vmax1
-0.3 to +32.0
V
OUT, VCC, MASK
Maximum Applied Voltage 2
Vmax2
-0.3 to +6.5
V
ZT, CS, FB, BO
Maximum Applied Voltage 3
Vmax3
-0.3 to +25.0
V
OUT
ZT Pin Maximum Current1
ISZT1
-3.0
mA
ZT Pin Maximum Current2
ISZT2
3.0
mA
0.67
(Note1)
Power Dissipation
Pd
Operating Temperature Range
Topr
-40 to +105
°C
MAX Junction Temperature
Tjmax
150
°C
Storage Temperature Range
Tstr
-55 to +150
°C
Conditions
W
(Note1) SOP-J8 : When mounted (on 70 mm × 70 mm, 1.6 mm thick, glass epoxy on single-layer substrate)
De-rated by 5.4mW/°C when operating above Ta=25°C.
Caution: Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open circuit
between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the IC is operated over
the absolute maximum ratings.
Recommended Operating Conditions (Ta=25 C)
Parameter
Power Supply Voltage Range
Symbol
Rating
Unit
VCC
15.0 to 27.5
V
Conditions
VCC pin voltage
Electrical Characteristics (unless otherwise noted, Ta = 25 °C, VCC= 24 V)
Parameter
Symbol
Specifications
MIN
TYP
MAX
Unit
Conditions
[Circuit Current]
VCC=18.0V
(VCC UVLO=Disable)
FB=1.0V
(at pulse operation)
FB=0.0V
(at burst operation)
Circuit Current (OFF)
IOFF
10
19
30
µA
Circuit Current (ON) 1
ION1
300
800
1500
µA
Circuit Current (ON) 2
ION2
150
500
1000
µA
Iprotect
800
1600
2200
µA
B.O. Detection Voltage
VBO
0.920
1.000
1.080
V
B.O. Detection Hysteresis Current
IBO
10
15
20
µA
VCC UVLO Voltage 1
VUVLO1
19.00
19.50
20.00
V
VCC rise
VCC UVLO Voltage 2
VUVLO2
13.00
14.00
15.00
V
VCC fall
VCC UVLO Hysteresis
VUVLO3
-
5.50
-
V
VUVLO3= VUVLO1-VUVLO2
VCC OVP Voltage 1
VOVP1
27.50
29.50
31.50
V
VCC rise
VCC OVP Voltage 2
VOVP2
21.00
23.00
25.00
V
VCC fall
VCC OVP Hysteresis
VOVP3
-
6.50
-
V
VOVP3= VOVP1-VOVP2
Latch Release Voltage
VLATCH
-
VUVLO2-3.5
-
V
VCC voltage
Latch Mask Time
tLATCH
50
150
250
µs
Circuit Current (Protect circuit is on)
FBOLP,VCCOVP,ZTOVP
[Brown Out Block (B.O.)]
[VCC Pin Protection Functions]
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Datasheet
BD768xFJ-LB Series
Electrical Characteristics – continued (unless otherwise noted, Ta = 25 °C, VCC=24 V)
Parameter
Symbol
Specifications
Unit
Conditions
MIN
TYP
MAX
RFB
15
20
25
kΩ
CS Over-Current Sensor Voltage 1A
VLIM1A
0.950
1.000
1.050
V
FB=2.2V (IZT>-1mA)
CS Over-Current Sensor Voltage 1B
VLIM1B
0.620
0.700
0.780
V
FB=2.2V (IZT<-1mA)
CS Over-Current Sensor Voltage 2A
VLIM2A
0.200
0.300
0.400
V
FB=0.6V (IZT>-1mA)
CS Over-Current Sensor Voltage 2B
VLIM2B
0.140
0.210
0.280
V
FB=0.6V (IZT<-1mA)
CS Switching ZT Current
IZT
0.900
1.000
1.100
mA
CS Leading Edge Blanking Time
tLEB
-
0.250
-
µs
Minimum ON Width
tMIN
-
0.500
-
µs
Maximum Operating Frequency 1
fSW1
106
120
134
kHz
FB=2.0V
Maximum Operating Frequency 2
fSW2
20
30
40
kHz
FB=0.5V
Frequency Reduction Start FB Voltage
VFBSW1
1.100
1.250
1.400
V
Frequency Reduction End FB Voltage 1
VFBSW2
0.400
0.500
0.600
V
Frequency Reduction End FB Voltage 2
VFBSW3
-
0.550
-
V
Voltage Gain
AVCS
1.700
2.000
2.300
V/V
⊿VFB/⊿VCS
ZT Comparator Voltage 1
VZT1
60
100
140
mV
ZT fall
ZT Comparator Voltage 2
VZT2
120
200
280
mV
[DCDC Converter Block (Turn OFF)]
FB Pin pull-up Resistance
[DCDC Converter Block (Turn ON)]
ZT rise
For noise prevention
after OUT H ⇒L
Count from final ZT
trigger (1-stage)
Count from final ZT
trigger (2-stage)
ZT Trigger Mask Time
tZTMASK
0.25
0.60
0.95
µs
ZT Trigger Timeout Period 1
tZTOUT
8.0
15.0
24.0
µs
ZT Trigger Timeout Period 2
tZTOUT2
2.0
5.0
8.0
µs
tZTON
27.0
45.0
62.0
µs
Soft Start Time 1
tSS1
0.600
1.000
1.400
ms
Soft Start Time 2
tSS2
2.400
4.000
5.600
ms
FB OLP Voltage 1
VFOLP1
2.500
2.800
3.100
V
FB rise
FB OLP Voltage 2
VFOLP2
2.300
2.600
2.900
V
FB fall
FB OLP Timer
tFOLP
90
128
166
ms
ZT OVP Voltage
VZTL
3.250
3.500
3.750
V
OUT Pin Clamp Voltage
VOUT
16.00
18.00
20.00
V
OUT pin Nch MOS Ron
RNOUT
2.0
4.5
9.0
Ω
MASK Pin Delay Time
tMASK
0.25
0.60
0.95
µs
MASK Pin Ron
RMASK
20
50
80
Ω
Maximum ON Time
[DCDC Protection Functions]
[OUT Pin]
[MASK Pin]
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Datasheet
BD768xFJ-LB Series
Application Information
Description of Blocks
(1) Start-Up sequences (FBOLP:auto recovery mode)
The BD768xFJ’s start up sequence is shown in Figure 1.
See the sections below for detailed descriptions.
VH
1.0V
BO
19.5V
14.0V
VCC
Internal REF
Pull Up
128msec
128msec
128msec
VFOLP1
FB
Vout
Normal
Load
Over
Load
Light
LOAD
Iout
Burst mode
Switing
Soft
Start
A
BC
D
E
F
GH
I J
K
Figure 1. Start-up Sequence Timing Chart
A: Input voltage VH is applied
B: VCC pin voltage rises due to start resistor RSTART, and this IC starts operating when VCC > VUVLO1 (19.5V typ).
Switching starts when the status of the brown out function is normal (BO > 1.0 V), other protection functions are also
considered normal. At that time, the VCC value always drops due to the pin's consumption current, so VCC > VUVLO2
(14.0 V typ) should be set.
C: There is a soft start function which regulates the voltage level at the CS pin to prevent a rise in voltage and current.
D: When the switching operation starts, VOUT rises.
Once the output voltage starts, set the rated voltage to within the TFOLP period (128ms typ).
E: When there is a light load, burst operation is order to keep power consumption down.
F: Overload operation.
G: When the FB pin voltage keeps FB > VFOLP1 (=2.8V typ) at or above TFOLP (128ms typ), switching is stopped by the
overload protection circuit.
If the FB pin voltage status becomes FB < VFOLP2 even once, the IC’s internal 128ms timer is reset.
H: If the VCC voltage drops to VCC < VUVLO2 (14.0V typ) or below, restart is executed.
I: The IC’s circuit current is reduced and the VCC pin value rises. (Same as B)
J: Same as F
K: Same as G
Start resistance RSTART is the resistance required to start the IC.
When the start resistance RSTART value is reduced, standby power is increased and the startup time is shortened.
Conversely, when the start resistance RSTART value is increased, standby power is reduced and the startup time is
lengthened.
When BD768xFJ is in standby mode, current IOFF becomes 30µA Max
However, this is the minimum current required to start the IC. Use the appropriate current for the set target.
Example: Start Resistance RSTART Setting
RSTART  VMIN  VUVLO max  / IOFF
When VAC = 100 V, if the margin is -20%, then VMIN = 113V
Since VUVLO1 (max) = 20.0V,
And since RSTART < (113-20) / 30µA = 3.10 MΩ, the start resistance is 3.0MΩ. (Set according to the start time.)
In this case: RSTART power consumption Pd R START   VH  VCC 2 / R START  141V  14 V 2 / 3.0M  5.4mW
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Datasheet
BD768xFJ-LB Series
(2) Brown Out function (B.O.)
BD768xFJ has a built-in brown out function. When the input VH value is low, the brown out function stops the
DC/DC operations (The IC itself continues to operate). An example is shown in Figure 2. The input voltage which
is resistance-divided is inputted to the BO pin. If the BO pin value exceeds VBO (1.0 V typ), the circuit detects as
normal state, and DCDC operations are started. There is a current hysteresis IBO in the circuit.
The current hysteresis flow is described below.
・
BO < VBO (1.0 V typ) (abnormal) IBO with sync
・
BO≧ VBO (1.0 V typ) (normal status) IBO without sync
VH
FUSE
RH
Diode
Filter
Bridge
RL
BO
BO
Comp.
+
15µA
15uA
‐
1.00V
Controller
BD768x
Figure 2. Block Diagram of Brown Out Function
Example: RH and RL Setting
In the following example, VHON is the operation start VH voltage (L to H), and VHOFF is the operation stop VH voltage
(H to L).
IC operation start (OFF => ON)
(VHON-1.0) /RH = 1.0/RL +15*10e-6
IC operation stop (ON => OFF)
(VHOFF-1.0) /RH = 1.0/RL
Based on the above, RH and RL can be calculated as follows.
RH  VHON  VHOFF  / 15 * 10e  6, RL  1.0 / VHOFF  1.0  * RH
Example 1: When using 100 V AC (140 V DC)
When RH = 2350kΩ and RL = 34kΩ, VHON = 105.8V (-25%) and VHOFF = 70.8V (-51%)
Current consumption is 8.0mW for both RH and RL.
Example 2: When using 230V AC (322V DC)
RH = 5200kΩ, RL = 42kΩ
VHON = 202.8V (-37%), VHOFF = 124.8V (-62%)
Current consumption is 20.1 mW for both RH and RL.
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Datasheet
BD768xFJ-LB Series
(3) VCC Pin Protection Function
BD768xFJ includes the VCC low voltage protection function VCC UVLO (Under Voltage Protection) and the VCC
over voltage protection function VCC OVP (Over Voltage Protection). These functions prevent abnormal
voltage-related damage in MOSFETs used for switching.
The VCC UVLO function uses an auto recovery type comparator with voltage hysteresis and the VCC OVP
function uses latch mode or auto recovery.
After latch function is detected by VCCOVP, latching is released (reset) when the condition VCC< VLATCH (typ=
VUVLO2 -3.5V) is met.
This operation is shown in Figure 3.
VCCOVP has a built-in mask time tLATCH (typ = 150 µs).
This function masks any surges, etc., that occur at the pin.
VH
29.5Vtyp
VCC
19.5Vtyp
14.0Vtyp
Vlatch=
VCCuvlo23.5Vtyp
ON
Time
ON
OFF
VCC UVLO
OFF
ON
VCC OVP
OFF
OFF
ON
OUT
Switching
OFF
ON
OFF
OFF
Internal
Latch Signal
L : Normal
H : Latch
A
B C
DE
F
G
H
I
J
K
L
M
N
A
Time
Figure 3. VCC UVLO / OVP (Latch Mode)
A: VH is applied, VCC voltage rises
B: When VCC > VUVLO1, DC/DC operation starts.
C: When VCC < VUVLO2, DC/DC operation stops.
D: When VCC > VUVLO1, DC/DC operation starts.
E: VCC voltage drops until DC/DC operation starts.
F: VCC rises.
F: When VCC > VOVP1, DC/DC operation stops (latch mode). Switching is stopped by an internal latch signal.
G: When DC/DC operation stops, power supply from the auxiliary coil stops and VCC voltage drops.
H: When VCC < VUVLO2, VCC voltage rises because IC current consumption drops.
I: When VCC > VUVLO1, latching occurs and so there are no DC/DC operations. VCC voltage drops because IC
current consumption is lowered.
K: Same as H
L: Same as I
M: VH is OPEN (unplugged). VCC drops.
N: When VCC < VLATCH, latch is released.
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Datasheet
BD768xFJ-LB Series
(4) DCDC Converter Function
BD768xFJ uses PFM (Pulse Frequency Modulation) mode control.
The FB pin, ZT pin, and CS pin are all monitored to provide a system optimized for DC/DC.
The switching MOSFET ON width (turn OFF) is controlled via the FB pin and CS pin, and the OFF width (turn ON)
is controlled via the ZT pin.
PFM mode sets the maximum frequency to meet noise standards.
A detailed description appears below. (See Figure 4)
7
NOUT
+
+
-
1
18.0V
Clamper
1 shot
+
AND
-
TimeOut
( 15 usec )
7V
ZT Blanking
OUT(H->L)
0.60us
100mV
/200mV
+
-
POUT
AND
S Q
NOUT
FBOLP_OH
AND
OR
MAX
Blanking
Frequency
(120kHz)
+
OR
PRE
Driver
5
NOUT
R
1.25V
20k
2
+
-
6
0.50V
+
-
Timer
(128ms)
0.6μs
Delay
FBOLP_OH
NOR
Soft Start
200kΩ
200kΩ
FB/2
1.00V
-
SS1ms
SS4ms
+
CURRENT SENSE (V-V Change)
Normal : ×1.0
Leading Edge
Blanking
3
4
Figure 4. Block Diagram of DC/DC Operations
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BD768xFJ-LB Series
(a) Determination of ON Width (Turn OFF)
ON width is controlled via the FB pin and CS pin.
The ON width is determined by comparing FB pin voltage at 1/ AVCS (typ = 1/2) with the CS pin voltage.
In addition, it is compared with the IC's internally generated VLIM1A (1.0V typ) voltage and the comparator level
changes linearly, as is shown in Figure 5.
The CS pin is also used for the per-pulse over-current limiter circuit.
Changes at the FB pin result in changes in the maximum blanking frequency and over-current limiter level.
 mode1: Burst operation
 mode2: Frequency reduction operation (reduces maximum frequency)
 mode3: Maximum frequency operation (operates at maximum frequency)
 mode4: Overload operation (pulse operation is stopped when overload is detected)
MAX
fSW[kHz]
Fsw[kHz]
mode1
mode2
mode3
mode4
120kHz
30kHz
0.0V
CS
Limiter[V]
0.5V
mode1
2.0V
1.25V
2.8V
mode3
mode2
FB [V]
mode4
V
Vlim1
LIM1
VLIM2
Vlim2
0.0V
0.5V
1.25V
2.0V
2.8V
FB [V]
Figure 5. Relationship of FB Pin to Over-Current Limiter and Maximum Frequency
The over-current limiter level is adjusted for soft start function (section 5) and over-current protection of the input
voltage compensation (section 4 (c))
In this case, the VLIM1 and VLIM2 values are as listed below.
Table 1 Over-Current Protection Voltage
IZT ≥ -1.0mA
Soft Start
IZT < -1.0mA
VLIM1
VLIM2
VLIM1
VLIM2
Start to 1ms
0.250V (25.0%)
0.063V (6.0%)
0.175V (17.5%)
0.047V (4.5%)
1ms to 4ms
0.500V (50.0%)
0.125V (12.0%)
0.350V (35.0%)
0.094V (9.0%)
>4ms
1.000V (100.0%)
0.250V (25.0%)
0.700V (70.0%)
0.188V (18.8%)
(Note) Values in parentheses are relative values when compared to VLIM1 (1.0V typ) during IZT ≥ -1.0mA.
(b) LEB (Leading Edge Blanking) Function
When the switching MOSFET is turned ON, surge current occur at each capacitor component and drive
current. Therefore, when the CS pin voltage rises temporarily, detection errors may occur in the over-current
limiter circuit.
To prevent detection errors, BD768xFJ has the blanking function. This function masks the CS voltage for TLEB
(typ = 250ns) after the OUT pin changes from low to high.
This blanking function reduces CS pin filter.
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Datasheet
BD768xFJ-LB Series
(c) CS Over-Current Protection Switching Function
When the input voltage (VH) becomes high, the ON time is shortened and the operating frequency increases.
As a result, the maximum rated power is increased for a certain over-current limiter. As a countermeasure,
switching is performed by the IC's internal over-current protection function.
When at high voltage, the over-current comparator value which determines the ON time is always multiplied
by 0.7.
Detection is performed by monitoring the ZT inflow current and then switching.
When the MOSFET is turned ON, Va becomes a negative voltage dependent upon the input voltage (VH).
The ZT pin is clamped to nearly 0V in the IC.
The formula used to calculate this is shown below. A block diagram is shown in Figure 6. Also, graphs are
shown in Figure 7, Figure 8 and Figure 9.
IZT  Va  V\ ZT  / R ZT1  Va / R ZT1  VH * Na / Np / R ZT1
R ZT1  Va / IZT
Therefore, the VH voltage is set with a resistance value (RZTL). The ZT bottom detection voltage has now been
determined, so CZT should be used to set the timing.
Np
VH
Izt =(VH*Na)/(Np*Rzt1)
Na
7
Va
VCC
NOUT
+
-
Rzt1
ZT
1
Czt
18V
Clamper
ZT ACSNS Comp.
+
-
ZT OVP Comp.
(LATCH)
ZT
Comp.
+
-
1 shot
AND
TimeOut
( 15 usec )
7V
Rzt2
ZT Blanking
OUT(H->L)
0.60us
100mV
/200mV
OR
POUT
S
AND
Q
NOUT
FBOLP_OH AND
OR
VREF(4V)
5
Rzt
OUT
NOUT
MAX Blanking
Frequency
(120kHz)
+
+
-
PRE
Driver
R
Czt
1.25V
20k
FB
2
+
-
Burst
Comp.
6
0.50V
Cfb
OLP1
Timer
(128ms)
0.6μs
Delay
FBOLP_OH
NO
R
OSC
+
-
MASK
Soft Start
200kΩ
200kΩ
FB/2 1.00V -
DCDC
Comp.
SS1ms
SS4ms
+
CURRENT SENSE (V-V Change)
Normal : ×1.0
Leading Edge
Blanking
3
CS
RS
4
GND
Figure 6. Block Diagram of CS Switching Current
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Figure 7. CS Switching: FB Voltage vs CS Voltage
Figure 8. CS Switching: ZT Current vs CS Voltage
Example: Setup method (for switching between 100-V AC and 220-V AC.)
100-V AC: 141V ±42V (±30% margin)
220-V AC: 308V ±62V (±20% margin)
In the above cases, the CS current is switched in the range from 182V to 246V. This is done when => VH =
214 VH.
Given: Np = 100, Na = 15.
Va  VIN * Na / Np  214V * 15 / 100 *  1  32.1V
R ZC  Va / IZT   32.1V /  1mA  32.1kΩ
According to the above, RZT = 32 KΩ is set.
CS
Limiter[V] Y
Vlim1
Vlim1*0.7
214V
X
VH[V]
Figure 9. CS Switching: VH Voltage vs CS Voltage
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(d) Determination of OFF Width (Turn ON)
OFF width is controlled at the ZT pin.
When switching is OFF, the power stored in the coil is supplied to the secondary-side output capacitor.
When this power supply ends, there is no more current flowing to the secondary side, so the switching MOS
drain pin voltage drops.
Consequently, the voltage on the auxiliary coil side also drops.
A voltage that was resistance-divided from the ZT pin by RZT1 and RZT2 is applied. When this voltage level
drops to VZT1 (100 mV typ) or below, switching is turned ON by the ZT comparator. Since zero current status is
detected at the ZT pin, time constants are generated using CZT, RZT1, and RZT2.
Additionally, a ZT trigger mask function (described in section 4 (e)) and a ZT timeout function (described in
section 4 (f)) are built in.
(e) ZT Trigger Mask Function (Figure 10)
When switching is set ON / OFF, superposition of noise may occur at the ZT pin.
At this time, the ZT comparator is masked for the TZTMASK time to prevent ZT comparator operation errors.
Figure 10. ZT Trigger Mask Function
A: DC/DC OFF=>ON
B: DC/DC ON=>OFF
C: Noise occurs at ZT pin, and ZT comparator is not operated by TZTMASK.
D: Same as A
E: Same as B
F: Same as C
G: Same as A
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(f)
ZT Timeout Function
 ZT Timeout Function1
When ZT pin voltage is not higher than VZT2 (typ=200mV) for tZTOUT (typ=15µs) such as start or low output
voltage, ZT pin short, IC turns on MOSFET by force.

ZT Timeout Function 2
After ZT comparator detects bottom, IC turns on MOSFET by force when IC does not detect next bottom
within tZTOUT2 (typ =5µs). After ZT comparator detects bottom at once, the function operates. For that, it
does not operate at start or at low output voltage. When IC is not able to detect bottom by decreasing
auxiliary winding voltage, the function operates.
ZT pin GND
short
VZT2
ZT VZT1
Bottom
detection
5us
5us
timeout
15us
timeout
5us
15us
15us
CS
OUT
A
B C
D
E
F
G
H
I
Figure 11. ZT Time-out Function
A:
B:
C:
D:
E:
F:
G:
H:
I:
At starting, IC starts to operate by ZT timeout function1 for ZT=0V.
MOSFET turns ON
MOSFET turns OFF
ZT voltage is lower than VZT2(typ=200mV) by ZT dump decreasing.
MOSFET turns ON by ZT timeout fucntion2 after tZTOUT2(typ=5µs) from D point.
ZT voltage is lower than VZT2(typ=200mV) by ZT dump decreasing.
MOSFET turns ON by ZT timeout fucntion2 after tZTOUT2(typ=5µs) from F point.
ZT pin is short to GND.
MOSFET turns ON by ZT timeout function1 after tZTOUT(typ=15µs)
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BD768xFJ-LB Series
(5) Soft Start Operations
Normally, a large current starts flowing to the AC/DC power supply when the AC power supply is turned ON.
BD768xFJ includes a soft start function to prevent large changes in the output voltage and output current during
startup.
This function is reset when the VCC pin voltage is at VUVLO2 (14.0V typ) or below, or when the BO pin is at the B.O.
detection voltage (1.00V typ) or below (that is, when the AC power supply is unplugged), and soft start is
performed again at the next AC power-ON.
During a soft start, the following post-startup operations are performed. ( See turn OFF described above in section
(4)- (a)).
・Start to 1ms => Set to 25% of normal CS limiter value
・ 1ms to 4ms => Set to 50% of normal CS limiter value
・ > 4 ms… => Normal operation
(6) Over Load Protection Function
The overload protection function monitors the overload status of the secondary output current at the FB pin, and
fixes the OUT pin at low level when overload status is detected.
During overload status, current no longer flows to the photo-coupler, so the FB pin voltage rises.
When this status continues for the TFOLP time (128ms typ), it is considered an overload and the OUT pin is fixed at
low level.
Once the FB pin voltage exceeds VFOLP1 (2.8V typ), if it drops to lower than VFOLP2 (2.6V typ) within the TFOLP time
(128ms typ), the overload protection timer is reset.
At startup, the FB voltage is pulled up to the internal voltage by a pull-up resistor and operation starts once the
voltage reaches VFOLP1 (2.8V typ) or above. Therefore, the design must be set the FB voltage at VFOLP2 (2.6V typ)
or below within the tFOLP (128ms typ) time.
In other words, the secondary output voltage start time must be set to within TFOLP (128ms typ) after IC startup.
To release latching after selecting latch mode, first unplug the power supply, and then set VCC< VLATCH (typ= VUVLO2
-3.5V)
(7) ZT Pin OVP (Over Voltage Protection)
ZT OVP (Over Voltage Protection) function is built in for ZT pin.
When the ZT pin voltage reaches VZTL (typ = 3.5V), overvoltage status is detected. ZT pin OVP protection is
performed in latch mode.
A mask time defined as tLATCH (typ = 150µs) is built in for the ZT pin OVP function. When ZT OVP status continues
within 150 µs, overvoltage is detected. This function masks any surges (etc.) that occur at the pin. See the
illustration in Figure 12.
(A similar tLATCH (typ = 150µs) is VCCOVP)
Figure 12. ZTOVP and Latch Mask Function
A: DC/DC pulse operation, ZT pin also has pulse operation
B: ZT pin voltage > VZTL (typ = 3.5V)
C: ZT pin voltage > VZTL (typ = 3.5V) status is within tLATCH (typ = 150µs) period, so DC/DC normal operations are
reset
D: ZT pin voltage > VZTL (typ = 3.5V)
E: ZT pin voltage > VZTL (typ = 3.5V) status continues for tLATCH (typ = 150µs), so latching occurs and DC/DC OFF
is set
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(8) MASK Pin Function
The MASK pin is used for control that maintains constant voltage at the BD768xFJ's power supply pin (VCC pin).
Figure 13 shows an application diagram using the MASK signal.
At the timing of DC/DC ON => OFF switching, a surge voltage in the auxiliary coil makes Va pin voltage rise. This
also causes the VCC pin voltage to rise. The MASK pin outputs a signal that has been delayed by the time TMASK
relative to the OUT pin. (See Figure 14)
The MASK pin is an open drain output, and an external transistor is used for ON/OFF control. This function is able
to maintain a constant VCC pin voltage.
During a soft start, the MASK pin is fixed at Hiz level. Consequently, the external transistor status is ON. (See
Figure 13)
Leave open when not using the MASK pin.
Figure 13. Application Circuit Example Using MASK Pin
(Note) In case of low output power, it isn’t much power from the aux. window to VCC pin.
Please adjust a set value.
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Figure 14. MASK Pin Timing Chart (Normal Operation)
A : DC/DC OFF=>ON
B : DC/DC ON=>OFF
C : During TMASK time, MASK pin is L
Figure 15. MASK Pin Timing Chart (Soft Start Operation)
A: DC/DC OFF => ON
B: DC/DC ON => OFF
C: MASK pin is fixed at Hiz level.
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BD768xFJ-LB Series
(9) OUT Pin Gate Clamp Circuit
OUT pin is connected to external MOSFET’s gates.
For MOSFET’s gates is safety, OUT voltage is clamped to Gate Clamp circuit.
(10) Thermal Shut-Down Function
Thermal Shut-Down function is auto restart type. When VCC UVLO is released, BD768xFJ starts on State2
because of preventing from thermal error of external parts. At start up, it does not start until T1 below.
Figure 16. Thermal Shut-Down
Protection Circuit Operation Modes
Table 2 below lists the operation modes of the various protection functions.
Table 2 Protection Circuit Operation Modes
Item
Operation Mode
Brown Out Protection
Auto recovery
VCC Under Voltage Locked Out
Auto recovery
BD7682/7683 = Latch
BD7684/7685 = Auto recovery
BD7682/7684 = Auto recovery
BD7683/7685 = Latch
VCC Over Voltage Protection
FB Over Limited Protection
ZT Over Voltage Protection
Latch
Thermal Shutdown
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Datasheet
BD768xFJ-LB Series
Power Dissipation
The thermal design should be set operation for the following conditions.
(Since the temperature shown below is the guaranteed temperature, be sure to take a margin into account.)
1. The ambient temperature Ta must be 105°C or less.
2. The IC’s loss must be within the allowable dissipation Pd.
The thermal dissipation characteristics are as follows.
(PCB: 70 mm × 70mm × 1.6 mm, mounted on glass epoxy substrate)
1000
900
800
700
Pd[mW]
600
500
400
300
200
100
0
0
25
50
75
100
125
150
Ta[℃]
Figure 17. SOP-J8 Thermal De-rating Curve
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Datasheet
BD768xFJ-LB Series
I/O Equivalent Circuit
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Datasheet
BD768xFJ-LB Series
( They are only reference data )
35.0
Circuit Current (ON) 1 [uA]
Circuit Current (OFF) [uA]
40.0
30.0
25.0
20.0
15.0
1500
950
1350
850
Circuit Current (ON) 2 [uA]
●Characteristic Data
1200
1050
900
750
600
450
10.0
-20
0
20
40
60
80
100
-40
-20
0
20
100
-40
120
1600
1400
1.040
1.020
1.000
0.980
0.960
0.920
60
80
100
-40
120
-20
0
20
40
60
80
100
120
-40
B.O. Detection Voltage
VCC UVLO Hysteresis [V]
VCC UVLO Voltage 2 [V]
5.80
14.20
14.10
14.00
13.90
13.80
13.70
13.60
19.00
13.50
0
20
40
60
80
100
120
29.00
28.50
28.00
27.50
-20
0
20
40
60
80
100
5.30
5.20
5.10
120
-40
20
40
60
-20
0
20
80
100
120
Tempature [℃]
VCC OVP Voltage 1
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40
60
80
100
120
Tempature [℃]
VCC UVLO Hysteresis
1.050
23.0
21.0
19.0
17.0
15.0
0
120
5.40
CS Over-Current Sensor Volt. 1A [V]
FB Pin pull-up Resistance [kΩ]
29.50
80
5.50
25.0
30.00
60
5.60
VCC UVLO Voltage 2
30.50
40
5.70
Tempature [℃]
VCC UVLO Voltage 1
-20
20
5.00
-40
Tempature [℃]
-40
0
B.O. Detection Hysteresis Current
5.90
19.10
-20
Tempature [℃]
14.30
19.20
100
11.0
10.0
19.80
19.30
120
12.0
6.00
19.40
100
13.0
14.40
19.50
80
14.0
14.50
19.60
60
15.0
19.90
19.70
40
16.0
20.00
-20
20
17.0
Tempature [℃ ]
Circuit Current (Protect circuit is on)
-40
0
Circuit Current (ON) 2
0.940
40
-20
Tempature [℃ ]
B.O. Detect. Hysteresis Current [uA]
[V]
1800
B.O. Detection Voltage
Circuit Current (Protect circuit is on) [uA]
80
18.0
Tempature [℃]
VCC UVLO Voltage 1 [V]
60
1.060
1200
VCC OVP Voltage 1 [V]
40
1.080
20
350
Circuit Current (ON) 1
2000
0
450
Tempature [℃]
Circuit Current (OFF)
-20
550
150
120
Tempature [℃]
-40
650
250
300
-40
750
-40
-20
0
20
40
60
80
Tempature [℃]
100
120
1.040
1.030
1.020
1.010
1.000
0.990
0.980
0.970
0.960
0.950
-40
-20
0
20
40
60
80
100
120
Tempature [℃]
FB Pin pull-up Resistance
CS Over-Current Sensor Voltage 1A
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Datasheet
BD768xFJ-LB Series
●Characteristic Data
( They are only reference data )
0.350
0.720
0.710
0.700
0.690
0.680
0.670
0.660
0.650
-40
-20
0
20
40
60
80
100
120
0.250
CS Over-Current Sensor Voltage 2B [V]
0.730
CS Over-Current Sensor Voltage 2A [V]
CS Over-Current Sensor Voltage 1B [V]
0.740
0.335
0.320
0.305
0.290
0.275
0.260
0.245
-40
-20
0
Tempature [℃]
20
40
60
80
100
1.02
1.00
0.98
0.96
0.94
0.550
0.400
0.250
0.92
0.100
0.90
80
100
-40
120
-20
0
20
CS Switching ZT Current
80
100
34.0
32.0
30.0
28.0
26.0
24.0
0
20
40
60
80
100
1.300
1.250
1.200
1.150
1.100
-20
0
20
40
60
80
100
20
40
60
111.0
106.0
-20
0
20
80
100
120
Tempature [℃]
Frequency Reduction End FB Voltage 2
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40
60
80
100
120
0.550
0.500
0.450
0.400
-40
-20
0
20
40
60
80
100
120
Frequency Reduction End FB Voltage 1
140.0
ZT Comparator Voltage 1 [mV]
2.100
2.000
1.900
1.700
0.400
120
Tempature [℃]
1.800
0.450
100
116.0
120
Frequency Reduction Start FB Voltage
Voltage Gain [V/V]
0.500
80
Maximum Operating Frequency 1
2.200
0.550
60
121.0
Tempature [℃]
0.600
40
126.0
-40
2.300
0
20
0.600
-40
0.650
-20
0
Tempature [℃]
1.350
120
Maximum Operating Frequency 2
-40
-20
131.0
120
Frequency Reduction End FB Voltage 1 [V]
Frequency Reduction Start FB Voltage [V]
Maximum Operating Frequency 2 [kHz]
60
1.400
Tempature [℃]
Frequency Reduction End FB Voltage 2 [V]
40
Minimum ON Width
36.0
-20
0.170
Tempature [℃]
Tempature [℃]
-40
0.180
CS Over-Current Sensor Voltage 2B
Maximum Operating Frequency 1 [kHz]
Minimum ON Width [us]
CS Switching ZT Current [mA]
1.04
60
0.190
136.0
0.700
1.06
40
0.200
-40
0.850
20
0.210
Tempature [℃]
1.08
0
0.220
120
CS Over-Current Sensor Voltage 2A
1.10
-20
0.230
Tempature [℃]
CS Over-Current Sensor Voltage 1B
-40
0.240
-40
-20
0
20
40
60
Tempature [℃]
Voltage Gain
21/27
80
100
120
130.0
120.0
110.0
100.0
90.0
80.0
70.0
60.0
-40
-20
0
20
40
60
80
100
120
Tempature [℃ ]
ZT Comparator Voltage 1
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29.Jun.2016. Rev.002
Datasheet
BD768xFJ-LB Series
●Characteristic Data
( They are only reference data )
54.0
1.400
51.0
1.300
19.0
17.0
15.0
13.0
48.0
Soft Start Time 1 [ms]
Maximum ON Time [us]
ZT Trigger Timeout Period 1 [us]
21.0
45.0
42.0
39.0
36.0
33.0
11.0
27.0
-40
-20
0
20
40
60
80
100
120
-20
0
20
40
60
80
100
120
4.000
3.600
3.200
2.800
2.400
60
3.100
2.900
3.000
2.800
80
100
2.900
2.800
2.700
-40
-20
0
20
40
60
80
100
-40
OUT Pin Clamp Voltage [V]
ZT OVP Voltage [V]
FB OLP Timer [ms]
3.70
3.60
3.50
3.40
40
60
80
100
-20
0
FB OLP Timer
20
40
60
80
100
-40
-20
0
20
40
60
-20
0
80
100
120
Tempature [℃ ]
OUT pin Nch MOS Ron
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20
40
60
80
120
OUT Pin Clamp Voltage
80.0
0.8
0.7
0.6
0.5
70.0
60.0
50.0
40.0
30.0
0.4
0.3
2.00
100
17.00
Tempature [℃]
MASK Pin Ron [Ω]
MASK Pin Delay Time [ns]
OUT pin Nch MOS Ron [Ω]
3.50
120
17.50
-40
0.9
5.00
100
18.00
120
1.0
6.50
80
18.50
ZT OVP Voltage
8.00
60
19.00
Tempature [℃]
Tempature [℃ ]
9.50
40
16.00
-40
120
20
16.50
3.00
20
0
19.50
3.80
3.10
0
-20
20.00
3.20
90.0
120
FB OLP Voltage 2
3.30
105.0
100
Tempature [℃]
3.90
120.0
80
2.500
120
4.00
135.0
60
2.600
FB OLP Voltage 1
150.0
40
2.700
Tempature [℃ ]
165.0
20
2.300
2.500
120
Soft Start Time 2
-20
0
2.400
2.600
Tempature [℃]
-40
-20
Soft Start Time 1
FB OLP Voltage 2 [V]
4.400
40
-40
Tempature [℃]
4.800
FB OLP Voltage 1 [V]
Soft Start Time 2 [ms]
5.200
20
0.800
Maximum ON Time
5.600
0
0.900
Tempature [℃]
ZT Trigger Mask Time
-20
1.000
0.600
-40
Tempature [℃]
-40
1.100
0.700
30.0
9.0
1.200
20.0
-40
-20
0
20
40
60
80
Tempature [℃]
MASK Pin Delay Time
22/27
100
120
-40
-20
0
20
40
60
80
100
120
Tempature [℃]
MASK Pin Ron
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Datasheet
BD768xFJ-LB Series
Operational Notes
1.
Reverse Connection of Power Supply
Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when
connecting the power supply, such as mounting an external diode between the power supply and the IC’s power supply
terminals.
2.
Power Supply Lines
Design the PCB layout pattern to provide low impedance supply lines. Separate the GND and supply lines of the digital
and analog blocks to prevent noise in the GND and supply lines of the digital block from affecting the analog block.
Furthermore, connect a capacitor to GND at all power supply pins. Consider the effect of temperature and aging on the
capacitance value when using electrolytic capacitors.
3.
GND Voltage
Ensure that no pins are at a voltage below that of the GND pin at any time, even during transient condition.
4.
GND Wiring Pattern
When using both small-signal and large-current GND traces, the two GND traces should be routed separately but
connected to a single GND at the reference point of the application board to avoid fluctuations in the small-signal GND
caused by large currents. Also ensure that the GND traces of external components do not cause variations on the GND
voltage. The GND lines must be as short and thick as possible to reduce line impedance.
5.
Thermal Consideration
Should by any chance the power dissipation rating be exceeded, the rise in temperature of the chip may result in
deterioration of the properties of the chip. The absolute maximum rating of the Pd stated in this specification is when
the IC is mounted on a 70mm x 70mm x 1.6mm glass epoxy board. In case of exceeding this absolute maximum rating,
increase the board size and copper area to prevent exceeding the Pd rating.
6.
Recommended Operating Conditions
These conditions represent a range within which the expected characteristics of the IC can be approximately obtained.
The electrical characteristics are guaranteed under the conditions of each parameter.
7.
Inrush Current
When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush current may flow
instantaneously due to the internal powering sequence and delays, especially if the IC has more than one power supply.
Therefore, give special consideration to power coupling capacitance, power wiring, width of GND wiring, and routing of
connections.
8.
Operation Under Strong Electromagnetic Field
Operating the IC in the presence of a strong electromagnetic field may cause the IC to malfunction.
9.
Testing on Application Boards
When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may subject
the IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply should
always be turned OFF completely before connecting or removing it from the test setup during the inspection process.
To prevent damage from static discharge, GND the IC during assembly and use similar precautions during transport
and storage.
10. Inter-pin Short and Mounting Errors
Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may result in
damaging the IC. Avoid nearby pins being shorted to each other especially to GND, power supply and output pin.
Inter-pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment) and
unintentional solder bridge deposited in between pins during assembly to name a few.
11. Unused Input Terminals
Input terminals of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance
and extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small
charge acquired in this way is enough to produce a significant effect on the conduction through the transistor and
cause unexpected operation of the IC. So unless otherwise specified, unused input terminals should be connected to
the power supply or GND line.
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TSZ22111・15・001
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Datasheet
BD768xFJ-LB Series
Operational Notes – continued
12. Regarding Input Pins of the IC
This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them
isolated. P-N junctions are formed at the intersection of the P layers with the N layers of other elements, creating a
parasitic diode or transistor. For example (refer to figure below):
When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode.
When GND > Pin B, the P-N junction operates as a parasitic transistor.
Parasitic diodes inevitably occur in the structure of the IC. The operation of parasitic diodes can result in mutual
interference among circuits, operational faults, or physical damage. Therefore, conditions that cause these diodes to
operate, such as applying a voltage lower than the GND voltage to an input pin (and thus to the P substrate) should be
avoided.
Figure 17. Example of Monolithic IC Structure
13. Ceramic Capacitor
When using a ceramic capacitor, determine the dielectric constant considering the change of capacitance with
temperature and the decrease in nominal capacitance due to DC bias and others.
14. Area of Safe Operation (ASO)
Operate the IC such that the output voltage, output current, and power dissipation are all within the Area of Safe
Operation (ASO).
15. Thermal Shutdown Circuit(TSD)
This IC has a built-in thermal shutdown circuit that prevents heat damage to the IC. Normal operation should always be
within the IC’s power dissipation rating. If however the rating is exceeded for a continued period, the junction
temperature (Tj) will rise which will activate the TSD circuit that will turn OFF all output pins. The IC should be powered
down and turned ON again to resume normal operation because the TSD circuit keeps the outputs at the OFF state
even if the Tj falls below the TSD threshold. Note that the TSD circuit operates in a situation that exceeds the absolute
maximum ratings and therefore, under no circumstances, should the TSD circuit be used in a set design or for any
purpose other than protecting the IC from heat damage.
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TSZ22111・15・001
24/27
TSZ02201-0F1F0A200050-1-2
29.Jun.2016. Rev.002
Datasheet
BD768xFJ-LB Series
Ordering Information
B
D
7
6
8
X
F
J
-
Package
FJ : SOP-J8
Product name
LBE 2
Product class
LB for Industrial applications
Packaging and forming specification
E2: Embossed tape and reel
Marking Diagram
SOP-J8 (TOP VIEW)
Part Number Marking
D768□
LOT Number
1PIN MARK
1
2
3
4
Product name
BD7682FJ-LB
BD7683FJ-LB
BD7684FJ-LB
BD7685FJ-LB
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© 2015 ROHM Co., Ltd. All rights reserved.
TSZ22111・15・001
Part Number Marking
D7682
D7683
D7684
D7685
25/27
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29.Jun.2016. Rev.002
Datasheet
BD768xFJ-LB Series
Physical Dimension, Tape and Reel Information
Package Name
SOP-J8
<Tape and Reel information>
Tape
Embossed carrier tape
Quantity
2500pcs
Direction
of feed
E2
The direction is the 1pin of product is at the upper left when you hold
( reel on the left hand and you pull out the tape on the right hand
Direction of feed
1pin
Reel
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© 2015 ROHM Co., Ltd. All rights reserved.
TSZ22111・15・001
)
∗ Order quantity needs to be multiple of the minimum quantity.
26/27
TSZ02201-0F1F0A200050-1-2
29.Jun.2016. Rev.002
Datasheet
BD768xFJ-LB Series
Revision History
Date
Revision
23.Mar.2015
29.Jun.2016
001
002
Changes
New Release
P2 values in the Block diagram
P3 an explanation of Absolute Maximum Rating
P7 a value of Figure 3
P8 values of Figure 4
P10 values of Figure 6
P11 a value of Figure 8
P14 an explanation of Soft start operations
P14 a value of Figure 12
P17 an explanation of Table 2
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© 2015 ROHM Co., Ltd. All rights reserved.
TSZ22111・15・001
27/27
TSZ02201-0F1F0A200050-1-2
29.Jun.2016. Rev.002
Notice
Precaution on using ROHM Products
1.
(Note 1)
If you intend to use our Products in devices requiring extremely high reliability (such as medical equipment
,
aircraft/spacecraft, nuclear power controllers, etc.) and whose malfunction or failure may cause loss of human life,
bodily injury or serious damage to property (“Specific Applications”), please consult with the ROHM sales
representative in advance. Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way
responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of any
ROHM’s Products for Specific Applications.
(Note1) Medical Equipment Classification of the Specific Applications
JAPAN
USA
EU
CHINA
CLASSⅢ
CLASSⅡb
CLASSⅢ
CLASSⅢ
CLASSⅣ
CLASSⅢ
2.
ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor
products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate
safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which
a failure or malfunction of our Products may cause. The following are examples of safety measures:
[a] Installation of protection circuits or other protective devices to improve system safety
[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure
3.
Our Products are not designed under any special or extraordinary environments or conditions, as exemplified below.
Accordingly, ROHM shall not be in any way responsible or liable for any damages, expenses or losses arising from the
use of any ROHM’s Products under any special or extraordinary environments or conditions. If you intend to use our
Products under any special or extraordinary environments or conditions (as exemplified below), your independent
verification and confirmation of product performance, reliability, etc, prior to use, must be necessary:
[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents
[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust
[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,
H2S, NH3, SO2, and NO2
[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves
[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items
[f] Sealing or coating our Products with resin or other coating materials
[g] Use of our Products without cleaning residue of flux (even if you use no-clean type fluxes, cleaning residue of
flux is recommended); or Washing our Products by using water or water-soluble cleaning agents for cleaning
residue after soldering
[h] Use of the Products in places subject to dew condensation
4.
The Products are not subject to radiation-proof design.
5.
Please verify and confirm characteristics of the final or mounted products in using the Products.
6.
In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse. is applied,
confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power
exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect
product performance and reliability.
7.
De-rate Power Dissipation depending on ambient temperature. When used in sealed area, confirm that it is the use in
the range that does not exceed the maximum junction temperature.
8.
Confirm that operation temperature is within the specified range described in the product specification.
9.
ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in
this document.
Precaution for Mounting / Circuit board design
1.
When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product
performance and reliability.
2.
In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must
be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products,
please consult with the ROHM representative in advance.
For details, please refer to ROHM Mounting specification
Notice-PAA-E
© 2015 ROHM Co., Ltd. All rights reserved.
Rev.003
Precautions Regarding Application Examples and External Circuits
1.
If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the
characteristics of the Products and external components, including transient characteristics, as well as static
characteristics.
2.
You agree that application notes, reference designs, and associated data and information contained in this document
are presented only as guidance for Products use. Therefore, in case you use such information, you are solely
responsible for it and you must exercise your own independent verification and judgment in the use of such information
contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses
incurred by you or third parties arising from the use of such information.
Precaution for Electrostatic
This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper
caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be
applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,
isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).
Precaution for Storage / Transportation
1.
Product performance and soldered connections may deteriorate if the Products are stored in the places where:
[a] the Products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2
[b] the temperature or humidity exceeds those recommended by ROHM
[c] the Products are exposed to direct sunshine or condensation
[d] the Products are exposed to high Electrostatic
2.
Even under ROHM recommended storage condition, solderability of products out of recommended storage time period
may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is
exceeding the recommended storage time period.
3.
Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads
may occur due to excessive stress applied when dropping of a carton.
4.
Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of
which storage time is exceeding the recommended storage time period.
Precaution for Product Label
A two-dimensional barcode printed on ROHM Products label is for ROHM’s internal use only.
Precaution for Disposition
When disposing Products please dispose them properly using an authorized industry waste company.
Precaution for Foreign Exchange and Foreign Trade act
Since concerned goods might be fallen under listed items of export control prescribed by Foreign exchange and Foreign
trade act, please consult with ROHM in case of export.
Precaution Regarding Intellectual Property Rights
1.
All information and data including but not limited to application example contained in this document is for reference
only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any
other rights of any third party regarding such information or data.
2.
ROHM shall not have any obligations where the claims, actions or demands arising from the combination of the
Products with other articles such as components, circuits, systems or external equipment (including software).
3.
No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any
third parties with respect to the Products or the information contained in this document. Provided, however, that ROHM
will not assert its intellectual property rights or other rights against you or your customers to the extent necessary to
manufacture or sell products containing the Products, subject to the terms and conditions herein.
Other Precaution
1.
This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.
2.
The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written
consent of ROHM.
3.
In no event shall you use in any way whatsoever the Products and the related technical information contained in the
Products or this document for any military purposes, including but not limited to, the development of mass-destruction
weapons.
4.
The proper names of companies or products described in this document are trademarks or registered trademarks of
ROHM, its affiliated companies or third parties.
Notice-PAA-E
© 2015 ROHM Co., Ltd. All rights reserved.
Rev.003
Datasheet
General Precaution
1. Before you use our Pro ducts, you are requested to care fully read this document and fully understand its contents.
ROHM shall n ot be in an y way responsible or liabl e for fa ilure, malfunction or acci dent arising from the use of a ny
ROHM’s Products against warning, caution or note contained in this document.
2. All information contained in this docume nt is current as of the issuing date and subj ect to change without any prior
notice. Before purchasing or using ROHM’s Products, please confirm the la test information with a ROHM sale s
representative.
3.
The information contained in this doc ument is provi ded on an “as is” basis and ROHM does not warrant that all
information contained in this document is accurate an d/or error-free. ROHM shall not be in an y way responsible or
liable for an y damages, expenses or losses incurred b y you or third parties resulting from inaccur acy or errors of or
concerning such information.
Notice – WE
© 2015 ROHM Co., Ltd. All rights reserved.
Rev.001
Datasheet
BD7682FJ-LB - Web Page
Buy
Distribution Inventory
Part Number
Package
Unit Quantity
Minimum Package Quantity
Packing Type
Constitution Materials List
RoHS
BD7682FJ-LB
SOP-J8
2500
2500
Taping
inquiry
Yes