Microchip MCP14700-E/SN Dual input synchronous mosfet driver Datasheet

MCP14700
Dual Input Synchronous MOSFET Driver
Features:
General Description:
• Ideally suited to drive low Figure-of-Merit (FOM)
MOSFETs such as Microchip’s MCP87000
MOSFET family
• Independent PWM Input Control for High-Side
and Low-Side Gate Drive
• Input Logic Level Threshold 3.0V TTL Compatible
• Dual Output MOSFET Drive for Synchronous
Applications
• High Peak Output Current: 2A (typical)
• Internal Bootstrap Blocking Device
• +36V BOOT Pin Maximum Rating
• Low Supply Current: 45 µA (typical)
• High Capacitive Load Drive Capability:
- 3300 pF in 10.0 ns (typical)
• Input Voltage Undervoltage Lockout Protection
• Overtemperature Protection
• Space Saving Packages:
- 8-Lead SOIC
- 8-Lead 3x3 DFN
The MCP14700 is a high-speed synchronous
MOSFET driver designed to optimally drive a high-side
and low-side N-Channel MOSFET. It is particularly well
suited for driving low-FOM MOSFETs, including
Microchip’s MCP87000 family of high-speed
MOSFETs. The MCP14700 has two PWM inputs to
allow independent control of the external N-Channel
MOSFETs. Since there is no internal cross conduction
protection circuitry the external MOSFET dead time
can be tightly controlled allowing for more efficient
systems or unique motor control algorithms.
The transition thresholds for the PWM inputs are
typically 1.6V on a rising PWM input signal and typically
1.2V on a falling PWM input signal. This makes the
MCP14700 ideally suited for controllers that utilize 3.0V
TTL/CMOS logic. The PWM inputs are internally pulled
low ensuring the output drive signals are low if the
inputs are floating.
The HIGHDR and LOWDR peak source current
capability of the MCP14700 device is typically 2A.
While the HIGHDR can sink 2A peak typically, the
LOWDR can sink 3.5A peak typically. The low
resistance pull-up and pull-down drive allow the
MCP14700 to quickly transition a 3300 pF load in
typically 10 ns. Bootstrapping for the high-side drive is
internally implemented which allows for a reduced
system cost and design complexity.
Applications:
• 3-Phase BLDC Motor Control
• High Efficient Synchronous DC/DC Buck
Converters
• High-Current Low Output Voltage Synchronous
DC/DC Buck Converters
• High Input Voltage Synchronous DC/DC Buck
Converters
• Core Voltage Supplies for Microprocessors
The MCP14700 features undervoltage lockout (UVLO)
with a typical hysteresis of 500 mV. Overtemperature
protection with hysteresis is also featured on the
device.
Package Types
MCP14700
SOIC
PHASE 1
8 HIGHDR
PWMHI 2
PWMLO 3
GND 4
7 BOOT
6 VCC
5 LOWDR
MCP14700
3x3 DFN*
PHASE 1
PWMHI 2
PWMLO 3
GND 4
8 HIGHDR
EP
9
7 BOOT
6 VCC
5 LOWDR
* Includes Exposed Thermal Pad (EP); see Table 3-1.
 2009-2013 Microchip Technology Inc.
DS22201B-page 1
MCP14700
Typical Application Schematic
Synchronous Buck Application
VBUCK = 12V
CBOOT
VCC = 5.0V
CURRENT
SENSE
BOOT
VCC
HIGHDR
MCP14700
PWMHI PHASE
MCP87050
MCP87022
PWMLO LOWDR
GND
dsPIC33FJ06GS101
PWM1L
AN0
PWM1H
AN1
CURRENT
SENSE
3-Phase BLDC Motor Control Application
24V
24V
VCC
PWM1
PWM2
VCC
BOOT
HIGHDR
BOOT
HIGHDR VCC
MCP14700
MCP14700
PWMHI PHASE
PHASE PWMH
PWMLO LOWDR
LOWDR PWMLO
GND
VCC
PWM5
PWM6
GND
SENSE
NODE
SENSE
NODE
24V
VCC
PWM3
PWM4
VCC
PWM1
PWM2
PWM3
PWM4
PWM5
PWM6
BOOT
HIGHDR
MCP14700
PWMHI PHASE
PWMLO LOWDR
GND
SENSE
NODE
VREF
dsPIC®
DS22201B-page 2
 2009-2013 Microchip Technology Inc.
MCP14700
Functional Block Diagram
VCC
BOOT
Level
Shift
PWMHI
PWMLO
HIGHDR
Input
Circuitry
PHASE
Logic
VCC
LOWDR
GND
VCC
Protection
Circuitry
GND
 2009-2013 Microchip Technology Inc.
DS22201B-page 3
MCP14700
NOTES:
DS22201B-page 4
 2009-2013 Microchip Technology Inc.
MCP14700
1.0
ELECTRICAL
CHARACTERISTICS
Absolute Maximum Ratings †
VCC........................................................ -0.3V to +7.0V
VBOOT.................................................. -0.3V to +36.0V
VPHASE ............................ VBOOT - 7V to VBOOT + 0.3V
VPWM .............................................-0.3V to VCC + 0.3V
VHIGHDR ......................VPHASE - 0.3V to VBOOT + 0.3V
VLOWDR .........................................-0.3V to VCC + 0.3V
ESD Protection on all Pins .........................2 kV (HBM)
....................................................................400V (MM)
† Notice: Stresses above those listed under “Maximum
Ratings” may cause permanent damage to the device.
This is a stress rating only and functional operation of
the device at those or any other conditions above those
indicated in the operational sections of this specification is not intended. Exposure to maximum rating conditions for extended periods may affect device
reliability.
DC CHARACTERISTICS
Electrical Specifications: Unless otherwise noted, VCC = 5.0V, TJ = -40°C to +125°C
Parameters
Sym.
Min.
Typ.
Max.
Units
Conditions
VCC Operating Range
VCC
4.5
5.0
5.5
V
Bias Supply Voltage
IVCC
—
45
—
µA
UVLO (Rising VCC)
VUVLO
—
3.50
4.00
V
UVLO Hysteresis
VHYS
—
500
—
mV
PWM Input Current
IPWM
—
7.0
10
µA
VPWM = 3.0V
PWM Input Current
IPWM
—
1.0
—
nA
VPWM = 0V
PWMLO and PWMHI Rising
Threshold
PWMHI_TH
1.40
1.60
1.80
V
VCC = 5.0V
PWMLO and PWMHI Falling
Threshold
PWMLO_TH
1.10
1.20
1.30
V
VCC = 5.0V
PWMHYS
—
400
—
mV
VCC = 5.0V
High Output Voltage (HIGHDR
and LOWDR)
VOH
VCC - 0.025
—
—
V
VCC = 5.0V
Low Output Voltage (HIGHDR
and LOWDR)
VOL
—
—
0.025
V
VCC = 5.0V
High Drive Source Resistance
RHI_SRC
—
1.0
2.5

500 mA source current,
Note 1
High Drive Sink Resistance
RHI_SINK
—
1.0
2.5

500 mA sink current, Note 1
High Drive Source Current
IHI_SRC
—
2.0
—
A
Note 1
High Drive Sink Current
IHI_SINK
—
2.0
—
A
Note 1
Low Drive Source Resistance
RLO_SRC
—
1.0
2.5

500 mA source current,
Note 1
Low Drive Sink Resistance
RLO_SINK
—
0.5
1.0

500 mA sink current, Note 1
Low Drive Source Current
ILO_SRC
—
2.0
—
A
Note 1
Low Drive Sink Current
ILO_SINK
—
3.5
—
A
Note 1
VCC Supply Requirements
PWMHI and PWMLO pin
floating
PWM Input Requirements
PWM Input Hysteresis
Output Requirements
Note 1:
2:
Parameter ensured by characterization, not production tested.
See Figure 4-1 and Figure 4-2 for parameter definition.
 2009-2013 Microchip Technology Inc.
DS22201B-page 5
MCP14700
DC CHARACTERISTICS (CONTINUED)
Electrical Specifications: Unless otherwise noted, VCC = 5.0V, TJ = -40°C to +125°C
Parameters
Sym.
Min.
Typ.
Max.
Units
Conditions
Switching Times
HIGHDR Rise Time
tRH
—
10
—
ns
CL = 3.3 nF, Note 1, Note 2
LOWDR Rise Time
tRL
—
10
—
ns
CL = 3.3 nF, Note 1, Note 2
HIGHDR Fall Time
tFH
—
10
—
ns
CL = 3.3 nF, Note 1, Note 2
LOWDR Fall Time
tFL
—
6.0
—
ns
CL = 3.3 nF, Note 1, Note 2
HIGHDR Turn-off Propagation
Delay
tPDLH
20
27
36
ns
No Load, Note 1, Note 2
LOWDR Turn-off Propagation
Delay
tPDLL
10
17
25
ns
No Load, Note 1, Note 2
HIGHDR Turn-on Propagation
Delay
tPDHH
20
27
36
ns
No Load, Note 1, Note 2
LOWDR Turn-on Propagation
Delay
tPDHL
10
17
25
ns
No Load, Note 1, Note 2
TSHDN
—
147
—
°C
Note 1
TSHDN_HYS
—
20
—
°C
Note 1
Protection Requirements
Thermal Shutdown
Thermal Shutdown Hysteresis
Note 1:
2:
Parameter ensured by characterization, not production tested.
See Figure 4-1 and Figure 4-2 for parameter definition.
TEMPERATURE CHARACTERISTICS
Unless otherwise noted, all parameters apply with VCC = 5.0V
Parameter
Sym.
Min.
Typ.
Max.
Units
TJ
—
—
+150
°C
Storage Temperature
TA
-65
—
+150
°C
Specified Temperature Range
TA
-40
—
+125
°C
JA
—
64
—
°C/W
JC
—
12
—
°C/W
JA
—
163
—
°C/W
JC
—
42
—
°C/W
Comments
Temperature Ranges
Maximum Junction Temperature
Package Thermal Resistances
Thermal Resistance, 8L-3x3 DFN
Thermal Resistance, 8L-SOIC
DS22201B-page 6
Typical four-layer board with
vias to ground plane
 2009-2013 Microchip Technology Inc.
MCP14700
2.0
TYPICAL PERFORMANCE CURVES
Note:
The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
Note: Unless otherwise indicated, TA = +25°C with VCC = 5.0V.
16
25
14
Fall Time (ns)
Rise Time (ns)
20
15
tRL
10
tRH
5
t FH
12
10
tFL
8
6
4
2
0
0
0
1500
3000
4500
6000
0
7500
1500
FIGURE 2-1:
Load.
Rise Time vs. Capacitive
FIGURE 2-4:
Load.
14
14
13
CLOAD = 3,300 pF
Time (ns)
12
tFH
11
10
tRH
9
8
6
Fall Time vs. Capacitive
CLOAD = 3,300 pF
tRL
11
10
9
8
tFL
5
20 35 50 65 80 95 110 125
-40 -25 -10
5
Temperature (oC)
HIGHDR Rise and Fall Time
FIGURE 2-5:
vs. Temperature.
24
CLOAD = 3,300 pF
tPDLH
32
30
tPDHH
28
20 35 50 65 80 95 110 125
Temperature (oC)
26
24
22
20
Propagation Delay (ns)
FIGURE 2-2:
vs. Temperature.
Propagation Delay (ns)
7500
5
-40 -25 -10
34
6000
7
6
7
36
4500
12
Time (ns)
13
3000
Capacitive Load (pF)
Capacitive Load (pF)
22
LOWDR Rise and Fall Time
CLOAD = 3,300 pF
tPDHL
20
18
tPDLL
16
14
12
10
-40 -25 -10
5
20 35 50 65 80 95 110 125
-40 -25 -10
o
HIGHDR Propagation Delay
 2009-2013 Microchip Technology Inc.
20 35 50 65 80 95 110 125
Temperature (oC)
Temperature ( C)
FIGURE 2-3:
vs. Temperature.
5
FIGURE 2-6:
vs. Temperature.
LOWDR Propagation Delay
DS22201B-page 7
MCP14700
Note: Unless otherwise indicated, TA = +25°C with VCC = 5.0V.
60
48
CLOAD = 3,300 pF
Supply Current (µA)
Supply Current (mA)
70
50
40
30
20
10
0
100
47
CLOAD = 3,300 pF
46
45
44
43
PWM = 1
42
PWM = 0
41
40
1000
10000
-40 -25 -10
DS22201B-page 8
Supply Current vs.
20
35
50 65
80 95 110 125
Temperature (°C)
Frequency (kHz)
FIGURE 2-7:
Frequency.
5
FIGURE 2-8:
Temperature.
Supply Current vs.
 2009-2013 Microchip Technology Inc.
MCP14700
3.0
PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 3-1.
TABLE 3-1:
PIN FUNCTION TABLE
MCP14700
3.1
Symbol
Description
3x3 DFN
SOIC
1
1
2
3
4
4
GND
5
5
LOWDR
Low-side Gate Drive
Supply Input Voltage
PHASE
Switch Node
2
PWMHI
High-Side PWM Control Input Signal
3
PWMLO
Low-Side PWM Control Input Signal
6
6
VCC
7
7
BOOT
8
8
HIGHDR
9
—
EP
Switch Node (PHASE)
Ground
Floating Bootstrap Supply
High-Side Gate Drive
Exposed Metal Pad
3.6
Supply Input Voltage (VCC)
The PHASE pin provides a return path for the high-side
gate driver. The source of the high-side and the drain of
the low-side power MOSFETs are connected to this
pin.
The VCC pin provides bias to the MCP14700 device. A
bypass capacitor is to be placed between this pin and
the GND pin. This capacitor should be placed as close
to the MCP14700 as possible.
3.2
3.7
High-Side PWM Control Input
Signal (PWMHI)
Floating Bootstrap Supply (BOOT)
The PWM input signal to control the high-side power
MOSFET is applied to the PWMHI pin. A logic high on
the PWMHI pin causes the HIGHDR pin to also
transition high.
The BOOT pin is the floating bootstrap supply pin for
the high-side gate drive. A capacitor is connected
between this pin and the PHASE pin to provide the
necessary charge to turn on the high-side power
MOSFET.
3.3
3.8
Low-Side PWM Control Input
Signal (PWMLO)
The PWM input signal to control the low-side power
MOSFET is applied to the PWMLO pin. A logic high on
the PWMLO pin causes the LOWDR pin to also
transition high.
3.4
Ground (GND)
The GND pin provides ground for the MCP14700
circuitry. It should have a low-impedance connection to
the bias supply source return. High peak currents will
flow out the GND pin when the low-side power
MOSFET is being turned off.
3.5
High-Side Gate Drive (HIGHDR)
The HIGHDR pin provides the gate drive signal to
control the high-side power MOSFET. The gate of the
high-side power MOSFET is connected to this pin.
3.9
Exposed Metal Pad (EP)
The exposed metal pad of the DFN package is not
internally connected to any potential. Therefore, this
pad can be connected to a ground plane or other
copper plane on a printed circuit board to aid in heat
removal from the package.
Low-side Gate Drive (LOWDR)
The LOWDR pin provides the gate drive signal to
control the low-side power MOSFET. The gate of the
low-side power MOSFET is connected to this pin.
 2009-2013 Microchip Technology Inc.
DS22201B-page 9
MCP14700
NOTES:
DS22201B-page 10
 2009-2013 Microchip Technology Inc.
MCP14700
4.0
DETAILED DESCRIPTION
4.1
Device Overview
When designing with the MCP14700 in applications
where cross conduction of the external MOSFETs is
not desired, care must be taken to ensure the PWM
inputs have the proper timing. There is no internal
cross conduction protection in the MCP14700.
The MCP14700 is a synchronous MOSFET driver with
dual independent PWM inputs capable of controlling
both a ground referenced and floating N-Channel
MOSFET. The PWM input threshold levels are truly
3.0V logic tolerant and have 400 mV of typical
hystereses making the MCP14700 ideal for use with
low-voltage controllers.
4.3
The UVLO feature of the MCP14700 does not allow the
HIGHDR or LOWDR output to function when the input
voltage, VCC, is below the UVLO threshold regardless
of the state of the PWMHI and PWMLO pins.
The MCP14700 is capable of suppling 2A (typical)
peak current to the floating high-side MOSFET that is
connected to the HIGHDR. With the exception of a
capacitor, all of the circuitry needed to drive this
high-side N-channel MOSFET is internal to the
MCP14700. A blocking device is placed between the
VCC and BOOT pins that allows the bootstrap capacitor
to be charged to VCC when the low-side power
MOSFET is conducting. Refer to the application
section, Section 5.1 “Bootstrap Capacitor Select”,
for information on determining the proper size of the
bootstrap capacitor. The HIGHDR is also capable of
sinking 2A (typical) peak current.
Once VCC reaches the UVLO threshold, the HIGHDR
and LOWDR outputs will respond to the state of the
PWMHI or PWMLO pins. There is a 500 mV hystereses
on the UVLO threshold.
4.4
Overtemperature Protection
The MCP14700 is protected from an overtemperature
condition by an internal thermal shutdown feature.
When the internal temperature of the MCP14700
reaches 147°C typically, the HIGHDR and LOWDR
outputs will transition to a low state regardless of the
state of the PWMHI or PWMLO pins. Once the internal
temperature is reduced by 20°C typically, the
MCP14700 will automatically respond to the states of
the PWMHI and PWMLO pins.
The LOWDR is capable of sourcing 2A (typical) peak
current and sinking 3.5A (typical) peak current. This
helps ensure that the low-side MOSFET stays turned
off during the high dv/dt of the PHASE node.
4.2
Under Voltage Lockout (UVLO)
4.5
PWM Inputs
Timing Diagram
The PWM signal applied to the MCP14700 is supplied
by a controller IC. The timing diagram in Figure 4-1
graphically depicts the PWM signal and the output
signals of the MCP14700.
A logic high on either PWM pin causes the
corresponding output drive signal to be high. See
Figure 4-1 and Figure 4-2 for a graphical
representation of the MCP14700 operation. Internally
the PWM pins are pulled to ground to ensure there is
no drive signal to the external MOSFETs if the pins are
left floating. For reliable operation, it is recommended
that the rising and falling slew rate of the PWM signal
be faster than 1V/50 ns.
PWMLO
tPDHL
tPDLL
LOWDR
tRL
tFL
FIGURE 4-1:
MCP14700 LOWDR Timing Diagram.
 2009-2013 Microchip Technology Inc.
DS22201B-page 11
MCP14700
PWMHI
tPDHH
tPDLH
HIGHDR
tRH
tFH
FIGURE 4-2:
DS22201B-page 12
MCP14700 HIGHDR Timing Diagram.
 2009-2013 Microchip Technology Inc.
MCP14700
5.0
APPLICATION INFORMATION
5.3
5.1
Bootstrap Capacitor Select
The power dissipated in the MCP14700 consists of the
power loss associated with the quiescent power and
the gate charge power.
The selection of the bootstrap capacitor is based upon
the total gate charge of the high-side power MOSFET
and the allowable droop in gate drive voltage while the
high-side power MOSFET is conducting.
EQUATION 5-1:
Q
GATE
C BOOT  ----------------------------V DROOP
Where:
Power Dissipation
The quiescent power loss can be calculated by the
following equation and is typically negligible compared
to the gate drive power loss.
EQUATION 5-2:
P
Q
= I
VCC
 V CC
Where:
PQ = Quiescent power loss
CBOOT
=
Bootstrap capacitor value
IVCC = No Load Bias Current
QGATE
=
Total gate charge of the high-side
MOSFET
VCC = Bias Voltage
VDROO
=
Allowable gate drive voltage droop
For example:
QGATE = 30 nC
VDROOP = 200 mV
CBOOT 0.15 uF
A low ESR ceramic capacitor is recommend with a
maximum voltage rating that exceeds the maximum
input voltage, VCC, plus the maximum supply voltage,
VSUPPLY. It is also recommended that the capacitance
of CBOOT does not exceed 1.2 uF.
5.2
Decoupling Capacitor
Proper decoupling of the MCP14700 is highly
recommended to help ensure reliable operation. This
decoupling capacitor should be placed as close to the
MCP14700 as possible. The large currents required to
quickly charge the capacitive loads are provided by this
capacitor. A low ESR ceramic capacitor is
recommended.
 2009-2013 Microchip Technology Inc.
The main power loss occurs from the gate charge
power loss. This power loss can be defined in terms of
both the high-side and low-side power MOSFETs.
EQUATION 5-3:
P
+P
HIGHDR
LOWDR
P
= V
 QHIGH  F SW
HIGHDR
CC
P
= V
 QLOW  F SW
LOWDR
CC
Where:
GATE
PGATE =
= P
Total Gate Charge Power Loss
PHIGHDR =
High-Side Gate Charge Power Loss
PLOWDR =
Low-Side Gate Charge Power Loss
VCC =
Bias Supply Voltage
QHIGH =
High-Side MOSFET Total Gate
Charge
QLOW =
Low-Side MOSFET Total GAte
Charge
FSW =
Switching Frequency
DS22201B-page 13
MCP14700
5.4
PCB Layout
Proper PCB layout is important in a high current, fast
switching circuit to provide proper device operation.
Improper component placement may cause errant
switching, excessive voltage ringing, or circuit latch-up.
There are two important states of the MCP14700
outputs, high and low. Figure 5-1 depicts the current
flow paths when the outputs of the MCP14700 are high
and the power MOSFETs are turned on. The charge
needed to turn on the low-side power MOSFET comes
from the decoupling capacitor CVCC. The current flows
from this capacitor through the internal LOWDR
circuitry, into the gate of the low-side power MOSFET,
out the source, into the ground plane, and back to
CVCC. To reduce any excess voltage ringing or spiking,
the inductance and area of this current loop must be
minimized.
Figure 5-2 depicts the current flow paths when the
outputs of the MCP14700 are low and the power
MOSFETs are turned off. These current paths should
also have low inductance and a small loop area to
minimize the voltage ringing and spiking.
CBOOT
VSUPPLY
MCP14700
PWMHI
PWMLO
VCC
CVCC
CBOOT
VSUPPLY
MCP14700
FIGURE 5-2:
PWMHI
The following recommendations should be followed for
optimal circuit performance:
PWMLO
VCC
CVCC
FIGURE 5-1:
Turn On Current Paths.
The charge needed to turn on the high-side power
MOSFET comes from the bootstrap capacitor CBOOT.
Current flows from CBOOT through the internal
HIGHDR circuitry, into the gate of the high-side power
MOSFET, out the source and back to CBOOT. The
printed circuit board traces that construct this current
loop need to have a small area and low inductance. To
control the inductance, short and wide traces must be
used.
DS22201B-page 14
Turn Off Current Paths.
- The components that construct the high
current paths previously mentioned should be
placed close the MCP14700 device. The
traces used to construct these current loops
should be wide and short to keep the
inductance and impedance low.
- A ground plane should be used to keep both
the parasitic inductance and impedance
minimized. The MCP14700 device is capable
of sourcing and sinking high peaks current
and any extra parasitic inductance or
impedance will result in non-optimal
performance.
 2009-2013 Microchip Technology Inc.
MCP14700
6.0
PACKAGING INFORMATION
6.1
Package Marking Information
Example:
8-Lead DFN (3x3)
XXXX
YYWW
NNN
Code
MCP14700
DABR
Note: Applies to 8-Lead
3x3 DFN
8-Lead SOIC (150 mil)
XXXXXXXX
XXXXYYWW
NNN
DABR
0933
256
Example:
14700E
SN e3 0933
256
Legend: XX...X
Y
YY
WW
NNN
e3
*
Note:
Device
Customer-specific information
Year code (last digit of calendar year)
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
Pb-free JEDEC designator for Matte Tin (Sn)
This package is Pb-free. The Pb-free JEDEC designator ( e3 )
can be found on the outer packaging for this package.
In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information.
 2009-2013 Microchip Technology Inc.
DS22201B-page 15
MCP14700
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
DS22201B-page 16
 2009-2013 Microchip Technology Inc.
MCP14700
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
 2009-2013 Microchip Technology Inc.
DS22201B-page 17
MCP14700
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
DS22201B-page 18
 2009-2013 Microchip Technology Inc.
MCP14700
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
 2009-2013 Microchip Technology Inc.
DS22201B-page 19
MCP14700
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
DS22201B-page 20
 2009-2013 Microchip Technology Inc.
MCP14700
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 2009-2013 Microchip Technology Inc.
DS22201B-page 21
MCP14700
NOTES:
DS22201B-page 22
 2009-2013 Microchip Technology Inc.
MCP14700
APPENDIX A:
REVISION HISTORY
Revision B (January 2013)
The following is the list of modifications:
1.
2.
Updated the Features: list on page 1.
Updated the Typical Application Schematic.
Revision A (September 2009)
• Original Release of this Document.
 2009-2013 Microchip Technology Inc.
DS22201B-page 23
MCP14700
NOTES:
DS22201B-page 24
 2009-2013 Microchip Technology Inc.
MCP14700
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
PART NO.
X
/XX
Device
Temperature
Range
Package
Device:
MCP14700:
MCP14700T:
Dual Input Synchronous MOSFET Driver
Dual Input Synchronous MOSFET Driver Tape and Reel (DFN and SOIC)
Examples:
a)
b)
Extended Temperature,
8LD DFN package.
MCP14700T-E/MF: Tape and Reel,
Extended Temperature,
8LD DFN package.
a)
MCP14700-E/SN:
b)
Temperature
Range:
E
= -40C to +125C (Extended)
Package:
MF = Plastic Dual Flat, No Lead (3x3 DFN), 8-lead
SN = Plastic Small Outline, (3.90 mm), 8-lead
 2009-2013 Microchip Technology Inc.
MCP14700-E/MF:
Extended Temperature,
8LD SOIC package.
MCP14700T-E/SN: Tape and Reel,
Extended Temperature,
8LD SOIC package.
DS22201B-page 25
MCP14700
NOTES:
DS22201B-page 26
 2009-2013 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
•
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights.
Trademarks
The Microchip name and logo, the Microchip logo, dsPIC,
FlashFlex, KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro,
PICSTART, PIC32 logo, rfPIC, SST, SST Logo, SuperFlash
and UNI/O are registered trademarks of Microchip Technology
Incorporated in the U.S.A. and other countries.
FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor,
MTP, SEEVAL and The Embedded Control Solutions
Company are registered trademarks of Microchip Technology
Incorporated in the U.S.A.
Silicon Storage Technology is a registered trademark of
Microchip Technology Inc. in other countries.
Analog-for-the-Digital Age, Application Maestro, BodyCom,
chipKIT, chipKIT logo, CodeGuard, dsPICDEM,
dsPICDEM.net, dsPICworks, dsSPEAK, ECAN,
ECONOMONITOR, FanSense, HI-TIDE, In-Circuit Serial
Programming, ICSP, Mindi, MiWi, MPASM, MPF, MPLAB
Certified logo, MPLIB, MPLINK, mTouch, Omniscient Code
Generation, PICC, PICC-18, PICDEM, PICDEM.net, PICkit,
PICtail, REAL ICE, rfLAB, Select Mode, SQI, Serial Quad I/O,
Total Endurance, TSHARC, UniWinDriver, WiperLock, ZENA
and Z-Scale are trademarks of Microchip Technology
Incorporated in the U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
GestIC and ULPP are registered trademarks of Microchip
Technology Germany II GmbH & Co. & KG, a subsidiary of
Microchip Technology Inc., in other countries.
All other trademarks mentioned herein are property of their
respective companies.
© 2009-2013, Microchip Technology Incorporated, Printed in
the U.S.A., All Rights Reserved.
Printed on recycled paper.
ISBN: 9781620769782
QUALITY MANAGEMENT SYSTEM
CERTIFIED BY DNV
== ISO/TS 16949 ==
 2009-2013 Microchip Technology Inc.
Microchip received ISO/TS-16949:2009 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
DS22201B-page 27
Worldwide Sales and Service
AMERICAS
ASIA/PACIFIC
ASIA/PACIFIC
EUROPE
Corporate Office
2355 West Chandler Blvd.
Chandler, AZ 85224-6199
Tel: 480-792-7200
Fax: 480-792-7277
Technical Support:
http://www.microchip.com/
support
Web Address:
www.microchip.com
Asia Pacific Office
Suites 3707-14, 37th Floor
Tower 6, The Gateway
Harbour City, Kowloon
Hong Kong
Tel: 852-2401-1200
Fax: 852-2401-3431
India - Bangalore
Tel: 91-80-3090-4444
Fax: 91-80-3090-4123
India - New Delhi
Tel: 91-11-4160-8631
Fax: 91-11-4160-8632
Austria - Wels
Tel: 43-7242-2244-39
Fax: 43-7242-2244-393
Denmark - Copenhagen
Tel: 45-4450-2828
Fax: 45-4485-2829
India - Pune
Tel: 91-20-2566-1512
Fax: 91-20-2566-1513
France - Paris
Tel: 33-1-69-53-63-20
Fax: 33-1-69-30-90-79
Japan - Osaka
Tel: 81-6-6152-7160
Fax: 81-6-6152-9310
Germany - Munich
Tel: 49-89-627-144-0
Fax: 49-89-627-144-44
Atlanta
Duluth, GA
Tel: 678-957-9614
Fax: 678-957-1455
Boston
Westborough, MA
Tel: 774-760-0087
Fax: 774-760-0088
Chicago
Itasca, IL
Tel: 630-285-0071
Fax: 630-285-0075
Cleveland
Independence, OH
Tel: 216-447-0464
Fax: 216-447-0643
Dallas
Addison, TX
Tel: 972-818-7423
Fax: 972-818-2924
Detroit
Farmington Hills, MI
Tel: 248-538-2250
Fax: 248-538-2260
Indianapolis
Noblesville, IN
Tel: 317-773-8323
Fax: 317-773-5453
Los Angeles
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Tel: 949-462-9523
Fax: 949-462-9608
Santa Clara
Santa Clara, CA
Tel: 408-961-6444
Fax: 408-961-6445
Toronto
Mississauga, Ontario,
Canada
Tel: 905-673-0699
Fax: 905-673-6509
Australia - Sydney
Tel: 61-2-9868-6733
Fax: 61-2-9868-6755
China - Beijing
Tel: 86-10-8569-7000
Fax: 86-10-8528-2104
China - Chengdu
Tel: 86-28-8665-5511
Fax: 86-28-8665-7889
China - Chongqing
Tel: 86-23-8980-9588
Fax: 86-23-8980-9500
Netherlands - Drunen
Tel: 31-416-690399
Fax: 31-416-690340
Korea - Daegu
Tel: 82-53-744-4301
Fax: 82-53-744-4302
Spain - Madrid
Tel: 34-91-708-08-90
Fax: 34-91-708-08-91
China - Hangzhou
Tel: 86-571-2819-3187
Fax: 86-571-2819-3189
Korea - Seoul
Tel: 82-2-554-7200
Fax: 82-2-558-5932 or
82-2-558-5934
China - Hong Kong SAR
Tel: 852-2943-5100
Fax: 852-2401-3431
Malaysia - Kuala Lumpur
Tel: 60-3-6201-9857
Fax: 60-3-6201-9859
China - Nanjing
Tel: 86-25-8473-2460
Fax: 86-25-8473-2470
Malaysia - Penang
Tel: 60-4-227-8870
Fax: 60-4-227-4068
China - Qingdao
Tel: 86-532-8502-7355
Fax: 86-532-8502-7205
Philippines - Manila
Tel: 63-2-634-9065
Fax: 63-2-634-9069
China - Shanghai
Tel: 86-21-5407-5533
Fax: 86-21-5407-5066
Singapore
Tel: 65-6334-8870
Fax: 65-6334-8850
China - Shenyang
Tel: 86-24-2334-2829
Fax: 86-24-2334-2393
Taiwan - Hsin Chu
Tel: 886-3-5778-366
Fax: 886-3-5770-955
China - Shenzhen
Tel: 86-755-8864-2200
Fax: 86-755-8203-1760
Taiwan - Kaohsiung
Tel: 886-7-213-7828
Fax: 886-7-330-9305
China - Wuhan
Tel: 86-27-5980-5300
Fax: 86-27-5980-5118
Taiwan - Taipei
Tel: 886-2-2508-8600
Fax: 886-2-2508-0102
China - Xian
Tel: 86-29-8833-7252
Fax: 86-29-8833-7256
Thailand - Bangkok
Tel: 66-2-694-1351
Fax: 66-2-694-1350
UK - Wokingham
Tel: 44-118-921-5869
Fax: 44-118-921-5820
China - Xiamen
Tel: 86-592-2388138
Fax: 86-592-2388130
China - Zhuhai
Tel: 86-756-3210040
Fax: 86-756-3210049
DS22201B-page 28
Italy - Milan
Tel: 39-0331-742611
Fax: 39-0331-466781
Japan - Tokyo
Tel: 81-3-6880- 3770
Fax: 81-3-6880-3771
11/29/12
 2009-2013 Microchip Technology Inc.
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