NVTFS5116PL Power MOSFET −60 V, −14 A, 52 mW, Single P−Channel Features • • • • • Small Footprint (3.3 x 3.3 mm) for Compact Design Low RDS(on) to Minimize Conduction Losses Low Capacitance to Minimize Driver Losses NV Prefix for Automotive and Other Applications Requiring AEC−Q101 Qualified Site and Change Controls These are Pb−Free Devices http://onsemi.com V(BR)DSS Symbol Value Unit Drain−to−Source Voltage VDSS −60 V Gate−to−Source Voltage VGS ±20 V ID −14 A Continuous Drain Current RYJ−mb (Notes 1, 2, 3, 4) Power Dissipation RYJ−mb (Notes 1, 2, 3) Continuous Drain Current RqJA (Notes 1 & 3, 4) Power Dissipation RqJA (Notes 1, 3) Pulsed Drain Current Tmb = 25°C Steady State Tmb = 100°C Tmb = 25°C Steady State PD TA = 25°C, tp = 10 ms Source Current (Body Diode) Single Pulse Drain−to−Source Avalanche Energy (TJ = 25°C, VDD = 50 V, VGS = 10 V, IL(pk) = 30 A, L = 0.1 mH, RG = 25 W) Lead Temperature for Soldering Purposes (1/8″ from case for 10 s) ID Junction−to−Ambient − Steady State (Note 3) PD January, 2011 − Rev. 0 S (1,2,3) MARKING DIAGRAM W 3.2 1.6 IDM −126 A TJ, Tstg −55 to +175 °C IS −17 A EAS 45 mJ TL 260 °C Symbol Value Unit RYJ−mb 7.2 °C/W RqJA 47 1. The entire application environment impacts the thermal resistance values shown, they are not constants and are only valid for the particular conditions noted. 2. Psi (Y) is used as required per JESD51−12 for packages in which substantially less than 100% of the heat flows to single case surface. 3. Surface−mounted on FR4 board using a 650 mm2, 2 oz. Cu pad. 4. Continuous DC current rating. Maximum current for pulses as long as 1 second is higher but is dependent on pulse duration and duty cycle. © Semiconductor Components Industries, LLC, 2011 G (4) −4 THERMAL RESISTANCE MAXIMUM RATINGS (Note 1) Junction−to−Mounting Board (top) − Steady State (Note 2 and 3) D (5−8) A −6 Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. Parameter P−Channel MOSFET 10 TA = 100°C Operating Junction and Storage Temperature W 21 TA = 100°C TA = 25°C −14 A 72 mW @ −4.5 V −10 Tmb = 100°C TA = 25°C ID MAX 52 mW @ −10 V −60 V MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Parameter RDS(on) MAX 1 1 S S S G 1 WDFN8 (m8FL) CASE 511AB 5116 A Y WW G 5116 AYWWG G D D D D = Specific Device Code = Assembly Location = Year = Work Week = Pb−Free Package (Note: Microdot may be in either location) ORDERING INFORMATION Device Package Shipping† NVTFS5116PLTAG WDFN8 1500/Tape & Reel (Pb−Free) NVTFS5116PLTWG WDFN8 5000/Tape & Reel (Pb−Free) †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. Publication Order Number: NVTFS5116PL/D NVTFS5116PL ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) Parameter Symbol Test Condition Min V(BR)DSS VGS = 0 V, ID = 250 mA −60 Typ Max Unit OFF CHARACTERISTICS Drain−to−Source Breakdown Voltage Zero Gate Voltage Drain Current IDSS Gate−to−Source Leakage Current VGS = 0 V, VDS = 60 V V TJ = 25°C −1.0 TJ = 125°C −10 mA IGSS VDS = 0 V, VGS = "20 V Gate Threshold Voltage VGS(TH) VGS = VDS, ID = −250 mA −3 V Drain−to−Source On Resistance RDS(on) VGS = −10 V, ID = −7 A 37 52 mW VGS = −4.5 V, ID = −7 A 51 72 gFS VDS = 15 V, ID = −5 A 11 S Input Capacitance Ciss 1258 pF Output Capacitance Coss VGS = 0 V, f = 1.0 MHz, VDS = −25 V "100 nA ON CHARACTERISTICS (Note 5) Forward Transconductance −1 CHARGES AND CAPACITANCES Reverse Transfer Capacitance 127 Crss 84 Total Gate Charge QG(TOT) 14 nC Threshold Gate Charge QG(TH) 1 nC Gate−to−Source Charge QGS Gate−to−Drain Charge QGD Total Gate Charge QG(TOT) VGS = −4.5 V, VDS = −48 V, ID = −7 A 4 8 VGS = −10 V, VDS = −48 V, ID = −7 A 25 nC 14 ns SWITCHING CHARACTERISTICS (Note 6) Turn−On Delay Time Rise Time Turn−Off Delay Time Fall Time td(on) tr td(off) VGS = −4.5 V, VDS = −48 V, ID = −7 A tf 68 24 36 DRAIN−SOURCE DIODE CHARACTERISTICS Forward Diode Voltage Reverse Recovery Time VSD TJ = 25°C −0.79 TJ = 125°C −0.64 tRR Charge Time ta Discharge Time tb Reverse Recovery Charge VGS = 0 V, IS = −7 A 21 VGS = 0 V, dIS/dt = 100 A/ms, IS = −7 A QRR http://onsemi.com 2 V ns 16 5 24 5. Pulse Test: Pulse Width ≤ 300 ms, Duty Cycle ≤ 2%. 6. Switching characteristics are independent of operating junction temperatures. −1.20 nC NVTFS5116PL TYPICAL CHARACTERISTICS 50 40 TJ = 25°C VDS ≥ −10 V −5.0 V −10 V −4.6 V −4.3 V 30 −4 V 20 −3.7 V −3.4 V 10 0 −ID, DRAIN CURRENT (A) −ID, DRAIN CURRENT (A) 40 VGS = −7 V 1 2 3 4 −VDS, DRAIN−TO−SOURCE VOLTAGE (V) 20 TJ = 25°C 10 TJ = 125°C −3.1 V −2.8 V 0 30 0 5 2 0.075 ID = −7 A TJ = 25°C 0.065 0.055 0.045 0.035 3 4 5 6 7 8 9 −VGS, GATE−TO−SOURCE VOLTAGE (V) 10 0.070 0.050 VGS = −10 V 0.040 0.030 5 10 15 20 25 30 35 40 −ID, DRAIN CURRENT (A) 100000 ID = −7 A VGS = −10 V VGS = 0 V −IDSS, LEAKAGE (nA) RDS(on), DRAIN−TO−SOURCE RESISTANCE (NORMALIZED) VGS = −4.5 V 0.060 Figure 4. On−Resistance vs. Drain Current and Gate Voltage 2.2 1.8 6 0.080 Figure 3. On−Resistance vs. Gate−to−Source Voltage 2.0 3 4 5 −VGS, GATE−TO−SOURCE VOLTAGE (V) Figure 2. Transfer Characteristics RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) Figure 1. On−Region Characteristics TJ = −55°C 1.6 1.4 1.2 1.0 0.8 10000 TJ = 150°C 1000 TJ = 125°C 0.6 0.4 50 25 0 25 50 75 100 125 TJ, JUNCTION TEMPERATURE (°C) 150 175 100 10 Figure 5. On−Resistance Variation with Temperature 20 30 40 50 −VDS, DRAIN−TO−SOURCE VOLTAGE (V) Figure 6. Drain−to−Source Leakage Current vs. Voltage http://onsemi.com 3 60 NVTFS5116PL TYPICAL CHARACTERISTICS 10 VGS = 0 V 1600 C, CAPACITANCE (pF) −VGS, GATE−TO−SOURCE VOLTAGE (V) 1800 TJ = 25°C 1400 Ciss 1200 1000 800 600 400 200 0 Coss Crss 0 10 20 30 40 50 60 QT 8 6 Qgs 4 VDS = −48 V ID = −7 A TJ = 25°C 2 0 0 5 −VDS, DRAIN−TO−SOURCE VOLTAGE (V) tf −IS, SOURCE CURRENT (A) t, TIME (ns) 100 tr td(off) td(on) 10 25 1 10 RG, GATE RESISTANCE (W) 100 VGS = 0 V TJ = 25°C 30 20 10 0 0.5 Figure 9. Resistive Switching Time Variation vs. Gate Resistance 10 ms 100 ms 10 ms 1 ms 10 1 RDS(on) Limit Thermal Limit Package Limit 0.1 dc 1 10 −VDS, DRAIN−TO−SOURCE VOLTAGE (V) EAS, SINGLE PULSE DRAIN−TO− SOURCE AVALANCHE ENERGY (mJ) VGS = −10 V Single Pulse TC = 25°C 0.6 0.7 0.8 0.9 −VSD, SOURCE−TO−DRAIN VOLTAGE (V) 1.0 Figure 10. Diode Forward Voltage vs. Current 1000 −ID, DRAIN CURRENT (A) 20 40 VDD = −48 V ID = −7 A VGS = −4.5 V 0.1 15 Figure 8. Gate−to−Source Voltage vs. Total Charge 1000 100 10 Qg, TOTAL GATE CHARGE (nC) Figure 7. Capacitance Variation 1.0 Qgd 100 45 ID = −30 A 30 15 0 25 Figure 11. Maximum Rated Forward Biased Safe Operating Area 50 75 100 125 150 TJ, STARTING JUNCTION TEMPERATURE (°C) Figure 12. Maximum Avalanche Energy vs. Starting Junction Temperature http://onsemi.com 4 175 NVTFS5116PL TYPICAL CHARACTERISTICS 100 Duty Cycle = 0.5 RqJA(t) (°C/W) 10 1 0.2 0.1 0.05 0.02 0.01 0.1 Single Pulse 0.01 0.000001 0.00001 0.0001 0.001 0.01 0.1 PULSE TIME (sec) Figure 13. Thermal Response http://onsemi.com 5 1 10 100 100 NVTFS5116PL PACKAGE DIMENSIONS WDFN8 3.3x3.3, 0.65P CASE 511AB−01 ISSUE B 2X NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION D1 AND E1 DO NOT INCLUDE MOLD FLASH PROTRUSIONS OR GATE BURRS. 0.20 C D A D1 B 2X DIM A A1 b c D D1 D2 E E1 E2 e G K L L1 M q 0.20 C 8 7 6 5 4X E1 E 1 2 3 4 q c TOP VIEW A1 0.10 C A 0.10 C e SIDE VIEW 0.10 8X b C A B 0.05 c L C 6X DETAIL A SEATING PLANE DETAIL A INCHES NOM 0.030 −−− 0.012 0.008 0.130 BSC 0.116 0.120 0.078 0.083 0.130 BSC 0.116 0.120 0.058 0.063 0.026 BSC 0.012 0.016 0.025 −−− 0.012 0.017 0.002 0.005 0.055 0.059 0_ −−− MIN 0.028 0.000 0.009 0.006 MAX 0.031 0.002 0.016 0.010 0.124 0.088 0.124 0.068 0.020 −−− 0.022 0.008 0.063 12 _ SOLDERING FOOTPRINT* 8X 0.42 e/2 1 4 E2 0.65 PITCH PACKAGE OUTLINE K 4X 0.66 M 5 8 G MILLIMETERS MIN NOM MAX 0.70 0.75 0.80 0.00 −−− 0.05 0.23 0.30 0.40 0.15 0.20 0.25 3.30 BSC 2.95 3.05 3.15 1.98 2.11 2.24 3.30 BSC 2.95 3.05 3.15 1.47 1.60 1.73 0.65 BSC 0.30 0.41 0.51 0.64 −−− −−− 0.30 0.43 0.56 0.06 0.13 0.20 1.40 1.50 1.60 0_ −−− 12 _ D2 L1 3.60 BOTTOM VIEW 0.75 2.30 0.57 0.47 2.37 3.46 DIMENSION: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 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