Fujitsu MB90V340E-102 16-bit proprietary microcontroller cmo Datasheet

FUJITSU SEMICONDUCTOR
DATA SHEET
DS07-13747-1E
16-bit Proprietary Microcontroller
CMOS
F2MC-16LX MB90340E Series
MB90F342E(S), MB90F342CE(S), MB90F343E(S), MB90F343CE(S), MB90F345E(S), MB90F345CE(S),
MB90F346E(S), MB90F346CE(S), MB90F347E(S), MB90F347CE(S), MB90F349E(S), MB90F349CE(S),
MB90341E(S), MB90341CE(S), MB90342E(S), MB90342CE(S), MB90346E(S), MB90346CE(S), MB90347E(S),
MB90347CE(S), MB90348E(S), MB90348CE(S), MB90349E(S), MB90349CE(S), MB90V340E-101/102
■ DESCRIPTION
The MB90340E-series with up to 2 FULL-CAN* interfaces and Flash ROM is especially designed for automotive
and other industrial applications. Its main feature are the on-board CAN Interfaces, which conform to V2.0 Part
A and Part B, while supporting a very flexible message buffer scheme and so offering more functions than a
normal full CAN approach. With the new 0.35 µm CMOS technology, Fujitsu now offers on-chip Flash ROM
program memory up to 512 Kbytes.
The power to the MCU core (3V) is supplied by a built-in regulator circuit, giving these microcontrollers superior
performance in terms of power consumption and tolerance to EMI.
* : Controller Area Network (CAN) - License of Robert Bosch GmbH
Note : F2MC is the abbreviation of FUJITSU Flexible Microcontroller.
Be sure to refer to the “Check Sheet” for the latest cautions on development.
“Check Sheet” is seen at the following support page
URL : http://www.fujitsu.com/global/services/microelectronics/product/micom/support/index.html
“Check Sheet” lists the minimal requirement items to be checked to prevent problems beforehand in system
development.
Copyright©2006 FUJITSU LIMITED All rights reserved
MB90340E Series
■ FEATURES
• CPU
• Instruction system best suited to controller
- Wide choice of data types (bit, byte, word, and long word)
- Wide choice of addressing modes (23 types)
- Enhanced functionality with signed multiply and divide instructions and the RETI instruction
- Enhanced high-precision computing with 32-bit accumulator
• Instruction system compatible with high-level language (C language) and multitask
- Employing system stack pointer
- Various enhanced pointer indirect instructions
- Barrel shift instructions
• Increased processing speed
- 4-byte instruction queue
• Serial interface
• UART (LIN/SCI) : up to 4 channels
- Equipped with full-duplex double buffer
- Clock-asynchronous or clock-synchronous serial transmission is available
• I2C interface*1 : up to 2 channels (only for devices with a C suffix in the part number)
- Up to 400 Kbits/s transfer rate
• Interrupt controller
• Powerful 8-level, 34-condition interrupt feature
• Up to 16 external interrupts are supported
• Automatic data transfer function independent of CPU
- Expanded intelligent I/O service function (EI2OS) : up to 16 channels
• I/O ports
• General-purpose input/output port (CMOS output)
- 80 ports (for devices without an S suffix in the part number - i.e. devices that support the sub clock)
- 82 ports (for devices with an S suffix in the part number - i.e. devices that do not support the sub clock)
• 8/10-bit A/D converter : 16 channels
24 channels (only for devices with a C suffix in the part number)
• Resolution is selectable between 8-bit and 10-bit.
• Activation by external trigger input is allowed.
• Conversion time : 3 µs (at 24-MHz machine clock, including sampling time)
• Program patch function
• Detects address matches against 6 address pointers
• Timer
• Time-base timer, watch timer, watchdog timer : 1 channel
• 8/16-bit PPG timer : 8-bit × 16 channels, or 16-bit × 8 channels
• 16-bit reload timer : 4 channels
• 16-bit input/output timer
- 16-bit free-run timer : 2 channels
(FRT0 : ICU 0/1/2/3, OCU 0/1/2/3, FRT1 : ICU 4/5/6/7, OCU 4/5/6/7)
- 16-bit input capture: (ICU): 8 channels
- 16-bit output compare: (OCU): 8 channels
2
MB90340E Series
• Full-CAN controller*2
• Up to 2 channels
• Compliant with Ver2.0A and Ver2.0B CAN specifications
• 16 built-in message buffers
• CAN wake-up function
• Low power consumption (standby) mode
• Sleep mode (a mode that halts CPU operating clock)
• Timebase timer mode (a mode where only the oscillation clock, sub clock, timebase timer and watch timer
operate)
• Watch mode (a mode that operates sub clock and clock timer only)
• Stop mode (a mode that stops oscillation clock and sub clock)
• CPU intermittent operation mode
• Technology
• 0.35 µm CMOS technology
*1 : I2C license :
Purchase of Fujitsu I2C components conveys a license under the Philips I2C Patent Rights to use, these components in an I2C system provided that the system conforms to the I2C Standard Specification as defined by
Philips.
*2 : Controller Area Network (CAN) - License of Robert Bosch GmbH.
3
MB90340E Series
■ PRODUCT LINEUP
Part Number
MB90V340E-101,
MB90V340E-102
MB90F342E(S), MB90F342CE(S),
MB90F343E(S)*1, MB90F343CE(S)*1,
MB90F345E(S), MB90F345CE(S),
MB90F346E(S), MB90F346CE(S),
MB90F347E(S), MB90F347CE(S),
MB90F349E(S), MB90F349CE(S)
Evaluation products
Flash memory products
Parameter
Type
ROM
RAM
Emulator-specific
power supply*2
Technology
Operating
voltage range
Temperature range
Package
UART
I2C (400 kbps)
MASK ROM products
2
CPU
System clock
MB90341E(S)*1, MB90341CE(S)*1,
MB90342E(S)*1, MB90342CE(S)*1,
MB90346E(S), MB90346CE(S),
MB90347E(S), MB90347CE(S),
MB90348E(S)*1, MB90348CE(S)*1,
MB90349E(S)*1, MB90349CE(S)*1
F MC-16LX CPU
On-chip PLL clock multiplier (×1, ×2, ×3, ×4, ×6, 1/2 when PLL stops)
Minimum instruction execution time : 42 ns (4 MHz osc. PLL × 6)
256 Kbytes :
512 Kbytes :
External
30 Kbytes
Yes
MB90F345E(S), MB90F345CE(S)
384 Kbytes :
MB90F343E(S), MB90F343CE(S)
256 Kbytes :
MB90F342E(S), MB90F342CE(S),
MB90F349E(S), MB90F349CE(S)
128 Kbytes :
MB90F347E(S), MB90F347CE(S)
64 Kbytes :
MB90F346E(S), MB90F346CE(S)
MB90342E(S), MB90342CE(S),
MB90349E(S), MB90349CE(S)
128 Kbytes :
MB90341E(S), MB90341CE(S),
MB90348E(S), MB90348CE(S),
MB90347E(S), MB90347CE(S)
64 Kbytes :
MB90346E(S), MB90346CE(S)
20 Kbytes :
MB90F343E(S), MB90F343CE(S),
MB90F345E(S), MB90F345CE(S)
16 Kbytes :
MB90F342E(S), MB90F342CE(S),
MB90F349E(S), MB90F349CE(S)
6 Kbytes :
MB90F347E(S), MB90F347CE(S)
2 Kbytes :
MB90F346E(S), MB90F346CE(S)
16 Kbytes :
MB90341E(S), MB90341CE(S),
MB90342E(S), MB90342CE(S),
MB90348E(S), MB90348CE(S),
MB90349E(S), MB90349CE(S)
6 Kbytes :
MB90347E(S), MB90347CE(S)
2 Kbytes :
MB90346E(S), MB90346CE(S)
⎯
0.35 µm CMOS with
0.35 µm CMOS with built-in power supply regulator +
regulator for built-in
Flash memory with Charge pump for programming voltage
power supply
5 V ± 10%
3.5 V to 5.5 V : When normal operating (not using A/D converter)
4.0 V to 5.5 V : When using the A/D converter/Flash programming
4.5 V to 5.5 V : When using the external bus
⎯
−40 °C to +105 °C
PGA-299
QFP-100, LQFP-100
5 channels
4 channels
Wide range of baud rate settings using a dedicated reload timer
Special synchronous options for adapting to different synchronous serial protocols
LIN functionality working either as master or slave LIN device
2 channels
Devices with a C suffix in the part number : 2channels
Devices without a C suffix in the part number : ⎯
(Continued)
4
MB90340E Series
Part Number
MB90V340E-101,
MB90V340E-102
Parameter
24 input channels
A/D Converter
MB90F342E(S), MB90F342CE(S),
MB90F343E(S)*1, MB90F343CE(S)*1,
MB90F345E(S), MB90F345CE(S),
MB90F346E(S), MB90F346CE(S),
MB90F347E(S), MB90F347CE(S),
MB90F349E(S), MB90F349CE(S)
MB90341E(S)*1, MB90341CE(S)*1,
MB90342E(S)*1, MB90342CE(S)*1,
MB90346E(S), MB90346CE(S),
MB90347E(S), MB90347CE(S),
MB90348E(S)*1, MB90348CE(S)*1,
MB90349E(S)*1, MB90349CE(S)*1
Devices with a C suffix in the part number
: 24 channels
Devices without a C suffix in the part number : 16 channels
10-bit or 8-bit resolution
Conversion time : Min 3 µs include sample time (per one channel)
16-bit Reload Timer Operation clock frequency : fsys/21, fsys/23, fsys/25 (fsys = Machine clock frequency)
Supports External Event Count function
(4 channels)
16-bit I/O Timer
(2 channels)
Generates an interrupt signal on overflow
Supports Timer Clear when the output compare finds a match
Operation clock freq. : fsys, fsys/21, fsys/22, fsys/23, fsys/24, fsys/25, fsys/26, fsys/27
(fsys = Machine clock freq.)
I/O Timer 0 (clock input FRCK0) corresponds to ICU 0/1/2/3, OCU 0/1/2/3
I/O Timer 1 (clock input FRCK1) corresponds to ICU 4/5/6/7, OCU 4/5/6/7
16-bit Output
Compare
(8 channels)
Generates an interrupt signal when one of the 16-bit I/O timer matches the output compare
register
A pair of compare registers can be used to generate an output signal.
16-bit Input Capture Rising edge, falling edge or rising & falling edge sensitive
(8 channels)
Signals an interrupt upon external event
8/16-bit
Programmable
Pulse Generator
8 channels (16-bit) /16 channels (8-bit)
Sixteen 8-bit reload counters
Sixteen 8-bit reload registers for L pulse width
Sixteen 8-bit reload registers for H pulse width
Supports 8-bit and 16-bit operation modes
A pair of 8-bit reload counters can be configured as one 16-bit reload counter or as
8-bit prescaler plus 8-bit reload counter
Operating clock freq. : fsys, fsys/21, fsys/22, fsys/23, fsys/24 or 128 µs@fosc = 4 MHz
(fsys = Machine clock frequency, fosc = Oscillation clock frequency)
3 channels
CAN Interface
2 channels :
MB90F342E(S), MB90F342CE(S),
MB90F343E(S), MB90F343CE(S),
MB90F345E(S), MB90F345CE(S)
1 channel :
MB90F346E(S), MB90F346CE(S),
MB90F347E(S), MB90F347CE(S),
MB90F349E(S), MB90F349CE(S)
2 channels :
MB90341E(S), MB90341CE(S),
MB90342E(S), MB90342CE(S)
1 channel :
MB90346E(S), MB90346CE(S),
MB90347E(S), MB90347CE(S),
MB90348E(S), MB90348CE(S),
MB90349E(S), MB90349CE(S)
Conforms to CAN Specification Version 2.0 Part A and B
Automatic re-transmission in case of error
Automatic transmission in response to Remote Frames
Prioritized 16 message buffers for data and ID’s
Supports multiple messages
Flexible configuration of acceptance filtering :
Full bit compare/Full bit mask/Two partial bit masks
Supports up to 1 Mbps
(Continued)
5
MB90340E Series
(Continued)
Part Number
MB90V340E-101,
MB90V340E-102
Parameter
External Interrupt
(16 channels)
D/A converter
MB90F342E(S), MB90F342CE(S),
MB90F343E(S)*1, MB90F343CE(S)*1,
MB90F345E(S), MB90F345CE(S),
MB90F346E(S), MB90F346CE(S),
MB90F347E(S), MB90F347CE(S),
MB90F349E(S), MB90F349CE(S)
MB90341E(S)*1, MB90341CE(S)*1,
MB90342E(S)*1, MB90342CE(S)*1,
MB90346E(S), MB90346CE(S),
MB90347E(S), MB90347CE(S),
MB90348E(S)*1, MB90348CE(S)*1,
MB90349E(S)*1, MB90349CE(S)*1
Can be used rising edge, falling edge, starting up by H/L level input, external interrupt,
expanded intelligent I/O services (EI2OS) and DMA
⎯
2 channels
Sub clock
(maximum 100
kHz)
Only for
MB90V340E-102
I/O Ports
Virtually all external pins can be used as general purpose I/O port
All ports are push-pull outputs
Bit-wise settable as input/output or peripheral signal
Can be configured 8 as CMOS schmitt trigger/ automotive inputs (in blocks of 8 pins)
TTL input level settable for external bus (32-pin only for external bus)
Flash Memory
⎯
Devices with sub clock : devices without an S suffix in the part number
Devices without sub clock : devices with an S suffix in the part number
Supports automatic programming, Embedded AlgorithmTM*3
Write/Erase/Erase-Suspend/Resume commands
A flag indicating completion of the algorithm
Number of erase cycles : 10000 cycles
Data retention time : 20 years
Boot block configuration
Erase can be performed on each block
Block protection with external programming voltage
Flash Security Feature for protecting the content of the Flash (except
for MB90F346E(S) and MB90F346CE (S) )
*1 : These devices are under development.
*2 : It is setting of Jumper switch (TOOL VCC) when Emulator (MB2147-01) is used.
Please refer to the Emulator hardware manual for details.
*3 : Embedded Algorithm is a trade mark of Advanced Micro Devices Inc.
6
MB90340E Series
■ PIN ASSIGNMENTS
• MB90V340E-101/MB90V340E-102
P03/AD03/INT11
P02/AD02/INT10
P01/AD01/INT9
P00/AD00/INT8
PA1/TX0
PA0/RX0/INT8R
P97/OUT3
P96/OUT2
P95/OUT1
P94/OUT0
P93/PPG7(6)
P92/PPG5(4)
P91/PPG3(2)
P90/PPG1(0)
Vss
Vcc
P87/SCK1
P86/SOT1
P85/SIN1
P84/SCK0/INT15R
P83/SOT0/TOT2
P82/SIN0/TIN2/INT14R
P81/TOT0/CKOT/INT13R
P80/TIN0/ADTG/INT12R
P77/AN23/INT7
P76/AN22/INT6
RST
MD0
MD1
MD2
(TOP VIEW)
P75/AN21/INT5
P74/AN20/INT4
P73/AN19/INT3
P72/AN18/INT2
P71/AN17/INT1
P70/AN16/INT0
Vss
P67/AN7/PPGE(F)
P66/AN6/PPGC(D)
P65/AN5/PPGA(B)
P64/AN4/PPG8(9)
P63/AN3/PPG6(7)
P62/AN2/PPG4(5)
P61/AN1/PPG2(3)
P60/AN0/PPG0(1)
AVss
AVRL
AVRH
AVcc
P57/AN15/DA01
P35/HAK/OUT5
P36/RDY/OUT6
P37/CLK/OUT7
P40/X0A*
P41/X1A*
Vcc
Vss
C
P42/IN6/RX1/INT9R
P43/IN7/TX1
P44/SDA0/FRCK0
P45/SCL0/FRCK1
P46/SDA1
P47/SCL1
P50/AN8/SIN2
P51/AN9/SOT2
P52/AN10/SCK2
P53/AN11/TIN3
P54/AN12/TOT3
P55/AN13
P56/AN14/DA00
P31/RD/IN5
P32/WRL/WR/RX2/INT10R
P33/WRH/TX2
P34/HRQ/OUT4
80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51
50
81
82
49
83
48
84
47
85
46
86
45
87
44
88
43
89
42
90
41
QFP - 100
91
40
92
39
93
38
94
37
95
36
96
35
97
34
98
33
99
32
100
31
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30
P24/A20/IN0
P25/A21/IN1
P26/A22/IN2
P27/A23/IN3
P30/ALE/IN4
P04/AD04/INT12
P05/AD05/INT13
P06/AD06/INT14
P07/AD07/INT15
P10/AD08/TIN1
P11/AD09/TOT1
P12/AD10/SIN3/INT11R
P13/AD11/SOT3
P14/AD12/SCK3
Vcc
Vss
X1
X0
P15/AD13/SIN4
P16/AD14/SOT4
P17/AD15/SCK4
P20/A16/PPG9(8)
P21/A17/PPGB(A)
P22/A18/PPGD(C)
P23/A19/PPGF(E)
(FPT-100P-M06)
* : X0A, X1A : MB90V340E-102
P40, P41 : MB90V340E-101
(Continued)
7
MB90340E Series
(Continued)
P35/HAK/OUT5
(FPT-100P-M05)
* : X0A, X1A : MB90V340E-102
P40, P41 : MB90V340E-101
8
MD0
RST
P36/RDY/OUT6
P37/CLK/OUT7
P40/X0A*
P41/X1A*
Vcc
Vss
C
P42/IN6/RX1/INT9R
P43/IN7/TX1
P44/SDA0/FRCK0
P45/SCL0/FRCK1
P46/SDA1
P47/SCL1
P50/AN8/SIN2
P51/AN9/SOT2
P52/AN10/SCK2
P53/AN11/TIN3
75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51
50
76
49
77
48
78
47
79
46
80
45
81
44
82
43
83
42
84
41
85
40
86
39
87
38
88
LQFP - 100
37
89
36
90
35
91
34
92
33
93
32
94
31
95
30
96
29
97
98
28
99
27
100
26
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25
P26/A22/IN2
P27/A23/IN3
P30/ALE/IN4
P31/RD/IN5
P32/WRL/WR/RX2/INT10R
P33/WRH/TX2
P34/HRQ/OUT4
P01/AD01/INT9
P02/AD02/INT10
P03/AD03/INT11
P04/AD04/INT12
P05/AD05/INT13
P06/AD06/INT14
P07/AD07/INT15
P10/AD08/TIN1
P11/AD09/TOT1
P12/AD10/SIN3/INT11R
P13/AD11/SOT3
P14/AD12/SCK3
Vcc
Vss
X1
X0
P15/AD13/SIN4
P16/AD14/SOT4
P17/AD15/SCK4
P20/A16/PPG9(8)
P21/A17/PPGB(A)
P22/A18/PPGD(C)
P23/A19/PPGF(E)
P24/A20/IN0
P25/A21/IN1
P81/TOT0/CKOT/INT13R
P80/TIN0/ADTG/INT12R
P77/AN23/INT7
P76/AN22/INT6
P00/AD00/INT8
PA1/TX0
PA0/RX0/INT8R
P97/OUT3
P96/OUT2
P95/OUT1
P94/OUT0
P93/PPG7(6)
P92/PPG5(4)
P91/PPG3(2)
P90/PPG1(0)
Vss
Vcc
P87/SCK1
P86/SOT1
P85/SIN1
P84/SCK0/INT15R
P83/SOT0/TOT2
P82/SIN0/TIN2/INT14R
(TOP VIEW)
MD1
MD2
P75/AN21/INT5
P74/AN20/INT4
P73/AN19/INT3
P72/AN18/INT2
P71/AN17/INT1
P70/AN16/INT0
Vss
P67/AN7/PPGE(F)
P66/AN6/PPGC(D)
P65/AN5/PPGA(B)
P64/AN4/PPG8(9)
P63/AN3/PPG6(7)
P62/AN2/PPG4(5)
P61/AN1/PPG2(3)
P60/AN0/PPG0(1)
AVss
AVRL
AVRH
AVcc
P57/AN15/DA01
P56/AN14/DA00
P55/AN13
P54/AN12/TOT3
MB90340E Series
• MB90F342E(S) / MB90F343E(S) / MB90F345E(S) / MB90F346E(S) / MB90F347E(S) / MB90F349E(S) /
MB90341E(S) / MB90342E(S) /MB90346E(S) / MB90347E(S) / MB90348E(S) / MB90349E(S)
P04/AD04/INT12
P05/AD05/INT13
P06/AD06/INT14
P07/AD07/INT15
P10/AD08/TIN1
P11/AD09/TOT1
P12/AD10/SIN3/INT11R
P13/AD11/SOT3
P14/AD12/SCK3
Vcc
Vss
X1
X0
P15/AD13
P16/AD14
P17/AD15
P20/A16/PPG9(8)
P21/A17/PPGB(A)
P22/A18/PPGD(C)
P23/A19/PPGF(E)
MD2
MD0
MD1
RST
P03/AD03/INT11
P02/AD02/INT10
P01/AD01/INT9
P00/AD00/INT8
PA1/TX0
PA0/RX0/INT8R
P97/OUT3
P96/OUT2
P95/OUT1
P94/OUT0
P93/PPG7(6)
P92/PPG5(4)
P91/PPG3(2)
P90/PPG1(0)
Vss
Vcc
P87/SCK1
P86/SOT1
P85/SIN1
P84/SCK0/INT15R
P83/SOT0/TOT2
P82/SIN0/TIN2/INT14R
P81/TOT0/CKOT/INT13R
P80/TIN0/ADTG/INT12R
P77/INT7
P76/INT6
(TOP VIEW)
80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51
50
81
49
82
48
83
47
84
46
85
45
86
44
87
43
88
QFP - 100
42
89
41
90
40
91
39
92
38
93
37
94
36
95
35
96
34
97
33
98
32
99
31
100
P75/INT5
P74/INT4
P73/INT3
P72/INT2
P71/INT1
P70/INT0
Vss
P67/AN7/PPGE(F)
P66/AN6/PPGC(D)
P65/AN5/PPGA(B)
P64/AN4/PPG8(9)
P63/AN3/PPG6(7)
P62/AN2/PPG4(5)
P61/AN1/PPG2(3)
P60/AN0/PPG0(1)
AVss
AVRL
AVRH
AVcc
P57/AN15
P36/RDY/OUT6
P37/CLK/OUT7
P40/X0A *
P41/X1A *
Vcc
Vss
C
P42/IN6/RX1/INT9R
P43/IN7/TX1
P44/FRCK0
P45/FRCK1
P46
P47
P50/AN8/SIN2
P51/AN9/SOT2
P52/AN10/SCK2
P53/AN11/TIN3
P54/AN12/TOT3
P55/AN13
P56/AN14
P34/HRQ/OUT4
P35/HAK/OUT5
P32/WRLX/WRX/INT10R
P33/WRH
P24/A20/IN0
P25/A21/IN1
P26/A22/IN2
P27/A23/IN3
P30/ALE/IN4
P31/RD/IN5
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30
(FPT-100P-M06)
* : X0A, X1A : devices without an S suffix in the part number
P40, P41 : devices with an S suffix in the part number
(Continued)
9
MB90340E Series
(Continued)
(FPT-100P-M05)
* : X0A, X1A : devices without an S suffix in the part number
P40, P41 : devices with an S suffix in the part number
10
MD0
RST
P36/RDY/OUT6
P37/CLK/OUT7
P40/X0A*
P41/X1A*
Vcc
Vss
C
P42/IN6/RX1/INT9R
P43/IN7/TX1
P44/FRCK0
P45/FRCK1
P46
P47
P50/AN8/SIN2
P51/AN9/SOT2
P52/AN10/SCK2
P53/AN11/TIN3
75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51
76
50
49
77
48
78
47
79
80
46
81
45
82
44
83
43
84
42
85
41
86
40
87
39
LQFP - 100
88
38
89
37
90
36
91
35
92
34
93
33
94
32
95
31
96
30
97
29
98
28
99
27
100
26
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25
P26/A22/IN2
P27/A23/IN3
P30/ALE/IN4
P31/RD/IN5
P32/WRL/WR/INT10R
P33/WRH
P34/HRQ/OUT4
P35/HAK/OUT5
P01/AD01/INT9
P02/AD02/INT10
P03/AD03/INT11
P04/AD04/INT12
P05/AD05/INT13
P06/AD06/INT14
P07/AD07/INT15
P10/AD08/TIN1
P11/AD09/TOT1
P12/AD10/SIN3/INT11R
P13/AD11/SOT3
P14/AD12/SCK3
Vcc
Vss
X1
X0
P15/AD13
P16/AD14
P17/AD15
P20/A16/PPG9(8)
P21/A17/PPGB(A)
P22/A18/PPGD(C)
P23/A19/PPGF(E)
P24/A20/IN0
P25/A21/IN1
P81/TOT0/CKOT/INT13R
P80/TIN0/ADTG/INT12R
P77/INT7
P76/INT6
P00/AD00/INT8
PA1/TX0
PA0/RX0/INT8R
P97/OUT3
P96/OUT2
P95/OUT1
P94/OUT0
P93/PPG7(6)
P92/PPG5(4)
P91/PPG3(2)
P90/PPG1(0)
Vss
Vcc
P87/SCK1
P86/SOT1
P85/SIN1
P84/SCK0/INT15R
P83/SOT0/TOT2
P82/SIN0/TIN2/INT14R
(TOP VIEW)
MD1
MD2
P75/INT5
P74/INT4
P73/INT3
P72/INT2
P71/INT1
P70/INT0
Vss
P67/AN7/PPGE(F)
P66/AN6/PPGC(D)
P65/AN5/PPGA(B)
P64/AN4/PPG8(9)
P63/AN3/PPG6(7)
P62/AN2/PPG4(5)
P61/AN1/PPG2(3)
P60/AN0/PPG0(1)
AVss
AVRL
AVRH
AVcc
P57/AN15
P56/AN14
P55/AN13
P54/AN12/TOT3
MB90340E Series
• MB90F342CE(S) / MB90F343CE(S) / MB90F345CE(S) / MB90F346CE(S) / MB90F347CE(S) /
MB90F349CE(S) / MB90341CE(S) / MB90342CE(S) /MB90346CE(S) / MB90347CE(S) / MB90348CE(S) /
MB90349CE(S)
RST
MD2
P75/AN21/INT5
P74/AN20/INT4
P73/AN19/INT3
P72/AN18/INT2
P71/AN17/INT1
P70/AN16/INT0
Vss
P67/AN7/PPGE(F)
P66/AN6/PPGC(D)
P65/AN5/PPGA(B)
P64/AN4/PPG8(9)
P63/AN3/PPG6(7)
P62/AN2/PPG4(5)
P61/AN1/PPG2(3)
P60/AN0/PPG0(1)
AVss
AVRL
AVRH
AVcc
P57/AN15
P35/HAK/OUT5
P36/RDY/OUT6
P37/CLK/OUT7
P40/X0A*
P41/X1A*
Vcc
Vss
C
P42/IN6/RX1/INT9R
P43/IN7/TX1
P44/SDA0/FRCK0
P45/SCL0/FRCK1
P46/SDA1
P47/SCL1
P50/AN8/SIN2
P51/AN9/SOT2
P52/AN10/SCK2
P53/AN11/TIN3
P54/AN12/TOT3
P55/AN13
P56/AN14
P33/WRH
P34/HRQ/OUT4
P31/RD/IN5
P32/WRL/WR/INT10R
80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51
50
81
82
49
83
48
84
47
85
46
86
45
87
44
88
43
89
42
QFP - 100
90
41
91
40
92
39
93
38
94
37
95
36
96
35
97
34
98
33
99
32
100
31
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30
P24/A20/IN0
P25/A21/IN1
P26/A22/IN2
P27/A23/IN3
P30/ALE/IN4
P04/AD04/INT12
P05/AD05/INT13
P06/AD06/INT14
P07/AD07/INT15
P10/AD08/TIN1
P11/AD09/TOT1
P12/AD10/SIN3/INT11R
P13/AD11/SOT3
P14/AD12/SCK3
Vcc
Vss
X1
X0
P15/AD13
P16/AD14
P17/AD15
P20/A16/PPG9(8)
P21/A17/PPGB(A)
P22/A18/PPGD(C)
P23/A19/PPGF(E)
MD0
MD1
P03/AD03/INT11
P02/AD02/INT10
P01/AD01/INT9
P00/AD00/INT8
PA1/TX0
PA0/RX0/INT8R
P97/OUT3
P96/OUT2
P95/OUT1
P94/OUT0
P93/PPG7(6)
P92/PPG5(4)
P91/PPG3(2)
P90/PPG1(0)
Vss
Vcc
P87/SCK1
P86/SOT1
P85/SIN1
P84/SCK0/INT15R
P83/SOT0/TOT2
P82/SIN0/TIN2/INT14R
P81/TOT0/CKOT/INT13R
P80/TIN0/ADTG/INT12R
P77/AN23/INT7
P76/AN22/INT6
(TOP VIEW)
(FPT-100P-M06)
* : X0A, X1A : devices without an S suffix in the part number
P40, P41 : devices with an S suffix in the part number
(Continued)
11
MB90340E Series
(Continued)
(FPT-100P-M05)
* : X0A, X1A : devices without an S suffix in the part number
P40, P41 : devices with an S suffix in the part number
12
RST
MD0
P35/HAK/OUT5
P36/RDY/OUT6
P37/CLK/OUT7
P40/X0A*
P41/X1A*
Vcc
Vss
C
P42/IN6/RX1/INT9R
P43/IN7/TX1
P44/SDA0/FRCK0
P45/SCL0/FRCK1
P46/SDA1
P47/SCL1
P50/AN8/SIN2
P51/AN9/SOT2
P52/AN10/SCK2
P53/AN11/TIN3
P33/WRH
P34/HRQ/OUT4
P31/RD/IN5
P32/WRL/WR/INT10R
75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51
76
50
77
49
78
48
47
79
46
80
45
81
44
82
43
83
42
84
41
85
40
86
39
87
LQFP - 100
38
88
37
89
36
90
35
91
34
92
33
93
32
94
31
95
30
96
29
97
98
28
99
27
100
26
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25
P26/A22/IN2
P27/A23/IN3
P30/ALE/IN4
P01/AD01/INT9
P02/AD02/INT10
P03/AD03/INT11
P04/AD04/INT12
P05/AD05/INT13
P06/AD06/INT14
P07/AD07/INT15
P10/AD08/TIN1
P11/AD09/TOT1
P12/AD10/SIN3/INT11R
P13/AD11/SOT3
P14/AD12/SCK3
Vcc
Vss
X1
X0
P15/AD13
P16/AD14
P17/AD15
P20/A16/PPG9(8)
P21/A17/PPGB(A)
P22/A18/PPGD(C)
P23/A19/PPGF(E)
P24/A20/IN0
P25/A21/IN1
P81/TOT0/CKOT/INT13R
P80/TIN0/ADTG/INT12R
P77/AN23/INT7
P76/AN22/INT6
P00/AD00/INT8
PA1/TX0
PA0/RX0/INT8R
P97/OUT3
P96/OUT2
P95/OUT1
P94/OUT0
P93/PPG7(6)
P92/PPG5(4)
P91/PPG3(2)
P90/PPG1(0)
Vss
Vcc
P87/SCK1
P86/SOT1
P85/SIN1
P84/SCK0/INT15R
P83/SOT0/TOT2
P82/SIN0/TIN2/INT14R
(TOP VIEW)
MD1
MD2
P75/AN21/INT5
P74/AN20/INT4
P73/AN19/INT3
P72/AN18/INT2
P71/AN17/INT1
P70/AN16/INT0
Vss
P67/AN7/PPGE(F)
P66/AN6/PPGC(D)
P65/AN5/PPGA(B)
P64/AN4/PPG8(9)
P63/AN3/PPG6(7)
P62/AN2/PPG4(5)
P61/AN1/PPG2(3)
P60/AN0/PPG0(1)
AVss
AVRL
AVRH
AVcc
P57/AN15
P56/AN14
P55/AN13
P54/AN12/TOT3
MB90340E Series
■ PIN DESCRIPTION
Pin No.
QFP100*1 LQFP100*2
Pin name
I/O
Circuit
type*3
General purpose I/O pins. The register can be set to select
whether to use a pull-up resistor.In external bus mode, the pin is
enabled as a general-purpose I/O port when the corresponding bit
in the external address output control register (HACR) is 1.
P24 to P27
1 to 4
99 to 2
G
A20 to A23
Output pins of the external address bus. When the corresponding
bit in the external address output control register (HACR) is 0, the
pins are enabled as high address output pins (A20 to A23).
IN0 to IN3
Trigger input pins for input captures.
General purpose I/O pin.The register can be set to select whether
to use a pull-up resistor.
This function is enabled in single-chip mode.
P30
5
6
7
3
G
ALE
Address latch enable output pin. This function is enabled when
the external bus is enabled.
IN4
Trigger input pin for input capture.
P31
General purpose I/O pin.The register can be set to select whether
to use a pull-up resistor.
This function is enabled in single-chip mode.
4
G
RD
External read strobe output pin. This function is enabled when the
external bus is enabled.
IN5
Trigger input pin for input capture.
P32
General purpose I/O pin. The register can be set to select whether
to use a pull-up resistor. This function is enabled either in singlechip mode or when the WR/WRL pin output is disabled.
5
G
WR / WRL
INT10R
6
General purpose I/O pin. The register can be set to select whether
to use a pull-up resistor.This function is enabled either in singlechip mode or when the WRH pin output is disabled.
G
WRH
Write strobe output pin for the external data bus. This function is
enabled when both the external bus and the WR/WRL pin output
are enabled. WRL is used to write-strobe 8 lower bits of the data
bus in 16-bit access while WR is used to write-strobe 8 bits of the
data bus in 8-bit access.
External interrupt request input pin.
P33
8
Function
Write strobe output pin for the upper 8 bits of the external data
bus. This function is enabled when the external bus is enabled,
when the external bus 16-bit mode is selected, and when the
WRH output pin is enabled.
(Continued)
13
MB90340E Series
Pin No.
QFP100*1 LQFP100*2
Pin name
I/O
Circuit
type*3
General purpose I/O pin. The register can be set to select
whether to use a pull-up resistor. This function is enabled either
in single-chip mode or when the hold function is disabled.
P34
9
7
G
HRQ
Hold request input pin. This function is enabled when both the
external bus and the hold function are enabled.
OUT4
Waveform output pin for output compare.
General purpose I/O pin. The register can be set to select
whether to use a pull-up resistor. This function is enabled either
in single-chip mode or when the hold function is disabled.
P35
10
8
G
HAK
OUT5
9
G
External ready input pin. This function is enabled when both the
external bus and the external ready function are enabled.
OUT6
Waveform output pin for output compare.
General purpose I/O pin. The register can be set to select
whether to use a pull-up resistor. This function is enabled either
in single-chip mode or when the clock output is disabled.
10
G
CLK
OUT7
13, 14
General purpose I/O pin. The register can be set to select
whether to use a pull-up resistor. This function is enabled either
in single-chip mode or when the external ready function is
disabled.
RDY
P37
12
Hold acknowledge output pin. This function is enabled when
both the external bus and the hold function are enabled.
Waveform output pin for output compare.
P36
11
Function
Clock output pin. This function is enabled when both the
external bus and clock output are enabled.
Waveform output pin for output compare OCU7
P40, P41
F
General purpose I/O pins.
(devices with an S suffix in the part number and or
MB90V340E-101)
X0A , X1A
B
Oscillation pins for sub clock
(devices without an S suffix in the part number and or
MB90V340E-102)
11, 12
15
13
VCC
⎯
Power (3.5 V to 5.5 V) input pin
16
14
VSS
⎯
GND pin
17
15
C
K
This is the power supply stabilization capacitor This pin should
be connected to a ceramic capacitor with a capacitance greater
than or equal to 0.1 µF.
18
16
P42
General purpose I/O pin.
IN6
Trigger input pin for input capture.
RX1
INT9R
F
RX input pin for CAN1 Interface
(MB90F342E/F343E/F345E/341E/342E only)
External interrupt request input pin
(Continued)
14
MB90340E Series
Pin No.
QFP100*1 LQFP100*2
Pin name
I/O
Circuit
type*3
P43
19
20
17
18
IN7
General purpose I/O pin.
F
TX Output pin for CAN1
(MB90F342E/F343E/F345E/341E/342E only)
P44
General purpose I/O pin.
SDA0
H
SCL0
General purpose I/O pin.
H
FRCK1
20
SDA1
General purpose I/O pin.
H
P47
23
21
SCL1
25
22
23
AN8
H
O
27
28
25
26
Serial data input pin for UART2
P51
General purpose I/O pin.
AN9
I
AN10
27
30, 31
28, 29
32
30
Analog input pin for the A/D converter
Serial data output pin for UART2
General purpose I/O pin.
I
Analog input pin for the A/D converter
SCK2
Clock I/O pin for UART2
P53
General purpose I/O pin.
AN11
I
Analog input pin for the A/D converter
TIN3
Event input pin for the reload timer
P54
General purpose I/O pin.
AN12
I
TOT3
29
Analog input pin for the A/D converter
SIN2
P52
24
Serial clock I/O pin for I2C (devices with a C suffix in the part
number)
General purpose I/O pin.
SOT2
26
Serial data I/O pin for I2C (devices with a C suffix in the part
number)
General purpose I/O pin.
P50
24
Serial clock I/O pin for I2C (devices with a C suffix in the part
number)
Input pin for the 16-bit I/O Timer
P46
22
Serial data I/O pin for I2C (devices with a C suffix in the part
number)
Input pin for the 16-bit I/O Timer 0
P45
19
Trigger input pin for input capture.
TX1
FRCK0
21
Function
P55
AN13
P56, P57
AN14, AN15
AVCC
Analog input pin for the A/D converter
Output pin for the reload timer
I
J
K
General purpose I/O pin.
Analog input pin for the A/D converter
General purpose I/O pins.
Analog input pins for the A/D converter
Analog power input pin for the A/D Converter
(Continued)
15
MB90340E Series
Pin No.
QFP100*1 LQFP100*2
Pin name
I/O
Circuit
type*3
Function
33
31
AVRH
L
Reference voltage input pin for the A/D Converter. This power
supply must be turned on or off while a voltage higher than or
equal to AVRH is applied to AVCC.
34
32
AVRL
K
Lower reference voltage input pin for the A/D Converter
35
33
AVSS
K
Analog GND pin for the A/D Converter
P60 to P67
36 to 43
34 to 41
AN0 to AN7
General purpose I/O pins.
I
PPG0, 2, 4, 6,
8, A, C, E
44
42
VSS
Output pins for PPGs
⎯
P70 to P75
45 to 50
43 to 48
AN16 to AN21
Analog input pins for the A/D converter
GND pin
General purpose I/O pins.
I
INT0 to INT5
Analog input pins for the A/D converter (devices with a C suffix
in the part number)
External interrupt request input pins
51
49
MD2
D
Input pin for specifying the operating mode.
52, 53
50, 51
MD1, MD0
C
Input pins for specifying the operating mode.
54
52
RST
E
Reset input
P76, P77
55, 56
53, 54
AN22, AN23
General purpose I/O pins.
I
INT6, INT7
External interrupt request input pins
P80
57
55
TIN0
ADTG
General purpose I/O pin.
F
INT12R
56
TOT0
CKOT
F
SIN0
TIN2
M
SOT0
TOT2
Serial data input pin for UART0
Event input pin for the reload timer
External interrupt request input pin
P83
58
Output pin for the clock monitor
General purpose I/O pin.
INT14R
60
Output pin for the reload timer
External interrupt request input pin
P82
57
Trigger input pin for the A/D converter
General purpose I/O pin.
INT13R
59
Event input pin for the reload timer
External interrupt request input pin
P81
58
Analog input pins for the A/D converter (devices with a C suffix
in the part number)
General purpose I/O pin.
F
Serial data output pin for UART0
Output pin for the reload timer
(Continued)
16
MB90340E Series
Pin No.
QFP100*1 LQFP100*2
Pin name
I/O
Circuit
type*3
P84
61
59
SCK0
General purpose I/O pin.
F
INT15R
P85
Function
Clock I/O pin for UART0
External interrupt request input pin
60
63
61
64
62
65
63
VCC
⎯
Power (3.5 V to 5.5 V) input pin
66
64
VSS
⎯
GND pin
67 to 70
65 to 68
SIN1
P86
SOT1
P87
SCK1
P90 to P93
PPG1, 3, 5, 7
M
General purpose I/O pin.
62
F
F
F
P94 to P97
71 to 74
69 to 72
OUT0 to
OUT3
73
RX0
F
74
PA1
TX0
F
75 to 82
F
Clock I/O pin for UART1
General purpose I/O pin
Output pins for PPGs
Waveform output pins for output compares. This function is
enabled when the OCU enables waveform output.
RX input pin for CAN0 Interface
General purpose I/O pin.
TX Output pin for CAN0
General purpose I/O pins. The register can be set to select
whether to use a pull-up resistor. This function is enabled in
single-chip mode.
G
AD00 to AD07
I/O pins for 8 lower bits of the external address/data bus.
This function is enabled when the external bus is enabled.
INT8 to INT15
External interrupt request input pins.
General purpose I/O pin. The register can be set to select
whether to use a pull-up resistor.
This function is enabled in single-chip mode.
P10
85
General purpose I/O pin.
External interrupt request input pin
P00 to P07
77 to 84
Serial data output pin for UART1
General purpose I/O pin.
INT8R
76
General purpose I/O pin.
General purpose I/O pin
PA0
75
Serial data input pin for UART1
83
G
AD08
I/O pin for the external address/data bus.
This function is enabled when the external bus is enabled.
TIN1
Event input pin for the reload timer
(Continued)
17
MB90340E Series
Pin No.
QFP100*1 LQFP100*2
Pin name
I/O
Circuit
type*3
General purpose I/O pin. The register can be set to select
whether to use a pull-up resistor. This function is enabled in
single-chip mode.
P11
86
84
G
AD09
I/O pin for the external address/data bus. This function is
enabled when the external bus is enabled.
TOT1
Output pin for the reload timer
General purpose I/O pin. The register can be set to select
whether to use a pull-up resistor.
This function is enabled in single-chip mode.
P12
87
85
AD10
N
SIN3
External interrupt request input pin
General purpose I/O pin. The register can be set to select
whether to use a pull-up resistor.
This function is enabled in single-chip mode.
P13
86
G
AD11
I/O pin for the external address/data bus. This function is
enabled when the external bus is enabled.
SOT3
Serial data output pin for UART3
General purpose I/O pin. The register can be set to select
whether to use a pull-up resistor.
This function is enabled in single-chip mode.
P14
89
I/O pin for the external address/data bus. This function is
enabled when the external bus is enabled.
Serial data input pin for UART3
INT11R
88
Function
87
G
AD12
I/O pin for the external address/data bus. This function is
enabled when the external bus is enabled.
SCK3
Clock I/O pin for UART3
90
88
VCC
⎯
Power (3.5 V to 5.5 V) input pin
91
89
VSS
⎯
GND pin
92
90
X1
93
91
X0
A
P15
94
95
92
G
Main clock output pin
Main clock input pin
General purpose I/O pin. The register can be set to select
whether to use a pull-up resistor.
This function is enabled in single-chip mode.
AD13
I/O pin for the external address/data bus. This function is
enabled when the external bus is enabled.
P16
General purpose I/O pin. The register can be set to select
whether to use a pull-up resistor.
This function is enabled in single-chip mode.
93
G
AD14
I/O pin for the external address/data bus. This function is
enabled when the external bus is enabled.
(Continued)
18
MB90340E Series
(Continued)
Pin No.
QFP100*1 LQFP100*2
Pin name
Circuit
type*3
P17
96
94
G
General purpose I/O pins. The register can be set to select
whether to use a pull-up resistor.In external bus mode, the pin
is enabled as a general-purpose I/O port when the
corresponding bit in the external address output control
register (HACR) is 1.
P20 to P23
95 to 98
G
A16 to A19
PPG9,PPGB,
PPGD,PPGF
General purpose I/O pin. The register can be set to select
whether to use a pull-up resistor.
This function is enabled in single-chip mode.
I/O pin for the external address/data bus. This function is
enabled when the external bus is enabled.
AD15
97 to 100
Function
Output pins of the external address bus. When the
corresponding bit in the external address output control
register (HACR) is 0, the pins are enabled as high address
output pins (A16 to A19).
Output pins for PPGs
*1 : FPT-100P-M06
*2 : FPT-100P-M05
*3 : For I/O circuit type, refer to “■ I/O CIRCUIT TYPE”.
19
MB90340E Series
■ I/O CIRCUIT TYPE
Type
Circuit
X1
A
Remarks
Xout
Oscillation circuit
• High-speed oscillation feedback
resistor = approx. 1 MΩ
X0
Standby control signal
X1A
B
Xout
Oscillation circuit
• Low-speed oscillation feedback
resistor = approx. 10 MΩ
X0A
Standby control signal
CMOS hysteresis
inputs
MASK ROM and evaluation products:
• CMOS hysteresis input pin
Flash memory products:
• CMOS input pin
CMOS hysteresis
inputs
MASK ROM and evaluation products:
• CMOS hysteresis input pin
• Pull-down resistor value: approx. 50 kΩ
Flash memory products:
• CMOS input pin
• No pull-down
R
C
R
D
Pull-down
Resistor
CMOS hysteresis input pin
• Pull-up resistor value: approx. 50 kΩ
E
Pull-up
Resistor
R
CMOS hysteresis
inputs
(Continued)
20
MB90340E Series
Type
Circuit
F
Remarks
P-ch
Pout
N-ch
Nout
R
• CMOS level output
(IOL = 4 mA, IOH = −4 mA)
• CMOS hysteresis input (with function to
disconnect input during standby)
• Automotive input (with function to
disconnect input during standby)
CMOS hysteresis
input
Automotive input
Standby control for
input shutdown
Pull-up control
P-ch
P-ch
N-ch
G
Pout
Nout
R
CMOS hysteresis
input
• CMOS level output
(IOL = 4 mA, IOH = −4 mA)
• CMOS hysteresis input (with function to
disconnect input during standby)
• Automotive input (with function to
disconnect input during standby)
• TTL input (with function to disconnect
input during standby)
• Programmable pull-up resistor: 50 kΩ
approx.
Automotive input
TTL input
Standby control for
input shutdown
H
P-ch
Pout
N-ch
Nout
• CMOS level output
(IOL = 3 mA, IOH = −3 mA)
• CMOS hysteresis input (with function to
disconnect input during standby)
• Automotive input (with function to
disconnect input during standby)
R
CMOS hysteresis
input
Automotive input
Standby control for
input shutdown
(Continued)
21
MB90340E Series
Type
Circuit
Remarks
P-ch
Pout
N-ch
Nout
• CMOS level output
(IOL = 4 mA, IOH = −4 mA)
• CMOS hysteresis input (with function to
disconnect input during standby)
• Automotive input (with function to
disconnect input during standby)
• A/D converter analog input
R
I
CMOS hysteresis
input
Automotive input
Standby control for
input shutdown
Analog input
P-ch
Pout
N-ch
Nout
R
CMOS hysteresis
input
J
• CMOS level output
(IOL = 4 mA, IOH = −4 mA)
• D/A analog output
• CMOS hysteresis input (with function to
disconnect input during standby)
• Automotive input (with function to
disconnect input during standby)
• A/D converter analog input
Automotive input
Standby control for
input shutdown
Analog input
Analog output
• Power supply input protection circuit
P-ch
K
N-ch
P-ch
L
ANE
AVR
N-ch
ANE
• A/D converter reference voltage power
supply input pin, with the protection
circuit
• Flash memory devices do not have a
protection
circuit against VCC for pin AVRH
(Continued)
22
MB90340E Series
(Continued)
Type
Circuit
M
Remarks
P-ch
Pout
N-ch
Nout
R
• CMOS level output
(IOL = 4 mA, IOH = −4 mA)
• CMOS input (with function to disconnect
input during standby)
• Automotive input (with function to
disconnect input during standby)
CMOS input
Automotive input
Standby control for
input shutdown
Pull-up control
P-ch
P-ch
N-ch
N
Pout
Nout
R
CMOS input
• CMOS level output
(IOL = 4 mA, IOH = −4 mA)
• CMOS input (with function to disconnect
input during standby)
• Automotive input (with function to
disconnect input during standby)
• TTL input (with function to disconnect
input during standby)
Programmable pull-up resistor: 50 kΩ
approx
Automotive input
TTL input
Standby control for
input shutdown
P-ch
Pout
N-ch
Nout
R
O
• CMOS level output
(IOL = 4 mA, IOH = −4 mA)
• CMOS input (with function to disconnect
input during standby)
• Automotive input (with function to
disconnect input during standby)
• A/D converter analog input
CMOS input
Automotive input
Standby control for
input shutdown
Analog input
23
MB90340E Series
■ HANDLING DEVICES
1. Preventing latch-up
CMOS IC chips may suffer latch-up under the following conditions:
• A voltage higher than VCC or lower than VSS is applied to an input or output pin.
• A voltage higher than the rated voltage is applied between VCC and VSS pins.
• The AVCC power supply is applied before the VCC voltage.
Latch-up may increase the power supply current drastically, causing thermal damage to the device.
For the same reason, also be careful not to let the analog power-supply voltage (AVCC, AVRH) exceed the digital
power-supply voltage.
2. Handling unused pins
Leaving unused input pins open may result in misbehavior or latch-up and possible permanent damage to the
device. Therefore they must be pulled up or pulled down through resistors. In this case those resistors should
be more than 2 kΩ .
Unused bidirectional pins should be set to the output state and can be left open, or the input state with the above
described connection.
3. Power supply pins (VCC/VSS)
• If there are multiple VCC and VSS pins, that are designed to be set to the same potential are connected the
inside of the device to prevent malfunctions such as latch-up.
To reduce unnecessary radiation, prevent malfunctioning of the strobe signal due to the rise of ground level,
and observe the standard for total output current, be sure to connect the VCC and VSS pins to the power supply
and ground externally. Connect VCC and VSS pins to the device from the current supply source at a low impedance.
• As a measure against power supply noise, connect a capacitor of about 0.1 µF as a bypass capacitor between
VCC and VSS pins in the vicinity of VCC and VSS pins of the device
Vcc
Vss
Vcc
Vss
Vss
Vcc
MB90340E
Series
Vcc
Vss
Vss
Vcc
4. Mode Pins (MD0 to MD2)
Connect the mode pins directly to VCC or VSS pins. To prevent the device unintentionally entering test mode due
to noise, lay out the printed circuit board so as to minimize the distance from the mode pins to VCC or VSS pins
and to provide a low-impedance connection.
24
MB90340E Series
5. Sequence for Turning On the Power Supply to the A/D Converter and Analog Inputs
Make sure to turn on the A/D converter power supply (AVCC, AVRH, AVRL) and analog inputs (AN0 to AN23)
after turning-on the digital power supply (VCC).
Turn-off the digital power after turning off the A/D converter supply and analog inputs. In this case, make sure
that the voltage does not exceed AVRH or AVCC (turning on/off the analog and digital power supplies simultaneously is acceptable).
6. Connection of Unused A/D Converter Pins when the A/D Converter is Used
Connect unused pins of A/D converter to AVCC = VCC, AVSS = AVRH = AVRL = VSS.
7. Crystal Oscillator Circuit
The X0, X1 pins and X0A, X1A pins may be possible causes of abnormal operation. Make sure to provide bypass
capacitors via the shortest distance from X0, X1 pins and X0A, X1A pins, crystal oscillator (or ceramic oscillator)
and ground lines, and make sure, to the utmost effort, that the oscillation circuit lines do not cross the lines of
other circuits. It is highly recommended to provide a printed circuit board art work surrounding X0, X1 pins and
X0A, X1A pins with a ground area for stabilizing the operation.
For each of the mass-production products, request an oscillator evaluation from the manufacturer of the oscillator
you are using.
8. Pull-up/down resistors
The MB90340E Series does not support internal pull-up/down resistors (except for the pull-up resistors built into
ports 0 to 3). Use external components where needed.
9. Using external clock
To use an external clock, drive the X0 pin and leave the X1 pin open.
MB90340E Series
X0
Open
X1
10. Precautions when not using a sub clock signal
If you do not connect pins X0A and X1A to an oscillator, use pull-down handling on the X0A pin, and leave the
X1A pin open.
11. Notes on operation in PLL clock mode
If PLL clock mode is selected, the microcontroller attempt to be working with the self-oscillating circuit even when
there is no external oscillator or the external clock input is stopped. Performance of this operation, however,
cannot be guaranteed.
12. Notes on Power-On
To prevent the internal regulator circuit from malfunctioning, set the voltage rise time during power-on to 50 µs
or more (0.2 V to 2.7 V)
13. Stabilization of power supply voltage
A sudden change in the supply voltage may cause the device to malfunction even within the specified VCC supply
voltage operating range. Therefore, the VCC supply voltage should be stabilized.
Stabilize the power supply voltage as follows as a standard level of stabilization.
25
MB90340E Series
• VCC ripple variations (peak-to-peak value) at commercial frequencies (50 Hz/60 Hz) fall below 10% of the
standard VCC supply voltage
• The coefficient of fluctuation does not exceed 0.1 V/ms at instantaneous power switching.
14. Initialization
In the device, there are internal registers which are initialized only by a power-on reset. To initialize these registers,
turn on the power again.
15. Port 0 to Port 3 Output During Power-on (External-bus Mode)
As shown below, when the power is turned on in External-Bus mode, there is a possibility that output signal of
Port 0 to Port 3 might be unstable irrespective of the reset input.
1/2VCC
VCC
Port0 to Port3
Port0 to Port3 outputs
might be unstable
Port0 to Port3 outputs = Hi-Z
16. Notes on Using the CAN Function
To use the CAN function, please set the DIRECT bit of the CAN Direct Mode Register (CDMR) to 1.
If the DIRECT bit is set to ’0’ (initial value), wait states will be performed when accessing CAN registers.
Note : Please refer to the Hardware Manual of the MB90340E series for detail of CAN Direct Mode Register.
17. Flash Security Function (except for MB90F346E)
A security bit is located in the area of the flash memory.
If protection code 01H is written in the security bit, the flash memory is in the protected state by security.
Therefore please do not write 01H in this address if you do not use the security function.
Refer to following table for the address of the security bit.
26
Flash memory size
Address of the security bit
MB90F347E
Embedded 1 Mbit Flash Memory
FE0001H
MB90F342E
MB90F349E
Embedded 2 Mbits Flash Memory
FC0001H
MB90F343E
Embedded 3 Mbits Flash Memory
F90001H
MB90F345E
Embedded 4 Mbits Flash Memory
F80001H
MB90340E Series
■ BLOCK DIAGRAMS
MB90V340E-101/102
X0,X1
X0A,X1A*
RST
Clock
Controller
16LX
CPU
RAM
30 Kbytes
AVCC
AVSS
AN23 to AN0
AVRH
AVRL
ADTG
DA01, DA00
FRCK0
Input
Capture
8 channels
IN7 to IN0
Output
Compare
8 channels
OUT7 to OUT0
Prescaler
5 channels
IO Timer 1
UART
5 channels
CAN
Controller
3 channels
RX2 to RX0
TX2 to TX0
16-bit Reload
Timer
4 channels
TIN3 to TIN0
TOT3 to TOT0
8/10-bit
A/D converter
24 channels
10-bit
D/A converter
2 channels
FRCK1
AD15 to AD00
F2MC-16 Bus
SOT4 to SOT0
SCK4 to SCK0
SIN4 to SIN0
IO Timer 0
A23 to A16
ALE
RD
External
Bus
Interface
WR/WRL
WRH
HRQ
PPGF to PPG0
SDA1, SDA0
SCL1, SCL0
HAK
8/16-bit
PPG
16 channels
I2C
Interface
2 channels
DMAC
RDY
CLK
External
Interrupt
16 channels
Clock
Monitor
INT15 to INT8
(INT15R to INT8R)
INT7 to INT0
CKOT
* : Only for MB90V340E-102
27
MB90340E Series
MB90F342E(S), MB90F342CE(S), MB90F343E(S), MB90F343CE(S), MB90F345E(S), MB90F345CE(S), , MB90F346E(S),
MB90F346CE(S), MB90F347E(S), MB90F347CE(S), MB90F349E(S), MB90F349CE(S), MB90341E(S), MB90341CE(S),
MB90342E(S), MB90342CE(S), MB90346E(S), MB90346CE(S), MB90347E(S), MB90347CE(S), MB90348E(S),
MB90348CE(S), MB90349E(S), MB90349CE(S)
X0,X1
X0A,X1A*1
RST
Clock
Controller
16LX
CPU
RAM
2 K/6 K/16 K/
20 Kbytes
ROM/Flash
64 K/128 K
256 K/384 K/
512 Kbytes
Prescaler
4 channels
AVCC
AVSS
AN15 to AN0
AN23 to AN16*2
AVRH
AVRL
ADTG
PPGF to PPG0
FRCK0
Input
Capture
8 channels
IN7 to IN0
Output
Compare
8 channels
OUT7 to OUT0
IO Timer 1
FRCK1
CAN
Controller
1/2 channels*3
UART
4 channels
RX0, RX1*3
TX0, TX1*3
16-bit Reload
Timer
4 channels
8/10-bit
A/D converter
16/24
channels
TIN3 to TIN0
TOT3 to TOT0
AD15 to AD00
F2MC-16 Bus
SOT3 to SOT0
SCK3 to SCK0
SIN3 to SIN0
IO Timer 0
A23 to A16
ALE
RD
External
Bus
Interface
WR/WRL
WRH
8/16-bit
PPG
16 channels
HRQ
HAK
RDY
SDA1, SDA0*2
SCL1, SCL0*2
I2C
Interface
2 channels
CLK
External
Interrupt
16 channels
INT15 to INT8
(INT15R to INT8R)
INT7 to INT0
DMAC
Clock
Monitor
*1 : Only for devices with an S suffix in the part number
*2 : Only for devices with a C suffix in the part number
*3 : Only the MB90341E(S)/ 341CE(S)/ 342E(S)/ 342CE(S)/ F342E(S)/F342CE(S)/F343E(S)/F343CE(S)/
F345E(S)/F345CE(S) are equipped with 2 CAN channels
28
CKOT
MB90340E Series
■ MEMORY MAP
MB90V340E-101/102
000000H
0000EFH
000100H
Peripheral
External access area
MB90F345E(S)/F345CE(S)
000000H
0000EFH
000100H
Peripheral
External access area
MB90F343E(S)/F343CE(S)
000000H
0000EFH
000100H
Peripheral
External access area
RAM 20 Kbytes
RAM 20 Kbytes
RAM 30 Kbytes
0050FFH
0078FFH
007900H
007900H
Peripheral
007FFFH
008000H
00FFFFH
ROM
(image of FF bank)
External access area
F80000H
F8FFFFH
F90000H
ROM (F8 bank)
ROM (F9 bank)
F9FFFFH
FA0000H
007FFFH
008000H
00FFFFH
ROM
(image of FF bank)
External access area
F8FFFFH
F90000H
F9FFFFH
ROM (F9 bank)
ROM (FA bank)
FAFFFFH
FB0000H
ROM (FB bank)
ROM (FB bank)
FBFFFFH
FC0000H
ROM (FC bank)
FCFFFFH
FD0000H
ROM (FD bank)
FDFFFFH
FE0000H
F9FFFFH
FA0000H
FAFFFFH
FB0000H
FCFFFFH
FD0000H
ROM (FA bank)
ROM (FB bank)
ROM (FD bank)
ROM (FE bank)
ROM (FE bank)
FFFFFFH
ROM (F9 bank)
FDFFFFH
FE0000H
FEFFFFH
FF0000H
ROM (FF bank)
F8FFFFH
F90000H
ROM (FC bank)
ROM (FD bank)
ROM (FE bank)
ROM
(image of FF bank)
00FFFFH
F80000H External access area
FBFFFFH
FC0000H
FDFFFFH
FE0000H
FEFFFFH
FF0000H
Peripheral
007FFFH
008000H
ROM (F8 bank)
FA0000H
FBFFFFH
FC0000H
FFFFFFH
007900H
Peripheral
F80000H
ROM (FA bank)
FAFFFFH
FB0000H
FCFFFFH
FD0000H
0050FFH
FEFFFFH
FF0000H
ROM (FF bank)
ROM (FF bank)
FFFFFFH
: Not accessible
29
MB90340E Series
MB90349E(S)/349CE(S)
MB90342E(S)/342CE(S)
MB90F349E(S)/F349CE(S)
MB90F342E(S)/F342CE(S)
000000H
0000EFH
Peripheral
MB90348E(S)/348CE(S)
MB90341E(S)/341CE(S)
000000H
0000EFH
External access area
000100H
Peripheral
MB90347E(S)/347CE(S)
MB90F347E(S)/F347CE(S)
000000H
0000EFH
External access area
Peripheral
000000H
0000EFH
External access area
000100H
000100H
MB90346E(S)/346CE(S)
MB90F346E(S)/F346CE(S)
RAM 6 Kbytes
Peripheral
External access area
000100H
0008FFH
RAM 2 Kbytes
0018FFH
RAM 16 Kbytes
003FFFH
003FFFH
007900H
007FFFH
008000H
00FFFFH
RAM 16 Kbytes
ROM (image
of FF bank)
007FFFH
008000H
00FFFFH
External
access area
007900H
007900H
007900H
Peripheral
Peripheral
ROM (image
of FF bank)
007FFFH
008000H
00FFFFH
Peripheral
ROM (image
of FF bank)
007FFFH
008000H
00FFFFH
External
access area
External
access area
Peripheral
ROM (image
of FF bank)
External
access area
FC0000H
FCFFFFH
FD0000H
FDFFFFH
FE0000H
FEFFFFH
FF0000H
ROM (FC bank)
ROM (FD bank)
ROM (FE bank)
FEFFFFH
FF0000H
FEFFFFH
FF0000H
ROM (FF bank)
ROM (FF bank)
FFFFFFH
FFFFFFH
FE0000H
FE0000H
FE0000H
ROM (FE bank)
ROM (FE bank)
FEFFFFH
FF0000H
ROM (FF bank)
FFFFFFH
ROM (FF bank)
FFFFFFH
: Not accessible
Note: An image of the data in the FF bank of ROM is visible in the upper part of bank 00, which makes it possible
for the C compiler to use the small memory model. The lower 16 bits of addresses in the FF bank are the
same as the lower 16 bits of addresses in the 00 bank so that tables stored in the ROM can be accessed
without using the far specifier in the pointer declaration.
For example, when the address 00C000H is accessed, the data at FFC000H in ROM is actually accessed.
The ROM area in bank FF exceeds 32 Kbytes, and its entire image cannot be shown in bank 00.
As a result, the image between FF8000H and FFFFFFH is visible in bank 00, while the image between FF0000H
and FF7FFFH is visible only in bank FF.
30
MB90340E Series
■ I/O MAP
Address
Register
Abbreviation
Access
Resource name
Initial value
000000H Port 0 Data Register
PDR0
R/W
Port 0
XXXXXXXXB
000001H Port 1 Data Register
PDR1
R/W
Port 1
XXXXXXXXB
000002H Port 2 Data Register
PDR2
R/W
Port 2
XXXXXXXXB
000003H Port 3 Data Register
PDR3
R/W
Port 3
XXXXXXXXB
000004H Port 4 Data Register
PDR4
R/W
Port 4
XXXXXXXXB
000005H Port 5 Data Register
PDR5
R/W
Port 5
XXXXXXXXB
000006H Port 6 Data Register
PDR6
R/W
Port 6
XXXXXXXXB
000007H Port 7 Data Register
PDR7
R/W
Port 7
XXXXXXXXB
000008H Port 8 Data Register
PDR8
R/W
Port 8
XXXXXXXXB
000009H Port 9 Data Register
PDR9
R/W
Port 9
XXXXXXXXB
00000AH Port A Data Register
PDRA
R/W
Port A
XXXXXXXXB
00000BH Port 5 Analog Input Enable Register
ADER5
R/W
Port 5, A/D
11111111B
00000CH Port 6 Analog Input Enable Register
ADER6
R/W
Port 6, A/D
11111111B
00000DH Port 7 Analog Input Enable Register
ADER7
R/W
Port 7, A/D
11111111B
00000EH Input Level Select Register 0
ILSR0
R/W
Ports
XXXXXXXXB
00000FH Input Level Select Register 1
ILSR1
R/W
Ports
XXXX0XXXB
000010H Port 0 Direction Register
DDR0
R/W
Port 0
00000000B
000011H Port 1 Direction Register
DDR1
R/W
Port 1
00000000B
000012H Port 2 Direction Register
DDR2
R/W
Port 2
00000000B
000013H Port 3 Direction Register
DDR3
R/W
Port 3
00000000B
000014H Port 4 Direction Register
DDR4
R/W
Port 4
00000000B
000015H Port 5 Direction Register
DDR5
R/W
Port 5
00000000B
000016H Port 6 Direction Register
DDR6
R/W
Port 6
00000000B
000017H Port 7 Direction Register
DDR7
R/W
Port 7
00000000B
000018H Port 8 Direction Register
DDR8
R/W
Port 8
00000000B
000019H Port 9 Direction Register
DDR9
R/W
Port 9
00000000B
00001AH Port A Direction Register
DDRA
R/W
Port A
00000100B
00001BH
Reserved
00001CH Port 0 Pull-up Control Register
PUCR0
R/W
Port 0
00000000B
00001DH Port 1 Pull-up Control Register
PUCR1
R/W
Port 1
00000000B
00001EH Port 2 Pull-up Control Register
PUCR2
R/W
Port 2
00000000B
00001FH Port 3 Pull-up Control Register
PUCR3
W, R/W
Port 3
00000000B
(Continued)
31
MB90340E Series
Address
Register
Abbreviation Access Resource name Initial value
000020H Serial Mode Register 0
SMR0
W,R/W
00000000B
000021H Serial Control Register 0
SCR0
W,R/W
00000000B
RDR0/TDR0
R/W
00000000B
SSR0
R,R/W
000022H Reception/Transmission Data Register 0
000023H Serial Status Register 0
ECCR0
R,W,
R/W
000025H Extended Status/Control Register 0
ESCR0
R/W
00000100B
000026H Baud Rate Generator Register 00
BGR00
R/W
00000000B
000027H Baud Rate Generator Register 01
BGR01
R/W
00000000B
000028H Serial Mode Register 1
SMR1
W,R/W
00000000B
000029H Serial Control Register 1
SCR1
W,R/W
00000000B
RDR1/TDR1
R/W
00000000B
SSR1
R,R/W
000024H
Extended Communication Control
Register 0
00001000B
UART0
00002AH Reception/Transmission Data Register 1
00002BH Serial Status Register 1
00001000B
UART1
ECCR1
R,W,
R/W
00002DH Extended Status/Control Register 1
ESCR1
R/W
00000100B
00002EH Baud Rate Generator Register 10
BGR10
R/W
00000000B
00002FH Baud Rate Generator Register 11
BGR11
R/W
00000000B
000030H PPG 0 Operation Mode Control Register
PPGC0
W,R/W
0X000XX1B
000031H PPG 1 Operation Mode Control Register
PPGC1
W,R/W
000032H PPG 0/PPG 1 Count Clock Select Register
PPG01
R/W
000000X0B
0X000XX1B
00002CH
Extended Communication Control
Register 1
000000XXB
000033H
16-bit PPG 0/1
000000XXB
0X000001B
Reserved
000034H PPG 2 Operation Mode Control Register
PPGC2
W,R/W
000035H PPG 3 Operation Mode Control Register
PPGC3
W,R/W
000036H PPG 2/PPG 3 Count Clock Select Register
PPG23
R/W
000000X0B
0X000XX1B
000037H
PPGC4
W,R/W
000039H PPG 5 Operation Mode Control Register
PPGC5
W,R/W
00003AH PPG 4/PPG 5 Clock Select Register
PPG45
R/W
PACSR1
R/W
00003CH PPG 6 Operation Mode Control Register
PPGC6
W,R/W
00003DH PPG 7 Operation Mode Control Register
PPGC7
W,R/W
00003EH PPG 6/PPG 7 Count Clock Control Register
PPG67
R/W
00003FH
0X000001B
Reserved
000038H PPG 4 Operation Mode Control Register
00003BH Address Detect Control Register 1
16-bit PPG 2/3
16-bit PPG 4/5
0X000001B
000000X0B
Address Match
Detection 1
00000000B
0X000XX1B
16-bit PPG 6/7
0X000001B
000000X0B
Reserved
(Continued)
32
MB90340E Series
Address
Register
Abbreviation Access
Resource name
Initial value
000040H PPG 8 Operation Mode Control Register
PPGC8
W,R/W
000041H PPG 9 Operation Mode Control Register
PPGC9
W,R/W
PPG89
R/W
000000X0B
0X000XX1B
000042H
PPG 8/PPG 9 Count Clock Control
Register
000043H
0X000XX1B
16-bit PPG 8/9
0X000001B
Reserved
000044H PPG A Operation Mode Control Register
PPGCA
W,R/W
000045H PPG B Operation Mode Control Register
PPGCB
W,R/W
PPGAB
R/W
000000X0B
0X000XX1B
000046H
PPG A/PPG B Count Clock Select
Register
000047H
16-bit PPG A/B
0X000001B
Reserved
000048H PPG C Operation Mode Control Register
PPGCC
W,R/W
000049H PPG D Operation Mode Control Register
PPGCD
W,R/W
PPGCD
R/W
000000X0B
0X000XX1B
00004AH
PPG C/PPG D Count Clock Select
Register
00004BH
0X000001B
Reserved
00004CH PPG E Operation Mode Control Register
PPGCE
W,R/W
00004DH PPG F Operation Mode Control Register
PPGCF
W,R/W
PPGEF
R/W
00004EH
16-bit PPG C/D
PPG E/PPG F Count Clock Select
Register
00004FH
Reserved
000050H Input Capture Control Status 0/1
ICS01
R/W
000051H Input Capture Edge 0/1
ICE01
R/W, R
000052H Input Capture Control Status 2/3
ICS23
R/W
000053H Input Capture Edge 2/3
ICE23
R
000054H Input Capture Control Status 4/5
ICS45
R/W
000055H Input Capture Edge 4/5
ICE45
R
000056H Input Capture Control Status 6/7
ICS67
R/W
000057H Input Capture Edge 6/7
ICE67
R/W, R
000058H Output Compare Control Status 0
OCS0
R/W
000059H Output Compare Control Status 1
OCS1
R/W
00005AH Output Compare Control Status 2
OCS2
R/W
00005BH Output Compare Control Status 3
OCS3
R/W
00005CH Output Compare Control Status 4
OCS4
R/W
00005DH Output Compare Control Status 5
OCS5
R/W
00005EH Output Compare Control Status 6
OCS6
R/W
00005FH Output Compare Control Status 7
OCS7
R/W
16-bit PPG E/F
0X000001B
000000X0B
Input Capture 0/1
Input Capture 2/3
Input Capture 4/5
Input Capture 6/7
Output Compare 0/1
Output Compare 2/3
Output Compare 4/5
Output Compare 6/7
00000000B
XXX0X0XXB
00000000B
XXXXXXXXB
00000000B
XXXXXXXXB
00000000B
XXX000XXB
0000XX00B
0XX00000B
0000XX00B
0XX00000B
0000XX00B
0XX00000B
0000XX00B
0XX00000B
(Continued)
33
MB90340E Series
Address
Register
Abbreviation
Access
Resource name
Initial value
000060H Timer Control Status 0
TMCSR0
R/W
00000000B
000061H Timer Control Status 0
TMCSR0
R/W
16-bit Reload
Timer 0
000062H Timer Control Status 1
TMCSR1
R/W
000063H Timer Control Status 1
TMCSR1
R/W
000064H Timer Control Status 2
TMCSR2
R/W
000065H Timer Control Status 2
TMCSR2
R/W
000066H Timer Control Status 3
TMCSR3
R/W
000067H Timer Control Status 3
TMCSR3
R/W
000068H A/D Control Status 0
ADCS0
R/W
000XXXX0B
000069H A/D Control Status 1
ADCS1
R/W
0000000XB
00006AH A/D Data 0
ADCR0
R
00006BH A/D Data 1
ADCR1
R
00006CH ADC Setting 0
ADSR0
R/W
00000000B
00006DH ADC Setting 1
ADSR1
R/W
00000000B
00006EH
16-bit Reload
Timer 1
16-bit Reload
Timer 2
16-bit Reload
Timer 3
A/D Converter
00000000B
XXXX0000B
00000000B
XXXX0000B
00000000B
XXXX0000B
00000000B
XXXXXX00B
Reserved
00006FH ROM Mirror Function Select
ROMM
W
ROM Mirror
000070H
to
00008FH
Reserved for CAN Controller 0/1. Refer to “■ CAN CONTROLLERS”
000090H
to
00009AH
Reserved
00009BH
XXXX0000B
DMA Descriptor Channel Specified
Register
XXXXXXX1B
DCSR
R/W
00009CH DMA Status L Register
DSRL
R/W
00009DH DMA Status H Register
DSRH
R/W
PACSR0
R/W
DIRR
R/W
0000A0H Low-power Mode Control Register
LPMCR
W,R/W
Low Power
Control Circuit
00011000B
0000A1H Clock Selection Register
CKSCR
R,R/W
Low Power
Control Circuit
11111100B
R/W
DMA
00000000B
00009EH Address Detect Control Register 0
00009FH
Delayed Interrupt Trigger/Release
Register
0000A2H,
0000A3H
0000A4H DMA Stop Status Register
00000000B
DMA
00000000B
00000000B
Address Match
Detection 0
00000000B
Delayed Interrupt XXXXXXX0B
Reserved
DSSR
(Continued)
34
MB90340E Series
Address
Register
Abbreviation
Access
Resource name
Initial value
0000A5H
Automatic Ready Function Select
Register
ARSR
W
0000A6H
External Address Output Control
Register
HACR
W
0000A7H Bus Control Signal Selection Register
ECSR
W
0000A8H Watchdog Control Register
WDTC
R,W
Watchdog Timer
XXXXX111B
0000A9H Time Base Timer Control Register
TBTC
W,R/W
Time Base Timer
1XX00100B
0000AAH Watch Timer Control Register
WTC
R,R/W
Watch Timer
1X001000B
0000ABH
Reserved
0000ACH DMA Enable L Register
DERL
R/W
0000ADH DMA Enable H Register
DERH
R/W
FMCS
R,R/W
0000AEH
Flash Control Status Register
(Flash memory devices only.
Otherwise reserved)
0011XX00B
External Memory
Access
00000000B
0000000XB
DMA
Flash Memory
00000000B
00000000B
000X0000B
0000AFH
Reserved
0000B0H Interrupt Control Register 00
ICR00
W,R/W
00000111B
0000B1H Interrupt Control Register 01
ICR01
W,R/W
00000111B
0000B2H Interrupt Control Register 02
ICR02
W,R/W
00000111B
0000B3H Interrupt Control Register 03
ICR03
W,R/W
00000111B
0000B4H Interrupt Control Register 04
ICR04
W,R/W
00000111B
0000B5H Interrupt Control Register 05
ICR05
W,R/W
00000111B
0000B6H Interrupt Control Register 06
ICR06
W,R/W
00000111B
0000B7H Interrupt Control Register 07
ICR07
W,R/W
0000B8H Interrupt Control Register 08
ICR08
W,R/W
0000B9H Interrupt Control Register 09
ICR09
W,R/W
00000111B
0000BAH Interrupt Control Register 10
ICR10
W,R/W
00000111B
0000BBH Interrupt Control Register 11
ICR11
W,R/W
00000111B
0000BCH Interrupt Control Register 12
ICR12
W,R/W
00000111B
0000BDH Interrupt Control Register 13
ICR13
W,R/W
00000111B
0000BEH Interrupt Control Register 14
ICR14
W,R/W
00000111B
0000BFH Interrupt Control Register 15
ICR15
W,R/W
00000111B
0000C0H D/A Converter Data 0
DAT0
R/W
XXXXXXXXB
0000C1H D/A Converter Data 1
DAT1
R/W
0000C2H D/A Control 0
DACR0
R/W
0000C3H D/A Control 1
DACR1
R/W
Interrupt Control
D/A Converter
00000111B
00000111B
XXXXXXXXB
XXXXXXX0B
XXXXXXX0B
(Continued)
35
MB90340E Series
Address
Register
Abbreviation Access
Resource name
Initial value
0000C4H,
0000C5H
Reserved
0000C6H External Interrupt Enable 0
ENIR0
R/W
0000C7H External Interrupt Source 0
EIRR0
R/W
0000C8H External Interrupt Level Setting 0
ELVR0
R/W
0000C9H External Interrupt Level Setting 0
ELVR0
R/W
00000000B
0000CAH External Interrupt Enable 1
ENIR1
R/W
00000000B
0000CBH External Interrupt Source 1
EIRR1
R/W
XXXXXXXXB
0000CCH External Interrupt Level Setting 1
ELVR1
R/W
0000CDH External Interrupt Level Setting 1
ELVR1
R/W
00000000B
0000CEH External Interrupt Source Select
EISSR
R/W
00000000B
0000CFH PLL/Sub clock Control Register
PSCCR
W
0000D0H DMA Buffer Address Pointer L Register
BAPL
R/W
XXXXXXXXB
0000D1H DMA Buffer Address Pointer M Register
BAPM
R/W
XXXXXXXXB
0000D2H DMA Buffer Address Pointer H Register
BAPH
R/W
XXXXXXXXB
DMACS
R/W
XXXXXXXXB
0000D3H DMA Control Register
00000000B
External Interrupt 0
External Interrupt 1
PLL
XXXXXXXXB
00000000B
00000000B
XXXX0000B
0000D4H
I/O Register Address Pointer L
Register
IOAL
R/W
0000D5H
I/O Register Address Pointer H
Register
IOAH
R/W
XXXXXXXXB
0000D6H Data Counter L Register
DCTL
R/W
XXXXXXXXB
0000D7H Data Counter H Register
DCTH
R/W
XXXXXXXXB
0000D8H Serial Mode Register 2
SMR2
W,R/W
00000000B
0000D9H Serial Control Register 2
SCR2
W,R/W
00000000B
RDR2/TDR2
R/W
00000000B
SSR2
R,R/W
ECCR2
R,W,
R/W
0000DDH Extended Status Control Register 2
ESCR2
R/W
00000100B
0000DEH Baud Rate Generator Register 20
BGR20
R/W
00000000B
0000DFH Baud Rate Generator Register 21
BGR21
R/W
00000000B
0000DAH
Reception/Transmission Data
Register 2
0000DBH Serial Status Register 2
0000DCH
Extended Communication Control
Register 2
DMA
UART2
0000E0H
to
0000EFH
Reserved for CAN Controller 2. Refer to “■ CAN CONTROLLERS”
0000F0H
to
0000FFH
External
XXXXXXXXB
00001000B
000000XXB
(Continued)
36
MB90340E Series
Address
Register
Abbreviation
Access
Resource name
Initial value
007900H
Reload Register L0
PRLL0
R/W
007901H
Reload Register H0
PRLH0
R/W
007902H
Reload Register L1
PRLL1
R/W
007903H
Reload Register H1
PRLH1
R/W
XXXXXXXXB
007904H
Reload Register L2
PRLL2
R/W
XXXXXXXXB
007905H
Reload Register H2
PRLH2
R/W
007906H
Reload Register L3
PRLL3
R/W
007907H
Reload Register H3
PRLH3
R/W
XXXXXXXXB
007908H
Reload Register L4
PRLL4
R/W
XXXXXXXXB
007909H
Reload Register H4
PRLH4
R/W
00790AH
Reload Register L5
PRLL5
R/W
00790BH
Reload Register H5
PRLH5
R/W
XXXXXXXXB
00790CH Reload Register L6
PRLL6
R/W
XXXXXXXXB
00790DH Reload Register H6
PRLH6
R/W
00790EH
Reload Register L7
PRLL7
R/W
00790FH
Reload Register H7
PRLH7
R/W
XXXXXXXXB
007910H
Reload Register L8
PRLL8
R/W
XXXXXXXXB
007911H
Reload Register H8
PRLH8
R/W
007912H
Reload Register L9
PRLL9
R/W
007913H
Reload Register H9
PRLH9
R/W
XXXXXXXXB
007914H
Reload Register LA
PRLLA
R/W
XXXXXXXXB
007915H
Reload Register HA
PRLHA
R/W
007916H
Reload Register LB
PRLLB
R/W
007917H
Reload Register HB
PRLHB
R/W
XXXXXXXXB
007918H
Reload Register LC
PRLLC
R/W
XXXXXXXXB
007919H
Reload Register HC
PRLHC
R/W
00791AH
Reload Register LD
PRLLD
R/W
00791BH
Reload Register HD
PRLHD
R/W
XXXXXXXXB
00791CH Reload Register LE
PRLLE
R/W
XXXXXXXXB
00791DH Reload Register HE
PRLHE
R/W
00791EH
Reload Register LF
PRLLF
R/W
00791FH
Reload Register HF
PRLHF
R/W
XXXXXXXXB
007920H
Input Capture 0
IPCP0
R
XXXXXXXXB
007921H
Input Capture 0
IPCP0
R
007922H
Input Capture 1
IPCP1
R
007923H
Input Capture 1
IPCP1
R
XXXXXXXXB
16-bit PPG 0/1
16-bit PPG 2/3
16-bit PPG 4/5
16-bit PPG 6/7
16-bit PPG 8/9
16-bit PPG A/B
16-bit PPG C/D
16-bit PPG E/F
Input Capture 0/1
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
(Continued)
37
MB90340E Series
Address
Register
Abbreviation
Access
Resource name
Initial value
007924H Input Capture 2
IPCP2
R
007925H Input Capture 2
IPCP2
R
007926H Input Capture 3
IPCP3
R
007927H Input Capture 3
IPCP3
R
XXXXXXXXB
007928H Input Capture 4
IPCP4
R
XXXXXXXXB
007929H Input Capture 4
IPCP4
R
00792AH Input Capture 5
IPCP5
R
00792BH Input Capture 5
IPCP5
R
XXXXXXXXB
00792CH Input Capture 6
IPCP6
R
XXXXXXXXB
00792DH Input Capture 6
IPCP6
R
00792EH Input Capture 7
IPCP7
R
00792FH Input Capture 7
IPCP7
R
XXXXXXXXB
007930H Output Compare 0
OCCP0
R/W
XXXXXXXXB
007931H Output Compare 0
OCCP0
R/W
007932H Output Compare 1
OCCP1
R/W
007933H Output Compare 1
OCCP1
R/W
XXXXXXXXB
007934H Output Compare 2
OCCP2
R/W
XXXXXXXXB
007935H Output Compare 2
OCCP2
R/W
007936H Output Compare 3
OCCP3
R/W
007937H Output Compare 3
OCCP3
R/W
XXXXXXXXB
007938H Output Compare 4
OCCP4
R/W
XXXXXXXXB
007939H Output Compare 4
OCCP4
R/W
00793AH Output Compare 5
OCCP5
R/W
00793BH Output Compare 5
OCCP5
R/W
XXXXXXXXB
00793CH Output Compare 6
OCCP6
R/W
XXXXXXXXB
00793DH Output Compare 6
OCCP6
R/W
00793EH Output Compare 7
OCCP7
R/W
00793FH Output Compare 7
OCCP7
R/W
XXXXXXXXB
007940H Timer Data 0
TCDT0
R/W
00000000B
007941H Timer Data 0
TCDT0
R/W
007942H Timer Control Status 0
TCCSL0
R/W
007943H Timer Control Status 0
TCCSH0
R/W
0XXXXXXXB
007944H Timer Data 1
TCDT1
R/W
00000000B
007945H Timer Data 1
TCDT1
R/W
007946H Timer Control Status 1
TCCSL1
R/W
007947H Timer Control Status 1
TCCSH1
R/W
XXXXXXXXB
Input Capture 2/3
Input Capture 4/5
Input Capture 6/7
Output Compare 0/1
Output Compare 2/3
Output Compare 4/5
Output Compare 6/7
I/O Timer 0
I/O Timer 1
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
00000000B
00000000B
00000000B
00000000B
0XXXXXXXB
(Continued)
38
MB90340E Series
Address
007948H
Register
Abbreviation Access
R/W
Resource name
Initial value
16-bit Reload
Timer 0
XXXXXXXXB
16-bit Reload
Timer 1
XXXXXXXXB
16-bit Reload
Timer 2
XXXXXXXXB
16-bit Reload
Timer 3
XXXXXXXXB
Timer 0/Reload 0
TMR0/
TMRLR0
Timer 1/Reload 1
TMR1/
TMRLR1
Timer 2/Reload 2
TMR2/
TMRLR2
Timer 3/Reload 3
TMR3/
TMRLR3
R/W
007950H Serial Mode Register 3
SMR3
W,R/W
00000000B
007951H Serial Control Register 3
SCR3
W,R/W
00000000B
RDR3/TDR3
R/W
00000000B
SSR3
R,R/W
Extended Communication Control
Register 3
ECCR3
R,W,
R/W
007955H Extended Status Control Register
ESCR3
R/W
00000100B
007956H Baud Rate Generator Register 30
BGR30
R/W
00000000B
007957H Baud Rate Generator Register 31
BGR31
R/W
00000000B
007958H Serial Mode Register 4
SMR4
W,R/W
00000000B
007959H Serial Control Register 4
SCR4
W,R/W
00000000B
RDR4/TDR4
R/W
00000000B
SSR4
R,R/W
Extended Communication Control
Register 4
ECCR4
R,W,
R/W
00795DH Extended Status Control Register
ESCR4
R/W
00000100B
00795EH Baud Rate Generator Register 40
BGR40
R/W
00000000B
00795FH Baud Rate Generator Register 41
BGR41
R/W
00000000B
007949H
00794AH
00794BH
00794CH
00794DH
00794EH
00794FH
007952H
Reception/Transmission Data
Register 3
007953H Serial Status Register 3
007954H
00795AH
Reception/Transmission Data
Register 4
00795BH Serial Status Register 4
00795CH
007960H
to
00796BH
00796CH Clock Output Enable Register
00796DH
00796EH CAN Direct Mode Register
00796FH CAN Switch Register
R/W
R/W
R/W
R/W
R/W
R/W
UART3
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
00001000B
000000XXB
UART4
00001000B
000000XXB
Reserved
CLKR
R/W
Clock Monitor
XXXX0000B
CDMR
R/W
CAN clock sync
XXXXXXX0B
CANSWR
R/W
CAN 0/1
XXXXXX00B
Reserved
(Continued)
39
MB90340E Series
Address
Register
Abbreviation
Access
007970H I C Bus Status Register 0
IBSR0
R
00000000B
007971H I2C Bus Control Register 0
IBCR0
W,R/W
00000000B
007972H
ITBAL0
R/W
00000000B
ITBAH0
R/W
2
007973H
I2C 10-bit Slave Address Register 0
007974H I C 10-bit Slave Address Mask
007975H Register 0
2
ITMKL0
R/W
Resource name
Initial value
00000000B
2
I C Interface 0
11111111B
ITMKH0
R/W
00111111B
2
ISBA0
R/W
00000000B
2
ISMK0
R/W
01111111B
2
IDAR0
R/W
00000000B
007976H I C 7-bit Slave Address Register 0
007977H I C 7-bit Slave Address Mask Register 0
007978H I C Data Register 0
007979H,
00797AH
Reserved
00797BH I2C Clock Control Register 0
ICCR0
00797CH
to
00797FH
R/W
I2C Interface 0
00011111B
Reserved
007980H I2C Bus Status Register 1
IBSR1
R
00000000B
007981H I C Bus Control Register 1
IBCR1
W,R/W
00000000B
007982H
ITBAL1
R/W
00000000B
ITBAH1
R/W
2
007983H
I2C 10-bit Slave Address Register 1
007984H I2C 10-bit Slave Address Mask
007985H Register 1
00000000B
2
I C Interface 1
ITMKL1
R/W
ITMKH1
R/W
00111111B
007986H I2C 7-bit Slave Address Register 1
ISBA1
R/W
00000000B
007987H I2C 7-bit Slave Address Mask Register 1
ISMK1
R/W
01111111B
IDAR1
R/W
00000000B
2
007988H I C Data Register 1
007989H,
00798AH
00798BH I2C Clock Control Register 1
11111111B
Reserved
ICCR1
R/W
00798CH
to
0079C1H
Reserved
0079C2H
Clock Modulator Control Register
CMCR
Clock Modulator
0079C3H
to
0079DFH
Reserved
I2C Interface 1
00011111B
(Continued)
40
MB90340E Series
(Continued)
Address
Register
Abbreviation Access
Resource name
PADR0
R/W
0079E0H Detect Address Setting 0
0079E1H Detect Address Setting 0
PADR0
R/W
0079E2H Detect Address Setting 0
PADR0
R/W
0079E3H Detect Address Setting 1
PADR1
R/W
Address Match
0079E4H Detect Address Setting 1
PADR1
R/W
Detection 0
0079E5H Detect Address Setting 1
PADR1
R/W
0079E6H Detect Address Setting 2
PADR2
R/W
0079E7H Detect Address Setting 2
PADR2
R/W
0079E8H Detect Address Setting 2
PADR2
R/W
0079E9H
to
Reserved
0079EFH
0079F0H Detect Address Setting 3
PADR3
R/W
0079F1H Detect Address Setting 3
PADR3
R/W
0079F2H Detect Address Setting 3
PADR3
R/W
0079F3H Detect Address Setting 4
PADR4
R/W
Address Match
0079F4H Detect Address Setting 4
PADR4
R/W
Detection 1
0079F5H Detect Address Setting 4
PADR4
R/W
0079F6H Detect Address Setting 5
PADR5
R/W
0079F7H Detect Address Setting 5
PADR5
R/W
0079F8H Detect Address Setting 5
PADR5
R/W
0079F9H
to
Reserved
0079FFH
007A00H
to
Reserved for CAN Controller 0. Refer to “■ CAN CONTROLLERS”
007AFFH
007B00H
to
Reserved for CAN Controller 0. Refer to “■ CAN CONTROLLERS”
007BFFH
007C00H
to
Reserved for CAN Controller 1. Refer to “■ CAN CONTROLLERS”
007CFFH
007D00H
to
Reserved for CAN Controller 1. Refer to “■ CAN CONTROLLERS”
007DFFH
007E00H
to
Reserved for CAN Controller 2. Refer to “■ CAN CONTROLLERS”
007EFFH
007F00H
to
Reserved for CAN Controller 2. Refer to “■ CAN CONTROLLERS”
007FFFH
Initial value
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
Notes : • Initial value of “X” represents unknown value.
• Any write access to reserved addresses in I/O map should not be performed. A read access to reserved
addresses results in reading “X”.
41
MB90340E Series
■ CAN CONTROLLERS
The CAN controller has the following features:
• Conforms to CAN Specification Version 2.0 Part A and B
• Supports transmission/reception in standard frame and extended frame formats
• Supports transmission of data frames by receiving remote frames
• 16 transmission/reception message buffers
• 29-bit ID and 8-byte data
• Multi-level message buffer configuration
• Provides full-bit comparison, full-bit mask, acceptance register 0/acceptance register 1 for each message
buffer as ID acceptance mask
• Two acceptance mask registers in either standard frame format or extended frame formats
• Bit rate programmable from 10 kbps to 2 Mbps (when input clock is at 16 MHz)
List of Control Registers (1)
Address
42
CAN0
CAN1
CAN2
000070H
000080H
0000E0H
000071H
000081H
0000E1H
000072H
000082H
0000E2H
000073H
000083H
0000E3H
000074H
000084H
0000E4H
000075H
000085H
0000E5H
000076H
000086H
0000E6H
000077H
000087H
0000E7H
000078H
000088H
0000E8H
000079H
000089H
0000E9H
00007AH
00008AH
0000EAH
00007BH
00008BH
0000EBH
00007CH
00008CH
0000ECH
00007DH
00008DH
0000EDH
00007EH
00008EH
0000EEH
00007FH
00008FH
0000EFH
Register
Abbreviation
Access
Initial Value
Message Buffer
Valid Register
BVALR
R/W
00000000B
00000000B
Transmit Request
Register
TREQR
R/W
00000000B
00000000B
Transmit Cancel
Register
TCANR
W
00000000B
00000000B
Transmission
Complete Register
TCR
R/W
00000000B
00000000B
Receive Complete
Register
RCR
R/W
00000000B
00000000B
Remote Request
Receiving Register
RRTRR
R/W
00000000B
00000000B
Receive Overrun
Register
ROVRR
R/W
00000000B
00000000B
Reception Interrupt
Enable Register
RIER
R/W
00000000B
00000000B
MB90340E Series
List of Control Registers (2)
Address
CAN0
CAN1
CAN2
007B00H
007D00H
007F00H
007B01H
007D01H
007F01H
007B02H
007D02H
007F02H
007B03H
007D03H
007F03H
007B04H
007D04H
007F04H
007B05H
007D05H
007F05H
007B06H
007D06H
007F06H
007B07H
007D07H
007F07H
007B08H
007D08H
007F08H
007B09H
007D09H
007F09H
007B0AH
007D0AH
007F0AH
007B0BH
007D0BH
007F0BH
007B0CH
007D0CH
007F0CH
007B0DH
007D0DH
007F0DH
007B0EH
007D0EH
007F0EH
007B0FH
007D0FH
007F0FH
007B10H
007D10H
007F10H
007B11H
007D11H
007F11H
007B12H
007D12H
007F12H
007B13H
007D13H
007F13H
007B14H
007D14H
007F14H
007B15H
007D15H
007F15H
007B16H
007D16H
007F16H
007B17H
007D17H
007F17H
007B18H
007D18H
007F18H
007B19H
007D19H
007F19H
007B1AH
007D1AH
007F1AH
007B1BH
007D1BH
007F1BH
Register
Abbreviation
Access
Initial Value
Control Status
Register
CSR
R/W, W
R/W, R
0XXXX0X1B
00XXX000B
Last Event
Indicator Register
LEIR
R/W
000X0000B
XXXXXXXXB
Receive And Transmit
Error Counter
RTEC
R
00000000B
00000000B
Bit Timing
Register
BTR
R/W
11111111B
X1111111B
IDE Register
IDER
R/W
XXXXXXXXB
XXXXXXXXB
Transmit RTR
Register
TRTRR
R/W
00000000B
00000000B
Remote Frame
Receive Waiting
Register
RFWTR
R/W
XXXXXXXXB
XXXXXXXXB
Transmit Interrupt
Enable Register
TIER
R/W
00000000B
00000000B
Acceptance Mask
Select Register
Acceptance Mask
Register 0
Acceptance Mask
Register 1
XXXXXXXXB
XXXXXXXXB
AMSR
R/W
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
AMR0
R/W
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
AMR1
R/W
XXXXXXXXB
XXXXXXXXB
43
MB90340E Series
List of Message Buffers (ID Registers) (1)
Address
44
CAN0
CAN1
CAN2
007A00H
to
007A1FH
007C00H
to
007C1FH
007E00H
to
007E1FH
007A20H
007C20H
007E20H
007A21H
007C21H
007E21H
007A22H
007C22H
007E22H
007A23H
007C23H
007E23H
007A24H
007C24H
007E24H
007A25H
007C25H
007E25H
007A26H
007C26H
007E26H
007A27H
007C27H
007E27H
007A28H
007C28H
007E28H
007A29H
007C29H
007E29H
007A2AH
007C2AH
007E2AH
007A2BH
007C2BH
007E2BH
007A2CH
007C2CH
007E2CH
007A2DH
007C2DH
007E2DH
007A2EH
007C2EH
007E2EH
007A2FH
007C2FH
007E2FH
007A30H
007C30H
007E30H
007A31H
007C31H
007E31H
007A32H
007C32H
007E32H
007A33H
007C33H
007E33H
007A34H
007C34H
007E34H
007A35H
007C35H
007E35H
007A36H
007C36H
007E36H
007A37H
007C37H
007E37H
007A38H
007C38H
007E38H
007A39H
007C39H
007E39H
007A3AH
007C3AH
007E3AH
007A3BH
007C3BH
007E3BH
007A3CH
007C3CH
007E3CH
007A3DH
007C3DH
007E3DH
007A3EH
007C3EH
007E3EH
007A3FH
007C3FH
007E3FH
Register
Abbreviation
Access
Initial Value
GeneralPurpose Ram
⎯
R/W
XXXXXXXXB
to
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
Id Register 0
IDR0
R/W
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
Id Register 1
IDR1
R/W
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
Id Register 2
IDR2
R/W
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
Id Register 3
IDR3
R/W
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
Id Register 4
IDR4
R/W
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
Id Register 5
IDR5
R/W
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
Id Register 6
IDR6
R/W
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
Id Register 7
IDR7
R/W
XXXXXXXXB
XXXXXXXXB
MB90340E Series
List of Message Buffers (ID Registers) (2)
Address
CAN0
CAN1
CAN2
007A40H
007C40H
007E40H
007A41H
007C41H
007E41H
007A42H
007C42H
007E42H
007A43H
007C43H
007E43H
007A44H
007C44H
007E44H
007A45H
007C45H
007E45H
007A46H
007C46H
007E46H
007A47H
007C47H
007E47H
007A48H
007C48H
007E48H
007A49H
007C49H
007E49H
007A4AH
007C4AH
007E4AH
007A4BH
007C4BH
007E4BH
007A4CH
007C4CH
007E4CH
007A4DH
007C4DH
007E4DH
007A4EH
007C4EH
007E4EH
007A4FH
007C4FH
007E4FH
007A50H
007C50H
007E50H
007A51H
007C51H
007E51H
007A52H
007C52H
007E52H
007A53H
007C53H
007E53H
007A54H
007C54H
007E54H
007A55H
007C55H
007E55H
007A56H
007C56H
007E56H
007A57H
007C57H
007E57H
007A58H
007C58H
007E58H
007A59H
007C59H
007E59H
007A5AH
007C5AH
007E5AH
007A5BH
007C5BH
007E5BH
007A5CH
007C5CH
007E5CH
007A5DH
007C5DH
007E5DH
007A5EH
007C5EH
007E5EH
007A5FH
007C5FH
007E5FH
Register
Abbreviation
Access
Initial Value
XXXXXXXXB
XXXXXXXXB
Id Register 8
IDR8
R/W
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
Id Register 9
IDR9
R/W
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
Id Register 10
IDR10
R/W
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
Id Register 11
IDR11
R/W
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
Id Register 12
IDR12
R/W
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
Id Register 13
IDR13
R/W
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
Id Register 14
IDR14
R/W
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
Id Register 15
IDR15
R/W
XXXXXXXXB
XXXXXXXXB
45
MB90340E Series
List of Message Buffers (DLC Registers and Data Registers) (1)
Address
46
CAN0
CAN1
CAN2
007A60H
007C60H
007E60H
007A61H
007C61H
007E61H
007A62H
007C62H
007E62H
007A63H
007C63H
007E63H
007A64H
007C64H
007E64H
007A65H
007C65H
007E65H
007A66H
007C66H
007E66H
007A67H
007C67H
007E67H
007A68H
007C68H
007E68H
007A69H
007C69H
007E69H
007A6AH
007C6AH
007E6AH
007A6BH
007C6BH
007E6BH
007A6CH
007C6CH
007E6CH
007A6DH
007C6DH
007E6DH
007A6EH
007C6EH
007E6EH
007A6FH
007C6FH
007E6FH
007A70H
007C70H
007E70H
007A71H
007C71H
007E71H
007A72H
007C72H
007E72H
007A73H
007C73H
007E73H
007A74H
007C74H
007E74H
007A75H
007C75H
007E75H
007A76H
007C76H
007E76H
007A77H
007C77H
007E77H
007A78H
007C78H
007E78H
007A79H
007C79H
007E79H
007A7AH
007C7AH
007E7AH
007A7BH
007C7BH
007E7BH
007A7CH
007C7CH
007E7CH
007A7DH
007C7DH
007E7DH
007A7EH
007C7EH
007E7EH
007A7FH
007C7FH
007E7FH
Register
Abbreviation
Access
Initial Value
DLC Register 0
DLCR0
R/W
XXXXXXXXB
DLC Register 1
DLCR1
R/W
XXXXXXXXB
DLC Register 2
DLCR2
R/W
XXXXXXXXB
DLC Register 3
DLCR3
R/W
XXXXXXXXB
DLC Register 4
DLCR4
R/W
XXXXXXXXB
DLC Register 5
DLCR5
R/W
XXXXXXXXB
DLC Register 6
DLCR6
R/W
XXXXXXXXB
DLC Register 7
DLCR7
R/W
XXXXXXXXB
DLC Register 8
DLCR8
R/W
XXXXXXXXB
DLC Register 9
DLCR9
R/W
XXXXXXXXB
DLC Register 10
DLCR10
R/W
XXXXXXXXB
DLC Register 11
DLCR11
R/W
XXXXXXXXB
DLC Register 12
DLCR12
R/W
XXXXXXXXB
DLC Register 13
DLCR13
R/W
XXXXXXXXB
DLC Register 14
DLCR14
R/W
XXXXXXXXB
DLC Register 15
DLCR15
R/W
XXXXXXXXB
MB90340E Series
List of Message Buffers (DLC Registers and Data Registers) (2)
Address
Register
Abbreviation
Access
Initial Value
007E80H
to
007E87H
Data Register 0
(8 bytes)
DTR0
R/W
XXXXXXXXB
to
XXXXXXXXB
007C88H
to
007C8FH
007E88H
to
007E8FH
Data Register 1
(8 bytes)
DTR1
R/W
XXXXXXXXB
to
XXXXXXXXB
007A90H
to
007A97H
007C90H
to
007C97H
007E90H
to
007E97H
Data Register 2
(8 bytes)
DTR2
R/W
XXXXXXXXB
to
XXXXXXXXB
007A98H
to
007A9FH
007C98H
to
007C9FH
007E98H
to
007E9FH
Data Register 3
(8 bytes)
DTR3
R/W
XXXXXXXXB
to
XXXXXXXXB
007AA0H
to
007AA7H
007CA0H
to
007CA7H
007EA0H
to
007EA7H
Data Register 4
(8 bytes)
DTR4
R/W
XXXXXXXXB
to
XXXXXXXXB
007AA8H
to
007AAFH
007CA8H
to
007CAFH
007EA8H
to
007EAFH
Data Register 5
(8 bytes)
DTR5
R/W
XXXXXXXXB
to
XXXXXXXXB
007AB0H
to
007AB7H
007CB0H
to
007CB7H
007EB0H
to
007EB7H
Data Register 6
(8 bytes)
DTR6
R/W
XXXXXXXXB
to
XXXXXXXXB
007AB8H
to
007ABFH
007CB8H
to
007CBFH
007EB8H
to
007EBFH
Data Register 7
(8 bytes)
DTR7
R/W
XXXXXXXXB
to
XXXXXXXXB
007AC0H
to
007AC7H
007CC0H
to
007CC7H
007EC0H
to
007EC7H
Data Register 8
(8 bytes)
DTR8
R/W
XXXXXXXXB
to
XXXXXXXXB
007AC8H
to
007ACFH
007CC8H
to
007CCFH
007EC8H
to
007ECFH
Data Register 9
(8 bytes)
DTR9
R/W
XXXXXXXXB
to
XXXXXXXXB
007AD0H
to
007AD7H
007CD0H
to
007CD7H
007ED0H
to
007ED7H
Data Register 10
(8 bytes)
DTR10
R/W
XXXXXXXXB
to
XXXXXXXXB
007AD8H
to
007ADFH
007CD8H
to
007CDFH
007ED8H
to
007EDFH
Data Register 11
(8 bytes)
DTR11
R/W
XXXXXXXXB
to
XXXXXXXXB
007AE0H
to
007AE7H
007CE0H
to
007CE7H
007EE0H
to
007EE7H
Data Register 12
(8 bytes)
DTR12
R/W
XXXXXXXXB
to
XXXXXXXXB
007AE8H
to
007AEFH
007CE8H
to
007CEFH
007EE8H
to
007EEFH
Data Register 13
(8 bytes)
DTR13
R/W
XXXXXXXXB
to
XXXXXXXXB
CAN0
CAN1
CAN2
007A80H
to
007A87H
007C80H
to
007C87H
007A88H
to
007A8FH
47
MB90340E Series
List of Message Buffers (DLC Registers and Data Registers) (3)
Address
48
Register
Abbreviation
Access
Initial Value
007EF0H
to
007EF7H
Data Register 14
(8 bytes)
DTR14
R/W
XXXXXXXXB
to
XXXXXXXXB
007EF8H
to
007EFFH
Data Register 15
(8 bytes)
DTR15
R/W
XXXXXXXXB
to
XXXXXXXXB
CAN0
CAN1
CAN2
007AF0H
to
007AF7H
007CF0H
to
007CF7H
007AF8H
to
007AFFH
007CF8H
to
007CFFH
MB90340E Series
■ INTERRUPT FACTORS, INTERRUPT VECTORS, INTERRUPT CONTROL REGISTER
Interrupt control
register
EI2OS
Support
DMA
channel
number
Number
Address
Number
Address
Reset
N
⎯
#08
FFFFDCH
⎯
⎯
INT9 instruction
N
⎯
#09
FFFFD8H
⎯
⎯
Exception
N
⎯
#10
FFFFD4H
⎯
⎯
CAN 0 RX
N
⎯
#11
FFFFD0H
CAN 0 TX/NS
N
⎯
#12
FFFFCCH
ICR00
0000B0H
CAN 1 RX / Input Capture 6
Y1
⎯
#13
FFFFC8H
CAN 1 TX/NS / Input Capture 7
Y1
⎯
#14
FFFFC4H
ICR01
0000B1H
CAN 2 RX / I2C0
N
⎯
#15
FFFFC0H
CAN 2 TX/NS
N
⎯
#16
FFFFBCH
ICR02
0000B2H
16-bit Reload Timer 0
Y1
0
#17
FFFFB8H
16-bit Reload Timer 1
Y1
1
#18
FFFFB4H
ICR03
0000B3H
16-bit Reload Timer 2
Y1
2
#19
FFFFB0H
16-bit Reload Timer 3
Y1
⎯
#20
FFFFACH
ICR04
0000B4H
PPG 0/1/4/5
N
⎯
#21
FFFFA8H
PPG 2/3/6/7
N
⎯
#22
FFFFA4H
ICR05
0000B5H
PPG 8/9/C/D
N
⎯
#23
FFFFA0H
PPG A/B/E/F
N
⎯
#24
FFFF9CH
ICR06
0000B6H
Time Base Timer
N
⎯
#25
FFFF98H
External Interrupt 0 to 3, 8 to 11
Y1
3
#26
FFFF94H
ICR07
0000B7H
Watch Timer
N
⎯
#27
FFFF90H
External Interrupt 4 to 7, 12 to 15
Y1
4
#28
FFFF8CH
ICR08
0000B8H
A/D Converter
Y1
5
#29
FFFF88H
I/O Timer 0 / I/O Timer 1
N
⎯
#30
FFFF84H
ICR09
0000B9H
Input Capture 4/5 / I2C1
Y1
6
#31
FFFF80H
Output Compare 0/1/4/5
Y1
7
#32
FFFF7CH
ICR10
0000BAH
Input Capture 0 to 3
Y1
8
#33
FFFF78H
Output Compare 2/3/6/7
Y1
9
#34
FFFF74H
ICR11
0000BBH
UART 0 RX
Y2
10
#35
FFFF70H
UART 0 TX
Y1
11
#36
FFFF6CH
ICR12
0000BCH
UART 1 RX / UART 3 RX
Y2
12
#37
FFFF68H
UART 1 TX / UART 3 TX
Y1
13
#38
FFFF64H
ICR13
0000BDH
Interrupt cause
Interrupt vector
(Continued)
49
MB90340E Series
(Continued)
EI2OS
Support
DMA
channel
number
Number
Address
UART 2 RX / UART 4 RX
Y2
14
#39
FFFF60H
UART 2 TX / UART 4 TX
Y1
15
#40
FFFF5CH
Flash Memory
N
⎯
#41
FFFF58H
Delayed Interrupt
N
⎯
#42
FFFF54H
Interrupt cause
Interrupt vector
Interrupt control
register
Number
Address
ICR14
0000BEH
ICR15
0000BFH
Y1 : Usable
Y2 : Usable, with EI2OS stop function
N : Unusable
Notes : • The peripheral resources sharing the ICR register have the same interrupt level.
• When two peripheral resources share the ICR register, only one can use Extended Intelligent I/O Service
at a time.
• When either of the two peripheral resources sharing the ICR register specifies Extended Intelligent I/O
Service, the other one cannot use interrupts.
50
MB90340E Series
■ ELECTRICAL CHARACTERISTICS
1. Absolute Maximum Ratings
Parameter
Symbol
Rating
Unit
Remarks
Min
Max
VCC
VSS − 0.3
VSS + 6.0
V
AVCC
VSS − 0.3
VSS + 6.0
V
VCC = AVCC*2
AVRH,
AVRL
VSS − 0.3
VSS + 6.0
V
AVCC ≥ AVRH, AVCC ≥ AVRL,
AVRH ≥ AVRL
Input voltage*1
VI
VSS − 0.3
VSS + 6.0
V
*3
Output voltage*1
VO
VSS − 0.3
VSS + 6.0
V
*3
ICLAMP
−4.0
+4.0
mA
*5
Σ|ICLAMP|
⎯
40
mA
*5
IOL
⎯
15
mA
*4
“L” level average output current
IOLAV
⎯
4
mA
*4
“L” level maximum overall output current
ΣIOL
⎯
100
mA
*4
“L” level average overall output current
ΣIOLAV
⎯
50
mA
*4
IOH
⎯
−15
mA
*4
“H” level average output current
IOHAV
⎯
−4
mA
*4
“H” level maximum overall output current
ΣIOH
⎯
−100
mA
*4
“H” level average overall output current
ΣIOHAV
⎯
−50
mA
*4
Power consumption
PD
⎯
340
mW MB90F347E
Operating temperature
TA
−40
+105
°C
TSTG
−55
+150
°C
Power supply voltage*1
Maximum Clamp Current
Total Maximum Clamp Current
“L” level maximum output current
“H” level maximum output current
Storage temperature
*1: This parameter is based on VSS = AVSS = 0 V
*2: Set AVCC and VCC to the same voltage. Make sure that AVCC does not exceed VCC and that the voltage at the
analog inputs does not exceed AVCC when the power is switched on.
*3: VI and VO should not exceed VCC + 0.3 V. VI should not exceed the specified ratings. However if the maximum
current to/from an input is limited by some means with external components, the ICLAMP rating supersedes the VI
rating.
*4: Applicable to pins: P00 to P07, P10 to P17, P20 to P27, P30 to P37, P40 to P47, P50 to P57, P60 to P67,
P70 to P77, P80 to P87, P90 to P97, PA0, PA1
*5: • Applicable to pins: P00 to P07, P10 to P17, P20 to P27, P30 to P37, P40 to P47,
P50 to P57 (Evaluation device : P50 to P55) , P60 to P67, P70 to P77, P80 to P87,
P90 to P97, PA0 to PA1
• Use within recommended operating conditions.
• Use with DC voltage (current)
• The +B signal should always be applied by using a limiting resistance placed between the +B signal and the
microcontroller.
• The value of the limiting resistance should be set so that when the +B signal is applied, the input current to
the microcontroller pin does not exceed the rated value, either instantaneously or for prolonged periods.
• Note that when the microcontroller drive current is low, such as in the power saving modes, the +B input
potential may pass through the protective diode and increase the potential at the VCC pin, and this may affect
other devices.
(Continued)
51
MB90340E Series
(Continued)
• Note that if a +B signal is input when the microcontroller power supply is off (not fixed at 0 V) , the power
supply is provided from the pins, so that incomplete operation may result.
• Note that if the +B input is applied during power-on, the power supply is provided from the pins and the
resulting supply voltage may not be sufficient to operate the power-on reset.
• Care must be taken not to leave the +B input pin open.
• Sample recommended circuits:
• Input/output equivalent circuits
Protective diode
VCC
Limiting
resistance
P-ch
+B input (0 V to 16 V)
N-ch
R
WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current,
temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
52
MB90340E Series
2. Recommended Operating Conditions
(VSS = AVSS = 0 V)
Parameter
Symbol
Power supply voltage
VCC,
AVCC
Value
Unit
Remarks
Min
Typ
Max
4.0
5.0
5.5
V
Under normal operation
3.5
5.0
5.5
V
Under normal operation, when not using
the A/D converter and not Flash
programming.
4.5
5.0
5.5
V
When External bus is used.
3.0
⎯
5.5
V
Maintains RAM data in stop mode
Use a ceramic capacitor or capacitor of
better AC characteristics. Capacitor at
the VCC should be greater than this
capacitor.
Smoothing capacitor
CS
0.1
⎯
1.0
µF
Operating temperature
TA
−40
⎯
+105
°C
C Pin Connection Diagram
C
CS
WARNING: The recommended operating conditions are required in order to ensure the normal operation of the
semiconductor device. All of the device’s electrical characteristics are warranted when the device is
operated within these ranges.
Always use semiconductor devices within their recommended operating condition ranges. Operation
outside these ranges may adversely affect reliability and could result in device failure.
No warranty is made with respect to uses, operating conditions, or combinations not represented on
the data sheet. Users considering application outside the listed conditions are advised to contact their
FUJITSU representatives beforehand.
53
MB90340E Series
3. DC Characteristics
(TA = −40 °C to +105 °C, VCC = 5.0 V ± 10%, fCP ≤ 24 MHz, VSS = AVSS = 0 V)
Parameter
Input H
voltage
(At VCC =
5 V ± 10%)
Input L
voltage
(At VCC =
5 V ± 10%)
Symbol
Pin
Condition
Value
Min
Typ
Max
Unit
Remarks
VIHS
⎯
⎯
0.8 VCC
⎯
VCC + 0.3
V
Port inputs if CMOS
hysteresis input levels are
selected (except P12, P44,
P45, P46, P47, P50, P82,
P83)
VIHA
⎯
⎯
0.8 VCC
⎯
VCC + 0.3
V
Port inputs if
Automotive input levels are
selected
VIHT
⎯
⎯
2.0
⎯
VCC + 0.3
V
Port inputs if TTL input levels
are selected
VIHS
⎯
⎯
0.7 VCC
⎯
VCC + 0.3
V
P12, P50, P82, P85
inputs if CMOS input levels
are selected
VIHI
⎯
⎯
0.7 VCC
⎯
VCC + 0.3
V
P44, P45, P46, P47
inputs if CMOS hysteresis
input levels are selected
VIHR
⎯
⎯
0.8 VCC
⎯
VCC + 0.3
V
RST input pin
(CMOS hysteresis)
VIHM
⎯
⎯
VCC − 0.3
⎯
VCC + 0.3
V
MD input pin
VILS
⎯
⎯
VSS − 0.3
⎯
0.2 VCC
V
Port inputs if CMOS
hysteresis input levels are
selected (except P12, P44,
P45, P46, P47, P50, P82,
P83)
VILA
⎯
⎯
VSS − 0.3
⎯
0.5 VCC
V
Port inputs if
Automotive input levels are
selected
VILT
⎯
⎯
VSS − 0.3
⎯
0.8
V
Port inputs if TTL
input levels are selected
VILS
⎯
⎯
VSS − 0.3
⎯
0.3 VCC
V
P12, P50, P82, P85
inputs if CMOS input levels
are selected
VILI
⎯
⎯
VSS − 0.3
⎯
0.3 VCC
V
P44, P45, P46, P47
inputs if CMOS hysteresis
input levels are selected
VILR
⎯
⎯
VSS − 0.3
⎯
0.2 VCC
V
RST input pin
(CMOS hysteresis)
VILM
⎯
⎯
VSS − 0.3
⎯
VSS + 0.3
V
MD input pin
Output H
voltage
VOH
Normal
outputs
VCC = 4.5 V,
VCC − 0.5
IOH = −4.0 mA
⎯
⎯
V
Output H
voltage
VOHI
I2C current VCC = 4.5 V,
VCC − 0.5
outputs
IOH = −3.0 mA
⎯
⎯
V
Output L
voltage
VOL
Normal
outputs
VCC = 4.5 V,
IOL = 4.0 mA
⎯
⎯
0.4
V
Output L
voltage
VOLI
I2C current VCC = 4.5 V,
outputs
IOL = 3.0 mA
⎯
⎯
0.4
V
(Continued)
54
MB90340E Series
(Continued)
Parameter
Input leak current
Pull-up
resistance
Pull-down
resistance
(TA = −40 °C to +105 °C, VCC = 5.0 V ± 10%, fCP ≤ 24 MHz, VSS = AVSS = 0 V)
Symbol
IIL
RUP
RDOWN
Pin
⎯
P00 to P07,
P10 to P17,
P20 to P27,
P30 to P37,
RST
VCC
VCC = 5.0 V,
Internal frequency : 24 MHz,
At normal operation.
VCC = 5.0 V,
Internal frequency : 24 MHz,
At writing Flash memory.
VCC = 5.0 V,
Internal frequency : 24 MHz,
At erasing Flash memory.
VCC = 5.0 V,
Internal frequency : 24 MHz,
In Sleep mode.
VCC = 5.0 V,
Internal frequency : 2 MHz,
In Main Timer mode
VCC = 5.0 V,
Internal frequency : 24 MHz,
In PLL Timer mode,
external frequency = 4 MHz
VCC = 5.0 V
Internal frequency : 8 kHz,
In sub operation
TA = +25°C
VCC = 5.0 V
Internal frequency : 8 kHz,
In sub sleep
TA = +25°C
VCC = 5.0 V
Internal frequency : 8 kHz,
In watch mode
TA = +25°C
VCC = 5.0 V,
In Stop mode,
TA = +25°C
⎯
ICTS
ICCL
ICCLS
ICCT
ICCH
Input capacitance
CIN
⎯
⎯
ICCS
ICTSPLL6
VCC = 5.5 V, VSS < VI < VCC
MD2
ICC
Power supply
current*
Condition
Other than C,
AVCC, AVSS,
AVRH, AVRL,
VCC, VSS
Min
−1
25
Value
Typ Max
⎯
+1
50
Unit Remarks
µA
100
kΩ
25
50
100
Except
Flash
kΩ
memory
devices
⎯
55
70
mA
⎯
70
85
⎯
75
90
⎯
25
35
mA
⎯
0.3
0.8
mA
⎯
4
7
mA
⎯
70
140
µA
⎯
20
50
µA
⎯
10
35
µA
⎯
7
25
µA
⎯
5
15
pF
Flash
mA memory
devices
Flash
mA memory
devices
* : The power supply current is measured with an external clock.
55
MB90340E Series
4. AC Characteristics
(1) Clock Timing
(TA = −40 °C to +105 °C, VCC = 5.0 V ± 10%, fCP ≤ 24 MHz, VSS = AVSS = 0 V)
Parameter
Symbol
Pin
Value
Unit
Remarks
Min
Typ
Max
X0, X1
3
⎯
16
MHz
When using an oscillation
circuit
X0, X1
3
⎯
24
MHz
When using an external
clock*
X0A, X1A
—
32.768
100
kHz
X0, X1
62.5
⎯
333
ns
When using an oscillation
circuit
X0, X1
41.67
⎯
333
ns
When using an external
clock
tCYLL
X0A, X1A
10
30.5
—
µs
PWH, PWL
X0
10
⎯
⎯
ns
PWHL, PWLL
X0A
5
15.2
⎯
µs
Duty ratio is about 30% to
70%.
Input clock rise and fall time
tCR, tCF
X0
⎯
⎯
5
ns
When using external clock
Internal operating clock
frequency (machine clock)
fCP
⎯
1.5
⎯
24
MHz
When using main clock
fCPL
⎯
⎯
8.192
50
kHz
When using sub clock
tCP
⎯
41.67
⎯
666
ns
When using main clock
tCPL
⎯
20
122.1
⎯
µs
When using sub clock
fC
Clock frequency
fCL
tCYL
Clock cycle time
Input clock pulse width
Internal operating clock
cycle time (machine clock)
* : When selecting the PLL clock, the range of clock frequency is limited. Use this product within the range as
mentioned in “Relation between the external clock frequency and machine clock frequency”.
Clock Timing
tCYL
0.8 VCC
X0
0.2 VCC
PWH
PWL
tCF
tCR
tCYLL
0.8 VCC
X0A
0.2 VCC
PWHL
PWLL
tCF
56
tCR
MB90340E Series
Guaranteed PLL operation range
Guaranteed operation range
Power supply voltage
VCC (V)
5.5
Guaranteed A/D Converter
operation range
4.0
3.5
Guaranteed PLL operation range
1.5
24
4
Machine clock fCP (MHz)
Guaranteed operation range of MB90340E series
Guaranteed oscillation frequency range
x6
Internal clock
fCP (MHz)
24
x4
x3
x2
x1
16
x 1/2
(PLL off)
12
8
4.0
1.5
3
4
8
12
16
24
External clock fC (MHz) *
* : When using a crystal oscillator or ceramic oscillator, the maximum oscillation clock frequency is 16 MHz
57
MB90340E Series
(2) Reset Standby Input
(TA = −40 °C to +105 °C, VCC = 5.0 V ± 10%, fCP ≤ 24 MHz, VSS = AVSS = 0.0 V)
Parameter
Symbol
Reset input
time
Value
Pin
tRSTL
RST
Unit
Remarks
Min
Max
500
⎯
ns
Under normal operation
Oscillation time of oscillator*
+ 100 µs
⎯
ns
In Stop mode, Sub Clock
mode, Sub Sleep mode
and Watch mode
100
⎯
µs
In Time Timer mode
* : The oscillation time of the oscillator is the time it takes for the amplitude of the oscillations to reach 90%. For
crystal oscillators, this time is between several ms and several tens of ms, for ceramic oscillators the time is
between several hundred µs and several ms, and for an external clock, the time is 0 ms.
• Under normal operation:
tRSTL
RST
0.2 VCC
0.2 VCC
• In Stop mode, Sub Clock mode, Sub Sleep mode, Watch mode:
tRSTL
RST
0.2 VCC
X0
0.2 VCC
90% of
amplitude
Internal operation
clock
100 µs
Oscillation time
of oscillator
Oscillation stabilization
waiting time
Instruction execution
Internal reset
58
MB90340E Series
(3) Power On Reset
(TA = −40 °C to +105 °C, VCC = 5.0 V ± 10%, fCP ≤ 24 MHz, VSS = AVSS = 0.0 V)
Parameter
Symbol
Pin
Power on rise time
tR
VCC
tOFF
VCC
Power off time
Value
Condition
⎯
Unit
Min
Max
0.05
30
ms
1
⎯
ms
Remarks
Due to repetitive operation
tR
2.7 V
VCC
0.2 V
0.2 V
0.2 V
tOFF
If you change the power supply voltage too rapidly, a power on reset may occur.
We recommend that you startup smoothly by restraining voltages when changing
the power supply voltage during operation, as shown in the figure below. Perform
while not using the PLL clock. However, if voltage drops are within 1 V/s, you can
operate while using the PLL clock.
VCC
We recommend a rise of
50 mV/ms maximum.
3V
Holds RAM data
VSS
(4) Clock Output Timing
(TA = −40 °C to +105 °C, VCC = 5.0 V ± 10%, VSS = 0.0 V, fCP ≤ 24 MHz)
Parameter
Symbol
Pin
Condition
Cycle time
tCYC
CLK
⎯
CLK ↑ → CLK ↓
tCHCL
CLK
⎯
Value
Unit
Remarks
Min
Max
62.5
⎯
ns
fCP = 16 MHz
41.76
⎯
ns
fCP = 24 MHz
20
⎯
ns
fCP = 16 MHz
13
⎯
ns
fCP = 24 MHz
tCYC
tCHCL
CLK
2.4 V
2.4 V
0.8 V
59
MB90340E Series
(5) Bus Timing (Read)
Parameter
ALE pulse width
(TA = −40 °C to +105 °C, VCC = 5.0 V ± 10%, VSS = 0.0 V, fCP ≤ 24 MHz)
Value
Pin
Condition
Unit Remarks
Min
Max
Symbol
ALE
tCP/2 − 10
⎯
ns
ALE, A23 to A16,
AD15 to AD00
tCP/2 − 20
⎯
ns
tCP/2 − 15
⎯
ns
tLHLL
Valid address → ALE ↓ time tAVLL
ALE ↓ → Address valid time tLLAX ALE, AD15 to AD00
Valid address → RD ↓ time
tAVRL
A23 to A16,
AD15 to AD00, RD
tCP − 15
⎯
ns
Valid address → Valid data
input
tAVDV
A23 to A16,
AD15 to AD00
⎯
5 tCP/2 − 60
ns
RD pulse width
tRLRH
RD
3 tCP/2 − 20
⎯
ns
RD ↓ → Valid data input
tRLDV
RD, AD15 to AD00
⎯
3 tCP/2 − 50
ns
RD ↑ → Data hold time
tRHDX RD, AD15 to AD00
0
⎯
ns
RD ↓ → ALE ↑ time
tRHLH
RD, ALE
tCP/2 − 15
⎯
ns
RD ↑ → Address valid time
tRHAX
RD, A23 to A16
tCP/2 − 10
⎯
ns
A23 to A16,
AD15 to AD00, CLK
tCP/2 − 16
⎯
ns
Valid address → CLK ↑ time tAVCH
⎯
RD ↓ → CLK ↑ time
tRLCH
RD, CLK
tCP/2 − 15
⎯
ns
ALE ↓ → RD ↓ time
tLLRL
ALE, RD
tCP/2 − 15
⎯
ns
tRLCH
tAVCH
2.4 V
CLK
2.4 V
tLLAX
tAVLL
ALE
2.4 V
tRHLH
2.4 V
2.4 V
0.8 V
tLHLL
tAVRL
tRLRH
2.4 V
RD
0.8 V
tLLRL
tRHAX
2.4 V
A23 to A16
2.4 V
0.8 V
0.8 V
tRLDV
tRHDX
tAVDV
AD15 to AD00
2.4 V
0.8 V
60
2.4 V
Address
0.8 V
VIH
VIL
VIH
Read data
VIL
MB90340E Series
(6) Bus Timing (Write)
(TA = −40 °C to +105 °C, VCC = 5.0 V ± 10%, VSS = 0.0 V, fCP ≤ 24 MHz)
Value
Pin
Condition
Unit Remarks
Min
Max
Parameter
Symbol
Valid address → WR ↓ time
tAVWL
A23 to A16,
AD15 to AD00,
WR
tCP−15
⎯
ns
WR pulse width
tWLWH
WR
3 tCP/2 − 20
⎯
ns
Valid data output → WR ↑
time
tDVWH
AD15 to AD00,
WR
3 tCP/2 − 20
⎯
ns
WR ↑ → Data hold time
tWHDX
AD15 to AD00,
WR
15
⎯
ns
WR ↑ → Address valid time
tWHAX
A23 to A16,
WR
tCP/2 − 10
⎯
ns
WR ↑ → ALE ↑ time
tWHLH
WR, ALE
tCP/2 − 15
⎯
ns
WR ↓ → CLK ↑ time
tWLCH
WR, CLK
tCP/2 − 15
⎯
ns
⎯
tWLCH
2.4 V
CLK
tWHLH
2.4 V
ALE
tAVWL
tWLWH
2.4 V
WR (WRL, WRH)
0.8 V
tWHAX
A23 to A16
2.4 V
2.4 V
0.8 V
0.8 V
tDVWH
AD15 to AD00
2.4 V
0.8 V
2.4 V
2.4 V
Address
0.8 V
tWHDX
Write data
0.8 V
61
MB90340E Series
(7) Ready Input Timing
Parameter
Symbol
(TA = −40 °C to +105 °C, VCC = 5.0 V ± 10%, VSS = 0.0 V, fCP ≤ 24 MHz)
Rated Value
Test
Pin
Units
Remarks
Condition
Min
Max
RDY setup time
tRYHS
RDY
RDY hold time
tRYHH
RDY
⎯
45
⎯
ns
fCP = 16 MHz
32
⎯
ns
fCP = 24 MHz
0
⎯
ns
Note : If the RDY setup time is insufficient, use the auto-ready function.
2.4 V
CLK
ALE
RD/WR
RDY
When WAIT is not used.
RDY
When WAIT is used.
62
tRYHS
tRYHH
VIH
VIH
VIL
MB90340E Series
(8) Hold Timing
Parameter
Symbol
Pin floating → HAK ↓
time
tXHAL
HAK ↑ time → Pin valid
time
tHAHV
(TA = −40 °C to +105 °C, VCC = 5.0 V ± 10%, VSS = 0.0 V, fCP ≤ 24 MHz)
Value
Pin
Condition
Units
Remarks
Min
Max
HAK
30
tCP
ns
tCP
2 tCP
ns
⎯
HAK
Note : There is more than 1 cycle from when HRQ reads in until the HAK is changed.
2.4 V
HAK
0.8 V
tHAHV
tXHAL
Each pin
2.4 V
0.8 V
Hi-Z
2.4 V
0.8 V
63
MB90340E Series
(9) UART0/1/2/3/4
Parameter
(TA = −40 °C to +105 °C, VCC = 5.0 V ± 10%, VSS = 0.0 V, fCP ≤ 24 MHz)
Value
Symbol
Pin
Condition
Unit Remarks
Min
Max
SCK0 to SCK4
8 tCP
⎯
ns
SCK0 to SCK4,
SOT0 to SOT4 Internal clock
operation output
SCK0 to SCK4, pins are
SIN0 to SIN4 CL = 80 pF + 1 TTL
SCK0 to SCK4,
SIN0 to SIN4
−80
+80
ns
100
⎯
ns
60
⎯
ns
tSHSL
SCK0 to SCK4
4 tCP
⎯
ns
Serial clock “L” pulse width
tSLSH
SCK0 to SCK4
4 tCP
⎯
ns
SCK ↓ → SOT delay time
tSLOV
⎯
150
ns
Valid SIN → SCK ↑
tIVSH
60
⎯
ns
SCK ↑ → Valid SIN hold time
tSHIX
60
⎯
ns
Serial clock cycle time
tSCYC
SCK ↓ → SOT delay time
tSLOV
Valid SIN → SCK ↑
tIVSH
SCK ↑ → Valid SIN hold time
tSHIX
Serial clock “H” pulse width
SCK0 to SCK4, External clock
SOT0 to SOT4 operation output
pins are
SCK0 to SCK4,
CL = 80 pF + 1 TTL
SIN0 to SIN4
SCK0 to SCK4,
SIN0 to SIN4
Notes : • AC characteristic CLK synchronized mode.
• CL is the value of the load capacitance applied to the pins during testing.
Internal Shift Clock Mode
tSCYC
SCK
2.4 V
0.8 V
0.8 V
tSLOV
SOT
2.4 V
0.8 V
tIVSH
SIN
64
tSHIX
VIH
VIH
VIL
VIL
MB90340E Series
External Shift Clock Mode
tSLSH
tSHSL
VIH
VIH
SCK
VIL
VIL
tSLOV
2.4 V
SOT
0.8 V
tIVSH
SIN
tSHIX
VIH
VIH
VIL
VIL
(10) Trigger Input Timing
Parameter
Input pulse width
Symbol
tTRGH
tTRGL
(TA = −40 °C to +105 °C, VCC = 5.0 V ± 10%, fCP ≤ 24 MHz, VSS = 0.0 V)
Value
Pin
Condition
Unit
Remarks
Min
Max
INT0 to INT15,
INT0R to INT15R,
ADTG
⎯
5 tCP
ns
VIH
VIH
INT0 to INT15,
INT0R to INT15R,
ADTG
⎯
VIL
VIL
tTRGH
tTRGL
65
MB90340E Series
(11) Timer Related Resource Input Timing
(TA = −40 °C to +105 °C, VCC = 5.0 V ± 10%, fCP ≤ 24 MHz, VSS = 0 V)
Value
Parameter
Symbol
Pin
Condition
Unit
Remarks
Min
Max
tTIWH
Input pulse width
tTIWL
TIN0 to TIN3,
IN0 to IN7
⎯
ns
VIH
VIH
TIN0 to TIN3,
IN0 to IN7
⎯
4 tCP
VIL
VIL
tTIWH
tTIWL
(12) Timer Related Resource Output Timing
(TA = –40°C to +105°C, VCC = 5.0 V ± 10%, fCP ≤ 24 MHz, VSS = 0.0 V)
Value
Parameter
Symbol
Pin
Condition
Unit
Remarks
Min
Max
CLK ↑ → TOUT change time
CLK
tTO
TOT0 to TOT3,
PPG0 to PPGF
2.4 V
2.4 V
TOT0 to TOT3,
PPG0 to PPGF
0.8 V
tTO
66
⎯
30
⎯
ns
MB90340E Series
(13) I2C Timing
Parameter
Symbol
(TA = –40°C to +105°C, VCC = 5.0 V ± 10%, VSS = 0.0 V)
Standard-mode Fast-mode*1
Condition
Unit
Min
Max
Min
Max
fSCL
0
100
0
400
kHz
tHDSTA
4.0
⎯
0.6
⎯
µs
“L” width of the SCL clock
tLOW
4.7
⎯
1.3
⎯
µs
“H” width of the SCL clock
tHIGH
4.0
⎯
0.6
⎯
µs
Set-up time (repeated) START condition
SCL ↑ → SDA ↓
tSUSTA
4.7
⎯
0.6
⎯
µs
Data hold time
SCL ↓ → SDA ↓ ↑
tHDDAT
0
3.45*3
0
0.9*4
µs
Data set-up time
SDA ↓ ↑ → SCL ↑
tSUDAT
250
⎯
100
⎯
ns
Set-up time for STOP condition
SCL ↑ → SDA ↑
tSUSTO
4.0
⎯
0.6
⎯
µs
tBUS
4.7
⎯
1.3
⎯
µs
SCL clock frequency
Hold time (repeated) START condition
SDA↓ → SCL ↓
Bus free time between a STOP and START
condition
R = 1.7 kΩ,
C = 50 pF*2
*1: For use at over 100 kHz, set the machine clock to at least 6 MHz.
*2: R,C: Pull-up resistor and load capacitor of the SCL and SDA lines.
*3: The maximum tHDDAT meets the requirement that it does not extend the “L” width (tLOW) of the SCL signal.
*4: A Fast-mode I2C-bus device can be used in a Standard-mode I2C-bus system, but the requirement
tSUDAT ≥ 250 ns must then be met.
SDA
tSUDAT
tLOW
tBUS
tHDSTA
SCL
tHDSTA
tHDDAT
tHIGH
tSUSTA
tSUSTO
67
MB90340E Series
5. A/D Converter
(TA = −40 °C to +105 °C, 3.0 V ≤ AVRH − AVRL, VCC = AVCC = 5.0 V ± 10%, fCP ≤ 24 MHz, VSS = AVSS = 0 V)
Parameter
Symbol
Pin
Resolution
⎯
Total error
Value
Unit
Min
Typ
Max
⎯
⎯
⎯
10
bit
⎯
⎯
⎯
⎯
±3.0
LSB
Nonlinearity error
⎯
⎯
⎯
⎯
±2.5
LSB
Differential
nonlinearity error
⎯
⎯
⎯
⎯
±1.9
LSB
Zero reading
voltage
VOT
AN0 to AN23 AVRL − 1.5 AVRL + 0.5 AVRL + 2.5 LSB
Full scale reading
voltage
VFST
AN0 to AN23 AVRH − 3.5 AVRH − 1.5 AVRH + 0.5 LSB
Compare time
⎯
⎯
Sampling time
⎯
⎯
Analog port input
current
IAIN
AN0 to AN23
Analog input
voltage range
VAIN
Reference
voltage range
Power supply
current
1.0
⎯
16500
µs
⎯
∞
µs
−0.3
⎯
+0.3
µA
AN0 to AN23
AVRL
⎯
AVRH
V
⎯
AVRH
AVRL + 2.7
⎯
AVCC
V
⎯
AVRL
0
⎯
AVRH − 2.7
V
IA
AVCC
⎯
3.5
7.5
mA
IAH
AVCC
⎯
⎯
5
µA
2.0
0.5
1.2
Reference
voltage current
IR
AVRH
⎯
600
900
µA
IRH
AVRH
⎯
⎯
5
µA
Offset between
input channels
⎯
AN0 to AN23
⎯
⎯
4
LSB
Remarks
4.5 V ≤ AVCC ≤ 5.5 V
4.0 V ≤ AVCC < 4.5 V
4.5 V ≤ AVCC ≤ 5.5 V
4.0 V ≤ AVCC < 4.5 V
*
*
*: If the A/D convertor is not operating, a current when CPU is stopped is applicable (VCC = AVCC = AVRH = 5.0 V) .
Note: The accuracy gets worse as |AVRH − AVRL| becomes smaller.
68
MB90340E Series
6. Definition of A/D Converter Terms
Resolution
Non linearity
error
Differential
linearity error
Total error
: Analog variation that is recognized by the A/D converter.
: The deviation between the actual conversion characteristics and a line that joins the
zero-transition line ( “00 0000 0000” ← → “00 0000 0001” ) to the full-scale transition line
( “11 1111 1110” ← → “11 1111 1111” ) .
: Deviation of input voltage, which is required for changing output code by 1 LSB, from an
ideal value.
: Difference between the actual value and the ideal value. The total error includes zero
transition error, full-scale transition error, and linear error.
Total error
3FFH
3FEH
Actual conversion
characteristics
1.5 LSB
Digital output
3FDH
{1 LSB × (N − 1) + 0.5 LSB}
004H
VNT
(Actually-measured value)
003H
Actual conversion
characteristics
Ideal characteristics
002H
001H
0.5 LSB
AVRL
AVRH
Analog input
VNT − {1 LSB × (N − 1) + 0.5 LSB}
1 LSB
AVRH − AVRL
1 LSB (Ideal value) =
[V]
1024
Total error of digital output “N” =
[LSB]
N : Value of the digital output from the A/D converter
VOT (Ideal value) = AVRL + 0.5 LSB [V]
VFST (Ideal value) = AVRH − 1.5 LSB [V]
VNT : A voltage at which the digital output transitions from (N − 1) to N.
(Continued)
69
MB90340E Series
(Continued)
Non linearity error
Differential linearity error
Ideal
characteristics
3FFH
Actual conversion
characteristics
{1 LSB × (N − 1)
+ VOT }
Digital output
3FDH
N + 1H
VFST (actual
measurement
value)
VNT (actual
measurement value)
004H
Actual conversion
characteristics
003H
Digital output
3FEH
Actual conversion
characteristics
NH
V (N + 1) T
(actual measurement
value)
VNT
(actual measurement value)
N − 1H
002H
Ideal characteristics
Actual conversion
characteristics
N − 2H
001H
VOT (actual measurement value)
AVRL
AVRH
AVRL
AVRH
Analog input
Analog input
Non linearity error of digital output N =
Differential linearity error of digital output N =
1 LSB =
VNT − {1 LSB × (N − 1) + VOT}
1 LSB
V (N+1) T − VNT
1 LSB
VFST − VOT
1022
−1 LSB [LSB]
[V]
N : Value of the digital output from the A/D converter
VOT : Voltage at which digital output transits from “000H” to “001H.”
VFST : Voltage at which digital output transits from “3FEH” to “3FFH.”
70
[LSB]
MB90340E Series
7. Notes on A/D Converter Section
Use the device with external circuits of the following output impedance for analog inputs :
Recommended output impedance of external circuits are : Approx. 1.5 kΩ or lower (4.0 V ≤ AVCC ≤ 5.5 V,
sampling period = 0.5 µs)
If an external capacitor is used, in consideration of the capacitive voltage dividing effect between the external
capacitor and the internal on-chip capacitor, it is recommended that the capacitance of the external capacitor
be several thousand times greater than the capacitance of the internal capacitor.
If the output impedance of the external circuit is too high, a sampling period for an analog voltage may be
insufficient.
• Analog input circuit model
R
Analog input
Comparator
C
4.5 V ≤ AVCC ≤ 5.5 V : R =: 2.52 kΩ, C =: 10.7 pF
4.0 V ≤ AVCC < 4.5 V : R =: 13.6 kΩ, C =: 10.7 pF
Note : Use the values in the figure only as a guideline.
8. Flash Memory Program/Erase Characteristics
Parameter
Conditions
Sector erase time
Chip erase time
TA = +25 °C
VCC = 5.0 V
Word (16-bit width)
programming time
Value
Unit
Remarks
Min
Typ
Max
⎯
1
15
s
Excludes programming
prior to erasure
⎯
9
⎯
s
Excludes programming
prior to erasure
⎯
16
3600
µs
Except for the over head
time of the system
Program/Erase cycle
⎯
10000
⎯
⎯
cycle
Flash Data Retention
Time
Average
TA = +85 °C
20
⎯
⎯
year
*
* : This value was converted from the results of evaluating the reliability of the technology (using Arrhenius equation
to translate high temperature measurements into normalized value at +85 °C) .
71
MB90340E Series
■ EXAMPLE CHARACTERISTICS
• MB90F346E, MB90F346ES, MB90F346CE, MB90F346CES
ICC − VCC
ICCL − VCC
TA = +25 °C, external clock operation
f = Internal operation frequency
TA = +25 °C, external clock operation
f = Internal operation frequency
100
90
80
70
60
50
40
30
20
10
0
70
60
ICC (mA)
f = 20 MHz
40
f = 16 MHz
f = 12 MHz
f = 10 MHz
f = 8 MHz
f = 4 MHz
f = 2 MHz
30
20
10
0
2.5
3.5
4.5
5.5
ICCL ( A)
f = 24 MHz
50
6.5
f = 8 kHz
2.5
3.5
ICCS − VCC
30
ICCS (mA)
f = 20 MHz
20
f = 16 MHz
f = 12 MHz
f = 10 MHz
f = 8 MHz
15
10
5
ICCLS ( A)
f = 24 MHz
25
f = 4 MHz
f = 2 MHz
3.5
4.5
5.5
6.5
50
45
40
35
30
25
20
15
10
5
0
f = 8 kHz
2.5
3.5
ICCT − VCC
TA = +25 °C, external clock operation
f = Internal operation frequency
f = 2 MHz
200
150
ICCT ( A)
ICTS ( A)
300
250
100
50
4.5
5.5
6.5
20
18
16
14
12
10
8
6
4
2
0
f = 8 kHz
2.5
3.5
VCC (V)
4.5
VCC (V)
72
5.5
6.5
TA = +25 °C, stopped
ICCH ( A)
ICTSPLL6 (mA)
f = 24 MHz
4.5
6.5
ICCH − VCC
TA = +25 °C, external clock operation
f = Internal operation frequency
3.5
5.5
VCC (V)
ICTSPLL6 − VCC
2.5
6.5
TA = +25 °C, external clock operation
f = Internal operation frequency
400
10
9
8
7
6
5
4
3
2
1
0
5.5
ICTS − VCC
350
3.5
4.5
VCC (V)
VCC (V)
0
2.5
6.5
TA = +25 °C, external clock operation
f = Internal operation frequency
35
2.5
5.5
ICCLS − VCC
TA = +25 °C, external clock operation
f = Internal operation frequency
0
4.5
VCC (V)
VCC (V)
10
9
8
7
6
5
4
3
2
1
0
2.5
3.5
4.5
VCC (V)
5.5
6.5
MB90340E Series
• MB90F347E, MB90F347ES, MB90F347CE, MB90F347CES
ICC − VCC
ICCL − VCC
TA = +25 °C, external clock operation
f = Internal operation frequency
TA = +25 °C, external clock operation
f = Internal operation frequency
100
90
80
70
60
50
40
30
20
10
0
70
60
ICC (mA)
f = 20 MHz
40
f = 16 MHz
f = 12 MHz
f = 10 MHz
f = 8 MHz
f = 4 MHz
f = 2 MHz
30
20
10
0
2.5
3.5
4.5
5.5
ICCL ( A)
f = 24 MHz
50
6.5
f = 8 kHz
2.5
3.5
ICCS − VCC
30
ICCS (mA)
f = 20 MHz
20
f = 16 MHz
f = 12 MHz
f = 10 MHz
f = 8 MHz
15
10
5
ICCLS ( A)
f = 24 MHz
25
f = 4 MHz
f = 2 MHz
3.5
4.5
5.5
6.5
50
45
40
35
30
25
20
15
10
5
0
f = 8 kHz
2.5
3.5
ICCT − VCC
TA = +25 °C, external clock operation
f = Internal operation frequency
f = 2 MHz
200
150
ICCT ( A)
300
250
100
50
4.5
5.5
6.5
20
18
16
14
12
10
8
6
4
2
0
f = 8 kHz
2.5
3.5
VCC (V)
4.5
5.5
ICCH − VCC
f = 24 MHz
3.5
4.5
VCC (V)
5.5
6.5
TA = +25 °C, stopped
ICCH ( A)
ICTSPLL6 (mA)
TA = +25 °C, external clock operation
f = Internal operation frequency
2.5
6.5
VCC (V)
ICTSPLL6 − VCC
10
9
8
7
6
5
4
3
2
1
0
6.5
TA = +25 °C, external clock operation
f = Internal operation frequency
400
ICTS ( A)
5.5
ICTS − VCC
350
3.5
4.5
VCC (V)
VCC (V)
0
2.5
6.5
TA = +25 °C, external clock operation
f = Internal operation frequency
35
2.5
5.5
ICCLS − VCC
TA = +25 °C, external clock operation
f = Internal operation frequency
0
4.5
VCC (V)
VCC (V)
10
9
8
7
6
5
4
3
2
1
0
2.5
3.5
4.5
5.5
6.5
VCC (V)
73
MB90340E Series
• MB90F349E, MB90F349ES, MB90F349CE, MB90F349CES
ICC − VCC
ICCL − VCC
TA = +25 °C, external clock operation
f = Internal operation frequency
TA = +25 °C, external clock operation
f = Internal operation frequency
70
60
ICC (mA)
f = 20 MHz
f = 16 MHz
40
f = 12 MHz
f = 10 MHz
f = 8 MHz
30
20
f = 4 MHz
f = 2 MHz
10
0
ICCL (µA)
f = 24 MHz
50
2.5
3.5
4.5
5.5
6.5
100
90
80
70
60
50
40
30
20
10
0
f = 8 kHz
2.5
3.5
ICCS − VCC
f = 24 MHz
25
f = 20 MHz
20
f = 16 MHz
15
f = 12 MHz
f = 10 MHz
f = 8 MHz
10
5
ICCLS (µA)
ICCS (mA)
30
f = 4 MHz
f = 2 MHz
0
4.5
5.5
50
45
40
35
30
25
20
15
10
5
0
f = 8 kHz
2.5
6.5
3.5
ICCT − VCC
TA = +25 °C, external clock operation
f = Internal operation frequency
f = 2 MHz
200
150
ICCT (µA)
ICTS (µA)
300
250
100
50
4.5
5.5
6.5
20
18
16
14
12
10
8
6
4
2
0
f = 8 kHz
2.5
3.5
VCC (V)
4.5
4.5
74
5.5
6.5
TA = +25 °C, stopped
ICCH (µA)
ICTSPLL6 (mA)
f = 24 MHz
VCC (V)
6.5
ICCH − VCC
TA = +25 °C, external clock operation
f = Internal operation frequency
3.5
5.5
VCC (V)
ICTSPLL6 − VCC
2.5
6.5
TA = +25 °C, external clock operation
f = Internal operation frequency
400
10
9
8
7
6
5
4
3
2
1
0
5.5
ICTS − VCC
350
3.5
4.5
VCC (V)
VCC (V)
0
2.5
6.5
TA = +25 °C, external clock operation
f = Internal operation frequency
35
3.5
5.5
ICCLS − VCC
TA = +25 °C, external clock operation
f = Internal operation frequency
2.5
4.5
VCC (V)
VCC (V)
10
9
8
7
6
5
4
3
2
1
0
2.5
3.5
4.5
VCC (V)
5.5
6.5
MB90340E Series
• MB90F342E, MB90F342ES, MB90F342CE, MB90F342CES
ICC − VCC
ICCL − VCC
TA = +25 °C, external clock operation
f = Internal operation frequency
TA = +25 °C, external clock operation
f = Internal operation frequency
70
60
ICC (mA)
f = 20 MHz
f = 16 MHz
40
f = 12 MHz
f = 10 MHz
f = 8 MHz
30
20
f = 4 MHz
f = 2 MHz
10
0
ICCL (µA)
f = 24 MHz
50
2.5
3.5
4.5
5.5
6.5
100
90
80
70
60
50
40
30
20
10
0
f = 8 kHz
2.5
3.5
ICCS − VCC
f = 24 MHz
25
f = 20 MHz
20
f = 16 MHz
15
f = 12 MHz
f = 10 MHz
f = 8 MHz
10
5
ICCLS (µA)
ICCS (mA)
30
f = 4 MHz
f = 2 MHz
0
4.5
5.5
50
45
40
35
30
25
20
15
10
5
0
f = 8 kHz
2.5
6.5
3.5
ICCT − VCC
TA = +25 °C, external clock operation
f = Internal operation frequency
f = 2 MHz
200
150
ICCT (µA)
ICTS (µA)
300
250
100
50
4.5
5.5
6.5
20
18
16
14
12
10
8
6
4
2
0
f = 8 kHz
2.5
3.5
VCC (V)
4.5
4.5
5.5
6.5
TA = +25 °C, stopped
ICCH (µA)
ICTSPLL6 (mA)
f = 24 MHz
VCC (V)
6.5
ICCH − VCC
TA = +25 °C, external clock operation
f = Internal operation frequency
3.5
5.5
VCC (V)
ICTSPLL6 − VCC
2.5
6.5
TA = +25 °C, external clock operation
f = Internal operation frequency
400
10
9
8
7
6
5
4
3
2
1
0
5.5
ICTS − VCC
350
3.5
4.5
VCC (V)
VCC (V)
0
2.5
6.5
TA = +25 °C, external clock operation
f = Internal operation frequency
35
3.5
5.5
ICCLS − VCC
TA = +25 °C, external clock operation
f = Internal operation frequency
2.5
4.5
VCC (V)
VCC (V)
10
9
8
7
6
5
4
3
2
1
0
2.5
3.5
4.5
5.5
6.5
VCC (V)
75
MB90340E Series
• MB90F345E, MB90F345ES, MB90F345CE, MB90F345CES
ICC − VCC
ICCL − VCC
TA = +25 °C, external clock operation
f = Internal operation frequency
TA = +25 °C, external clock operation
f = Internal operation frequency
70
60
ICC (mA)
f = 20 MHz
f = 16 MHz
40
f = 12 MHz
f = 10 MHz
f = 8 MHz
30
20
f = 4 MHz
f = 2 MHz
10
0
ICCL ( A)
f = 24 MHz
50
2.5
3.5
4.5
5.5
100
90
80
70
60
50
40
30
20
10
0
6.5
f = 8 kHz
2.5
3.5
ICCS − VCC
f = 24 MHz
25
f = 20 MHz
20
f = 16 MHz
15
f = 12 MHz
f = 10 MHz
f = 8 MHz
10
ICCLS ( A)
ICCS (mA)
30
f = 4 MHz
f = 2 MHz
5
0
4.5
5.5
50
45
40
35
30
25
20
15
10
5
0
6.5
f = 8 kHz
2.5
3.5
VCC (V)
ICCT − VCC
TA = +25 °C, external clock operation
f = Internal operation frequency
f = 2 MHz
200
150
ICCT ( A)
ICTS ( A)
300
100
50
4.5
5.5
6.5
20
18
16
14
12
10
8
6
4
2
0
f = 8 kHz
2.5
3.5
4.5
VCC (V)
VCC (V)
ICTSPLL6 − VCC
ICCH − VCC
f = 24 MHz
3.5
4.5
VCC (V)
76
5.5
6.5
5.5
6.5
TA = +25 °C, stopped
ICCH ( A)
ICTSPLL6 (mA)
TA = +25 °C, external clock operation
f = Internal operation frequency
2.5
6.5
TA = +25 °C, external clock operation
f = Internal operation frequency
250
10
9
8
7
6
5
4
3
2
1
0
5.5
ICTS − VCC
400
3.5
4.5
VCC (V)
350
0
2.5
6.5
TA = +25 °C, external clock operation
f = Internal operation frequency
35
3.5
5.5
ICCLS − VCC
TA = +25 °C, external clock operation
f = Internal operation frequency
2.5
4.5
VCC (V)
VCC (V)
10
9
8
7
6
5
4
3
2
1
0
2.5
3.5
4.5
VCC (V)
5.5
6.5
MB90340E Series
• MB90346E, MB90346ES, MB90346CE, MB90346CES
ICC − VCC
ICCL − VCC
TA = +25 °C, external clock operation
f = Internal operation frequency
TA = +25 °C, external clock operation
f = Internal operation frequency
70
60
ICC (mA)
f = 20 MHz
f = 16 MHz
40
f = 12 MHz
f = 10 MHz
f = 8 MHz
30
20
f = 4 MHz
f = 2 MHz
10
0
ICCL (µA)
f = 24 MHz
50
2.5
3.5
4.5
5.5
100
90
80
70
60
50
40
30
20
10
0
6.5
f = 8 kHz
2.5
3.5
ICCS − VCC
f = 24 MHz
25
f = 20 MHz
20
f = 16 MHz
15
f = 12 MHz
f = 10 MHz
f = 8 MHz
45
40
35
30
25
20
15
10
5
0
10
f = 4 MHz
5
ICCLS (µA)
ICCS (mA)
50
30
f = 2 MHz
3.5
4.5
5.5
6.5
f = 8 kHz
2.5
3.5
VCC (V)
ICCT − VCC
TA = +25 °C, external clock operation
f = Internal operation frequency
f = 2 MHz
200
150
ICCT (µA)
ICTS (µA)
300
100
50
4.5
5.5
6.5
20
18
16
14
12
10
8
6
4
2
0
f = 8 kHz
2.5
3.5
4.5
VCC (V)
VCC (V)
ICTSPLL6 − VCC
ICCH − VCC
f = 24 MHz
3.5
4.5
VCC (V)
5.5
6.5
5.5
6.5
TA = +25 °C, stopped
ICCH (µA)
ICTSPLL6 (mA)
TA = +25 °C, external clock operation
f = Internal operation frequency
2.5
6.5
TA = +25 °C, external clock operation
f = Internal operation frequency
250
10
9
8
7
6
5
4
3
2
1
0
5.5
ICTS − VCC
400
3.5
4.5
VCC (V)
350
0
2.5
6.5
TA = +25 °C, external clock operation
f = Internal operation frequency
35
2.5
5.5
ICCLS − VCC
TA = +25 °C, external clock operation
f = Internal operation frequency
0
4.5
VCC (V)
VCC (V)
10
9
8
7
6
5
4
3
2
1
0
2.5
3.5
4.5
5.5
6.5
VCC (V)
77
MB90340E Series
• MB90347E, MB90347ES, MB90347CE, MB90347CES
ICC − VCC
ICCL − VCC
TA = +25 °C, external clock operation
f = Internal operation frequency
TA = +25 °C, external clock operation
f = Internal operation frequency
70
60
ICC (mA)
f = 20 MHz
f = 16 MHz
40
f = 12 MHz
f = 10 MHz
f = 8 MHz
30
20
f = 4 MHz
f = 2 MHz
10
0
ICCL (µA)
f = 24 MHz
50
2.5
3.5
4.5
5.5
100
90
80
70
60
50
40
30
20
10
0
6.5
f = 8 kHz
2.5
3.5
ICCS − VCC
f = 24 MHz
25
f = 20 MHz
20
f = 16 MHz
15
f = 12 MHz
f = 10 MHz
f = 8 MHz
45
40
35
30
25
20
15
10
5
0
10
f = 4 MHz
5
ICCLS (µA)
ICCS (mA)
50
30
f = 2 MHz
3.5
4.5
5.5
6.5
f = 8 kHz
2.5
3.5
VCC (V)
ICCT − VCC
TA = +25 °C, external clock operation
f = Internal operation frequency
f = 2 MHz
200
150
ICCT (µA)
ICTS (µA)
300
100
50
4.5
5.5
6.5
20
18
16
14
12
10
8
6
4
2
0
f = 8 kHz
2.5
3.5
4.5
VCC (V)
VCC (V)
ICTSPLL6 − VCC
ICCH − VCC
f = 24 MHz
3.5
4.5
VCC (V)
78
5.5
6.5
5.5
6.5
TA = +25 °C, stopped
ICCH (µA)
ICTSPLL6 (mA)
TA = +25 °C, external clock operation
f = Internal operation frequency
2.5
6.5
ICTS − VCC
250
10
9
8
7
6
5
4
3
2
1
0
5.5
TA = +25 °C, external clock operation
f = Internal operation frequency
400
3.5
4.5
VCC (V)
350
0
2.5
6.5
TA = +25 °C, external clock operation
f = Internal operation frequency
35
2.5
5.5
ICCLS − VCC
TA = +25 °C, external clock operation
f = Internal operation frequency
0
4.5
VCC (V)
VCC (V)
10
9
8
7
6
5
4
3
2
1
0
2.5
3.5
4.5
VCC (V)
5.5
6.5
MB90340E Series
• I/O characteristics
(VCC−VOH) − IOH
VOL − IOL
TA = +25 °C, VCC = 4.5 V
TA = +25 °C, VCC = 4.5 V
800
600
VOL (mV)
VCC VOH (mV)
700
500
400
300
200
100
0
0
1
2
3
4
5
7
6
8
9
1000
900
800
700
600
500
400
300
200
100
0
10
0
1
2
3
Automotive VIN − VCC
VIN (V)
VIN (V)
3.0
3.5
4.0
4.5
5.0
6
5.5
6.0
6.5
7.0
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
2.5
3.0
3.5
4.0
4.5
5.0
4.0
4.5
5.0
VCC (V)
6.0
6.5
7.0
UART-SIN pin, I2C pin
TA = +25 °C
VIN (V)
VIN (V)
5.5
CMOS VIN − VCC
VIHT
VILT
3.5
10
VCC (V)
TA = +25 °C
3.0
9
VILS
TTL VIN − VCC
2.5
8
VIHS
VCC (V)
2.5
2.3
2.0
1.8
1.5
1.3
1.0
0.8
0.5
0.3
0.0
7
Other than UART-SIN pin and I2C pin
TA = +25 °C
VIHA
VILA
2.5
5
CMOS VIN − VCC
TA = +25 °C
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
4
IOL (mA)
IOH (mA)
5.5
6.0
6.5
7.0
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
VIHS
VILS
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
6.5
7.0
VCC (V)
79
MB90340E Series
■ ORDERING INFORMATION
Part number
Package
Remarks
MB90F342EPF
MB90F342ESPF
MB90F342CEPF
100-pin plastic QFP
(FPT-100P-M06)
MB90F342CESPF
MB90F342EPFV
MB90F342ESPFV
MB90F342CEPFV
100-pin plastic LQFP
(FPT-100P-M05)
MB90F342CESPFV
MB90F343EPF
MB90F343ESPF
MB90F343CEPF
100-pin plastic QFP
(FPT-100P-M06)
MB90F343CESPF
MB90F343EPFV
MB90F343ESPFV
MB90F343CEPFV
100-pin plastic LQFP
(FPT-100P-M05)
MB90F343CESPFV
MB90F345EPF
MB90F345ESPF
MB90F345CEPF
100-pin plastic QFP
(FPT-100P-M06)
MB90F345CESPF
MB90F345EPFV
MB90F345ESPFV
MB90F345CEPFV
100-pin plastic LQFP
(FPT-100P-M05)
MB90F345CESPFV
MB90F346EPF
MB90F346ESPF
MB90F346CEPF
100-pin plastic QFP
(FPT-100P-M06)
MB90F346CESPF
MB90F346EPFV
MB90F346ESPFV
MB90F346CEPFV
100-pin plastic LQFP
(FPT-100P-M05)
MB90F346CESPFV
(Continued)
80
MB90340E Series
Part number
Package
Remarks
MB90F347EPF
MB90F347ESPF
MB90F347CEPF
100-pin plastic QFP
(FPT-100P-M06)
MB90F347CESPF
MB90F347EPFV
MB90F347ESPFV
MB90F347CEPFV
100-pin plastic LQFP
(FPT-100P-M05)
MB90F347CESPFV
MB90F349EPF
MB90F349ESPF
MB90F349CEPF
100-pin plastic QFP
(FPT-100P-M06)
MB90F349CESPF
MB90F349EPFV
MB90F349ESPFV
MB90F349CEPFV
100-pin plastic LQFP
(FPT-100P-M05)
MB90F349CESPFV
MB90341EPF
MB90341ESPF
MB90341CEPF
100-pin plastic QFP
(FPT-100P-M06)
MB90341CESPF
MB90341EPFV
MB90341ESPFV
MB90341CEPFV
100-pin plastic LQFP
(FPT-100P-M05)
MB90341CESPFV
MB90342EPF
MB90342ESPF
MB90342CEPF
100-pin plastic QFP
(FPT-100P-M06)
MB90342CESPF
MB90342EPFV
MB90342ESPFV
MB90342CEPFV
100-pin plastic LQFP
(FPT-100P-M05)
MB90342CESPFV
(Continued)
81
MB90340E Series
(Continued)
Part number
Package
Remarks
MB90346EPF
MB90346ESPF
MB90346CEPF
100-pin plastic QFP
(FPT-100P-M06)
MB90346CESPF
MB90346EPFV
MB90346ESPFV
MB90346CEPFV
100-pin plastic LQFP
(FPT-100P-M05)
MB90346CESPFV
MB90347EPF
MB90347ESPF
MB90347CEPF
100-pin plastic QFP
(FPT-100P-M06)
MB90347CESPF
MB90347EPFV
MB90347ESPFV
MB90347CEPFV
100-pin plastic LQFP
(FPT-100P-M05)
MB90347CESPFV
MB90348EPF
MB90348ESPF
MB90348CEPF
100-pin plastic QFP
(FPT-100P-M06)
MB90348CESPF
MB90348EPFV
MB90348ESPFV
MB90348CEPFV
100-pin plastic LQFP
(FPT-100P-M05)
MB90348CESPFV
MB90349EPF
MB90349ESPF
MB90349CEPF
100-pin plastic QFP
(FPT-100P-M06)
MB90349CESPF
MB90349EPFV
MB90349ESPFV
MB90349CEPFV
100-pin plastic LQFP
(FPT-100P-M05)
MB90349CESPFV
MB90V340E-101
MB90V340E-102
82
299-pin Ceramic PGA
(PGA-299C-A01)
For evaluation
MB90340E Series
■ PACKAGE DIMENSIONS
100-pin plastic QFP
Lead pitch
0.65 mm
Package width ×
package length
14.00 × 20.00 mm
Lead shape
Gullwing
Sealing method
Plastic mold
Mounting height
3.35 mm MAX
Code
(Reference)
P-QFP100-14×20-0.65
(FPT-100P-M06)
100-pin plastic QFP
(FPT-100P-M06)
Note 1) * : These dimensions do not include resin protrusion.
Note 2) Pins width and pins thickness include plating thickness.
Note 3) Pins width do not include tie bar cutting remainder.
23.90±0.40(.941±.016)
* 20.00±0.20(.787±.008)
80
51
81
50
0.10(.004)
17.90±0.40
(.705±.016)
*14.00±0.20
(.551±.008)
INDEX
Details of "A" part
100
1
30
0.65(.026)
0.32±0.05
(.013±.002)
0.13(.005)
M
"A"
C
0.25(.010)
+0.35
3.00 –0.20
+.014
.118 –.008
(Mounting height)
0~8˚
31
2002 FUJITSU LIMITED F100008S-c-5-5
0.17±0.06
(.007±.002)
0.80±0.20
(.031±.008)
0.88±0.15
(.035±.006)
0.25±0.20
(.010±.008)
(Stand off)
Dimensions in mm (inches).
Note: The values in parentheses are reference values.
Please confirm the latest Package dimension by following URL.
http://edevice.fujitsu.com/fj/DATASHEET/ef-ovpklv.html
(Continued)
83
MB90340E Series
(Continued)
100-pin plastic LQFP
Lead pitch
0.50 mm
Package width ×
package length
14.0 × 14.0 mm
Lead shape
Gullwing
Sealing method
Plastic mold
Mounting height
1.70 mm MAX
Weight
0.65g
Code
(Reference)
P-LFQFP100-14×14-0.50
(FPT-100P-M05)
100-pin plastic LQFP
(FPT-100P-M05)
Note 1) * : These dimensions do not include resin protrusion.
Note 2) Pins width and pins thickness include plating thickness.
Note 3) Pins width do not include tie bar cutting remainder.
16.00±0.20(.630±.008)SQ
* 14.00±0.10(.551±.004)SQ
75
51
76
50
0.08(.003)
Details of "A" part
+0.20
100
26
1
25
C
0.20±0.05
(.008±.002)
0.08(.003)
M
0.145±0.055
(.0057±.0022)
2003 FUJITSU LIMITED F100007S-c-4-6
Please confirm the latest Package dimension by following URL.
http://edevice.fujitsu.com/fj/DATASHEET/ef-ovpklv.html
84
0.10±0.10
(.004±.004)
(Stand off)
0˚~8˚
"A"
0.50(.020)
+.008
1.50 –0.10 .059 –.004
(Mounting height)
INDEX
0.50±0.20
(.020±.008)
0.60±0.15
(.024±.006)
0.25(.010)
Dimensions in mm (inches).
Note: The values in parentheses are reference values.
MB90340E Series
The information for microcontroller supports is shown in the following homepage.
http://www.fujitsu.com/global/services/microelectronics/product/micom/support/index.html
FUJITSU LIMITED
All Rights Reserved.
The contents of this document are subject to change without notice.
Customers are advised to consult with FUJITSU sales
representatives before ordering.
The information, such as descriptions of function and application
circuit examples, in this document are presented solely for the
purpose of reference to show examples of operations and uses of
Fujitsu semiconductor device; Fujitsu does not warrant proper
operation of the device with respect to use based on such
information. When you develop equipment incorporating the
device based on such information, you must assume any
responsibility arising out of such use of the information. Fujitsu
assumes no liability for any damages whatsoever arising out of
the use of the information.
Any information in this document, including descriptions of
function and schematic diagrams, shall not be construed as license
of the use or exercise of any intellectual property right, such as
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party or does Fujitsu warrant non-infringement of any third-party’s
intellectual property right or other right by using such information.
Fujitsu assumes no liability for any infringement of the intellectual
property rights or other rights of third parties which would result
from the use of information contained herein.
The products described in this document are designed, developed
and manufactured as contemplated for general use, including
without limitation, ordinary industrial use, general office use,
personal use, and household use, but are not designed, developed
and manufactured as contemplated (1) for use accompanying fatal
risks or dangers that, unless extremely high safety is secured, could
have a serious effect to the public, and could lead directly to death,
personal injury, severe physical damage or other loss (i.e., nuclear
reaction control in nuclear facility, aircraft flight control, air traffic
control, mass transport control, medical life support system, missile
launch control in weapon system), or (2) for use requiring
extremely high reliability (i.e., submersible repeater and artificial
satellite).
Please note that Fujitsu will not be liable against you and/or any
third party for any claims or damages arising in connection with
above-mentioned uses of the products.
Any semiconductor devices have an inherent chance of failure. You
must protect against injury, damage or loss from such failures by
incorporating safety design measures into your facility and
equipment such as redundancy, fire protection, and prevention of
over-current levels and other abnormal operating conditions.
If any products described in this document represent goods or
technologies subject to certain restrictions on export under the
Foreign Exchange and Foreign Trade Law of Japan, the prior
authorization by Japanese government will be required for export
of those products from Japan.
Edited
Business Promotion Dept.
F0611