N-Channel Switch 3 • This device is designed for digital switching applications where very low on resistance is mandatory. • Sourced from Process 58. 2 1 TO-92 1. Drain 2. Source 3. Gate 1 SuperSOT-3 Marking: I8 1. Drain 2. Source 3. Gate Absolute Maximum Ratings * TA=25°C unless otherwise noted Symbol VDG Drain-Gate Voltage Parameter Value 25 Units V VGS Gate-Source Voltage -25 V IGF Forward Gate Current 10 mA TJ, Tstg Operating and Storage Junction Temperature Range -55 ~ +150 °C * These ratings are limiting values above which the serviceability of any semiconductor device may be impaired. NOTES: 1) These ratings are based on a maximum junction temperature of 150 degrees C. 2) These are steady state limits. The factory should be consulted on applications involving pulsed or low duty cycle operations. Electrical Characteristics TA=25°C unless otherwise noted Symbol Parameter Off Characteristics Gate-Source Breakdwon Voltage V(BR)GSS Test Condition Min. IG = -10µA, VDS = 0 Max. Units -3.0 -200 nA nA -10 -6.0 -4.0 V V V -25 IGSS Gate Reverse Current VGS = -15V, VDS = 0 VGS = -15V, VDS = 0, TA = 100°C VGS(off) Gate-Source Cutoff Voltage VDS = 15V, ID = 10nA 108 109 110 -3.0 -2.0 -0.5 80 40 10 V On Characteristics IDSS Zero-Gate Voltage Drain Current * VDS = 15V, IGS = 0 108 109 110 rDS(on) Drain-Source On Resistance VDS ≤ 0.1V, VGS = 0 108 109 110 mA mA mA 8.0 12 18 Ω Ω Ω Small Signal Characteristics Cdg(on) Csg(off) Drain Gate & Source Gate On Capacitance VDS = 0, VGS = 0, f = 1.0MHz 85 pF Cdg(on) Drain-Gate Off Capacitance VDS = 0, VGS = -10, f = 1.0MHz 15 pF Csg(off) Source-Gate Off Capacitance VDS = 0, VGS = -10, f = 1.0MHz 15 pF * Pulse Test: Pulse Width ≤ 300µs, Duty Cycle ≤ 2.0% ©2002 Fairchild Semiconductor Corporation Rev. B1, November 2002 J108/J109/J110/MMBFJ108 J108/J109/J110/MMBFJ108 Symbol Parameter Max. J108 - 110 625 5.0 PD Total Device Dissipation Derate above 25°C RθJC Thermal Resistance, Junction to Case 125 RθJA Thermal Resistance, Junction to Ambient 357 *MMBFJ108 350 2.8 Units mW mW/°C °C/W 556 °C/W * Device mounted on FR-4 PCB 1.6” × 1.6” × 0.06" ©2002 Fairchild Semiconductor Corporation Rev. B1, November 2002 J108/J109/J110/MMBFJ108 Thermal Characteristics TA=25°C unless otherwise noted Parameter Interactions - DRAIN CURRENT (mA) - 3.0 V 60 40 - 4.0 V 캜 T A = 25캜 °C 20 TYP V GS(off) = - 5.0 V I D - 1.0 V - 5.0 V 0 0 0.4 0.8 1.2 1.6 VDS - DRAIN-SOURCE VOLTAGE (V) V GS(off) @ V DS = 5.0V, I 100 50 5 I DSS 10 _ _ _ 0.5 1 5 10 - GATE CUTOFF VOLTAGE (V) _ 0.1 VGS (OFF) Figure 2. Parameter Interactions Common Drain-Source Common Drain-Source 50 100 - DRAIN CURRENT (mA) f = 0.1 - 1.0 MHz C iss (V DS = 5.0V) 10 D C rss (VDS = 0 ) 캜 T A = 25캜 °C TYP V GS(off) = - 0.7 V 40 30 V GS = 0 V 20 - 0.1 V - 0.2 V - 0.3 V - 0.4 V - 0.5 V 10 I C ts (C rs ) - CAPACITANCE (pF) 500 = 3.0 nA r DS Figure 1. Common Drain-Source 0 -4 -8 -12 -16 V GS - GATE-SOURCE VOLTAGE (V) 0 -20 0 Figure 3. Common Drain-Source 100 50 20 10 V GS(off) @ 5.0V, 10 µA r DS r DS = V GS 1 -________ V GS(off) 5 2 1 0 0.2 0.4 0.6 0.8 1 VGS /VGS(off)- NORMALIZED GATE-SOURCE VOLTAGE (V) Figure 5. Normalized Drain Resistance vs Bias Voltage ©2002 Fairchild Semiconductor Corporation 1 2 3 4 VDS - DRAIN-SOURCE VOLTAGE (V) 5 Figure 4. Common Drain-Source Noise Voltage vs Frequency e n - NOISE VOLTAGE (nV / √ Hz) Normalized Drain Resistance vs Bias Voltage r DS - NORMALIZED RESISTANCE D 10 _ 2 r DS @ V DS = 100mV, V GS = 0 50 DRAIN CURRENT (mA) 80 1,000 I DSS @ V DS = 5.0V, V GS = 0 PULSED DSS - - 2.0 V V GS = 0 V 100 I Ω) r DS - DRAIN "ON" RESISTANCE (Ω Common Drain-Source 100 100 50 V DG = 10V BW = 6.0 Hz @ f = 10 Hz, 100 Hz = 0.21 @ f ≥ 1.0 kHz 10 5 I D = 1.0 mA I D = 10 mA 1 0.01 0.03 0.1 0.5 1 2 10 f - FREQUENCY (kHz) 100 Figure 6. Noise Voltage vs Frequency Rev. B1, November 2002 J108/J109/J110/MMBFJ108 Typical Characteristics J108/J109/J110/MMBFJ108 Typical Characteristics (Continued) Switching Turn-On Time vs Drain Current Switching Turn-On Time vs Gate-Source Cutoff Voltage 50 TURN-OFF TIME (ns) TA = 25캜 °캜 C VDD = 1.5V 8 V GS(off) = - 12V 6 I D = 30 mA 4 OFF- I D = 10 mA 2 40 V GS(off) = - 8.5V V GS(off) = - 5.5V 30 V GS(off) = - 3.5V 20 캜 TA = 25캜 °C VDD = 1.5V 10 V GS(off) = - 12V t t ON ON - TURN-ON TIME (ns) 10 0 -2 -4 -6 -8 -10 VGS(off) GS(off) - GATE-SOURCE CUTOFF VOLTAGE (V) 0 5 10 15 20 I D - DRAIN CURRENT (mA) 25 Figure 7. Switching Turn-On Time vs Gate-Source Cutoff Voltage Figure 8. Switching Turn-On Time vs Drain Current On Resistance vs Drain Current Output Conductance vs Drain Current 100 V GS = 0 50 V GS(off) = - 3.0V 캜 125캜 °C 캜 °C 125캜 10 캜 °C 25캜 5 °캜 C - 55캜 V GS(off) = - 5.0V 25캜 °캜 C 1 1 10 I D - DRAIN CURRENT (mA) 100 Figure 9. On Resistance vs Drain Current 100 V DG = 5.0V 10V V GS(off) 5.0V 15V 20V - 4.0V 10V 10 5.0V 15V 20V 10V 15V - 2.0V 20V 캜 T A = 25캜 °C f = 1.0 kHz - 1.0V 1 0.1 1 I D - DRAIN CURRENT (mA) 10 Figure 10. Output Conductance vs Drain Current Transconductance vs Drain Current 100 캜 T A = 25캜 °C 캜 T A = - 55캜 °C V DG = 10V 캜 °C T A = 25캜 f = 1.0 kHz 캜 °C T A = 125캜 PD - P O W E R D IS S IP A T IO N (m W ) g fs - TRANSCONDUCTANCE (mmhos) 0 g os - OUTPUT CONDUCTANCE ( µ mhos) Ω) r DS - DRAIN "ON" RESISTANCE (Ω 0 10 V GS(off) = - 1.0V V GS(off) = - 3.0V V GS(off) = - 5.0V 1 0.1 1 I D - DRAIN CURRENT (mA) 10 Figure 11. Transconductance vs Drain Current ©2002 Fairchild Semiconductor Corporation 700 600 500 T O -9 2 S u p e rS O T -3 400 300 200 100 0 0 25 50 75 100 125 150 o TEM PERATURE ( C) Figure 12. Power Dissipation vs Ambient Temperature Rev. B1, November 2002 J108/J109/J110/MMBFJ108 Package Dimensions TO-92 +0.25 4.58 ±0.20 4.58 –0.15 ±0.10 14.47 ±0.40 0.46 1.27TYP [1.27 ±0.20] 1.27TYP [1.27 ±0.20] ±0.20 (0.25) +0.10 0.38 –0.05 1.02 ±0.10 3.86MAX 3.60 +0.10 0.38 –0.05 (R2.29) Dimensions in Millimeters ©2002 Fairchild Semiconductor Corporation Rev. B1, November 2002 J108/J109/J110/MMBFJ108 Package Dimensions (Continued) SuperSOT-3 Dimensions in Millimeters ©2002 Fairchild Semiconductor Corporation Rev. B1, November 2002 TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx™ FACT™ ActiveArray™ FACT Quiet series™ Bottomless™ FAST® FASTr™ CoolFET™ CROSSVOLT™ FRFET™ GlobalOptoisolator™ DOME™ EcoSPARK™ GTO™ E2CMOS™ HiSeC™ EnSigna™ I2C™ Across the board. Around the world.™ The Power Franchise™ Programmable Active Droop™ ImpliedDisconnect™ ISOPLANAR™ LittleFET™ MicroFET™ MicroPak™ MICROWIRE™ MSX™ MSXPro™ OCX™ OCXPro™ OPTOLOGIC® OPTOPLANAR™ PACMAN™ POP™ Power247™ PowerTrench® QFET™ QS™ QT Optoelectronics™ Quiet Series™ RapidConfigure™ RapidConnect™ SILENT SWITCHER® SMART START™ SPM™ Stealth™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TinyLogic™ TruTranslation™ UHC™ UltraFET® VCX™ DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. ©2002 Fairchild Semiconductor Corporation Rev. I1