INA333 www.ti.com ........................................................................................................................................................ SBOS445A – JULY 2008 – REVISED AUGUST 2008 Micro-Power (50µA), Zerø-Drift, Rail-to-Rail Out Instrumentation Amplifier FEATURES DESCRIPTION 1 • • • • • • • • • • • • 2 LOW OFFSET VOLTAGE: 25µV (max), G ≥ 100 LOW DRIFT: 0.1µV/°C, G ≥ 100 LOW NOISE: 50nV/√Hz, G ≥ 100 HIGH CMRR: 100dB (min), G ≥ 10 LOW INPUT BIAS CURRENT: 200pA (max) SUPPLY RANGE: +1.8V to +5.5V INPUT VOLTAGE: (V–) +0.1V to (V+) –0.1V OUTPUT RANGE: (V–) +0.05V to (V+) –0.05V LOW QUIESCENT CURRENT: 50µA OPERATING TEMPERATURE: –40°C to +125°C RFI FILTERED INPUTS MSOP-8 AND DFN-8 PACKAGES The INA333 is a low-power, precision instrumentation amplifier offering excellent accuracy. The versatile 3-op amp design, small size, and low power make it ideal for a wide range of portable applications. A single external resistor sets any gain from 1 to 1000. The INA333 is designed to use an industry-standard gain equation: G = 1 + (100kΩ/RG). The INA333 provides very low offset voltage (25µV, G ≥ 100), excellent offset voltage drift (0.1µV/°C, G ≥ 100), and high common-mode rejection (100dB at G ≥ 10). It operates with power supplies as low as 1.8V (±0.9V), and quiescent current is only 50µA—ideal for battery-operated systems. Using autocalibration techniques to ensure excellent precision over the extended industrial temperature range, the INA333 also offers exceptionally low noise density (50nV/√Hz) that extends down to dc. APPLICATIONS • • • • • • • • • BRIDGE AMPLIFIERS ECG AMPLIFIERS PRESSURE SENSORS MEDICAL INSTRUMENTATION PORTABLE INSTRUMENTATION WEIGH SCALES THERMOCOUPLE AMPLIFIERS RTD SENSOR AMPLIFIERS DATA ACQUISITION The INA333 is available in both MSOP-8 and DFN-8 surface-mount packages and is specified over the TA = –40°C to +125°C temperature range. blank Sample Request Click Here V+ 7 VIN- 2 RFI Filtered Inputs 150kW 150kW A1 1 RFI Filtered Inputs 50kW 6 A3 RG VOUT 50kW 8 RFI Filtered Inputs VIN+ 3 150kW 150kW 5 A2 REF RFI Filtered Inputs INA333 4 V- G=1+ 100kW RG 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2008, Texas Instruments Incorporated INA333 SBOS445A – JULY 2008 – REVISED AUGUST 2008 ........................................................................................................................................................ www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. PACKAGE/ORDERING INFORMATION (1) PRODUCT PACKAGE-LEAD PACKAGE DESIGNATOR MSOP-8 DGK I333 DFN-8 (2) DRG I333A INA333 (1) (2) PACKAGE MARKING For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the TI web site at www.ti.com. Available Q4, 2008. ABSOLUTE MAXIMUM RATINGS (1) INA333 UNIT +7 V (V–) – 0.3 to (V+) + 0.3 V Supply voltage Analog input voltage range (2) Output short-circuit (3) Continuous Operating temperature range, TA –40 to +150 °C Storage temperature range, TA –65 to +150 °C +150 °C Human body model (HBM) 4000 V Charged device model (CDM) 1000 V Machine model (MM) 200 V Junction temperature, TJ ESD rating (1) (2) (3) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those specified is not implied. Input terminals are diode-clamped to the power-supply rails. Input signals that can swing more than 0.3V beyond the supply rails should be current limited to 10mA or less. Short-circuit to ground. PIN CONFIGURATIONS DGK PACKAGE MSOP-8 (TOP VIEW) DRG PACKAGE DFN-8 (TOP VIEW) RG 1 8 RG VIN- 2 7 V+ VIN+ 3 6 VOUT V- 4 5 REF RG 1 VIN- 2 VIN+ 3 V- 4 Exposed Thermal Die Pad on Underside 8 RG 7 V+ 6 VOUT 5 REF INA333 INA333 2 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): INA333 INA333 www.ti.com ........................................................................................................................................................ SBOS445A – JULY 2008 – REVISED AUGUST 2008 ELECTRICAL CHARACTERISTICS: VS = +1.8V to +5.5V Boldface limits apply over the specified temperature range, TA = –40°C to +125°C. At TA = +25°C, RL = 10kΩ, VREF = VS/2, and G = 1, unless otherwise noted. INA333 PARAMETER TEST CONDITIONS MIN TYP MAX UNIT ±10 ±25/G ±25 ±75/G µV ±0.1 ±0.5/G µV/°C ±5 ±15/G µV/V INPUT (1) Offset voltage, RTI (2) VOSI vs Temperature vs Power supply PSR 1.8V ≤ VS ≤ 5.5V ±1 ±5/G Long-term stability See note Turn-on time to specified VOSI (3) See Typical characteristics Impedance Differential ZIN 100 || 3 Common-mode ZIN 100 || 3 Common-mode voltage range Common-mode rejection VCM VO = 0V CMR DC to 60Hz (V–) + 0.1 GΩ || pF GΩ || pF (V+) – 0.1 V G=1 VCM = (V–) + 0.1V to (V+) – 0.1V 80 90 dB G = 10 VCM = (V–) + 0.1V to (V+) – 0.1V 100 110 dB G = 100 VCM = (V–) + 0.1V to (V+) – 0.1V 100 115 dB G = 1000 VCM = (V–) + 0.1V to (V+) – 0.1V 100 115 dB INPUT BIAS CURRENT Input bias current IB ±70 vs Temperature Input offset current ±200 See Typical Characteristic curve IOS ±50 vs Temperature ±200 pA pA/°C pA See Typical Characteristic curve pA/°C f = 10Hz 50 nV/√Hz f = 100Hz 50 nV/√Hz f = 1kHz 50 nV/√Hz f = 0.1Hz to 10Hz 1 µVPP 100 fA/√Hz 2 pAPP INPUT VOLTAGE NOISE Input voltage noise Input current noise eNI G = 100, RS = 0Ω iN f = 10Hz f = 0.1Hz to 10Hz GAIN Gain equation G 1 + (100kΩ/RG) Range of gain Gain error (1) (2) (3) 1 V/V 1000 V/V VS = 5.5V, (V–) + 100mV ≤ VO ≤ (V+) – 100mV G=1 ±0.01 ±0.1 % G = 10 ±0.05 ±0.25 % G = 100 ±0.07 ±0.25 % G = 1000 ±0.25 ±0.5 % Total VOS, Referred-to-input = (VOSI) + (VOSO/G). RTI = Referred-to-input. 300-hour life test at +150°C demonstrated randomly distributed variation of approximately 1µV. Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): INA333 3 INA333 SBOS445A – JULY 2008 – REVISED AUGUST 2008 ........................................................................................................................................................ www.ti.com ELECTRICAL CHARACTERISTICS: VS = +1.8V to +5.5V (continued) Boldface limits apply over the specified temperature range, TA = –40°C to +125°C. At TA = +25°C, RL = 10kΩ, VREF = VS/2, and G = 1, unless otherwise noted. INA333 PARAMETER TEST CONDITIONS MIN TYP MAX UNIT GAIN (continued) Gain vs Temperature G=1 ±1 ±5 ppm/°C G > 1 (4) ±15 ±50 ppm/°C VS = 5.5V, (V–) + 100mV ≤ VO ≤ (V+) – 100mV Gain nonlinearity G = 1 to 1000 RL = 10kΩ 10 ppm OUTPUT Output voltage swing from rail (5) VS = 5.5V, RL = 10kΩ See note Capacitive load drive (5) 50 mV 500 pF –40, +5 mA G=1 150 kHz G = 10 35 kHz G = 100 3.5 kHz G = 1000 350 Hz G=1 0.16 V/µs G = 100 0.05 V/µs Short-circuit current ISC Continuous to common FREQUENCY RESPONSE Bandwidth, –3dB Slew rate SR Settling time to 0.01% VS = 5V, VO = 4V Step tS G=1 VSTEP = 4V 50 µs G = 100 VSTEP = 4V 400 µs Settling time to 0.001% tS G=1 VSTEP = 4V 60 µs G = 100 VSTEP = 4V 500 µs 50% overdrive 75 µs Overload recovery REFERENCE INPUT RIN 300 Voltage range V– kΩ V+ V V POWER SUPPLY Voltage range Single +1.8 +5.5 Dual ±0.9 ±2.75 V 75 µA 80 µA Quiescent current IQ VIN = VS/2 50 vs Temperature TEMPERATURE RANGE Specified temperature range –40 +125 °C Operating temperature range –40 +150 °C Thermal resistance (4) (5) 4 θJA MSOP 100 °C/W DFN 65 °C/W Does not include effects of external resistor RG. See Typical Characteristics curve, Output Voltage Swing vs Output Current (Figure 29). Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): INA333 INA333 www.ti.com ........................................................................................................................................................ SBOS445A – JULY 2008 – REVISED AUGUST 2008 TYPICAL CHARACTERISTICS At TA = +25°C, VS = 5V, RL = 10kΩ, VREF = midsupply, and G = 1, unless otherwise noted. INPUT VOLTAGE OFFSET DRIFT (–40°C to +125°C) INPUT OFFSET VOLTAGE VS = 5.5V -25.0 -22.5 -20.0 -17.5 -15.0 -12.5 -10.0 -7.5 -5.0 -2.5 0 2.5 5.0 7.5 10.0 12.5 15.0 17.5 20.0 22.5 25.0 -0.10 -0.09 -0.08 -0.07 -0.06 -0.05 -0.04 -0.03 -0.02 -0.01 0 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.10 Population Population VS = 5.5V Input Offset Voltage (mV) Input Voltage Offset Drift (mV/°C) Figure 1. Figure 2. OUTPUT OFFSET VOLTAGE OUTPUT VOLTAGE OFFSET DRIFT (–40°C to +125°C) VS = 5.5V -75.0 -67.5 -60.0 -52.5 -45.0 -37.5 -30.0 -22.5 -15.0 -7.5 0 7.5 15.0 22.5 30.0 37.5 45.0 52.5 60.0 67.5 75.0 -0.50 -0.45 -0.40 -0.35 -0.30 -0.25 -0.20 -0.15 -0.10 -0.05 0 0.05 0.10 0.15 0.20 0.25 0.30 0.35 0.40 0.45 0.50 Population Population VS = 5.5V Output Offset Voltage (mV) Output Voltage Offset Drift (mV/°C) Figure 3. Figure 4. OFFSET VOLTAGE vs COMMON-MODE VOLTAGE 0.1Hz TO 10Hz NOISE 0 Gain = 1 VS = 1.8V -5 Noise (1mV/div) VOS (mV) VS = 5V -10 -15 -20 -25 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 Time (1s/div) VCM (V) Figure 5. Figure 6. Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): INA333 5 INA333 SBOS445A – JULY 2008 – REVISED AUGUST 2008 ........................................................................................................................................................ www.ti.com TYPICAL CHARACTERISTICS (continued) At TA = +25°C, VS = 5V, RL = 10kΩ, VREF = midsupply, and G = 1, unless otherwise noted. 0.1Hz TO 10Hz NOISE SPECTRAL NOISE DENSITY 1000 Noise (0.5mV/div) 1000 Output Noise 100 100 Current Noise Input Noise 10 10 2 (Input Noise) + Total Input-Referred Noise = (Output Noise) 2 G 1 1 0.1 Time (1s/div) Current Noise Density (fA/ÖHz) Voltage Noise Density (nV/ÖHz) Gain = 100 1 10 100 1k 10k Frequency (Hz) Figure 7. Figure 8. NONLINEARITY ERROR LARGE SIGNAL RESPONSE G = 1000 G = 100 G = 10 G=1 0.008 Gain = 1 VS = ±2.75V Output Voltage (1V/div) DC Output Nonlinearity Error (%FSR) 0.012 0.004 0 -0.004 -0.008 -0.012 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 Time (25ms/div) 5.5 VOUT (V) Figure 9. Figure 10. LARGE-SIGNAL STEP RESPONSE SMALL-SIGNAL STEP RESPONSE Gain = 1 Output Voltage (1V/div) Output Voltage (50mV/div) Gain = 100 6 Time (100ms/div) Time (10ms/div) Figure 11. Figure 12. Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): INA333 INA333 www.ti.com ........................................................................................................................................................ SBOS445A – JULY 2008 – REVISED AUGUST 2008 TYPICAL CHARACTERISTICS (continued) At TA = +25°C, VS = 5V, RL = 10kΩ, VREF = midsupply, and G = 1, unless otherwise noted. SMALL-SIGNAL STEP RESPONSE SETTLING TIME vs GAIN 10000 Output Voltage (50mV/div) Gain = 100 Time (ms) 1000 0.001% 100 0.01% 0.1% 10 Time (100ms/div) 1 1000 100 10 Gain (V/V) Figure 13. Figure 14. STARTUP SETTLING TIME GAIN vs FREQUENCY 80 Gain = 1 G = 1000 Supply 60 40 Gain (dB) Supply (1V/div) VOUT (50mV/div) VOUT G = 100 G = 10 20 G=1 0 -20 -40 -60 Time (50ms/div) 10 100 10k 1k 100k 1M Frequency (Hz) Figure 15. Figure 16. COMMON-MODE REJECTION RATIO COMMON-MODE REJECTION RATIO vs TEMPERATURE 10 VS = 5.5V VS = ±2.75V 8 G=1 VS = ±0.9V Population CMRR (mV/V) 6 4 G = 10 2 0 -2 -4 G = 100, G = 1000 -6 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 -8 -10 -50 CMRR (mV/V) Figure 17. -25 0 25 50 75 100 125 150 Temperature (°C) Figure 18. Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): INA333 7 INA333 SBOS445A – JULY 2008 – REVISED AUGUST 2008 ........................................................................................................................................................ www.ti.com TYPICAL CHARACTERISTICS (continued) At TA = +25°C, VS = 5V, RL = 10kΩ, VREF = midsupply, and G = 1, unless otherwise noted. COMMON-MODE REJECTION RATIO vs FREQUENCY 140 2.0 Common-Mode Voltage (V) 2.5 G = 1000 120 CMRR (dB) TYPICAL COMMON-MODE RANGE vs OUTPUT VOLTAGE 160 G = 100 100 80 60 G=1 40 G = 10 20 1.0 All Gains 0 -1.0 -2.0 2.5 -2.5 -2.0 0 10 100k 10k 1k 100 0 -1.0 2.0 1.0 2.5 Frequency (Hz) Output Voltage (V) Figure 19. Figure 20. TYPICAL COMMON-MODE RANGE vs OUTPUT VOLTAGE TYPICAL COMMON-MODE RANGE vs OUTPUT VOLTAGE 5 0.9 VS = +5V VREF = 0 VS = ±0.9V VREF = 0 0.7 Common-Mode Voltage (V) Common-Mode Voltage (V) VS = ±2.5V VREF = 0 4 3 All Gains 2 1 0.5 0.3 0.1 All Gains -0.1 -0.3 -0.5 -0.7 -0.9 -0.9 0 0 3 2 1 5 4 -0.3 -0.1 0.1 0.3 Figure 21. Figure 22. 1.8 0.5 0.7 0.9 POSITIVE POWER-SUPPLY REJECTION RATIO 160 VS = +1.8V VREF = 0 1.6 VS = 5V 140 1.4 120 G = 1000 1.2 1.0 +PSRR (dB) Common-Mode Voltage (V) -0.5 Output Voltage (V) TYPICAL COMMON-MODE RANGE vs OUTPUT VOLTAGE All Gains 0.8 0.6 100 G = 100 80 60 G = 10 40 0.4 G=1 20 0.2 0 0 0 8 -0.7 Output Voltage (V) 0.2 0.4 0.5 0.8 1.0 1.2 1.4 1.6 1.8 10 100 1k 10k Output Voltage (V) Frequency (Hz) Figure 23. Figure 24. Submit Documentation Feedback 100k 1M Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): INA333 INA333 www.ti.com ........................................................................................................................................................ SBOS445A – JULY 2008 – REVISED AUGUST 2008 TYPICAL CHARACTERISTICS (continued) At TA = +25°C, VS = 5V, RL = 10kΩ, VREF = midsupply, and G = 1, unless otherwise noted. NEGATIVE POWER-SUPPLY REJECTION RATIO 160 140 G = 1000 -IB 800 100 600 IB (pA) 80 +IB 1000 G = 100 120 -PSRR (dB) INPUT BIAS CURRENT vs TEMPERATURE 1200 VS = 5V G = 10 60 400 VS = ±0.9V 40 VS = ±2.75V 200 G=1 20 0 0 -20 -200 0.1 10 1 100 1k 10k 100k 1M -50 25 0 -25 Frequency (Hz) 75 50 100 125 150 Temperature (°C) Figure 25. Figure 26. | INPUT BIAS CURRENT | vs COMMON-MODE VOLTAGE INPUT OFFSET CURRENT vs TEMPERATURE 200 250 180 200 160 150 120 IOS (pA) | IB | (pA) 140 100 80 60 100 VS = ±2.75V 50 0 VS = 5V 40 VS = ±0.9V -50 20 VS = 1.8V 0 0 0.5 1.0 1.5 2.0 -100 2.5 3.0 3.5 4.0 4.5 5.0 -50 0 25 75 50 Temperature (°C) Figure 27. Figure 28. OUTPUT VOLTAGE SWING vs OUTPUT CURRENT 100 125 150 QUIESCENT CURRENT vs TEMPERATURE 80 (V+) (V+) - 0.25 (V+) - 0.50 (V+) - 0.75 (V+) - 1.00 (V+) - 1.25 (V+) - 1.50 (V+) - 1.75 VS = ±2.75V 70 VS = ±0.9V VS = 5V 60 50 IQ (mA) VOUT (V) -25 VCM (V) (V-) + 1.75 (V-) + 1.50 (V-) + 1.25 (V-) + 1.00 (V-) + 0.75 (V-) + 0.50 (V-) + 0.25 (V-) 40 VS = 1.8V 30 20 +125°C +25°C -40°C 0 10 20 30 40 50 10 0 60 -50 -25 0 25 50 75 100 125 150 Temperature (°C) IOUT (mA) Figure 29. Figure 30. Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): INA333 9 INA333 SBOS445A – JULY 2008 – REVISED AUGUST 2008 ........................................................................................................................................................ www.ti.com TYPICAL CHARACTERISTICS (continued) At TA = +25°C, VS = 5V, RL = 10kΩ, VREF = midsupply, and G = 1, unless otherwise noted. QUIESCENT CURRENT vs COMMON-MODE VOLTAGE 80 70 VS = 5V 60 IQ (mA) 50 40 VS = 1.8V 30 20 10 0 0 1.0 3.0 2.0 4.0 5.0 VCM (V) Figure 31. 10 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): INA333 INA333 www.ti.com ........................................................................................................................................................ SBOS445A – JULY 2008 – REVISED AUGUST 2008 APPLICATION INFORMATION Figure 32 shows the basic connections required for operation of the INA333. Good layout practice mandates the use of bypass capacitors placed close to the device pins as shown. Table 1 lists several commonly-used gains and resistor values. The 100kΩ term in Equation 1 comes from the sum of the two internal feedback resistors of A1 and A2. These on-chip resistors are laser trimmed to accurate absolute values. The accuracy and temperature coefficient of these resistors are included in the gain accuracy and drift specifications of the INA333. The output of the INA333 is referred to the output reference (REF) terminal, which is normally grounded. This connection must be low-impedance to assure good common-mode rejection. Although 15Ω or less of stray resistance can be tolerated while maintaining specified CMRR, small stray resistances of tens of ohms in series with the REF pin can cause noticeable degradation in CMRR. The stability and temperature drift of the external gain setting resistor, RG, also affects gain. The contribution of RG to gain accuracy and drift can be directly inferred from the gain Equation 1. Low resistor values required for high gain can make wiring resistance important. Sockets add to the wiring resistance and contribute additional gain error (possibly an unstable gain error) in gains of approximately 100 or greater. To ensure stability, avoid parasitic capacitance of more than a few picofarads at the RG connections. Careful matching of any parasitics on both RG pins maintains optimal CMRR over frequency. SETTING THE GAIN Gain of the INA333 is set by a single external resistor, RG, connected between pins 1 and 8. The value of RG is selected according to Equation 1: G = 1 + (100kΩ/RG) (1) V+ 0.1mF 7 VIN- 2 RFI Filter 150kW 150kW A1 VO = G ´ (VIN+ - VIN-) RFI Filter 1 50kW RG G=1+ 6 A3 50kW + 8 Load VO RFI Filter VIN+ 100kW RG 150kW 150kW A2 3 - 5 Ref RFI Filter INA333 4 0.1mF V- Also drawn in simplified form: VINRG VIN+ VO INA333 Ref Figure 32. Basic Connections Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): INA333 11 INA333 SBOS445A – JULY 2008 – REVISED AUGUST 2008 ........................................................................................................................................................ www.ti.com Table 1. Commonly-Used Gains and Resistor Values DESIRED GAIN (1) RG (Ω) NEAREST 1% RG (Ω) (1) 1 NC 2 100k 100k NC 5 25k 24.9k 10 11.1k 11k 20 5.26k 5.23k 50 2.04k 2.05 100 1.01k 1k 200 502.5 499 500 200.4 200 1000 100.1 100 NC denotes no connection. When using the SPICE model, the simulation will not converge unless a resistor is connected to the RG pins; use a very large resistor value. INTERNAL OFFSET CORRECTION NOISE PERFORMANCE The INA333 internal op amps use an auto-calibration technique with a time-continuous 350kHz op amp in the signal path. The amplifier is zero-corrected every 8µs using a proprietary technique. Upon power-up, the amplifier requires approximately 100µs to achieve specified VOS accuracy. This design has no aliasing or flicker noise. The auto-calibration technique used by the INA333 results in reduced low frequency noise, typically only 50nV/√Hz, (G = 100). The spectral noise density can be seen in detail in Figure 8. Low frequency noise of the INA333 is approximately 1µVPP measured from 0.1Hz to 10Hz, (G = 100). OFFSET TRIMMING The input impedance of the INA333 is extremely high—approximately 100GΩ. However, a path must be provided for the input bias current of both inputs. This input bias current is typically ±70pA. High input impedance means that this input bias current changes very little with varying input voltage. Most applications require no external offset adjustment; however, if necessary, adjustments can be made by applying a voltage to the REF terminal. Figure 33 shows an optional circuit for trimming the output offset voltage. The voltage applied to REF terminal is summed at the output. The op amp buffer provides low impedance at the REF terminal to preserve good common-mode rejection. VIN- V+ RG VIN+ VO INA333 100mA 1/2 REF200 Ref 100W OPA333 ±10mV Adjustment Range 10kW INPUT BIAS CURRENT RETURN PATH Input circuitry must provide a path for this input bias current for proper operation. Figure 34 illustrates various provisions for an input bias current path. Without a bias current path, the inputs will float to a potential that exceeds the common-mode range of the INA333, and the input amplifiers will saturate. If the differential source resistance is low, the bias current return path can be connected to one input (see the thermocouple example in Figure 34). With higher source impedance, using two equal resistors provides a balanced input with possible advantages of lower input offset voltage as a result of bias current and better high-frequency common-mode rejection. 100W 100mA 1/2 REF200 V- Figure 33. Optional Trimming of Output Offset Voltage 12 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): INA333 INA333 www.ti.com ........................................................................................................................................................ SBOS445A – JULY 2008 – REVISED AUGUST 2008 OPERATING VOLTAGE Microphone, Hydrophone, etc. The INA333 operates over a power-supply range of +1.8V to +5.5V (±0.9V to ±2.75V). Supply voltages higher than +7V (absolute maximum) can permanently damage the device. Parameters that vary over supply voltage or temperature are shown in the Typical Characteristics section of this data sheet. INA333 47kW 47kW LOW VOLTAGE OPERATION Thermocouple The INA333 can be operated on power supplies as low as ±0.9V. Most parameters vary only slightly throughout this supply voltage range—see the Typical Characteristics section. Operation at very low supply voltage requires careful attention to assure that the input voltages remain within the linear range. Voltage swing requirements of internal nodes limit the input common-mode range with low power-supply voltage. The Typical Characteristic curves Typical Common-Mode Range vs Output Voltage (Figure 20 to Figure 23) show the range of linear operation for various supply voltages and gains. INA333 10kW INA333 SINGLE-SUPPLY OPERATION Center tap provides bias current return. Figure 34. Providing an Input Common-Mode Current Path INPUT COMMON-MODE RANGE The linear input voltage range of the input circuitry of the INA333 is from approximately 0.1V below the positive supply voltage to 0.1V above the negative supply. As a differential input voltage causes the output voltage to increase, however, the linear input range is limited by the output voltage swing of amplifiers A1 and A2. Thus, the linear common-mode input range is related to the output voltage of the complete amplifier. This behavior also depends on supply voltage—see Typical Characteristic curves Typical Common-Mode Range vs Output Voltage (Figure 20 to Figure 23). Input overload conditions can produce an output voltage that appears normal. For example, if an input overload condition drives both input amplifiers to the respective positive output swing limit, the difference voltage measured by the output amplifier is near zero. The output of the INA333 is near 0V even though both inputs are overloaded. The INA333 can be used on single power supplies of +1.8V to +5.5V. Figure 35 illustrates a basic single-supply circuit. The output REF terminal is connected to mid-supply. Zero differential input voltage demands an output voltage of mid-supply. Actual output voltage swing is limited to approximately 50mV above ground, when the load is referred to ground as shown. The typical characteristic curve Output Voltage Swing vs Output Current (Figure 29) shows how the output voltage swing varies with output current. With single-supply operation, VIN+ and VIN– must both be 0.1V above ground for linear operation. For instance, the inverting input cannot be connected to ground to measure a voltage connected to the noninverting input. To illustrate the issues affecting low voltage operation, consider the circuit in Figure 35. It shows the INA333 operating from a single 3V supply. A resistor in series with the low side of the bridge assures that the bridge output voltage is within the common-mode range of the amplifier inputs. Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): INA333 13 INA333 SBOS445A – JULY 2008 – REVISED AUGUST 2008 ........................................................................................................................................................ www.ti.com +3V GENERAL LAYOUT GUIDELINES 3V Attention to good layout practices is always recommended. Keep traces short and, when possible, use a printed circuit board (PCB) ground plane with surface-mount components placed as close to the device pins as possible. Place a 0.1µF bypass capacitor closely across the supply pins. These guidelines should be applied throughout the analog circuit to improve performance and provide benefits such as reducing the electromagnetic-interference (EMI) susceptibility. 2V - DV RG 300W VO INA333 Ref 2V + DV 1.5V 150W (1) R1 (1) R1 creates proper common-mode voltage, only for low-voltage operation—see the Single-Supply Operation section. Figure 35. Single-Supply Bridge Amplifier INPUT PROTECTION The input terminals of the INA333 are protected with internal diodes connected to the power-supply rails. These diodes clamp the applied signal to prevent it from damaging the input circuitry. If the input signal voltage can exceed the power supplies by more than 0.3V, the input signal current should be limited to less than 10mA to protect the internal clamp diodes. This current limiting can generally be done with a series input resistor. Some signal sources are inherently current-limited and do not require limiting resistors. Instrumentation amplifiers vary in the susceptibility to radio-frequency interference (RFI). RFI can generally be identified as a variation in offset voltage or dc signal levels with changes in the interfering RF signal. The INA333 has been specifically designed to minimize susceptibility to RFI by incorporating passive RC filters with an 8MHz corner frequency at the VIN+ and VIN– inputs. As a result, the INA333 demonstrates remarkably low sensitivity compared to previous generation devices. Strong RF fields may continue to cause varying offset levels, however, and may require additional shielding. APPLICATION IDEAS Additional application ideas are shown in Figure 36 to Figure 39. 2.8kW LA RA RG/2 INA333 VO Ref 2.8kW G = 10 390kW 1/2 OPA2333 RL 1/2 OPA2333 10kW 390kW Figure 36. ECG Amplifier With Right-Leg Drive 14 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): INA333 INA333 www.ti.com ........................................................................................................................................................ SBOS445A – JULY 2008 – REVISED AUGUST 2008 +VS R1 100kW fLPF = 150Hz C4 1.06nF 1/2 OPA2333 RA +VS R2 100kW +VS 2 R6 100kW 1/2 OPA2333 7 1 RG R8 100kW +VS 3 dc R3 100kW 4 5 ac 1/2 OPA2333 R12 5kW +VS VOUT OPA333 C3 1m F R13 318kW GOPA = 200 +VS 1/2 OPA2333 Wilson LA GINA = 5 6 INA333 8 LL R14 1MW GTOT = 1kV/V R7 100kW VCENTRAL C1 47pF (RA + LA + LL)/3 fHPF = 0.5Hz (provides ac signal coupling) 1/2 VS R5 390kW +VS R4 100kW R9 20kW 1/2 OPA2333 RL Inverted VCM +VS VS = +2.7V to +5.5V 1/2 OPA2333 BW = 0.5Hz to 150Hz +VS R10 1MW 1/2 VS C2 0.64mF R11 1MW fO = 0.5Hz Figure 37. Single-Supply, Very Low Power, ECG Circuit Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): INA333 15 INA333 SBOS445A – JULY 2008 – REVISED AUGUST 2008 ........................................................................................................................................................ www.ti.com TINA-TI (FREE DOWNLOAD SOFTWARE) Virtual instruments offer users the ability to select input waveforms and probe circuit nodes, voltages, and waveforms, creating a dynamic quick-start tool. Using TINA-TI SPICE-Based Analog Simulation Program with the INA333 Figure 38 and Figure 39 show example TINA-TI circuits for the INA333 that can be used to develop, modify, and assess the circuit design for specific applications. Links to download these simulation files are given below. TINA is a simple, powerful, and easy-to-use circuit simulation program based on a SPICE engine. TINA-TI is a free, fully functional version of the TINA software, preloaded with a library of macromodels in addition to a range of both passive and active models. It provides all the conventional dc, transient, and frequency domain analysis of SPICE as well as additional design capabilities. NOTE: these files require that either the TINA software (from DesignSoft) or TINA-TI software be installed. Download the free TINA-TI software from the TINA-TI folder. Available as a free download from the Analog eLab Design Center, TINA-TI offers extensive post-processing capability that allows users to format results in a variety of ways. VoA1 1/2 of matched monolithic dual NPN transistors (example: MMDT3904) RELATED PRODUCTS For monolithic logarithmic amplifiers (such as LOG112 or LOG114) see the link in footnote 1. Vout VM1 8 3 6 + 5 + 7 VCC VCC Ref RG V+ U5 OPA369 Vdiff Vref+ 1/2 of matched monolithic dual NPN transistors (example: MMDT3904) - R8 10k Out + U1 OPA335 VCC 4 5 1 U1 INA333 Optional buffer for driving SAR converters with sampling systems of ³ 33kHz. VCC V 4 RG V- C1 1n + Vref+ Vref+ Input I 10n + + _ Vref+ 2 1 R3 14k 2 3 VoA2 3 Vref+ uC Vref/2 2.5 1 + uC Vref/2 2.5 2 + 4 5 V1 5 NOTE: Temperature compensation of logging transistors is not shown. U6 OPA369 VCC Rset 2.5M (1) The following link launches the TI logarithmic amplifiers web page: Logarithmic Amplifier Products Home Page Figure 38. Low-Power Log Function Circuit for Portable Battery-Powered Systems (Example Glucose Meter) To download a compressed file that contains the TINA-TI simulation file for this circuit, click the following link: Log Circuit. 16 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): INA333 INA333 www.ti.com ........................................................................................................................................................ SBOS445A – JULY 2008 – REVISED AUGUST 2008 3V R1 2kW RWa 3W EMU21 RTD3 - Pt100 RTD VT+ U2 OPA333 RWb 3W + RTD+ VT 25 + 2 _ 3V VT- RTD- Mon+ RGAIN 100kW Mon- + U1 INA333 VDIFF Out Ref 8 RG V+ RWc 4W Temp (°C) (Volts = °C) 1 4 RG V- RZERO 100W 3 PGA112 MSP430 6 5 + 7 V VREF+ 3V VRTD RWd 3W RTD Resistance (Volts = Ohms) + + A IREF1 A IREF2 3V U1 REF3212 VREF 3V VREF VREF Use BF861A EN + In OUTS GNDF GNDS C7 470nF S OUTF + T3 BF256A OPA3331 OPA333 Use BF861A 3V T1 BF256A + + U3 OPA333 3V - G - V4 3 RSET1 2.5kW RSET2 2.5kW RWa, RWb, RWc, and RWd simulate wire resistance. These resistors are included to show the four-wire sense technique immunity to line mismatches. This method assumes the use of a four-wire RTD. Figure 39. Four-Wire, 3V Conditioner for a PT100 RTD With Programmable Gain Acquisition System To download a compressed file that contains the TINA-TI simulation file for this circuit, click the following link: PT100 RTD. Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): INA333 17 PACKAGE OPTION ADDENDUM www.ti.com 7-Aug-2008 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty INA333AIDGKR ACTIVE MSOP DGK 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR INA333AIDGKT ACTIVE MSOP DGK 8 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR INA333AIDRGR PREVIEW SON DRG 8 1000 TBD Call TI Call TI INA333AIDRGT PREVIEW SON DRG 8 250 TBD Call TI Call TI Lead/Ball Finish MSL Peak Temp (3) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. 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Addendum-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 7-Aug-2008 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel Diameter Width (mm) W1 (mm) A0 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant INA333AIDGKR MSOP DGK 8 2500 330.0 12.4 5.3 3.3 1.3 8.0 12.0 Q1 INA333AIDGKT MSOP DGK 8 250 330.0 12.4 5.3 3.3 1.3 8.0 12.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 7-Aug-2008 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) INA333AIDGKR MSOP DGK 8 2500 370.0 355.0 55.0 INA333AIDGKT MSOP DGK 8 250 370.0 355.0 55.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. 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