Rohm BD8312HFN-TR 1ch synchronous buck converter integrated mosfet Datasheet

Datasheet
3.5V to 14V, 0.8A 1ch Synchronous Buck
Converter Integrated MOSFET
BD8312HFN
Key Specifications
General Description








BD8312HFN can produce 1.2V, 1.8V, 3.3V, or 5V
stepped-down output voltages from a power supply
composed of 4 batteries, which can be Li2cell, Li3cell,
or from a 5V/12V fixed power supply line. The built-in
synchronous rectification switches are capable of
withstanding up to15V. This IC has a flexible phase
compensation system and a switching frequency of
1.5MHz allowing the use of smaller external output
inductor and capacitor making the construction of a
compact power supply really easy.
Input Voltage Range:
Output Voltage Range:
Output Current:
Switching Frequency:
Pch FET ON-Resistance:
Nch FET ON-Resistance:
Standby Current:
Operating Temperature Range:
Package
+3.5V to +14V
+1.2V to +12V
0.8A(Max)
1.5MHz(Typ)
450mΩ(Typ)
300mΩ(Typ)
0μA(Typ)
-25°C to +85°C
W (Typ) x D (Typ) x H (Max)
Features
 Built-In 1.0A/15V Pch/Nch Synchronous
Rectification SW
 On-Chip Phase Compensation Device between
Input and Output of Error AMP.
 Built-In Soft-Start Function.
 Built-In Timer Latch System for Short Circuit
Protection Function.
HSON8
2.90mm x 3.00mm x 0.60mm
Application
For Portable Equipments like DSC/DVC Powered by 4
Dry Batteries or Li2cell and Li3cell, or General
Consumer-Equipment with 5V/12 V Lines
Typical Application Circuit
Input: 4.5V to 10V, output: 3.3V / 500mA
VBAT=4.5V to 10V
LX
Figure 1. Typical Application Circuit
○Product structure:Silicon monolithic integrated circuit
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BD8312HFN
Pin Configuration
(TOP VIEW)
GND
INV
VCC
STB
VREG
PVCC
PGND
LX
Figure 2. Pin Configuration
Pin Description
Pin No.
Pin Name
Function
1
GND
Ground pin
2
VCC
Supply voltage input pin for control circuit
3
VREG
5V output terminal of regulator for internal circuit
4
PGND
Power switch ground pin
5
LX
6
PVCC
7
STB
ON/OFF pin
8
INV
Error AMP input pin
Power switch terminal for external coil
Supply voltage input pin for power switches
Block Diagram
Figure 3. Block Diagram
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Description of Blocks
(1) Reference
This block produces the 1.0V internal reference voltage of the ERROR AMP.
(2) 5V REG
This block produces a 5V regulated voltage supply for the internal analog circuit. BD8312HFN is equipped with this
regulator for the purpose of protecting the internal circuit from high voltages. The output of this block decreases when
VCC is less than 5V, increasing the PMOS ON-Resistance and decreasing the DC/DC converter’s power efficiency and
maximum output current (Please see data in Figure 15, 16, 17 and 18).
(3) UVLO
This circuit prevents malfunction of the internal circuit during activation of the power supply voltage or during low
power supply voltage. It monitors the VCC pin voltage, turns OFF all output FET and DC/DC converter output, and
resets the timer latch of the internal SCP circuit and soft-start circuit when VCC voltage becomes lower than 2.9V.
Typical UVLO hysteresis is 200 mV.
(4) SCP
SCP is a timer latch system for short circuit protection. When the DC/DC converter is at 100% duty, the internal SCP
circuit starts counting. The internal counter is in-sync with OSC so that the latch circuit is activated to turn OFF the
DC/DC converter’s output after about 2.7 msec or after the counter counts about 4000 clock pulses. To reset the latch
circuit, turn OFF the STB pin once, then, turn it ON again. Or, turn the power supply OFF and then ON again.
(5) OSC
Circuit that generates oscillating saw-tooth waveform signal with a fixed frequency of 1.5 MHz.
(6) ERROR AMP
The Error amplifier detects the output signal and output PWM control signals. The internal reference voltage is set at
1.0V. A primary phase compensation device of 200 pF, 62kΩ is built-in between the inverting input terminal and the
output terminal of this ERROR AMP.
(7) PWM COMP
PWM COMP is the voltage-to-pulse-width converter for controlling the output voltage corresponding to the input
voltage. It compares the internal SLOPE waveform with the ERROR AMP output voltage, then controls the pulse width
of the output to the driver.
(8) Soft Start
This circuit prevents inrush current during startup by gradually increasing the output voltage of the DC/DC converter..
Soft-start time is in-sync with the internal OSC so that the output voltage of the DC/DC converter reaches the set
voltage after about 8000 oscillations.
(9) PRE DRIVER/TIMING CONTROL
CMOS inverter circuit for driving the built-in synchronous rectification Pch/Nch FET switch. The synchronous
rectification OFF time for preventing feed through is about 25 nsec.
(10) STBY_IO
Voltage applied on STB pin (7 pin) controls the ON/OFF state of the IC. The IC is turned ON when a voltage of 2.5V or
higher is applied and turned OFF when the terminal is open or 0V is applied. A pull-down resistor which is
approximately 400kΩ is built-in.
(11) Pch/Nch FET SW
Built-in synchronous rectification FET for switching the coil current of the DC/DC converter. The switch is a
combination of a Pch FET rated at 15V with RON of 450mΩ and a Nch FET also rated at 15V with Ron of 300mΩ.
Since the current rating of this FET is 1.0A, the output current including the ripple current of the coil should not exceed this
limit.
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BD8312HFN
Absolute Maximum Ratings
Parameter
Symbol
Maximum Applied Power Voltage
Maximum Input Current
Power Dissipation
Rating
Unit
VCC, PVCC
15
V
IINMAX
1.0
A
Pd
0.63
(Note 1)
W
Operating Temperature Range
Topr
-25 to +85
°C
Storage Temperature Range
Tstg
-55 to +150
°C
+150
°C
Junction Temperature
Tjmax
t
(Note 1) When used at Ta = 25°C or more and installed on a 70x70x1.6 mm board, the rating is reduced by 5.04mW/°C.
Caution: Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open circuit
between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the IC is operated over
the absolute maximum ratings.
Recommended Operating Conditions (Ta = 25°C)
Parameter
Symbol
Rating
Unit
Power Supply Voltage
VCC
3.5 to 14
V
Output Voltage
VOUT
1.2 to 12
V
Electrical Characteristics (Unless otherwise specified, Ta = 25°C, VCC = 7.4V)
Parameter
Symbol
Limit
Min
Typ
Max
Unit
Conditions
[Low Voltage Input Malfunction Preventing Circuit]
Detection Threshold Voltage
VUV
-
2.9
3.2
V
ΔVUVHY
100
200
300
mV
fOSC
1.38
1.5
1.62
MHz
VREG
4.65
5.0
5.35
V
INV Threshold Voltage
VINV
0.99
1.00
1.01
V
Input Bias Current
IINV
-50
0
+50
nA
Soft-Start Time
tSS
3.2
5.3
7.4
msec
DMAX
-
-
PMOS ON-Resistance
RONP
-
450
600
mΩ
NMOS ON-Resistance
RONN
-
300
420
mΩ
Leak Current
ILEAK
-1
0
+1
µA
Operation
VSTBH
2.5
-
11
V
No-Operation
VSTBL
RSTB
-0.3
-
+0.3
V
250
400
700
kΩ
VCC Pin
ISTB1
-
-
1
µA
PVCC Pin
ISTB2
-
-
1
µA
Circuit Current at Operation VCC
ICC1
-
600
900
µA
VINV=1.2V
Circuit Current at Operation PVCC
ICC2
-
30
50
µA
VINV=1.2V
Hysteresis Range
VREG monitor
[Oscillator]
Oscillation Frequency
[Regulator]
Output Voltage
[Error AMP]
VCC=12.0V ,
VINV=6.0V
[PWM Comparator]
LX Max Duty
100
(Note 1)
%
[Output]
[STB]
STB Pin
Control Voltage
STB Pin Pull-Down Resistance
[Circuit Current]
Standby Current
(Note 1) 100% is MAX Duty as behavior of a PWM comparator. wherein High side PMOS is 100% at ON state because the same or less input voltage than
output voltage is supplied. This causes the SCP to activate and stop the operation of the DC/DC converter .
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Typical Performance Curves
1.02
1.02
1.01
1.01
INV Threshold [V]
INV Threshold [V]
(Unless otherwise specified, Ta = 25°C, VCC = 7.4V)
1.00
0.99
0.98
1.00
0.99
0.98
-40 -20
0
20
40
60
80 100 120
0
5
10
VCC [V]
Temperature [°C]
Figure 4. INV Threshold vs Temperature
Figure 5. INV Threshold vs Power Supply Voltage
5.3
8
7
5.2
5
VREG [V]
VREG Voltage [V]
6
5.1
5.0
4.9
4
3
2
4.8
1
4.7
0
-40
0
40
80
120
0
Temperature [°C]
4
6
8
10
12
14
VCC [V]
Figure 6. VREG Output vs Temperature
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Figure 7. VREG Output vs Power Supply Voltage
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Typical Performance Curves – continued
1.7
1.7
1.6
1.6
Frequency [MHz]
Frequency [MHz]
(Unless otherwise specified, Ta = 25°C, VCC = 7.4V)
1.5
1.4
1.5
1.4
1.3
1.3
-40
0
40
Temperature [°C]
80
3
120
Hysteresis width
ID=500mA
UVLO release voltage
0.20
3.10
0.15
2.90
0.10
UVLO detection voltage
2.70
0.05
2.50
Hysteresis Voltage Vhys [V]
Nch ON-Resistance [mΩ]
UVLO Threshold [V]
15
500
0.25
0.00
0
12
Figure 9. Frequency vs Power Supply Voltage
3.50
-40
9
VCC [V]
Figure 8. Frequency vs Temperature
3.30
6
40
80
300
200
100
120
-40
0
40
80
120
Temperature [°C]
Environmental Temperature Ta [°C]
Figure 10. UVLO Threshold vs Environmental Temperature
(UVLO Threshold)
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Figure11. Nch FET ON-Resistance vs Temperature
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BD8312HFN
Typical Performance Curves – continued
(Unless otherwise specified, Ta = 25°C, VCC = 7.4V)
600
800
ID=500mA
ID=500mA
Pch ON-Resistance [mΩ]
Nch ON-Resistance [mΩ]
500
400
300
200
600
400
200
100
0
0
3
6
9
12
-40
15
40
80
120
Temperature [ºC]
VCC [V]
Figure 13. Pch FET ON-Resistance vs Temperature
Figure 12. Nch FET ON-Resistance vs VCC
1000
3.0
ID=500mA
2.5
800
PMOS ON-Resistance [Ω]
Pch ON-Resistance [mΩ]
0
600
400
Ta=25 ºC
2.0
Ta=-25 ºC
1.5
1.0
200
0.5
0
0.0
3
6
9
12
0.0
15
1.0
2.0
IO [A]
VCC [V]
Figure 15. Pch FET ON-Resistance vs IO
(VCC=3.5V)
Figure 14. Pch FET ON-Resistance vs VCC
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BD8312HFN
Typical Performance Curves – continued
3.0
3.0
2.5
2.5
PMOS ON-Resistance [Ω]
PMOS ON-Resistance [Ω]
(Unless otherwise specified, Ta = 25°C, VCC = 7.4V)
2.0
Ta=25 ºC
Ta=85 ºC
1.5
1.0
Ta=-25 ºC
0.5
0.0
2.0
Ta=85 ºC
Ta=25 ºC
1.5
1.0
Ta=-25 ºC
0.5
0.0
0.0
1.0
2.0
0.0
1.0
2.0
IO [A]
IO [A]
Figure 16. Pch FET ON Resistance vs IO
(VCC=4.0V)
Figure 17. Pch FET ON-Resistance vs IO
(VCC=4.5V)
3.0
2.5
2.0
ON
2.0
STB Voltage [V]
PMOS ON-Resistance [Ω]
2.5
1.5
1.0
1.5
0.5
OFF
0.0
1.0
0.0
1.0
2.0
-50
IO [A]
50
Ta [°C]
100
150
Figure 19. STB Threshold vs Temperature
Figure 18. Pch FET ON-Resistance vs IO
(VCC=5.0V)
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BD8312HFN
Typical Performance Curves- continued
1000
1000
800
800
600
600
ICC [µA]
ICC [µA]
(Unless otherwise specified, Ta = 25°C, VCC = 7.4V)
400
400
200
200
0
0
-40
0
40
80
0
120
2
4
6
8
10
12
Temperature [ºC]
VCC [V]
Figure 20. Circuit current ICC vs
Temperature
Figure 21. Circuit current ICC vs VCC
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BD8312HFN
Application Information
1. Example of Application
Input: 4.5V to 10V, Output: 3.3V / 500mA
VBAT
=4.5V to 10V
VBAT=4.5~10V
1μ F
1µF
GRM188B11A105KA61
(Murata)
GND
INV
VCC
STB
ON/OFF
10pF
PVCC
VREG
10kΩ
3.3V/500mA
1μ F
1µF
GRM188B11A105KA61
(Murata)
LX
Lx
PGND
4.7μ
47µHH
1098AS-4R7M(TOKO)
200kΩ
51kΩ
10μ F
10µF
GRM31CB11A106KA01
(Murata)
22kΩ
Figure 22. Reference Application Diagram
2. Reference Application Data 1
100
3.35
3.33
VCC=4.5V
VCC=4.5V
Output Voltage [V]
Output Voltage [V]
80
VCC=7.5V
60
40
VCC=5.5V
3.31
VCC=5.5V
20
3.27
0
3.25
1
10
100
1
1000
Output Current [mA]
10
100
1000
Output Current [mA]
Figure 23. Power Conversion Efficiency
(VOUT = 3.3V)
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VCC=7.5V
3.29
Figure 24. Load Regulation
(VOUT = 3.3V)
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BD8312HFN
3. Reference Application Data 2
(Input 4.5V, 6.0V, 8.4V, 10V, Output 3.3V )
180
60
180
Phase
120
40
120
20
60
20
60
0
0
0
0
Gain
-20
-60
-40
-120
100
1000
10000
100000
Gain
-180
1000000
-20
-60
-40
-120
-60
-180
100
Frequency [Hz]
100000
1000000
Figure 26. Frequency Response 2
(VCC =6.0V, IO=250mA)
Gain [dB]
Phase [deg]
Gain [dB]
10000
Frequency [Hz]
Figure 25. Frequency Response 1
(VCC=4.5V, IO=250mA)
Frequency [Hz]
Frequency [Hz]
Figure 27. Frequency Response 3
(VCC=8.4V, IO =250mA)
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1000
Phase [deg]
-60
Gain [dB]
40
Phase [deg]
Gain [dB]
Phase
Figure 28. Frequency Response 4
(VCC=10V, IO=250mA)
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Phase [deg]
60
BD8312HFN
Frequency [Hz]
Frequency [Hz]
Gain [dB]
Phase [deg]
Figure 30. Frequency Response 6
(VCC=6.0V, IO =500mA)
Phase [deg]
Gain [dB]
Figure 29. Frequency Response 5
(VCC=4.5V, IO =500mA)
Frequency [Hz]
Frequency [Hz]
Figure 32. Frequency Response 8
(VCC=10V, IO =500mA)
Figure 31. Frequency Response 7
(VCC=8.4V, IO =500mA)
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Phase [deg]
Gain [dB]
Phase [deg]
Gain [dB]
Reference Application Data 2 - continued
(Input 4.5V, 6.0V, 8.4V, 10V, Output 3.3V )
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4. Reference Board Pattern
(1) The heat sink on the rear should be a GND trace of low impedance and at the same potential with the PGND trace.
(2) It is recommended to install a GND pin not directly connected to the PGND, as shown in the picture above.
(3) Make the patterns for VBAT, LX and PGND as wide as possible since these paths carry large current.
5. Selection of Parts for Application
(1) Inductor
A shielded inductor with low DCR (direct resistance component)
that satisfies the current rating (current value, Ipeak as shown in the
equation below) is recommended.
Inductor values affect inductor ripple current, which causes output ripple.
Ripple current can be reduced as the coil L value becomes
larger and the switching frequency becomes higher.
Ipeak  IOUT  I L / 2
 IL 
Figure 33. Inductor Current
‧ ‧ ‧ (1)
[ A]
V IN  VOUT VOUT
1


L
V IN
f
Δ
Δ IILL
‧ ‧ ‧ (2)
[ A]
where
η is the Efficiency.
∆IL is the Output ripple current.
f is the Switching frequency.
As a guide, inductor ripple current should be set at about 20% to 50% of the maximum input current.
Note: Current flowing in the coil that is larger than the coil’s rating will bring the coil into magnetic saturation, which
may lead to lower efficiency or output oscillation. Select an inductor with an adequate margin so that the peak
current does not exceed the rated current of the coil.
(2) Output Capacitor
A ceramic capacitor with low ESR is recommended for the output in order to reduce output ripple.
There must be an adequate margin between the maximum rating and output voltage of the capacitor, taking the DC
bias property into consideration.
Output ripple voltage is acquired by the following equation.
VPP  I L 
1
 I L  RESR
2  f  CO
[V ]
‧ ‧ ‧ (3)
Setting must be performed so that output ripple is within the allowable ripple voltage.
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BD8312HFN
(3) Output Voltage Setting
The internal reference voltage of the ERROR AMP is 1.0V. Output voltage is acquired by Equation (4).
V
OUT
VOUT
ERROR AMP
R
R11
INV
VO 
( R1  R2 )
R2
RR2
2
 1.0
[V ] ‧ ‧ ‧ (4)
VVREF
REF
1.0V
1.0V
Figure 34. Setting of Voltage Feedback Resistance
(4) DC/DC Converter Frequency Response Adjustment System
Condition for stable application.
The condition for feedback system stability under negative feedback is that the phase delay is 135° or less when gain
is 1 (0dB).
Since DC/DC converter application is sampled according to the switching frequency, the bandwidth G BW of the whole
system (frequency at which gain is 0 dB) must be controlled to be equal to or lower than 1/10 of the switching
frequency. In summary, the conditions necessary for the DC/DC converter are:
-
Phase delay must be 135° or lower when gain is 1 (0 dB).
Bandwidth GBW (frequency when gain is 0 dB) must be equal to or lower than 1/10 of the switching frequency.
To satisfy those two conditions, R1, R2, R3, CS and RS in Figure 35 should be set as follows.
(a) R1, R2, R3
BD8312HFN incorporates phase compensation devices of
R4=62kΩ and C2=200pF. C2 and R1, R2, and R3 values decide
the primary pole that determines the bandwidth of DC/DC
converter.
VOUT
R1
Cs
Inside of IC
R4
C2
Rs
FB
Primary pole point frequency
fp 
R2
1


R1  R2
2  A  
 R3   C2
R

R
1
2


R3
・・・・(5)
Figure 35. Example of Phase Compensation setting
DC/DC converter DC Gain
DC Gain  A 
where:
A is the Error AMP Gain
5
About 100dB = 10
B is the Oscillator amplification = 0.5
VIN is the Input voltage
VOUT is the Output voltage
1 VIN

B VO ・・・・(6)
Using Equations (5) and (6), the frequency fSW of point 0 dB under limitation of the bandwidth of the DC gain at the
primary pole point is as shown below.
f SW  fp  DC Gain 
1
1
VIN
R1 R 2   R   B  VO
2 C2  
R1  R2  3
・・・・(7)
It is recommended that fSW should be approximately10kHz. When load response is difficult, it may be set at
approximately 20kHz. In Equation (7), R1 and R2, which determines the voltage value, will be in the order of
several hundred kΩ. If an appropriate resistance value this high is not available and routing may cause noise, the
use of R3 enables easy setting.
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(b) Cs and Rs Setting
For DC/DC converter, the 2nd dimension pole point is caused by the coil and capacitor as expressed by the
following equation.
f LC 
1
・・・・(8)
2 LCout 
Cout: Output Capacitor
This secondary pole causes a phase rotation of 180°. To secure the stability of the system, put a zero point in 2
places to perform compensation.
Zero point by built-in CR
Zero point by CS
f Z1 
1
 13kHz ・・・・(9)
2R4C2
fZ2 
1
2 R1  R3 C S ・・・・(10)
Setting fZ2 frequency to be half to two times as large as fLC provides an appropriate phase margin.
It is desirable to set Rs at about 1/20 of (R1+R3) to cancel any phase boosting at high frequencies.
These pole points are summarized in the figure below. The actual frequency property is different from the ideal
calculation because of part constants. If possible, check the phase margin with a frequency analyzer or network
analyzer. Otherwise, check for the presence or absence of ringing by load response waveform and also check for
the presence or absence of oscillation under a load of an adequate margin.
(9) (10)
(7)
(8)
Figure 36. Example of DC/DC Converter Frequency Property
(Measured with FRA5097 by NF Corporation)
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BD8312HFN
I/O Equivalent Circuit
STB
INV
VCC
VCC
VREG
VCC
VCC
STB
VREG
INV
VREG
LX, PGND, PVCC
VCC
VCC
PVCC
PVCC
VCC
VCC
VREG
VREG
Lx
LX
PGND
PGND
Figure 37. I/O Equivalent Circuit
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BD8312HFN
Operational Notes
1.
Reverse Connection of Power Supply
Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when
connecting the power supply, such as mounting an external diode between the power supply and the IC’s power
supply pins.
2.
Power Supply Lines
Design the PCB layout pattern to provide low impedance supply lines. Separate the ground and supply lines of the
digital and analog blocks to prevent noise in the ground and supply lines of the digital block from affecting the analog
block. Furthermore, connect a capacitor to ground at all power supply pins. Consider the effect of temperature and
aging on the capacitance value when using electrolytic capacitors.
3.
Ground Voltage
Ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition.
4.
Ground Wiring Pattern
When using both small-signal and large-current ground traces, the two ground traces should be routed separately
but connected to a single ground at the reference point of the application board to avoid fluctuations in the
small-signal ground caused by large currents. Also ensure that the ground traces of external components do not
cause variations on the ground voltage. The ground lines must be as short and thick as possible to reduce line
impedance.
5.
Thermal Consideration
Should by any chance the power dissipation rating be exceeded the rise in temperature of the chip may result in
deterioration of the properties of the chip. In case of exceeding this absolute maximum rating, increase the board
size and copper area to prevent exceeding the Pd rating.
6.
Recommended Operating Conditions
These conditions represent a range within which the expected characteristics of the IC can be approximately
obtained. The electrical characteristics are guaranteed under the conditions of each parameter.
7.
Inrush Current
When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush current may
flow instantaneously due to the internal powering sequence and delays, especially if the IC has more than one power
supply. Therefore, give special consideration to power coupling capacitance, power wiring, width of ground wiring,
and routing of connections.
8.
Operation Under Strong Electromagnetic Field
Operating the IC in the presence of a strong electromagnetic field may cause the IC to malfunction.
9.
Testing on Application Boards
When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may
subject the IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply
should always be turned off completely before connecting or removing it from the test setup during the inspection
process. To prevent damage from static discharge, ground the IC during assembly and use similar precautions
during transport and storage.
10. Inter-pin Short and Mounting Errors
Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may result in
damaging the IC. Avoid nearby pins being shorted to each other especially to ground, power supply and output pin.
Inter-pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment)
and unintentional solder bridge deposited in between pins during assembly to name a few.
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BD8312HFN
Operational Notes – continued
11. Unused Input Pins
Input pins of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance and
extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small
charge acquired in this way is enough to produce a significant effect on the conduction through the transistor and
cause unexpected operation of the IC. So unless otherwise specified, unused input pins should be connected to the
power supply or ground line.
12. Regarding the Input Pin of the IC
This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them
isolated. P-N junctions are formed at the intersection of the P layers with the N layers of other elements, creating a
parasitic diode or transistor. For example (refer to figure below):
When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode.
When GND > Pin B, the P-N junction operates as a parasitic transistor.
Parasitic diodes inevitably occur in the structure of the IC. The operation of parasitic diodes can result in mutual
interference among circuits, operational faults, or physical damage. Therefore, conditions that cause these diodes to
operate, such as applying a voltage lower than the GND voltage to an input pin (and thus to the P substrate) should
be avoided.
Resistor
Transistor (NPN)
Pin A
Pin B
C
E
Pin A
N
P+
P
N
N
P+
N
Pin B
B
Parasitic
Elements
N
P+
N P
N
P+
B
N
C
E
Parasitic
Elements
P Substrate
P Substrate
GND
GND
Parasitic
Elements
GND
Parasitic
Elements
GND
N Region
close-by
Figure 38. Example of monolithic IC structure
13. Thermal Shutdown Circuit(TSD)
This IC has a built-in thermal shutdown circuit that prevents heat damage to the IC. Normal operation should always
be within the IC’s power dissipation rating. If however the rating is exceeded for a continued period, the junction
temperature (Tj) will rise which will activate the TSD circuit that will turn OFF all output pins. When the Tj falls below
the TSD threshold, the circuits are automatically restored to normal operation.
Note that the TSD circuit operates in a situation that exceeds the absolute maximum ratings and therefore, under no
circumstances, should the TSD circuit be used in a set design or for any purpose other than protecting the IC from
heat damage.
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BD8312HFN
Ordering Information
B
D
8
3
1
H
2
Part Number
F
N
-
Package
HFN: HSON8
TR
Packaging and forming specification
TR: Embossed tape and reel
Marking Diagram
HSON8 (TOP VIEW)
Part Number Marking
BD8
LOT Number
3 1 2
1PIN MARK
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BD8312HFN
Physical Dimension, Tape and Reel information
Package Name
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HSON8
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BD8312HFN
Revision History
Date
Revision
26.Nov.2014
17.Feb.2015
001
002
Changes
New Release
Correction of the writing.
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Datasheet
Notice
Precaution on using ROHM Products
1.
Our Products are designed and manufactured for application in ordinary electronic equipments (such as AV equipment,
OA equipment, telecommunication equipment, home electronic appliances, amusement equipment, etc.). If you
(Note 1)
, transport
intend to use our Products in devices requiring extremely high reliability (such as medical equipment
equipment, traffic equipment, aircraft/spacecraft, nuclear power controllers, fuel controllers, car equipment including car
accessories, safety devices, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or
serious damage to property (“Specific Applications”), please consult with the ROHM sales representative in advance.
Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way responsible or liable for any
damages, expenses or losses incurred by you or third parties arising from the use of any ROHM’s Products for Specific
Applications.
(Note1) Medical Equipment Classification of the Specific Applications
JAPAN
USA
EU
CHINA
CLASSⅢ
CLASSⅡb
CLASSⅢ
CLASSⅢ
CLASSⅣ
CLASSⅢ
2.
ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor
products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate
safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which
a failure or malfunction of our Products may cause. The following are examples of safety measures:
[a] Installation of protection circuits or other protective devices to improve system safety
[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure
3.
Our Products are designed and manufactured for use under standard conditions and not under any special or
extraordinary environments or conditions, as exemplified below. Accordingly, ROHM shall not be in any way
responsible or liable for any damages, expenses or losses arising from the use of any ROHM’s Products under any
special or extraordinary environments or conditions. If you intend to use our Products under any special or
extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of
product performance, reliability, etc, prior to use, must be necessary:
[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents
[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust
[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,
H2S, NH3, SO2, and NO2
[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves
[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items
[f] Sealing or coating our Products with resin or other coating materials
[g] Use of our Products without cleaning residue of flux (even if you use no-clean type fluxes, cleaning residue of
flux is recommended); or Washing our Products by using water or water-soluble cleaning agents for cleaning
residue after soldering
[h] Use of the Products in places subject to dew condensation
4.
The Products are not subject to radiation-proof design.
5.
Please verify and confirm characteristics of the final or mounted products in using the Products.
6.
In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse. is applied,
confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power
exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect
product performance and reliability.
7.
De-rate Power Dissipation (Pd) depending on Ambient temperature (Ta). When used in sealed area, confirm the actual
ambient temperature.
8.
Confirm that operation temperature is within the specified range described in the product specification.
9.
ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in
this document.
Precaution for Mounting / Circuit board design
1.
When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product
performance and reliability.
2.
In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must
be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products,
please consult with the ROHM representative in advance.
For details, please refer to ROHM Mounting specification
Notice-PGA-E
© 2015 ROHM Co., Ltd. All rights reserved.
Rev.001
Datasheet
Precautions Regarding Application Examples and External Circuits
1.
If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the
characteristics of the Products and external components, including transient characteristics, as well as static
characteristics.
2.
You agree that application notes, reference designs, and associated data and information contained in this document
are presented only as guidance for Products use. Therefore, in case you use such information, you are solely
responsible for it and you must exercise your own independent verification and judgment in the use of such information
contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses
incurred by you or third parties arising from the use of such information.
Precaution for Electrostatic
This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper
caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be
applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,
isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).
Precaution for Storage / Transportation
1.
Product performance and soldered connections may deteriorate if the Products are stored in the places where:
[a] the Products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2
[b] the temperature or humidity exceeds those recommended by ROHM
[c] the Products are exposed to direct sunshine or condensation
[d] the Products are exposed to high Electrostatic
2.
Even under ROHM recommended storage condition, solderability of products out of recommended storage time period
may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is
exceeding the recommended storage time period.
3.
Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads
may occur due to excessive stress applied when dropping of a carton.
4.
Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of
which storage time is exceeding the recommended storage time period.
Precaution for Product Label
QR code printed on ROHM Products label is for ROHM’s internal use only.
Precaution for Disposition
When disposing Products please dispose them properly using an authorized industry waste company.
Precaution for Foreign Exchange and Foreign Trade act
Since concerned goods might be fallen under listed items of export control prescribed by Foreign exchange and Foreign
trade act, please consult with ROHM in case of export.
Precaution Regarding Intellectual Property Rights
1.
All information and data including but not limited to application example contained in this document is for reference
only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any
other rights of any third party regarding such information or data.
2.
ROHM shall not have any obligations where the claims, actions or demands arising from the combination of the
Products with other articles such as components, circuits, systems or external equipment (including software).
3.
No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any
third parties with respect to the Products or the information contained in this document. Provided, however, that ROHM
will not assert its intellectual property rights or other rights against you or your customers to the extent necessary to
manufacture or sell products containing the Products, subject to the terms and conditions herein.
Other Precaution
1.
This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.
2.
The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written
consent of ROHM.
3.
In no event shall you use in any way whatsoever the Products and the related technical information contained in the
Products or this document for any military purposes, including but not limited to, the development of mass-destruction
weapons.
4.
The proper names of companies or products described in this document are trademarks or registered trademarks of
ROHM, its affiliated companies or third parties.
Notice-PGA-E
© 2015 ROHM Co., Ltd. All rights reserved.
Rev.001
Datasheet
General Precaution
1. Before you use our Pro ducts, you are requested to care fully read this document and fully understand its contents.
ROHM shall n ot be in an y way responsible or liabl e for fa ilure, malfunction or acci dent arising from the use of a ny
ROHM’s Products against warning, caution or note contained in this document.
2. All information contained in this docume nt is current as of the issuing date and subj ect to change without any prior
notice. Before purchasing or using ROHM’s Products, please confirm the la test information with a ROHM sale s
representative.
3.
The information contained in this doc ument is provi ded on an “as is” basis and ROHM does not warrant that all
information contained in this document is accurate an d/or error-free. ROHM shall not be in an y way responsible or
liable for an y damages, expenses or losses incurred b y you or third parties resulting from inaccur acy or errors of or
concerning such information.
Notice – WE
© 2015 ROHM Co., Ltd. All rights reserved.
Rev.001
Datasheet
BD8312HFN - Web Page
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Distribution Inventory
Part Number
Package
Unit Quantity
Minimum Package Quantity
Packing Type
Constitution Materials List
RoHS
BD8312HFN
HSON8
3000
3000
Taping
inquiry
Yes
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