MPS MP2030DU 3a dual supply very low dropout linear regulator Datasheet

MP2030
3A Dual Supply
Very Low Dropout Linear Regulator
The Future of Analog IC Technology
DESCRIPTION
FEATURES
•
•
•
•
•
•
•
The MP2030 is a very low dropout, dual supply
linear regulator. The use of two supplies allows
the BIAS to control an NMOS device. The
NMOS device supplies power to the load via
the IN. In this way the input supply can be just
above the desired output, yet still provide very
good regulation performance due to the higher
bias supply. The BIAS operates from a 2.5V to
5.5V input and regulates the output voltage to
as low as 0.9V, and as high as 3.8V.
•
•
•
•
•
•
The MP2030 can supply up to 3A of load
current with a typical dropout voltage of 150mV.
The BIAS runs the internal reference and drive
circuitry, while the output current comes directly
from the IN for high efficiency regulation.
•
The low bias current of 220uA makes the
MP2030 ideal for use in battery-powered
applications. The BIAS can be directly applied
from the battery while IN is powered from the
high efficiency buck regulator. This will reduce
the output noise and decoupling capacitor.
Wide 1.1V to 5.5V Input Voltage Range
Stable with Very Small Ceramic Capacitors
150mV Dropout at 3A Output
2% Accurate Output Voltage
Adjustable Output Range of 0.9V to 3.8V
Low Noise: 80µVRMS (10Hz to 100kHz)
PSRR
o 32dB at 100kHz
Better Than 0.001%/mA Load Regulation
Stable With Low-ESR Output Capacitors
Low 220uA Ground Current
Internal Thermal Protection
Current Limit Protection
0.1µA Typical Quiescent Current at
Shutdown
Power Good Indicator
APPLICATIONS
•
•
•
•
•
Other features of MP2030 include thermal
overload and current limit protection, power
good indicator, stability with ultra low ESR
ceramic capacitors as low as 1uF, and fast
transient response. The MP2030 is available in
10-pin QFN (3mm x 3mm), and in QFN (5mm x
5mm) packages.
Network, Telecom, Equipment:
and Switches
Servers, Storage Equipment
Set-Top Box
Post Regulation for Switch Mode
Televisions
Routers
“MPS” and “The Future of Analog IC Technology” are Registered Trademarks of
Monolithic Power Systems, Inc.
TYPICAL APPLICATION
U1
VIN
1
2
BIAS
PGOOD
GND
EN
MP2030 Rev. 0.91
10/10/2011
3
4
5
IN
OUT
IN
OUT
MP2030
10
1.8V/3A
9
VOUT
GND
8
BIAS
FB
PG
EN
7
GND
BP
6
C6
10nF
C8
1nF
www.MonolithicPower.com
MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.
© 2011 MPS. All Rights Reserved.
1
MP2030 – 3A VERY LOW DROPOUT LINEAR REGULATOR
ORDERING INFORMATION
Part Number*
Top Marking
Free Air Temperature (TA)
MP2030DQ*
Package
3x3 QFN10
7D
–40°C to +85°C
MP2030DU**
5x5 QFN32
M2030DU
–40°C to +85°C
* For Tape & Reel, add suffix –Z (eg. MP2030DQ–Z).
For RoHS compliant packaging, add suffix –LF (eg. MP2030DQ–LF–Z)
** For Tape & Reel, add suffix –Z (eg. MP2030DU–Z).
For RoHS compliant packaging, add suffix –LF (eg. MP2030DU–LF–Z)
PACKAGE REFERENCE
TOP VIEW
N/C N/C N/C N/C N/C N/C N/C N/C
32
TOP VIEW
VIN
1
10
VOUT
VIN
2
9
VOUT
BIAS
3
8
FB
PGOOD
4
7
EN
GND
5
6
BYPASS
EXPOSED PAD
ON BACKSIDE
31
30
29
28
27
26
25
N/C
1
24
N/C
VIN
2
23
VOUT
VIN
3
22
VOUT
VIN
4
21
VOUT
VIN
5
20
VOUT
BIAS
6
19
FB
PGOOD
7
18
EN
GND
8
17
BYPASS
9
10
11
12
13
14
15
16
N/C N/C N/C N/C N/C N/C N/C N/C
EXPOSED PAD
ON BACKSIDE
3x3 QFN10
ABSOLUTE MAXIMUM RATINGS (1)
VBIAS, VIN to GND............................–0.3V to +6V
FB, EN, to GND ..............................–0.3V to 6V
VOUT ...............................–0.3V to VIN + 0.3 or 6V
PGOOD ..................... –0.3V to VBIAS + 0.3 or 6V
BYPASS ......................-0.3V to VBIAS +0.3 or 6V
Junction Temperature ...............................150°C
Lead Temperature ....................................260°C
Storage Temperature ............. –65°C to +150°C
Power Dissipation
TA=70°C (QFN10 3 x 3) ............................ 1.3W
TA=70°C (QFN32 5 x 5) ............................. 1.8W
MP2030 Rev. 0.91
10/10/2011
5x5 QFN32
Recommended Operating Conditions
(2)
Input Voltage VIN ............................. 1.1V to 5.5V
Input Voltage VBIAS .......................... 2.5V to 5.5V
Output Voltage................................ 0.9V to 3.6V
Load Current............................... 3.0A Maximum
Operating Junct. Temp. ...........–40°C to +125°C
Thermal Resistance
(3)
θJA
θJC
QFN10 3X3… ......................... 50……12 °C/W
QFN32 5X5… ......................... 36….…8 °C/W
Notes:
1) Exceeding these ratings may damage the device.
2) The device is not guaranteed to function outside of its
operating conditions.
3) Measured on JESD51-7, 4-layer PCB.
www.MonolithicPower.com
MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.
© 2011 MPS. All Rights Reserved.
2
MP2030 – 3A VERY LOW DROPOUT LINEAR REGULATOR
ELECTRICAL CHARACTERISTICS
VIN = 1.5V, VBIAS = 3.6V, VOUT = 1.2V, COUT = 1µF, CIN = 0.1µF, TA = +25°C, unless otherwise noted.
Parameter
VIN Operating Voltage
VBIAS Operating Voltage
VBIAS Operating Current
FB Regulation Voltage
Symbol Condition
–40°C ≤ TA ≤ +85°C
IOUT = 3A, VBIAS = 3.6V
IOUT = 1mA,
VIN = 1.5 to 5V
VBIAS = 3.6V VOUT = 1.2V
IOUT = 1mA,
VBIAS = 3.6V to 5.5V VOUT = 1.2V
VIN = 1.5V
IOUT = 1mA to 1A
VIN > VOUT + 0.5V, COUT = 22μF,
VIN(AC) = 100mV, f = 100KHz
IOUT = 300mA
Dropout Voltage
VIN Line Regulation
Min
1.1
2.5
0.490
0.485
Typ
220
0.500
0.500
150
Max
5.5
5.5
0.510
0.515
Units
V
V
μA
V
mV
1
mV
2
mV
0.001
%/mA
32
dB
Power Good Threshold
440
mV
Power Good Delay
160
μs
VBIAS Line Regulation
Load Regulation
PSRR
(VIN)
Soft Start
BYPASS=open
550
μs
Power Good Voltage
Isink=230μA
0.39
V
EN Input High Voltage
EN Input Low Voltage
EN Input Bias Current
1.5
VEN = 1.2V
0.8
+1
–1
V
V
μA
Thermal Protection
135
°C
Thermal Protection Hysteresis
15
°C
MP2030 Rev. 0.91
10/10/2011
www.MonolithicPower.com
MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.
© 2011 MPS. All Rights Reserved.
3
MP2030 – 3A VERY LOW DROPOUT LINEAR REGULATOR
PIN FUNCTIONS
QFN3X3 10pins
Pin #
Name
Description
9, 10
OUT
Regulator Output. OUT is the output of the linear regulator, By pass OUT to GND with a
4.7µF or greater capacitor.
3
BIAS
Bias Voltage. Bypass to ground with a 1uF or greater capacitor for maximum output
current the VIN>0.2V+VOUT and VBIAS>2V+VOUT.
8
FB
Feedback Input. Connect a resistive voltage divider from OUT to FB to set the output
voltage. OUT feedback threshold is 0.5V.
7
EN
Enable Input. Drive EN high to turn on the MP2030, drive EN low to turn it off. For
automatic startup, connect EN to IN.
5
GND
1, 2
IN
Ground, exposed pad.
Power Source Input. IN supplies power to the load at the output (through the power
transistor). Bypass IN to GND with a 1µF or greater capacitor.
4
PGOOD Open drain output. High indicated VOUT> 90% final value.
6
BYPASS Connect a 1nF to this pin. Do not load this pin resistively.
QFN5x5 32pins
Pin #
20, 21,22,
23
6
19
18
8
2, 3, 4, 5
7
17
1, 9, 10,
11, 12,
13, 14,
15, 16,
24, 25,
26, 27,
28, 29,
30, 31, 32
Name
Description
Regulator Output. OUT is the output of the linear regulator, By pass OUT to GND with a
VOUT
4.7µF or greater capacitor.
BIAS
Bias Voltage. Bypass to ground with a 1uF or greater capacitor.
Feedback Input. Connect a resistive voltage divider from OUT to FB to set the output
FB
voltage. OUT feedback threshold is 0.5V.
Enable Input. Drive EN high to turn on the MP2030, drive EN low to turn it off. For
EN
automatic startup, connect EN to IN.
GND
Ground, exposed pad.
Power Source Input. IN supplies power to the load at the output (through the power
VIN
transistor). Bypass IN to GND with a 1µF or greater capacitor.
PGOOD Open drain output. High indicated VOUT> 90% final value.
BYPASS Connect a 1nF to this pin. Do not load this pin resistively.
MP2030 Rev. 0.91
10/10/2011
NC
These are no connection pins.
www.MonolithicPower.com
MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.
© 2011 MPS. All Rights Reserved.
4
MP2030 – 3A VERY LOW DROPOUT LINEAR REGULATOR
TYPICAL PERFORMANCE CHARACTERISTICS
C1=10μF, C2=0.1μF, C3=1.0μF, C4=22μF, C6=22nF, VB=5.5V, TA=25ºC, unless otherwise noted
.
Load Regulation
Voltage Dropped
Line Regulation
50
0
1.6
2.4
3.2
4.0
1.222
0A
1.218
VI N=1.5V
1.22
VI N=1.8V
1.21
1.210
1.5 2.0 2.5 3.0 3.5 4.0 4.5
1.20
0.0 0.6 1.2 1.8 2.4 3.0 3.6
PSRR vs. Frequency
V IN ( V )
I OUT (A)
Line Regulation
Load Regulation
1.820
1.820
1.816
1.816
VI N=2.1V
1.2A
0.4A
1.812
V OUT ( V )
V OUT ( V )
PSRR ( dB )
1.23
1.214
LOAD CURRENT ( A )
90
80
70
60
50
40
30 V =1.5V
IN
20 VOUT =1.2V
10 IOUT =0.3A
0
0.01 0.1 1
1.24
0.4A
V OUT ( V )
100
0.8
1.2A
1.226
150
0.0
1.25
1.230
VB=5V
VOUT =1.2V
V OUT ( V )
VOLTAGE DROPPED ( mV )
200
0A
1.808
1.804
10
VI N=2.5V
1.808
1.804
1.800
2.0
100 1000
1.812
2.5
3.0
3.5
4.0
1.800
0.0 0.6 1.2 1.8 2.4 3.0 3.6
4.5
V IN ( V )
FRE QUE NCY ( KHz )
Case Temperature vs. PD
I OUT (A)
Line Regulation
Load Regulation
MP2030DU
70
VOUT =1.2V
VB=5V
V OUT ( V )
60
50
40
2.520
2.52
2.516
2.51
VI N=2.8V
1.2A
0.4A
2.51
0A
2.50
30
20
0.5
2.52
V OUT ( V )
80
1.0
1.5
2.0
PD ( W )
MP2030 Rev. 0.91
10/10/2011
2.5
3.0
2.50
2.5
2.512
VI N=3.3V
2.508
2.504
2.9
3.3
3.7
4.1
4.5
2.500
0.0 0.5 1.0 1.5 2.0 2.5 3.0
V IN ( V )
www.MonolithicPower.com
MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.
© 2011 MPS. All Rights Reserved.
I OUT (A)
5
MP2030 – 3A VERY LOW DROPOUT LINEAR REGULATOR
TYPICAL PERFORMANCE CHARACTERISTICS
C1=10μF, C2=0.1μF, C3=1.0μF, C4=22μF, C6=22nF, VB=5.5V, TA=25ºC, unless otherwise noted
VDROPOUT vs. Temperature
40
VFB vs. Temperature
VOUT=1.2V, IOUT=1A
VOUT vs. Temperature
VIN=1.5V, VOUT=1.2V, IOUT=1mA
0.520
1.23
0.515
1.22
31
0.510
0.505
0.500
V OUT ( V )
34
V FB ( V )
VDROPOUT ( mV )
IOUT =1A
37
1.21
1.20
28
0.495
1.19
25
-45 -25 -5 15 35 55 75 95
0.490
-45 -25 -5 15 35 55 75 95
1.18
-45 -25 -5 15 35 55 75 95
VOUT
0.1V/div
IOUT
1A/div
VIN
2V/div
VEN
2V/div
VIN
2V/div
VEN
2V/div
VOUT
1V/div
VOUT
1V/div
IOUT
0.5A/div
IOUT
0.5A/div
VIN
2V/div
VOUT
2V/div
IOUT
5A/div
MP2030 Rev. 0.91
10/10/2011
VOUT
2V/div
VPG
5V/div
IOUT
5A/div
VOUT
1V/div
IOUT
2A/div
www.MonolithicPower.com
MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.
© 2011 MPS. All Rights Reserved.
6
MP2030 – 3A VERY LOW DROPOUT LINEAR REGULATOR
TYPICAL PERFORMANCE CHARACTERISTICS
C1=10μF, C2=0.1μF, C3=1.0μF, C4=22μF, C6=22nF, VB=5.5V, TA=25ºC, unless otherwise noted
Power Rump Up
Power Rump Down
Line Transient
VIN=2.1V, VOUT=1.8V, IOUT=3A,
with Resistor load
VIN=2.1V, VOUT=1.8V, IOUT=3A,
with Resistor load
VIN=1.8 to 5V, VOUT=1.2V, IOUT=0.2A,
VIN
2V/div
VIN
2V/div
VB
5V/div
VOUT
1V/div
VB
5V/div
VOUT
1V/div
IOUT
2A/div
IOUT
2A/div
MP2030 Rev. 0.91
10/10/2011
VIN
2V/div
VOUT
20mV/div
www.MonolithicPower.com
MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.
© 2011 MPS. All Rights Reserved.
7
MP2030 – 3A VERY LOW DROPOUT LINEAR REGULATOR
BLOCK DIAGRAM
BYPASS
--
TURNS OFF
THE GATE
SOFT
START
EN
+
REFERENCE
+
BIAS
VIN
GATE
0.5V
-GND
VOUT
PGOOD
160us
DELAY
FB
+
O
-0.45V
Figure 1—Block Diagram of Low Dropout Regulator
MP2030 Rev. 0.91
10/10/2011
www.MonolithicPower.com
MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.
© 2011 MPS. All Rights Reserved.
8
MP2030 – 3A VERY LOW DROPOUT LINEAR REGULATOR
OPERATION
MP2030 Theory of Operation
The MP2030 linear dropout regulator provides
adjustable output voltages from 0.9V to 3.6V at
currents up to 3A. This LDO is protected against
short circuits, and it has thermal shut down
protection with 15oC hystheresis.
Utilizing Two Power Supplies
In order to maximize the efficiency MP2030 uses
two power supplies. One power supply is
connected to the BIAS pin and it is used to power
up the internal circuitries including band gap
reference and the rest of control circuitries. The
other power supply is connected to the VIN pins
which are the drain of pass device. This power
supply can be set close to output voltage of LDO.
The output pins are the source of the pass device.
The smaller voltage drop across the pass device
translates to the smaller power loss in pass
device. Thus, the part operates with higher
efficiency.
Internal Current Limit
The MP2030 has an internal current limit set at
almost 4.5A. When the output current is greater
than 4.5A, current limit is activated, the output
voltage is internally forced close to ground, and
stays at this voltage until the short circuit is
removed. Internal current limit is very well
controlled over process variations and ambient
temperature.
Enable
The enable (EN) pin is active high. The enable
pin has a built-in hystheresis. If this pin is held
below 0.8V then part shuts down and draws less
than 1uA from VBIAS supply.
If not used then connect this pin to VBIAS.
Under Voltage Lockout
The Bias voltage is monitored by a circuit that
prevents the LDO start up when the bias voltage
is below 2.35V. This circuitry has an approximate
hystheresis of 90mV.
Soft Start
MP2030 incorporates internal soft start function.
This internal function reduces the start up current
surge into the output capacitor. This allows the
gradual built up of output voltage to its final set
value. The internal soft start cap is held to ground
if there is a fault condition. The fault conditions
are UVLO, Thermal shut down, and disable. The
internal soft start time is almost 550us.
Power Good
The Power Good pin is an open drain output and
can be connected to Bias voltage via a pull up
resistor. Open drain transistor turns off and PG
pin voltage value becomes VBIAS when VFB
exceeds 450mV. Also PG pin can sink at least
230μA while being low.
Setting the Output Voltage
The MP2030 has an adjustable output voltage,
set by using a resistive voltage divider from the
output voltage to FB pin. The voltage divider
divides the output voltage down to the feedback
voltage by the ratio:
VFB = VOUT*R2/ (R1+R2)
Where VFB is the feedback threshold voltage
(VFB=0.5V), and VOUT is the output voltage. R1
connects between VOUT and VFB, and R2 connects
between VFB and ground.
Thus the output voltage is:
VOUT = 0.5*(R1+R2)/R2
R2 can be as high as 100KΩ, but a typical value
is 10KΩ. Using that value, R1 is determined by:
R1=R2 x (VOUT-VFB)/VFB
For example, for a 1.8V output voltage, R2 is
10KΩ, and R1 is 26kΩ. You can select 26kΩ (1%)
resistor for R1.
Power Dissipation
Most of the power dissipation is due to power
dissipation in PASS device. For example,
assume VBIAS=5.0V, VIN=2.0V, VOUT=1.8V, and
IOUT=3A:
PD (PASS) = (VIN-VOUT) x IOUT
PD (PASS) = (2.0V-1.8V) x 3A=0.6
MP2030 Rev. 0.91
10/10/2011
www.MonolithicPower.com
MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.
© 2011 MPS. All Rights Reserved.
9
MP2030 – 3A VERY LOW DROPOUT LINEAR REGULATOR
PBIAS = VBIAS x IGND= 5V x (220uA) = 1.25mW.
This is negligible compared to PD (PASS) =0.6W
For QFN 3X3 θJA is 50oC/W.
0.6W power is dissipated when 3A output current
goes through PASS device with VIN=2.0V, and
VOUT=1.8V.
This gives a rise in die temperature for 0.6 x
50oC/W=30oC
This is a safe operating point assuming a junction
temperature of 135oC at an 85oC ambient
temperature.
A heat sink needs to be utilized for a better
temperature performance.
MP2030 Rev. 0.91
10/10/2011
www.MonolithicPower.com
MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.
© 2011 MPS. All Rights Reserved.
10
MP2030 – 3A VERY LOW DROPOUT LINEAR REGULATOR
PACKAGE INFORMATION
QFN10 (3mm x 3mm)
2.90
3.10
0.30
0.50
PIN 1 ID
MARKING
0.18
0.30
2.90
3.10
PIN 1 ID
INDEX AREA
1.45
1.75
PIN 1 ID
SEE DETAIL A
10
1
2.25
2.55
0.50
BSC
5
6
TOP VIEW
BOTTOM VIEW
PIN 1 ID OPTION A
R0.20 TYP.
PIN 1 ID OPTION B
R0.20 TYP.
0.80
1.00
0.20 REF
0.00
0.05
SIDE VIEW
DETAIL A
NOTE:
2.90
0.70
1) ALL DIMENSIONS ARE IN MILLIMETERS.
2) EXPOSED PADDLE SIZE DOES NOT INCLUDE MOLD FLASH.
3) LEAD COPLANARITY SHALL BE 0.10 MILLIMETER MAX.
4) DRAWING CONFORMS TO JEDEC MO-229, VARIATION VEED-5.
5) DRAWING IS NOT TO SCALE.
1.70
0.25
2.50
0.50
RECOMMENDED LAND PATTERN
MP2030 Rev. 0.91
10/10/2011
www.MonolithicPower.com
MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.
© 2011 MPS. All Rights Reserved.
11
MP2030 – 3A VERY LOW DROPOUT LINEAR REGULATOR
QFN32 (5mm x 5mm)
NOTICE: The information in this document is subject to change without notice. Please contact MPS for current specifications.
Users should warrant and guarantee that third party Intellectual Property rights are not infringed upon when integrating MPS
products into any application. MPS will not assume any legal responsibility for any said applications.
MP2030 Rev. 0.91
10/10/2011
www.MonolithicPower.com
MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.
© 2011 MPS. All Rights Reserved.
12
Similar pages