MPS MP4420 High efficiency 2a, 36v, synchronous step down converter Datasheet

MP4420
High Efficiency 2A, 36V,
Synchronous Step Down Converter
The Future of Analog IC Technology
DESCRIPTION
FEATURES
The MP4420 is a high-frequency, synchronous,
rectified, step-down, switch-mode converter
with built-in power MOSFETs. It offers a very
compact solution to achieve a 2A continuous
output current with excellent load and line
regulation over a wide input supply range. The
MP4420 has synchronous mode operation for
higher efficiency over the output current load
range.
•
•
•
•
•
•
Current-mode operation provides fast transient
response and eases loop stabilization.
•
•
•
•
•
•
•
•
Full protection features include over-current
protection and thermal shut down.
The MP4420 requires a minimal number of
readily-available standard external components,
and is available in a space-saving 8-pin
TSOT23 package.
Wide 4V to 30V Continuous Operating Input
Range
36V Input Transient Tolerance for
Automotive Load Dump
90mΩ/55mΩ Low RDS(ON) Internal Power
MOSFETs
High-Efficiency Synchronous Mode
Operation
Default 410kHz Switching Frequency
Synchronizes to a 200kHz to 2.2MHz
External Clock
High Duty Cycle for Automotive Cold-crank
Power-Save Mode
Internal Soft-Start
Power Good
OCP Protection and Hiccup
Thermal Shutdown
Output Adjustable from 0.8V
Available in an 8-pin TSOT-23 package
APPLICATIONS
•
•
•
Automotive
Industrial Control System
Distributed Power Systems
All MPS parts are lead-free and adhere to the RoHS directive. For MPS green
status, please visit MPS website under Quality Assurance. “MPS” and “The
Future of Analog IC Technology” are Registered Trademarks of Monolithic
Power Systems, Inc.
TYPICAL APPLICATION
2
VIN
1
C3
0.1 F
MP4420 Rev.1.0
8/5/2014
R4
20
C4
100nF L1
MP4420
6
EN/SYNC
BST 5
IN
C1
22 F
EN/SYNC
SW 3
PG
7 VCC
GND
4
FB
8
10 H
R3
51k
R1
41.2k
3.3V/2A
C2
47 F
VOUT
R2
13k
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1
MP4420 – 36V, 2A SYNCHRONOUS STEP-DOWN CONVERTER
ORDERING INFORMATION
Part Number*
MP4420GJ
Package
TSOT23-8
Top Marking
See Below
* For Tape & Reel, add suffix –Z (e.g. MP4420GJ–Z);
TOP MARKING
AFP: product code of MP4420GJ
Y: year code;
PACKAGE REFERENCE
TOP VIEW
PG
1
8
FB
IN
2
7
VCC
SW
3
6
EN/SYNC
GND
4
5
BST
TSOT23-8
MP4420 Rev.1.0
8/5/2014
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2
MP4420 – 36V, 2A SYNCHRONOUS STEP-DOWN CONVERTER
ABSOLUTE MAXIMUM RATINGS (1)
Thermal Resistance
VIN ................................................ -0.3V to 40V
VSW ................................................ -0.3V to 41V
VBS ....................................................... VSW+6V
All Other Pins ................................ -0.3V to 6V (2)
(3)
Continuous Power Dissipation (TA = +25°C)
TSOT23-8 ................................................ 1.25W
Junction Temperature .............................. 150°C
Lead Temperature ................................... 260°C
Storage Temperature ................. -65°C to 150°C
TSOT23-8 ............................. 100 ..... 55 ... °C/W
Recommended Operating Conditions
Continuous Supply Voltage VIN .......... 4V to 30V
Output Voltage VOUT................... 0.8V to 0.9xVIN
Operating Junction Temp. (TJ). -40°C to +125°C
MP4420 Rev.1.0
8/5/2014
(4)
θJA
θJC
Notes:
1) Absolute maximum ratings are rated under room temperature
unless otherwise noted. Exceeding these ratings may
damage the device.
2) About the details of EN pin’s ABS MAX rating, please refer to
page 14, Enable/SYNC Control section.
3) The maximum allowable power dissipation is a function of the
maximum junction temperature TJ (MAX), the junction-toambient thermal resistance θJA, and the ambient temperature
TA. The maximum allowable continuous power dissipation at
any ambient temperature is calculated by PD (MAX) = (TJ
(MAX)-TA)/θJA. Exceeding the maximum allowable power
dissipation will cause excessive die temperature, and the
regulator will go into thermal shutdown. Internal thermal
shutdown circuitry protects the device from permanent
damage.
4) Measured on JESD51-7, 4-layer PCB.
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MP4420 – 36V, 2A SYNCHRONOUS STEP-DOWN CONVERTER
ELECTRICAL CHARACTERISTICS
VIN = 12V, TJ = +25°C, unless otherwise noted.
Parameter
Symbol
Supply Current (Shutdown)
ISHDN
Supply Current (Quiescent)
IQ
HS Switch-ON Resistance
Condition
Min
Typ
VEN = 0V
Max
Units
8
μA
VEN = 2V, VFB = 1V
0.5
0.7
mA
RON_HS
VBST-SW =5V
90
105
mΩ
LS Switch-ON Resistance
RON_LS
VCC =5V
55
75
mΩ
Switch Leakage
ILKG
VEN = 0V, VSW =12V
1
μA
Current Limit
SW
ILIMIT
Oscillator Frequency
fSW
Fold-Back Frequency
fFB
Maximum Duty Cycle
DMAX
(5)
Minimum ON Time
tON
Under 40% Duty Cycle
3.2
4.2
5.3
A
VFB=750mV
320
410
500
kHz
VFB<400mV
70
100
130
kHz
VFB=750mV, 410kHz
92
95
%
70
ns
MIN
Sync Frequency Range
fSYNC
0.2
Feedback Voltage
VFB
780
792
RISING
1.15
FALLING
1.05
1.25
Feedback Current
IFB
EN Rising Threshold
VEN
EN Falling Threshold
VEN
EN Threshold Hysteresis
EN Input Current
VFB=820mV
VEN_HYS
IEN
2.4
MHz
804
mV
10
100
nA
1.4
1.65
V
1.45
V
150
mV
VEN=2V
4
6
μA
VEN=0
0
0.2
μA
VIN Under-Voltage Lockout
Threshold-Rising
VIN Under-Voltage Lockout
Threshold-Falling
INUVRISING
3.3
3.5
3.7
V
INUVFALLING
3.1
3.3
3.5
V
VIN Under-Voltage Lockout
Threshold-Hysteresis
INUVHYS
VCC Regulator
VCC
Thermal Shutdown
Thermal Hysteresis
4.6
5.2
V
1.5
4
%
0.55
1.45
2.45
ms
150
170
RISING
as percentage of VFB
86.5
90
93.5
%
FALLING
as percentage of VFB
80.5
84
87.5
%
ICC=5mA
tSS
VOUT from 10% to 90%
(5)
(5)
°C
30
PG Rising Threshold
PGVth
PG Falling Threshold
PGVth
MP4420 Rev.1.0
8/5/2014
ICC=0mA
mV
4.9
VCC Load Regulation
Soft-Start Period
200
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°C
4
MP4420 – 36V, 2A SYNCHRONOUS STEP-DOWN CONVERTER
ELECTRICAL CHARACTERISTICS (continued)
VIN = 12V, TJ = +25°C, unless otherwise noted.
Parameter
Symbol
Condition
PG Threshold Hysteresis
PGVth_HYS
as percentage of VFB
Min
Typ
Max
6
Units
%
PG Rising Delay
PGTd_RISING
40
90
160
μs
PG Falling Delay
PGTd_FALLING
30
55
95
μs
0.1
0.3
V
10
100
nA
PG Sink Current Capability
PG Leakage Current
VPG
Sink 4mA
ILKG_PG
Notes:
5) Derived from bench characterization. Not tested in production
MP4420 Rev.1.0
8/5/2014
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5
MP4420 – 36V, 2A SYNCHRONOUS STEP-DOWN CONVERTER
PIN FUNCTIONS
Package
Pin #
1
2
3
4
5
6
7
8
Name
Description
Power Good. The output of this pin is an open drain and goes high if the output voltage
exceeds 90% of the nominal voltage.
Supply Voltage. The MP4420 operates from a 4V to 30V input rail. Requires C1 to
IN
decouple the input rail. Connect using a wide PCB trace.
SW
Switch Output. Connect using a wide PCB trace.
System Ground. This pin is the reference ground of the regulated output voltage, and PCB
GND
layout requires special care. For best results, connect to GND with copper traces and vias.
Bootstrap. Requires a capacitor connected between SW and BST pins to form a floating
BST
supply across the high-side switch driver. A 20Ω resistor placed between SW and BST cap
is strongly recommended to reduce SW spike voltage.
Enable/Synchronize. EN high to enable the MP4420. Apply an external clock to the EN pin
EN/SYNC
to change the switching frequency.
Bias Supply. Decouple with 0.1μF-to-0.22μF capacitor. Select a capacitor that does not
VCC
exceed 0.22μF.
Feedback. Connect to the tap of an external resistor divider from the output to GND, to set
the output voltage. The frequency fold-back comparator lowers the oscillator frequency
FB
when the FB voltage is below 660mV to prevent current limit runaway during a short-circuit
fault condition.
MP4420 Rev.1.0
8/5/2014
PG
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MP4420 – 36V, 2A SYNCHRONOUS STEP-DOWN CONVERTER
TYPICAL CHARACTERISTICS
MP4420 Rev.1.0
8/5/2014
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MP4420 – 36V, 2A SYNCHRONOUS STEP-DOWN CONVERTER
TYPICAL CHARACTERISTICS (continued)
MP4420 Rev.1.0
8/5/2014
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MP4420 – 36V, 2A SYNCHRONOUS STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS
VIN = 12V, VOUT = 3.3V, L = 10µH, RBST=20Ω, TA = +25°C, unless otherwise noted.
MP4420 Rev.1.0
8/5/2014
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MP4420 – 36V, 2A SYNCHRONOUS STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 12V, VOUT = 3.3V, L = 10µH, RBST=20Ω, TA = +25°C, unless otherwise noted.
MP4420 Rev.1.0
8/5/2014
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MP4420 – 36V, 2A SYNCHRONOUS STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 12V, VOUT = 3.3V, L = 10µH, RBST=20Ω, TA = +25°C, unless otherwise noted.
MP4420 Rev.1.0
8/5/2014
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MP4420 – 36V, 2A SYNCHRONOUS STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 12V, VOUT = 3.3V, L = 10µH, RBST=20Ω, TA = +25°C, unless otherwise noted.
MP4420 Rev.1.0
8/5/2014
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MP4420 – 36V, 2A SYNCHRONOUS STEP-DOWN CONVERTER
BLOCK DIAGRAM
Figure 1: Functional Block Diagram
MP4420 Rev.1.0
8/5/2014
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MP4420 – 36V, 2A SYNCHRONOUS STEP-DOWN CONVERTER
OPERATION
The MP4420 is a high-frequency, synchronous,
rectified, step-down, switch-mode converter with
built-in power MOSFETs. It offers a very compact
solution to achieve 2A continuous output current
with excellent load and line regulation over a
wide input supply range.
The MP4420 operates in a fixed-frequency,
peak-current–control mode to regulate the output
voltage. An internal clock initiates a PWM cycle.
The integrated high-side power MOSFET turns
on and remains on until its current reaches the
value set by the COMP voltage. When the power
switch is off, it remains off until the next clock
cycle starts. If the current in the power MOSFET
does not reach the current value set by COMP
within 95% of one PWM period, the power
MOSFET will be forced to turn off.
Internal Regulator
The 5V internal regulator power most of the
internal circuitries. This regulator takes the VIN
input and operates in the full VIN range: When VIN
exceeds 5.0V, the output of the regulator is in full
regulation; when VIN falls below 5.0V, the output
of the regulator decreases following the VIN. A
0.1uF decoupling ceramic capacitor is needed at
the pin.
Error Amplifier
The error amplifier compares the FB pin voltage
against the internal 0.8V reference (REF) and
outputs a COMP voltage—this COMP voltage
controls the power MOSFET current. The
optimized
internal
compensation
network
minimizes the external component count and
simplifies the control loop design.
Enable/SYNC Control
EN/SYNC is a digital control pin that turns the
regulator on and off: Drive EN high to turn on the
regulator, drive it low to turn it off. An internal
500kΩ resistor from EN/SYNC to GND allows
EN/SYNC to be floated to shut down the chip.
The EN pin is clamped internally using a 6.5V
series Zener diode, as shown in Figure 2.
Connect the EN input pin through a pullup
resistor to any voltage connected to the VIN pin—
the pullup resistor limits the EN input current to
less than 150µA.
MP4420 Rev.1.0
8/5/2014
For example, with 12V connected to VIN, RPULLUP
≥ (12V – 6.5V) ÷ 150µA = 36.7kΩ.
Connecting the EN pin directly to a voltage
source without any pullup resistor requires
limiting voltage amplitude to ≤6V to prevent
damage to the Zener diode.
Figure 2: 6.5V-type Zener Diode
Connect an external clock with a range of
200kHz to 2.2MHz 2ms after output voltage is set
to synchronize the internal clock rising edge to
the external clock rising edge. The pulse width of
external clock signal should be less than 1.7μs.
Under-Voltage Lockout
Under-voltage lockout (UVLO) protects the chip
from operating at an insufficient supply voltage.
The MP4420 UVLO comparator monitors the
output voltage of the internal regulator, VCC. The
UVLO rising threshold is about 3.5V while its
falling threshold is 3.3V.
Internal Soft-Start
The soft-start prevents the converter output
voltage from overshooting during startup. When
the chip starts, the internal circuitry generates a
soft-start voltage (SS) that ramps up from 0V to
1.2V. When SS is lower than REF, SS overrides
REF so the error amplifier uses SS as the
reference. When SS exceeds REF, the error
amplifier uses REF as the reference. The SS
time is internally set to 1.5ms.
Over-Current Protection and Hiccup
The MP4420 has cycle-by-cycle over current limit
when the inductor current peak value exceeds
the set current limit threshold. If the output
voltage starts to drop until FB is below the UnderVoltage (UV) threshold—typically 84% below the
reference—the MP4420 enters hiccup mode to
periodically restart the part. This protection
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MP4420 – 36V, 2A SYNCHRONOUS STEP-DOWN CONVERTER
mode is especially useful when the output is
dead-shorted to ground. The average shortcircuit current is greatly reduced to alleviate the
thermal issue and to protect the regulator. The
MP4420 exits the hiccup mode once the overcurrent condition is removed.
Thermal Shutdown
Thermal shutdown prevents the chip from
operating at exceedingly high temperatures.
When the silicon die temperature exceeds 170°C,
it shuts down the whole chip. When the
temperature drops below its lower threshold
(typically 140°C) the chip is enabled again.
Floating Driver and Bootstrap Charging
An external bootstrap capacitor power the
floating-power-MOSFET driver. A dedicated
internal regulator (see figure 3) charges and
regulates the bootstrap capacitor voltage to ~5V.
When the voltage between the BST and SW
nodes drops below regulation, a PMOS pass
transistor connected from VIN to BST turns on.
The charging current path is from VIN, BST and
then to SW. The external circuit should provide
enough voltage headroom to facilitate charging.
As long as VIN is significantly higher than SW, the
bootstrap capacitor remains charged. When the
HS-FET is ON, VIN ≈ VSW so the bootstrap
capacitor cannot charge. When the LS-FET is
ON, VIN−VSW reaches its maximum for fast
charging. When there is no inductor current,
VSW=VOUT so the difference between VIN and VOUT
can charge the bootstrap capacitor. The floating
driver has its own UVLO protection, with a rising
threshold of 2.2V and hysteresis of 150mV. A
20Ω resistor placed between SW and BST cap is
strongly recommended to reduce SW spike
voltage.
.
Startup and Shutdown
If both VIN and EN exceed their appropriate
thresholds, the chip starts: The reference block
starts first, generating stable reference voltage
and currents, and then the internal regulator is
enabled. The regulator provides stable supply for
the remaining circuitries.
Three events can shut down the chip: EN low, VIN
low, and thermal shutdown. In the shutdown
procedure, the signaling path is first blocked to
avoid any fault triggering. The COMP voltage and
the internal supply rail are then pulled down. The
floating driver is not subject to this shutdown
command.
Power Good
The MP4420 has power good (PG) output. The
PG pin is the open drain of a MOSFET. It should
be connected to VCC or some other voltage
source through a resistor (e.g. 100kΩ). In the
presence of an input voltage, the MOSFET turns
on so that the PG pin is pulled to low before SS
is ready. After VFB reaches 90%×REF, the PG pin
is pulled high after a delay, typically 90μs. When
VFB drops to 84%×REF, the PG pin is pulled low.
Also, PG is pulled low if thermal shutdown or EN
is pulled low.
Figure 3: Internal Bootstrap Charging Circuit
MP4420 Rev.1.0
8/5/2014
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15
MP4420 – 36V, 2A SYNCHRONOUS STEP-DOWN CONVERTER
APPLICATION INFORMATION
Setting the Output Voltage
The external resistor divider sets the output
voltage (see Typical Application on page 1). The
feedback resistor R1 also sets the feedback loop
bandwidth with the internal compensation
capacitor. Choose R1 around 40kΩ. R2 is then
given by:
R2 =
R1
VOUT
−1
0.792V
Choose the inductor ripple current to be
approximately 30% of the maximum load current.
The maximum inductor peak current is:
IL(MAX ) = ILOAD +
Use a larger inductor for improved efficiency
under light-load conditions—below 100mA.
VIN UVLO Setting
The T-type network—as shown in Figure 4—is
highly recommended when VOUT is low.
MP4420 has internal fix under voltage lock out
(UVLO) threshold: rising threshold is 3.5V while
falling threshold is about 3.3V. For the application
needs higher UVLO point, external resistor
divider between EN and IN as shown in figure 4
can be used to get higher equivalent UVLO
threshold.
VIN
Figure 4: T-Type Network
Table 1: Resistor Selection for Common Output
Voltages
VOUT (V)
R1 (kΩ)
R2 (kΩ)
RT (kΩ)
41.2 (1%)
41.2 (1%)
13 (1%)
7.68 (1%)
51 (1%)
51 (1%)
Selecting the Inductor
Use a1µH-to-10µH inductor with a DC current
rating of at least 25% percent higher than the
maximum load current for most applications. For
highest efficiency, an inductor with small DC
resistance is recommended. For most designs,
the inductance value can be derived from the
following equation.
L1 =
IN
R5
RT+R1 is used to set the loop bandwidth.
Basically, higher RT+R1, lower bandwidth. To
ensure the loop stability, it is strongly
recommended to limit the bandwidth lower than
40kHz based on the 410kHz default fsw. Table 1
lists the recommended T-type resistors value for
common output voltages.
3.3
5
ΔIL
2
EN
R6
500k
Figure 5: Adjustable UVLO using EN divider
The UVLO threshold can be computed from
below two equations:
INUVRISING = (1 +
R5
) × VEN_RISING
500k//R6
INUVFALLING = (1 +
R5
) × VEN_FALLING
500k//R6
Where VEN_RISING=1.4V, VEN_FALLING=1.25V.
When choose R5, make sure it is big enough to
limit the current flows into EN pin lower than
150uA.
VOUT × (VIN − VOUT )
VIN × ΔIL × fOSC
Where ΔIL is the inductor ripple current.
MP4420 Rev.1.0
8/5/2014
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MP4420 – 36V, 2A SYNCHRONOUS STEP-DOWN CONVERTER
Selecting the Input Capacitor
The input current to the step-down converter is
discontinuous, therefore requires a capacitor is to
supply the AC current to the step-down converter
while maintaining the DC input voltage. Use low ESR
capacitors for the best performance. Use ceramic
capacitors with X5R or X7R dielectrics for best
results because of their low ESR and small
temperature coefficients.
For most application, a 22µF ceramic capacitor is
sufficient to maintain the DC input voltage. And it
is strongly recommended to use another lower
value capacitor (e.g. 0.1µF) with small package
size (0603) to absorb high frequency switching
noise. Make sure place the small size capacitor
as close to IN and GND pins as possible (see
PCB LAYOUT section).
Since C1 absorbs the input switching current, it
requires an adequate ripple current rating. The RMS
current in the input capacitor can be estimated by:
I C1 = ILOAD ×
VOUT ⎛⎜ VOUT
× 1−
VIN ⎜⎝
VIN
⎞
⎟
⎟
⎠
The worse case condition occurs at VIN = 2VOUT,
where:
IC1 =
ILOAD
2
For simplification, choose an input capacitor with
an RMS current rating greater than half of the
maximum load current.
The input capacitor can be electrolytic, tantalum
or ceramic. When using electrolytic or tantalum
capacitors, add a small, high quality ceramic
capacitor (e.g. 1μF) placed as close to the IC as
possible. When using ceramic capacitors, make
sure that they have enough capacitance to
provide sufficient charge to prevent excessive
MP4420 Rev.1.0
8/5/2014
voltage ripple at input. The input voltage ripple
caused by capacitance can be estimated by:
ΔVIN =
⎛
⎞
ILOAD
V
V
× OUT × ⎜ 1 − OUT ⎟
fS × C1 VIN ⎝
VIN ⎠
Selecting the Output Capacitor
The output capacitor (C2) maintains the DC
output voltage. Use ceramic, tantalum, or lowESR electrolytic capacitors. For best results, use
low ESR capacitors to keep the output voltage
ripple low. The output voltage ripple can be
estimated by:
ΔVOUT =
VOUT ⎛ VOUT
× ⎜1 −
fS × L1 ⎝
VIN
⎞ ⎛
⎞
1
⎟ × ⎜ RESR +
⎟
8
×
f
×
C2
S
⎠ ⎝
⎠
Where L1 is the inductor value and RESR is the
equivalent series resistance (ESR) value of the
output capacitor.
For ceramic capacitors, the capacitance
dominates the impedance at the switching
frequency, and the capacitance causes the
majority of the output voltage ripple. For
simplification, the output voltage ripple can be
estimated by:
ΔVOUT =
⎛ V ⎞
VOUT
× ⎜ 1 − OUT ⎟
VIN ⎠
8 × fS × L1 × C2 ⎝
2
For tantalum or electrolytic capacitors, the ESR
dominates the impedance at the switching
frequency. For simplification, the output ripple
can be approximated to:
ΔVOUT =
VOUT ⎛
V
⎞
× ⎜ 1 − OUT ⎟ × RESR
fS × L1 ⎝
VIN ⎠
The characteristics of the output capacitor also
affect the stability of the regulation system. The
MP4420 can be optimized for a wide range of
capacitance and ESR values.
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17
MP4420 – 36V, 2A SYNCHRONOUS STEP-DOWN CONVERTER
BST Resistor and External BST Diode
A 20ohm resistor in series with BST capacitor is
recommended to reduce the SW spike voltage.
Higher resistance is better for SW spike
reduction, but will compromise the efficiency on
the other hand.
An external BST diode can enhance the
efficiency of the regulator when the duty cycle is
high (>65%). A power supply between 2.5V and
5V can be used to power the external bootstrap
diode and VCC or VOUT is the good choice of
this power supply in the circuit as shown in
Figure 6.
3) Use large ground plane directly connect to
GND pin. Add vias near the GND pin if bottom
layer is ground plane.
4) Route SW, BST away from sensitive analog
areas such as FB.
5) Place the T-type feedback resistor close to
chip to ensure the trace which connects to FB pin
as the short as possible.
VCC 7
External BST diode
1N4148
BST 5
VCC/VOUT
RBST
SW
3
CBST
L
VOUT
COUT
Top Layer
Figure 6: Optional External Bootstrap Diode to
Enhance Efficiency
The recommended external BST diode is IN4148,
and the BST capacitor value is 0.1µF to 1μF.
PCB Layout
PCB layout, especially the input capacitor and
VCC capacitor placement, is very important to
achieve stable operation. For the best results,
follow these guidelines:
1) Place the ceramics input capacitor as close to
IN and GND pins as possible, especially the
small package size (0603) input bypass capacitor.
Keep the connection of input capacitor and IN pin
as short and wide as possible.
2) Place the VCC capacitor to VCC pin and GND
pin as close as possible. Make the trace length of
VCC pin-VCC capacitor anode-VCC capacitor
cathode-chip GND pin as short as possible.
MP4420 Rev.1.0
8/5/2014
Bottom Layer
Figure 7: Recommended PCB Layout
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© 2014 MPS. All Rights Reserved.
18
MP4420 – 36V, 2A SYNCHRONOUS STEP-DOWN CONVERTER
TYPICAL APPLICATION CIRCUITS
Figure 8: 3.3V Output Typical Application Circuit
MP4420 Rev.1.0
8/5/2014
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2014 MPS. All Rights Reserved.
19
MP4420 – 36V, 2A SYNCHRONOUS STEP-DOWN CONVERTER
PACKAGE INFORMATION
TSOT23-8
RECOMMENDED LAND PATTERN
TOP VIEW
SEATING PLANE
SEE DETAIL ’’A’’
FRONT VIEW
SIDE VIEW
NOTE:
DETAIL ’’A’’
1) ALL DIMENSIONS ARE IN MILLIMETERS.
2) PACKAGE LENGTH DOES NOT INCLUDE MOLD
FLASH, PROTRUSION OR GATE BURR.
3) PACKAGE WIDTH DOES NOT INCLUDE
INTERLEAD FLASH OR PROTRUSION.
4) LEAD COPLANARITY (BOTTOM OF LEADS AFTER
FORMING) SHALL BE 0.10 MILLIMETERS MAX.
5) JEDEC REFERENCE IS MO-193, VARIATION BA.
6) DRAWING IS NOT TO SCALE.
NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third
party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not
assume any legal responsibility for any said applications.
MP4420 Rev.1.0
8/5/2014
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2014 MPS. All Rights Reserved.
20