– – E T E LNE150 OBSOL Preliminary N-Channel Enhancement-Mode DMOS FETs Ordering Information Order Number / Package Product marking for TO-236AB: BVDSS / BVDGS RDS(ON) (max) ID(ON) (min) TO-236AB* Die NEE❋ 500V 1.0KΩ 3.0mA LNE150K1 LNE150ND where ❋ = 2-week alpha date code *Same as SOT-23. All units shipped on 3,000 piece carrier tape reels. Features Advanced DMOS Technology Free from secondary breakdown This low threshold Enhancement-mode (normally-off) transistor utilizes an advanced DMOS structure and Supertex’s well-proven silicon-gate manufacturing process. This combination produces devices with the power handling capabilities of bipolar transistors and with the high impedance and positive temperature coefficient inherent in MOS devices. Characteristic of all MOS structures, these devices are free from thermal runaway and thermallyinduced secondary breakdown. Low power drive requirement Ease of paralleling Low CISS and fast switching speeds Excellent thermal stability Integral Source-Drain diode Supertex’s DMOS FETs are ideally suited to a wide range of switching and amplifying applications where high breakdown voltage, high input impedance, low input capacitance, and fast switching speeds are desired. High input impedance and high gain Applications Package Options Logic level interface - ideal for TTL and CMOS Solid state relays Battery operated systems Photo voltaic drive Analog switches General purpose line drivers Source Telecom switches Absolute Maximum Ratings Drain-to-Source Voltage BVDSS Drain-to-Gate Voltage BVDGS Gate-to-Source Voltage Operating and Storage Temperature Soldering Temperature* Gate Drain -0.7V to +10V TO-236AB -55°C to +150°C (SOT-23) 300°C top view * Distance of 1.6 mm from case for 10 seconds. Note: See Package Outline section for dimensions. 7-21 7 LNE150 Thermal Characteristics Package ID (continuous)* TO-236AB ID (pulsed) 3mA Power Dissipation @ TA = 25°C θjc θa °C/W °C/W 0.36W 200 350 20mA * ID (continuous) is limited by max rated Tj. – IDR IDRM 3mA 20mA – E T E OBSOL Electrical Characteristics (@ 25°C unless otherwise specified) Symbol Parameter Min Typ Max BVDSS Drain-to-Source Breakdown Voltage BVGSS Gate-to-Source Diode Breakdown Voltage V SG Source-to-Gate diode Forward Voltage Drop ISG Source-to-Gate Continuous Diode Current VGS(TH) Gate Threshold Voltage ∆VGS(TH) Change in VGS(TH) with Temperature IGSS Gate Body Leakage Current IDSS Zero Gate Voltage Drain Current ID(ON) ON-State Drain Current RDS(ON) Static Drain-to-Source ON-State Resistance ∆RDS(ON) Change in RDS(ON) with Temperature CISS Input Capacitance COSS Common Source Output Capacitance CRSS Reverse Transfer Capacitance tON Turn-ON Time 10 tOFF Turn-OFF Time 10 VSD Diode forward Voltage Drop 1.8 Unit Conditions 500 V VGS = 0V, ID = 100µA 10 V IGS = 100µA V ISG = 100µA 0.7 3 0.6 mA VDS = 0V 2.5 V VGS = VDS, ID = 1.0mA -4.5 mV/°C VGS = VDS, ID = 1.0mA 50 nA VGS = +5.0V, VDS = 0V 100 nA VGS =0V, VDS = 500V mA VGS = 5.0V, VDS = 25V 1.0 KΩ VGS = 5.0V, ID = 500µA 1.1 %/°C 3 12 VGS = 0V, ID = 500µA VGS = 0V, VDS = 25V, 2 pF f=1.0MHz ns VGS = 0V to 5V, RGEN = 100Ω, 0.8 VDD = 1.0V, Rload = 200Ω V VGS = 0V, ISD = 3.0mA Notes: 1. All D.C. parameters 100% tested at 25°C unless otherwise stated. (Pulse test: 300µs pulse, 2% duty cycle.) 2. All A.C. parameters sample tested. Switching Waveforms and Test Circuit VDD RL 5V 90% PULSE GENERATOR INPUT 0V 10% t(ON) td(ON) Rgen t(OFF) tr td(OFF) OUTPUT tF D.U.T. VDD 10% INPUT 10% OUTPUT 0V 90% 90% 7-22