MPS HF900GPR 900v offline switching regulator Datasheet

HF900
900V Offline Switching Regulator
The Future of Analog IC Technology
DESCRIPTION
FEATURES
The HF900 is a flyback regulator with an
integrated 900V MOSFET. Requiring a minimum
number of external components, the HF900
provides excellent power regulation in AC/DC
applications that require high reliability. These
applications include smart meters, large
appliances, industrial controls, and products
powered by unstable AC grids.
•
•
The regulator uses peak-current-mode control to
provide excellent transient response and easy
loop compensation. When the output power falls
below a given level, the regulator enters burst
mode to lower the standby power consumption.
The MPS proprietary 900V monolithic process
enables over-temperature protection (OTP) on
the same silicon of the 900V power FET, offering
precise thermal protection. Also, it offers a full
suite of protection features such as VCC undervoltage lockout, over-load protection, overvoltage protection, and short-circuit protection.
The
HF900
is
designed
to
minimize
electromagnetic
interference
for
wireless
communication in home and building automation
applications. The operating frequency is
programmed externally with a single resistor, so
the power supply’s radiated energy can be
designed to avoid the interference with wireless
communication.
In addition to the programmable frequency, the
HF900 employs a frequency jittering function that
not only greatly reduces the noise level but also
reduces the cost of the EMI filter.
•
•
•
•
•
•
•
•
•
•
•
•
•
Internal Integrated 900V MOSFET
Programmable Fixed Switching Frequency up
to 300kHz
Frequency Jittering
Current-Mode Operation
Internal High-Voltage Current Source
Low Standby Power Consumption via Active
Burst Mode
Internal Leading Edge Blanking
Built-In Soft-Start Function
Internal Slope Compensation
Built-In Input Over-Voltage Protection
Over-Temperature Protection (OTP)
VCC Under-Voltage Lockout with Hysteresis
Over-Voltage Protection on VCC
Time-Based Overload Protection
Short-Circuit Protection (SCP)
APPLICATIONS
•
•
•
•
Smart Power Meters
Large Appliances
Industrial Controls
All AC/DC Supplies Sold Where Power Grid
may be Unstable
All MPS parts are lead-free, halogen free, and adhere to the RoHS directive. For
MPS green status, please visit MPS website under Quality Assurance.
“MPS” and “The Future of Analog IC Technology” are Registered Trademarks
of Monolithic Power Systems, Inc.
The HF900 is available in SOIC14-11 and
PDIP8-7EP packages.
HF900 Rev. 1.0
8/4/2015
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1
HF900 – 900V OFFLINE SWITCHING REGULATOR
TYPICAL APPLICATION
HF900 Rev. 1.0
8/4/2015
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HF900 – 900V OFFLINE SWITCHING REGULATOR
ORDERING INFORMATION
Part Number*
HF900GPR
HF900GS
Package
PDIP8-7EP
SOIC14-11
Top Marking
See Below
See Below
* For Tape & Reel, add suffix –Z (e.g. HF900GPR–Z);
TOP MARKING (PDIP8-7EP)
HF900: part number;
MPS: MPS prefix:
YY: year code;
WW: week code:
LLLLLLLL: lot number;
TOP MARKING
(SOIC14-11)
MPS: MPS prefix:
YY: year code;
WW: week code:
HF900: part number;
LLLLLLLLL: lot number;
HF900 Rev. 1.0
8/4/2015
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3
HF900 – 900V OFFLINE SWITCHING REGULATOR
PACKAGE REFERENCE
TOP VIEW
TOP VIEW
PDIP8-7EP
SOIC14-11
ABSOLUTE MAXIMUM RATINGS (1)
Thermal Resistance
DRAIN..........................................–0.3V to 900V
VCC ...............................................–0.3V to 30V
All other pins .................................–0.3V to 6.5V
(2)
Continuous power dissipation (TA = +25°C)
PDIP8-7EP .............................................. 1.47W
SOIC14-11 ............................................... 1.45W
Junction temperature ................................150°C
Lead temperature .....................................260°C
Storage temperature ................ -60°C to +150°C
ESD capability human body model .......... 2.0kV
ESD capability charged device model ...... 2.0kV
PDIP8-7EP..............................68 ....... 7 .... °C/W
SOIC14-11 ..............................70 ...... 35 ... °C/W
Recommended Operation Conditions
(3)
(4)
θJA
θJC
NOTES:
1) Exceeding these ratings may damage the device.
2) The maximum allowable power dissipation is a function of the
maximum junction temperature TJ (MAX), the junction-toambient thermal resistance θJA, and the ambient temperature
TA. The maximum allowable continuous power dissipation at
any ambient temperature is calculated by PD (MAX) = (TJ
(MAX)-TA)/θJA. Exceeding the maximum allowable power
dissipation will cause excessive die temperature, and the
regulator will go into thermal shutdown. Internal thermal
shutdown circuitry protects the device from permanent
damage.
3) The device is not guaranteed to function outside of its
operating conditions.
4) Measured on JESD51-7, 4-layer PCB.
VCC to GND .............................10.1 V to 24.5 V
Operating junction temp (TJ) .. -40 °C to +125 °C
HF900 Rev. 1.0
8/4/2015
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HF900 – 900V OFFLINE SWITCHING REGULATOR
ELECTRICAL CHARACTERISTICS
VCC =12V, TJ=-40°C~125°C, Min & Max are guaranteed by characterization, typical is tested under
25°C, unless otherwise noted.
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
2
3.1
mA
15
30
μA
Start-Up Current Source (DRAIN)
Supply current from DRAIN
Leakage current from DRAIN
ICharge
VCC = 6V; VDrain = 400V
ILeak
VCC = 13V; VDrain = 400V
Breakdown voltage
V(BR)DSS
Ileakage = 100μA
On-state resistance
RDS(ON)
VCC = 10.1V;
IDrain = 100mA
1.35
900
V
TJ = 25°C
13
17
Ω
TJ = 125°C
22
26
Ω
Supply Voltage Management (VCC)
VCC upper level where the
IC switches on
VCCH
11.5
13.0
14.5
V
VCC lower level where the
IC switches off
VCCL
8.9
9.4
10.1
V
VCC hysteresis
VCC_HYS
2.7
3.6
4.6
V
VCC OVP level
VOVP
24.5
26.0
27.3
V
VCC re-charge level where
the protection occurs
VCCR
4.5
5.3
6
V
700
μA
Quiescent current at
protection phase
IPro
VCC = 6V
Quiescent current
IQ
VCC = 13V
780
980
µA
Operation current
ICC
VCC = 13V; fS = 100kHz
1.7
2
mA
Feedback Management (FB)
Internal pull-up resistor
RFB
Internal pull-up voltage
VUP
FB
to
current-set-point
division ratio
Internal soft-start time
10
3.8
kΩ
4.1
4.4
Idiv
3.3
3.6
TSS
3
V
ms
FB decreasing level where
the regulator enters burst
mode
VBURL
0.4
0.5
0.6
V
FB increasing level where the
regulator leaves burst mode
VBURH
0.58
0.70
0.86
V
Overload set point
VOLP
3.5
3.8
4.1
V
Overload delay time
TDelay
fS = 100kHz
82
ms
Timing Resistor (FSET)
FSET reference voltage
Frequency spectrum jittering
range in percentage of Fs
Typical operating frequency
HF900 Rev. 1.0
8/4/2015
VFSET
RJittering
fS
1.15
Example: fS = 100kHz, then
jittering is ±4kHz
TJ = 25°C; RFSET = 100kΩ
1.23
1.3
±4
90
104
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V
%
118
kHz
5
HF900 – 900V OFFLINE SWITCHING REGULATOR
ELECTRICAL CHARACTERISTICS
VCC =12V, TJ=-40°C~125°C, Min & Max are guaranteed by characterization, typical is tested under
25°C, unless otherwise noted.
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
Current Sampling Management (SOURCE)
Leading edge blanking for
current sensor
TLEB1
350
ns
Leading edge blanking for
SCP
TLEB2
300
ns
Maximum current set point
VCS
0.90
0.97
1.04
V
Short-circuit
point
VSC
1.32
1.42
1.62
V
protection
set
Slope compensation ramp
SRamp
fS = 100kHz
40
mV/μs
Protection Management (PRO)
Protection voltage
VPRO
Protection hysteresis
VHY
2.92
3.1
3.32
V
0.2
V
150
°C
30
°C
Thermal Shutdown
Thermal
threshold(5)
shutdown
Thermal shutdown recovery
hysteresis(5)
Notes:
5) Guaranteed by Design & Characterization.
HF900 Rev. 1.0
8/4/2015
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6
HF900 – 900V OFFLINE SWITCHING REGULATOR
TYPICAL CHARACTERISTICS
VCC Low Level vs.
Temperature
26.1
13.4
9.5
26.0
12.8
12.6
0
50
100
9.3
9.2
9.1
9.0
-50
150
6.3
6.1
5.9
5.7
5.5
5.3
5.1
4.9
4.7
4.5
4.3
-50
0
50
100
150
0.74
0.72
0.7
0.68
0.66
0.64
0.62
0.6
-50
HF900 Rev. 1.0
8/4/2015
0
50
100
150
25.8
25.7
25.6
25.5
-50
150
3.5
3.4
3.3
3.2
3.1
3
2.9
-50
0
50
100
150
3.9
3.85
3.8
3.75
3.7
3.65
3.6
0
50
100
50
100
150
0.6
0.55
0.5
0.45
0.4
-50
150
0
50
100
150
Over Load Delay Time vs.
Temperature
85
4
3.95
3.55
3.5
-50
0
FB Level Enter Burst
Mode vs. Temperature
Over Load Set Point vs.
Temperature
OVER LOAD SET POINT (V)
0.76
100
3.6
FB Level Leave Burst
Mode vs. Temperature
0.8
0.78
50
25.9
FB to Current Division
Ratio vs. Temperature
FB TO CURRENT DIVISION RATIO
VCC RE-CHARGE LEVEL (V)
VCC Re-Charge Level vs.
Temperature
0
FB LEVEL ENTER BURST MODE (V)
13.0
9.4
OVER LOAD DELAY TIME (ms)
13.2
VCC UPPER LEVEL (V)
9.6
12.4
-50
FB LEVEL LEAVE BURST MODE (V)
VCC OVP Threshold
Voltage vs. Temperature
13.6
VCC LOW LEVEL (V)
VCC UPPER LEVEL (V)
VCC Upper Level vs.
Temperature
Fs=100kHz
84.5
84
83.5
83
82.5
82
81.5
81
80.5
80
-50
0
50
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100
150
7
HF900 – 900V OFFLINE SWITCHING REGULATOR
TYPICAL CHARACTERISTICS (continued)
1. 26
1. 24
1. 22
1. 2
1. 18
1. 16
1. 14
1. 12
1. 1
-50
0
50
100
150
1. 06
1. 04
1. 02
1
0. 98
0. 96
0. 94
0. 92
0. 9
-50
2.0
3. 25
1.8
3. 2
1.6
3. 15
1.4
3. 1
1.2
3. 05
1.0
3
0.8
2. 95
0.6
50
100
0.4
-50
150
50
100
150
1. 55
1. 5
1. 45
1. 4
-50
0
50
100
150
1150
1100
1050
1000
950
0
50
100
150
900
-50 -25
0
25 50 75 100 125 150
Typical Operating Frequency
vs. Junction Temperature
225
200
175
150
125
100
75
50
25
0
-50 -25
HF900 Rev. 1.0
8/4/2015
0
25
50
75 100 125
OPERATING FREQUENCY FS (kHz)
PRO PROTECTION VOLTAGE (V)
TYPICAL OPERATING FREQUENCY FS (kHz)
3. 3
0
0
1. 6
R_ON@VCC=10.1V
vs. Temperature
Pro Protection Voltage
vs. Temperature
2. 9
-50
Short Circuit Protection
Set Point vs. Temperature
SHORT CIRCUIT PROTECTION
SET POINT (V)
1. 3
1. 28
Max Current Set Point
vs. Temperature
MAX CURRENT SET POINT (V)
FSET REFERENCE VOLTAGE (V)
Fset Reference Voltage
vs. Temperature
225
200
175
150
125
100
75
50
25
0
25 50 75 100 125 150 175 200 225
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8
HF900 – 900V OFFLINE SWITCHING REGULATOR
TYPICAL PERFORMANCE CHARACTERISTICS
Performance waveforms are tested on the evaluation board of the Design Example section.
VIN = 230V, VOUT1 = 12.5V, VOUT2 = 5V, Primary Inductance=2.5mH, NP:NAUX:NS1:NS2 = 125:14:14:9,
TA = 25°C, unless otherwise noted.
Efficiency
100
80
60
40
20
0
0
0.2
0.4
0.6
0.8
1
1.2
VBUS
100V/div.
VBUS
100V/div.
VBUS
100V/div.
VOUT1
5V/div.
VOUT1
5V/div.
VOUT1
5V/div.
VOUT2
2V/div.
VOUT2
2V/div.
VOUT2
2V/div.
VSW
100V/div.
VSW
100V/div.
VCC
10V/div.
VFB
2V/div.
VCC
10V/div.
VFB
2V/div.
VBUS
100V/div.
VOUT1
5V/div.
VOUT2
2V/div.
HF900 Rev. 1.0
8/4/2015
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HF900 – 900V OFFLINE SWITCHING REGULATOR
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
Performance waveforms are tested on the evaluation board of the Design Example section.
VIN = 230V, VOUT1 = 12.5V, VOUT2 = 5V, Primary Inductance=2.5mH, NP:NAUX:NS1:NS2 = 125:14:14:9,
TA = 25°C, unless otherwise noted.
VSW
100V/div.
VSW
100V/div.
VSW
100V/div.
VCC
10V/div.
VFB
2V/div.
VCC
10V/div.
VCC
10V/div.
VOUT1
100mV/div.
VOUT1
50mV/div.
VOUT2
20mV/div.
VOUT2
20mV/div.
VSW
100V/div.
VCC
10V/div.
VFB
2V/div.
VDS
200V/div.
VDS
200V/div.
VPRO
1V/div.
HF900 Rev. 1.0
8/4/2015
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10
HF900 – 900V OFFLINE SWITCHING REGULATOR
PIN FUNCTIONS
Pin #
Pin #
PDIP8-7EP SOIC14-11
Name
1
6
FB
2
5
PRO
3
4
FSET
4
3
VCC
5
14
DRAIN
7
9
SOURCE
8
1,2,7,8
13
GND
NC
HF900 Rev. 1.0
8/4/2015
Description
Feedback. The output voltage from the external compensation circuit
is fed into this pin. FB and the current sense signal from SOURCE
determines the PWM duty cycle. A feedback voltage of VOLP triggers
overload protection while VBURL triggers burst-mode operation. The
regulator exits burst-mode operation and enters normal operation
when the FB voltage reaches VBURH.
Input over-voltage protection. When voltage on PRO rises to VPRO,
the IC is shut down with hysteresis.
Switching converter frequency set. Connect a resistor to GND to
set the switching frequency up to 300kHz.
Supply voltage. Connect a 22μF bulk capacitor and a 0.1µF ceramic
capacitor for most applications. When VCC rises to VCCH, the IC starts
switching; when it falls below VCCL, the IC stops switching.
Drain of the internal MOSFET. Input for the start-up high-voltage
current source.
Source of the internal MOSFET. Input of the primary current sense
signal.
IC ground.
Not connected.
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11
HF900 – 900V OFFLINE SWITCHING REGULATOR
FUNCTIONAL BLOCK DIAGRAM
Power
Management
OVP
Frequency
Control
Driving-Signal
Management
OTP
OLP
Fault-Signal
Management
SCP
Burst-Mode
Control
Peak Current
Conversion
Current-Sensor
Comparator
LEB1
SCP
Comparator
LEB2
Figure 1: Internal Function Block Diagram
HF900 Rev. 1.0
8/4/2015
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12
HF900 – 900V OFFLINE SWITCHING REGULATOR
OPERATION
The HF900 integrates a 900V MOSFET for a
reliable switch-mode power supply solution. It has
burst-mode operation to minimize the standby
power consumption at light load. Protection
features such as auto-recovery for overload
protection (OLP), short-circuit protection (SCP),
over-voltage protection (OVP), and thermal
shutdown for over-temperature protection (OTP)
contribute to a safer converter design with minimal
external components.
PWM Operation
The HF900 employs peak-current-mode control.
On the secondary side, the output voltage is
divided by a voltage divider network. This voltage is
fed back to the primary side as voltage on the FB
using an optocoupler and a shunt regulator. The
voltage at FB is compared to the VSense voltage,
which measures the MOSFET switching current.
The integrated MOSFET turns on at the beginning
of each clock cycle. The current in the transformer
magnetizing inductance increases until it reaches
the value set by the FB voltage, and then the
integrated MOSFET turns off.
The lower threshold of VCC UVLO decreases from
VCCL to VCCR when fault conditions such as SCP,
OLP, OVP, and OTP occur.
Soft Start
The HF900 implements an internal soft-start
circuit to reduce stress on the primary-side
MOSFET and the secondary diode and smoothly
establish the output voltage during start-up. The
internal soft-start circuit increases the primary
current sense threshold gradually, which
determines the MOSFET peak current during
start-up. The pulse width of the power switching
device is increased progressively to establish
correct operating conditions until the feedback
control loop takes charge (see Figure 3).
Start-Up and VCC UVLO
Initially, the IC is driven by the internal current
source, which is drawn from the high-voltage
DRAIN. The IC starts switching, and the internal
high-voltage current source turns off as soon as
the voltage on VCC reaches VCCH. At this point,
the supply of the IC is taken over by the auxiliary
winding of the transformer. When VCC falls
below VCCL, the regulator stops switching, and
the internal high-voltage current source turns on
again (see Figure 2).
VCC
Auxiliary Winding Takes Charge
Figure 3: Soft Start
Switching Frequency
The switching frequency of the HF900 can be set
by FSET. The frequency can be set by a resistor
between FSET and GND. The oscillator
frequency can be attained using Equation (1):
1
Hz
(1)
fS =
200 × 10 −9 + 112.5 × 10 −12 ×
VCCH
VCCL
RFSET
VFST
VFST (1.23V) is the FSET pin reference voltage.
Driver
Switching Pluses
Over-Voltage Protection (OVP)
Monitoring the VCC voltage via a 20µs time
constant filter allows the HF900 to enter OVP
during an over-voltage condition, typically when
VCC goes above VOVP. The regulator will resume
operation once the fault disappears.
Figure 2: VCC Start-Up
HF900 Rev. 1.0
8/4/2015
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13
HF900 – 900V OFFLINE SWITCHING REGULATOR
Overload Protection (OLP)
The HF900 shuts down when the power supply
experiences an overload. OLP is achieved by
monitoring the FB voltage continuously. A fault
signal is triggered when FB pulls up to 3.8V (VOLP,
typical value) and after an 82ms delay (8192
switching cycle, fS = 100kHz). If the fault signal is
still present, the HF900 shuts down. When the
fault disappears, the power supply resumes
operation. The OLP delay time can be attained
using Equation (2):
TDelay =
82ms × 100kHz
fS
VFB
0.7V
0.5V
VDS
(2)
Short-Circuit Protection (SCP)
The HF900 shuts down when voltage on CS is
higher than VSC, which indicates a short circuit.
The HF900 enters a safe low-power mode that
prevents any thermal or stress damage. As soon
as the fault disappears, the power supply
resumes operation.
Thermal Shutdown (OTP)
When the junction temperature of the IC exceeds
150℃, the over-temperature protection is
activated and stops output driver switching to
prevent the HF900 from any thermal damage. As
soon as the junction temperature drops below
120℃, the regulator resumes operation. During
the protection period, the regulator enters autorecovery mode. The VCC voltage is discharged
to VCCR and is re-charged to VCCH by the internal
high-voltage current source.
Burst Operation
To minimize standby power consumption, the
HF900 implements burst mode at no load and
light load. As the load decreases, the FB voltage
decreases. The IC stops switching when the FB
voltage drops below 0.5V (VBRUL, typical value).
As the load power increases, the output voltage
drops at a rate dependent on the load. This
causes the FB voltage to rise again due to the
negative feedback control loop. Once the FB
voltage exceeds 0.7V (VBRUH, typical value), the
switching pulse resumes. The FB voltage then
decreases, and the whole process repeats.
Burst-mode operation alternately enables and
disables the switching pulse of the MOSFET.
Hence switching loss at no load and light load
conditions is reduced greatly.
HF900 Rev. 1.0
8/4/2015
Figure 4 shows the burst-mode operation of the
HF900.
Figure 4: Burst-Mode Operation
PRO
PRO provides extra protection against abnormal
conditions. Use PRO for input OVP or other
protections
(input
UVP,
over-temperature
protection for key components, etc.). If the PRO
voltage exceeds 3.1V (VPRO, typical value), the IC
shuts down to enter auto-recovery mode. Once
the fault disappears, the power supply resumes
operation.
Peak Current Limit
In normal operation, the primary peak current is
sensed by a sensing resistor between SOURCE
and GND. The turn-off threshold of the MOSFET
is set by the FB voltage (VSense = VFB/Idiv). When
the sensing resistor voltage reaches VSense, the
MOSFET turns off. The Idiv is the FB to the
current-set-point division ratio.
During an overload condition, the primary peak
current threshold is limited internally to the
maximum value of 0.97V (VCS, typical value),
even if the VFB voltage exceeds 3.2V, to avoid
excessive output power and lower the switch
voltage rating.
During the start-up period, the primary peak
current threshold increases internally to the
maximum current set point (VCS) gradually.
Leading Edge Blanking (LEB)
In order to avoid turning off the MOSFET by mistrigger spikes shortly after the switch turns
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14
HF900 – 900V OFFLINE SWITCHING REGULATOR
on, the IC implements leading edge blanking.
During the blanking time, any trigger signal on
SOURCE is blocked. An internal leading edge
blanking (LEB) unit containing two LEB times is
employed between SOURCE and the current
comparator input to avoid premature switching
pulse termination due to the parasitic
capacitances. During the blanking time, the
current comparator is disabled and cannot turn
off the MOSFET.
Current sensor leading edge blanking inhibits the
current limitation comparator for 350ns (TLEB1,
typical value), and the SCP leading edge
blanking inhibits the SCP current comparator for
300ns (TLEB2, typical value). Figure 5 shows the
primary current sense waveform and the leading
edge blanking.
Figure 5: Leading Edge Blanking
HF900 Rev. 1.0
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HF900 – 900V OFFLINE SWITCHING REGULATOR
APPLICATION INFORMATION
Selecting the Input Capacitor
The bulk capacitors of the rectifier bridge filter the
rectified AC input, which supplies the DC input
voltage for the converter. Figure 6 shows the
typical DC bus voltage waveform of a full-bridge
rectifier.
Vin
As a 900V offline regulator, the HF900 suits very
high-voltage input applications. General input
capacitors with 400V voltage ratings cannot
satisfy the safety requirement. Thus, stack
capacitors can be used in very high input voltage
applications such as a 420VAC input (see Figure
7).
Bus voltage
VDC(max)
DC input voltage
R1
D1
VDC(min)
VAC
85~420VAC
t
D3
Figure 6: Input Voltage Waveform
VO × IO
η
(3)
Where VO is the output voltage, IO is the rated
output current, and η is the estimated efficiency.
Generally, η is between 0.75 and 0.85 depending
on the input range and output application.
From the waveform in Figure 6, the AC input
voltage (VAC) and the DC input voltage (VDC) are
calculated using Equation (4):
VDC (VAC ,t) = 2 × VAC 2 −
2 × Pin
×t
Cin
(4)
VAC starts to charge the input capacitor when the
DC bus voltage reaches the minimum value
(VDC = VAC, approximately). t1 can be calculated
using Equation (5):
VDC(min) = VDC (VAC(min) ,t1)
(5)
Very low DC input voltage can cause a thermal
problem in a full load. It is recommended that the
minimum DC voltage is higher than 70V.
Otherwise the input capacitor value should be
increased.
HF900 Rev. 1.0
8/4/2015
D4
R3
C2
When the full-bridge rectifier is used, usually the
input capacitor is set at 2μF/W for the universal
input condition (85~265VAC). For high-voltage
input (>185VAC) application, cut the capacitor
values in half. The input power (Pin) is estimated
with Equation (3):
Pin =
C1
R2
AC input voltage
t1
0
D2
R4
Figure 7: Input Stack Capacitor Circuit
C1 and C2 endure half of the input DC voltage
rating, respectively. R1 to R4 should use the
same value resistor to equalize the C1 and C2
voltage stress. It is recommended to use a 1206
package for R1 to R4 to satisfy the safety
requirement. Also, the R1 to R4 values should be
large enough for energy saving. For example, the
total value of R1 to R4 is 20MΩ, which consumes
about 18mW in 600VDC bus voltage.
Primary-Side Inductor Design (Lm)
Normally, the converter is designed to operate in
CCM with low input voltage. CCM is needed to
satisfy the output energy requirement for the
universal input condition. With a built-in slope
compensation function, the HF900 supports CCM
when the duty cycle exceeds 50%. Set the ratio
(KP) of the primary inductor ripple current
amplitude vs. the peak current value to 0 < KP ≤ 1,
where KP = 1 for DCM. Figure 8 shows the
relevant waveforms. A larger inductor leads to a
smaller KP, which reduces RMS current but
increases the transformer size. For 5W
application, an optimal KP value is between 0.8
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HF900 – 900V OFFLINE SWITCHING REGULATOR
and 1 for the universal input range and 1 for a
230VAC input range.
Current-Sense Resistor
SRamp×TON
Ipeak×Rsense
TON
Figure 8: Typical Primary Current Waveform
Figure 9: Slope Compensation Waveform
For CCM at a minimum input, the converter duty
cycle is determined using Equation (6):
(VO + VF ) × N
(6)
D=
(VO + VF ) × N + VDC(min)
Figure 9 shows the slope compensation
waveform. When the sum of the sense resistor
voltage and the slope compensation voltage
reaches the peak current limit (VCS), the HF900
turns off the internal MOSFET. The maximum
peak current limit is 0.97V (VCS, typical value),
and the slope compensation slew rate is
40mV/µs. Considering the margin, use 0.95×VCS
as the peak current limit at full load. The voltage
on the sense resistor is given using Equation (13):
(13)
Vsense = 0.95 × VCS − SRamp × TON
Where:
VF is the secondary diode’s forward voltage, and
N is the transformer turns ratio.
The MOSFET turn-on time is calculated with
Equation (7):
TON =
D
fS
(7)
Where, fS is the operating frequency.
The input average current, ripple current, peak
current, and valley current of the primary side are
calculated using Equation (8), Equation (9),
Equation (10) and Equation (11):
Pin
(8)
I =
AV
VDC(min)
Iripple = K P × Ipeak
(9)
IAV
=
K
(1 − P ) × D
2
(10)
Ivalley = (1 − K P ) × Ipeak
(11)
Ipeak
The value of the sense resistor is calculated
using Equation (14):
V
(14)
Rsense = sense
Ipeak
Use Equation (15) to select the current sense
resistor with an appropriate power rating based
on the power loss:
2
⎡⎛ I + I
2⎤
⎞
1
Psense = ⎢⎜ peak valley ⎟ + × (Ipeak − Ivalley ) ⎥ × D × Rsense (15)
2
⎢⎣⎝
⎥⎦
⎠ 12
PRO
Extra protection can be enabled using the HF900
PRO. A typical input over-voltage protection
circuitry is shown in Figure 10.
Estimate Lm using Equation (12):
Lm =
HF900 Rev. 1.0
8/4/2015
VDC(min) × TON
Iripple
(12)
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HF900 – 900V OFFLINE SWITCHING REGULATOR
Figure 10: Input Over-Voltage Protection Setup
The input over-voltage protection point can be
calculated using Equation (16):
VINOVP = VPRO ×
R5 + R6 + R7 + R8
R8
(16)
For resistors R5 to R7, 1206 packages should be
used for safety considerations. The total value
should be larger than 10MΩ for energy saving
purposes.
Switching voltage noise can occur if R% to R*
have large values, which disturbs the PRO
protection action. One ceramic capacitor (around
1nF) should be paralleled with PRO and GND. It
should be located near the IC to decouple the
switching voltage noise.
Frequency Jittering
The HF900 provides a frequency jittering function,
which simplifies the input EMI filter design and
decreases the system cost. The HF900 has
optimized frequency jittering with a ±4%
frequency deviation range and a 256TS carrier
cycle that effectively improves EMI by spreading
the energy dissipation over the frequency range.
Thermal Performance Optimization
The HF900 is dedicated to high input voltage
application. However, the high input voltage can
cause greater switching loss on the MOSFET,
especially under a high frequency, which may
lead to poor thermal performance. Tests show
that turn-on loss is dominant under a high input,
so thermal performance optimization should
focus mainly on reducing turn-on loss.
As we know that turn-on loss is caused by a turnon current spike and VDS, measures should be
HF900 Rev. 1.0
8/4/2015
taken to reduce either the VDS or the turn-on
spike to get better thermal performance.
In order to reduce VDS, use a small turns ratio-N
to minimize the reflected output voltage on the
primary MOSFET.
To suppress a turn-on spike of the MOSFET,
CCM operation should be avoided, especially
under a high input. The transformer structure
should be designed to achieve minimum parasitic
capacitance of each winding and between the
primary and secondary windings.
For the HF900 PDIP8-7EP package, a heat sink
can be used to further improve thermal
performance in very critical applications.
In addition, choose an appropriate operating
frequency for better thermal performance and
EMI.
Table 1 shows the maximum output power test
results of the HF900 (both packages were tested
without a heat sink).
Table 1: Maximum Output Power
Package
PDIP8-7EP
SOIC14-11
fs (kHz)
50
100
50
100
PMAX (W)
7
3
8
4
NOTES:
1. The maximum output power is tested under TA = 50°C.
2. In order to reduce VDS, the turns ratio is set to 5.
3. VIN = 85~420VAC, single output, VOUT = 12.5V.
4. PDIP8-7EP package is tested without a heat sink, and GND is
2
connected to 2cm copper areas. GND of the SOIC14-11 package
2
is connected to 2.5cm copper areas.
5. Working condition under VIN = 85VAC is set to BCM.
PCB Layout Guidelines
Efficient PCB layout is critical to achieve reliable
operation, good EMI performance, and good
thermal performance. For best results, refer to
Figure 11 and follow the guidelines below:
1) Minimize the power stage switching stage
loop area. This includes the input loop (C2–
C1-T1–U1–R12/R13–C2),
the
auxiliary
winding loop (T1–D6–C6–T1), the output loop
(T1–D8–C9–T1 and T1–D7–C7–T1), and the
RCD loop (T1–D5–R16/R17/C3–T1).
2) Keep the input loop, GND, and control circuit
separate and only connect them at C2.
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HF900 – 900V OFFLINE SWITCHING REGULATOR
3) Connect the heat sink to the primary GND
plane to improve EMI and thermal dissipation.
4) Place the control circuit capacitors (for FB,
PRO, and VCC) close to the IC to decouple
the switching voltage noise.
5) Enlarge the GND pad near the IC for good
thermal dissipation.
6) Keep the EMI filter far away from the
switching point.
7) Ensure the two outputs clearance distance
satisfy the insulation requirement.
Input Loop
Output2 Loop
Output1 Loop
Design Example
Table 2 is a design example using the application
guidelines for the given specifications:
Table 2: Design Example
VIN
85 to 420VAC
VOUT1
12.5V
IOUT1
0.4A
VOUT2
5V
IOUT2
0.05A
fS
100kHz
The detailed application schematic is shown in
Figure 12. The typical performance and circuit
waveforms have been shown in the typical
performance characteristics section. For more
device applications, please refer to the related
evaluation board datasheets.
Auxiliary Winding Loop
a) Top
b) Bottom
Figure 11: Recommended PCB Layout
HF900 Rev. 1.0
8/4/2015
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HF900 – 900V OFFLINE SWITCHING REGULATOR
TYPICAL APPLICATION CIRCUITS
R1
D1
2.2M/1206
CX1
D2
1N4007
0.22uF/275V
1N4007
C1
22uF/400V
LX1
R2
R8
5.1M
/1206
R16
R17
499k/1206 499k/1206
N5
1
C3
7448640416
/18mH
CX2
C2
22uF/400V
2
R3
D3
2.2M/1206
D5
S1ML/1kV/1A
1N4007
N4
N3
R18
C11
10/1206
1nF
/250V/0805
D8
MBRS3200/200V/3A
6
4
C8
1uF
/50V
GND
VOUT1
C9
1000uF
/25V
C10
1uF
/50V
GND(L)
CY1
D4
1N4007
5
3
R10
5.1M
/1206
C7
22uF/50V
B1100/100V/1A
9
N2
2.2nF/630V/1206
2.2M/1206
0.22uF/275V
10
N1
R9
5.1M
/1206
U3
D7
VOUT2
NC
10/1W
L
L
T1
Primary inductance: 2.5mH
N1:N2:N3:N4:N5=18:125:14:14:9
FR1
R11
5.1M
/1206
R19
1k
1nF
R22
40.2k/1%
D6
BAV21W/200V/0.2A
U2
R4
10M/1206
R15
2.49/0805
HF900
R20
2k
U1 MP110
Drain
R5
1M/1206
VCC
EL817B
FSET
R6
1M/1206
Pro
R7
51k/0805
Source Pro
R13
5.1/1%
/1206
R12
5.1/1%/1206
GND
Pro
FB
C6
22uF/50V
C5
0.1uF
R14
100k/1%
R21
C12
20k
100nF
U4
C4
1nF
TL431K/2.5V
R23
10k/1%
C13
1nF
Figure 12: Typical Application Schematic
3mm wall
Primary
Secondary
3T
NC
N1
10
N5
N5
3T
9
N2
3mm wall
N4
1
1T
N3
2
1T
N3
3
4
N2
5
N4
6
1T
N1
1T
a) Connection Diagram
b) Winding Diagram
Figure 13: Transformer Structure
HF900 Rev. 1.0
8/4/2015
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HF900 – 900V OFFLINE SWITCHING REGULATOR
Table 3: Winding Order
Tape (T)
Winding
Margin Wall
PRI side
Terminal
Start—>End
Margin Wall
SEC side
Wire Size (φ)
Turns (T)
N1
0mm
1→NC
0mm
0.18mm*2
18
N2
0mm
2→1
0mm
0.18mm*1
125
N3
0mm
4→3
0mm
0.15mm*1
14
N4
0mm
5→6
0mm
0.4mm*1
14
N5
3mm
10→9
3mm
0.2mm*1
9
1
1
1
1
3
3
HF900 Rev. 1.0
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HF900 – 900V OFFLINE SWITCHING REGULATOR
FLOW CHART
HF900 Rev. 1.0
8/4/2015
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HF900 – 900V OFFLINE SWITCHING REGULATOR
EVOLUTION OF THE SIGNALS IN PRESENCE OF FAULTS
HF900 Rev. 1.0
8/4/2015
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HF900 – 900V OFFLINE SWITCHING REGULATOR
PACKAGE INFORMATION
PDIP8-7EP
HF900 Rev. 1.0
8/4/2015
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HF900 – 900V OFFLINE SWITCHING REGULATOR
SOIC14-11
0.338(8.55)
0.344(8.75)
0.024(0.61)
8
14
0.063
(1.60)
0.150
(3.80)
0.157
(4.00)
PIN 1 ID
0.050(1.27)
0.228
(5.80)
0.244
(6.20)
0.213
(5.40)
7
1
TOP VIEW
RECOMMENDED LAND PATTERN
0.053(1.35)
0.069(1.75)
SEATING PLANE
0.050(1.27)
BSC
0.013(0.33)
0.020(0.51)
0.004(0.10)
0.010(0.25)
SEE DETAIL "A"
SIDE VIEW
FRONT VIEW
0.010(0.25)
x 45o
0.020(0.50)
GAUGE PLANE
0.010(0.25) BSC
0o-8o
0.016(0.41)
0.050(1.27)
0.0075(0.19)
0.0098(0.25)
NOTE:
1) CONTROL DIMENSION IS IN INCHES. DIMENSION IN
BRACKET IS IN MILLIMETERS.
2) PACKAGE LENGTH DOES NOT INCLUDE MOLD FLASH,
PROTRUSIONS OR GATE BURRS.
3) PACKAGE WIDTH DOES NOT INCLUDE INTERLEAD FLASH
OR PROTRUSIONS.
4) LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING)
SHALL BE 0.004" INCHES MAX.
5) DRAWING CONFORMS TO JEDEC MS-012, VARIATION AB.
6) DRAWING IS NOT TO SCALE.
DETAIL "A"
NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third
party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not
assume any legal responsibility for any said applications.
HF900 Rev. 1.0
8/4/2015
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