Micro Linear ML2111CCP Universal dual high frequency filter Datasheet

May 1997
ML2111*
Universal Dual High Frequency Filter
GENERAL DESCRIPTION
FEATURES
The ML2111 consists of two independent switched
capacitor filters that operate at up to 150kHz and perform
second order filter functions such as lowpass, bandpass,
highpass, notch and allpass. All filter configurations,
including Butterworth, Bessel, Cauer, and Chebyshev can
be formed.
■
Specified for operation up to 150kHz
■
Center frequency x Q product £ 5MHz
■
Separate highpass, notch, allpass, bandpass, and
lowpass outputs
The center frequency of these filters is tuned by an
external clock or the external clock and resistor ratio.
■
Center frequency accuracy of ±0.4% or ±0.8% max.
■
Q accuracy of ±4% or ±8% max.
■
Clock inputs are TTL or CMOS compatible
■
Single 5V (±2.25V) or ±5V supply operation
The ML2111 frequency range is specified up to 150kHz
with ±5.0V ±10% power supplies. Using a single 5.0V
±10% power supply the frequency range is up to 100kHz.
These filters are ideal where center frequency accuracy
and high Qs are needed.
The ML2111 is a pin compatible superior replacement for
MF10, LMF100, and LTC1060 filters.
* Some Packages Are End Of Life and Obsolete
BLOCK DIAGRAM
7
VA+
3
8
-
INVA
-
4
2
5
N/AP/HPA
VD+
+
+
S1A
Σ
-
AGND
1
BPA
∫
LPA
∫
S2A
15
CLKA
LEVEL
SHIFT
10
NON-OVERLAP
CLOCK
SA/B
50/100HOLD
6
CONTROL
12
LEVEL SHIFT
9
CLKB
LEVEL
SHIFT
11
NON-OVERLAP
CLOCK
-
INVB
+
+
17
VA14
13
Σ
-
N/AP/HPB
VD-
18
S2B
16
∫
∫
LPB
BPB
S1B
19
20
1
ML2111
PIN CONFIGURATION
ML2111
20-Pin PDIP (P20)
20-Pin SOIC (S20)
LPA 1
20 LPB
BPA 2
19 BPB
N/AP/HPA 3
INVA 4
S1A 5
18 N/AP/HPB
17 INVB
16 S1B
SA/B 6
15 AGND
VA+ 7
14 VA-
VD+ 8
13 VD-
LSh 9
CLKA 10
12 50/100/HOLD
11 CLKB
TOP VIEW
PIN DESCRIPTION
PIN
NAME
FUNCTION
PIN
NAME
FUNCTION
1
LPA
Lowpass output for biquad A.
11
CLKB
Clock input for biquad B.
2
BPA
Bandpass output for biquad A.
12
50/100/HOLD Input pin to control the clock-to-
3
N/AP/HPA
Notch/allpass/highpass output for
biquad A.
4
INVA
Inverting input of the summing op amp
for biquad A.
5
S1A
Auxiliary signal input pin used in
modes 1a, 1d, 4, 5, and 6b.
6
SA/B
Controls S2 input function.
7
VA+
Positive analog supply.
8
V D+
9
LSh
10
2
CLKA
center-frequency ratio of 50:1 or
100:1, or to stop the clock to hold the
last sample of the bandpass or lowpass
outputs.
13
V D-
Negative digital supply.
14
VA-
Negative analog supply.
15
AGND
Analog ground.
16
S1B
Auxiliary signal input pin used in
modes 1a, 1d, 4, 5, and 6b.
Positive digital supply.
17
INVB
Inverting input of the summing op amp
for biquad B.
Reference point for clock input levels.
Logic threshold typically 1.4V above
LSh voltage.
18
N/AP/HPB
Notch/allpass/highpass output for
biquad B.
Clock input for biquad A.
19
BPB
Bandpass output for biquad B.
20
LPB
Lowpass output for biquad B.
ML2111
ABSOLUTE MAXIMUM RATINGS
Absolute maximum ratings are those values beyond which
the device could be permanently damaged. Absolute
maximum ratings are stress ratings only and functional
device operation is not implied.
Lead Temperature (Soldering, 10 sec) ..................... 300ºC
Thermal Resistance (qJA)
20-Pin PDIP ...................................................... 67ºC/W
20-Pin SOIC ..................................................... 95ºC/W
Supply Voltage
|VA+|, |VD+| - |VA-|, |VD-| ...................................... 13V
VA+, VD+ to LSh ..................................................... 13V
Inputs ...................... |VA+, VD+| +0.3V to |VA-, VD-| -0.3V
Outputs ................... |VA+, VD+| +0.3V to |VA-, VD-| -0.3V
|VA+| to |VD+| ........................................................ ±0.3V
Junction Temperature .............................................. 150ºC
Storage Temperature Range ...................... –65ºC to 150ºC
OPERATING CONDITIONS
Temperature Range
ML2111CCX .............................................. 0ºC to 70ºC
ML2111CIP ............................................. -40ºC to 85ºC
Supply Range ........................................ ±2.25V to ±6.0V
ELECTRICAL CHARACTERISTICS
Unless otherwise specified, VA+ = VD+ = 5V ± 10%, VA- = VD- = -5V ± 10%, CL = 25pF, VIN = 1.41VPK (1.000VRMS),
Clock Duty Cycle = 50%, TA = Operating Temperature Range (Note 1)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Figure 15 (Mode 1),
Q £ 50, Q Accuracy £ ± 25%
100
kHz
Figure 15 (Mode 1),
Q £ 20, Q Accuracy £ ± 15%
150
kHz
FILTER
f0(MAX)
f 0(MIN)
Maximum Center Frequency (Note 2)
VIN=1VPK (0.707VRMS)
Minimum Center Frequency (Note 2)
VIN=1VPK (0.707VRMS)
Figure 15 (Mode 1),
Q £ 50, Q Accuracy £ ± 30%
25
Hz
Figure 15 (Mode 1),
Q £ 20, Q Accuracy £ ± 15%
25
Hz
f0 Temperature Coefficient
fCLK < 5MHz
Clock to Center Frequency Ratio
50:1, fCLK = 5MHz
Q = 10, Figure 15 (Mode 1)
100:1, fCLK = 5MHz
fCLK
V OS2,3
-10
ppm/ºC
B Suffix
49.65
49.85
50.05
C Suffix
49.45
49.85
50.25
B Suffix
99.6
100.0
100.4
C Suffix
99.2
100.0
100.8
Clock Frequency
Q £ 20, Q Accuracy £ ±15%
Clock Feedthrough
fCLK £ 5MHz
Q Accuracy
fCLK = 5MHz, Q = 10,
2.5
7500
kHz
20
mV(P-P)
B Suffix
±3
%
50:1, Figure 15 (Mode 1)
C Suffix
±5
%
fCLK = 5MHz, Q = 10,
B Suffix
±4
%
100:1, Figure 15 (Mode 1)
C Suffix
±8
%
10
Q Temperature Coefficient
fCLK < 5MHz, Q = 10
20
ppm/ºC
DC Offset
50:1, fCLK = 5MHz
B Suffix
7
40
mV
SA/B = High or Low
C Suffix
7
60
mV
100:1, fCLK = 5MHz
B Suffix
14
60
mV
SA/B =High or Low
C Suffix
14
100
mV
3
ML2111
ELECTRICAL CHARACTERISTICS
SYMBOL
(Continued)
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
0.01
2
%
FILTER (Continued)
Gain Accuracy, DC Lowpass
R1,R3 = 20kW, R2 = 2kW,
100:1, f0 = 50kHz, Q = 10
Gain Accuracy, Bandpass at f0
R1,R3 = 20kW, R2 = 2kW,
B Suffix
1
4
%
100:1, f0 = 50kHz, Q = 10
C Suffix
1
6
%
2
%
Gain Accuracy, DC Notch Output
R1,R3 = 20kW, R2 = 2kW,
100:1, f0 = 50kHz, Q = 10
0.02
Noise (Note 3)
Bandpass
100kHz, 50:1
103
µV RMS
50kHz, 100:1
121
µV RMS
100kHz, 50:1
120
µV RMS
50kHz, 100:1
150
µV RMS
100kHz, 50:1
115
µV RMS
50kHz, 100:1
135
µV RMS
Figure 15 (Mode 1),
Q = 1, R1 = R2 = R3 = 2kW
Lowpass
Notch
Noise (Note 3)
Bandpass,
100kHz, 50:1
262
µV RMS
Figure 15 (Mode 1),
R1 = 20kW
50kHz, 100:1
333
µV RMS
Q = 10, R3 = 20kW, R2 = 2kW
Lowpass,
100kHz, 50:1
268
µV RMS
R1 = 2kW
50kHz, 100:1
342
µV RMS
Notch,
100kHz, 50:1
64
µV RMS
R1 = 2kW
50kHz, 100:1
72
µV RMS
-50
dB
Crosstalk
fCLK = 5MHz, f0= 100kHz
FILTER, VA+ = VD+ = 2.25V, VA- = VD- = -2.25V, VIN = 0.707 x VPK (0.5 x VRMS)
f 0(MAX)
f0(MIN)
Maximum Center Frequency
Minimum Center Frequency
Clock to Center Frequency Ratio
Figure 15 (Mode 1),
Q £ 50, Q Accuracy £ ± 30%
75
kHz
Figure 15 (Mode 1),
Q £ 20, Q Accuracy £ ± 15%
100
kHz
Figure 15 (Mode 1),
Q £ 50, Q Accuracy £ ± 30%
25
Hz
Figure 15 (Mode 1),
Q £ 20, Q Accuracy £ ± 15%
25
Hz
50:1, fCLK = 2.5MHz
Q = 10, Figure 15 (Mode 1)
100:1, fCLK = 2.5MHz
fCLK
4
B Suffix
49.65
49.85
50.05
C Suffix
49.45
49.85
50.25
B Suffix
99.60
100.0
100.4
C Suffix
99.20
100.0
100.8
Clock Frequency
Q £ 20, Q Accuracy £ ±15%
Q Accuracy
fCLK = 2.5MHz, Q = 10,
2.5
5000
kHz
B Suffix
±4
%
50:1, Figure 15 (Mode 1)
C Suffix
±8
%
fCLK = 2.5MHz, Q = 10,
B Suffix
±3
%
100:1, Figure 15 (Mode 1)
C Suffix
±6
%
ML2111
ELECTRICAL CHARACTERISTICS
SYMBOL
(Continued)
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
FILTER, VA+ = VD+ = 2.25V, VA- = VD- = -2.25V, VIN = 0.707 x VPK (0.5 x VRMS) (Continued)
Noise (Note 3)
Bandpass
Figure 15 (Mode 1),
Q = 1, R1 = R2 = R3 = 2kW
Lowpass
Notch
100kHz, 50:1
105
µV RMS
50kHz, 100:1
123
µV RMS
100kHz, 50:1
122
µV RMS
50kHz, 100:1
152
µV RMS
100kHz, 50:1
117
µV RMS
50kHz, 100:1
138
µV RMS
Noise (Note 3)
Bandpass,
100kHz, 50:1
265
µV RMS
Figure 15 (Mode 1), Q = 10,
R1 = 20kW
50kHz, 100:1
335
µV RMS
R3 = 20kW, R2 = 2kW
Lowpass,
100kHz, 50:1
270
µV RMS
R1 = 2kW
50kHz, 100:1
245
µV RMS
Notch,
100kHz, 50:1
65
µV RMS
R1 = 2kW
50kHz, 100:1
73
µV RMS
OPERATIONAL AMPLIFIERS
VOS1
DC Offset Voltage
AVOL
DC Open Loop Gain
2
RL = 1kW
15
mV
95
dB
Gain Bandwidth Product
2.4
MHz
Slew Rate
2.0
V/µs
Output Voltage Swing (Clipping Level)
RL = 2kW, |V| from VA+ or VA-
0.5
1.2
V
Output Short Circuit Current
Source
50
mA
Sink
25
mA
CLOCK
VCLK Input Low Voltage
0.6
VCLK Input High Voltage
V
3.0
V
CLKA, CLKB Pulse Width
|VD+| - |VD-| ³ 4.5V
100
ns
CLKA, CLKB Pulse Width
|VD+| - |VD-| ³ .90V
66
ns
SUPPLY
(IA+)+(ID+) Supply Current, (VA+) + (VD+)
fCLK = 5MHz
13
22
mA
(IA-)+(ID-)
Supply Current, (VA-) + (VD-)
fCLK = 5MHz
12
21
mA
Supply Current, LSh
fCLK = 5MHz
0.5
1
mA
ILSh
Note 1: Limits are guaranteed by 100% testing, sampling, or correlation with worst case test conditions.
Note 2: The center frequency is defined as the peak of the bandpass output.
Note 3: The noise is meassured with an HP8903A audio analyzer with a bandwidth of 700kHz, which is 7.5 times the f0 at 50:1 and 15 times the f0 at 100:1.
5
ML2111
TYPICAL PERFORMANCE CURVES
0.4
5
Q = 50
0.0
3
fCLK/f0 Deviation (%)
–0.4
fCLK/f0 Deviation (%)
4
Q = 20
–0.8
Q = 10
–1.2
–1.6
Mode 1
TA = 25ºC
VIN = 0.707VRMS
–2.0
Q=5
2
TA = 85ºC
1
0
–1
–2.4
–2.8
Mode 1
Q = 10
VIN = 0.707VRMS
TA = 25ºC
–2
2
0
6
4
8
–3
10
2
0
6
4
fCLK (MHz)
8
10
fCLK (MHz)
Figure 1A. fCLK/f0 vs. fCLK (50:1, VS = ±5V)
0.5
0.4
Q = 50
Q = 20
0.0
0.0
fCLK/f0 Deviation (%)
fCLK/f0 Deviation (%)
–0.4
–0.8
–1.2
Q = 10
–1.6
Mode 1
TA = 25ºC
VIN = 0.707VRMS
–2.0
–2.4
Q=5
TA = 25ºC
–0.5
–1.0
Mode 1
Q = 10
VIN = 0.707VRMS
–1.5
TA = 85ºC
–2.8
–3.2
2
0
6
4
8
–2.0
10
2
0
6
4
8
10
fCLK (MHz)
fCLK (MHz)
Figure 1B. fCLK/f0 vs. fCLK (100:1, VS = ±5V)
16
10
14
8
fCLK/f0 Deviation (%)
fCLK/f0 Deviation (%)
Q = 10
12
Mode 1
TA = 25ºC
VIN = 0.5VRMS
10
8
6
Q = 20
4
2
Q = 50
–2
0
1
2
3
4
5
6
7
Mode 1
Q = 10
VIN = 0.5VRMS
4
2
TA = 25ºC
0
Q=5
0
TA = 85ºC
6
8
9
–2
0
1
fCLK (MHz)
3
4
5
fCLK (MHz)
Figure 1C. fCLK/f0 vs. fCLK (50:1, VS = ±2.5V)
6
2
6
7
8
9
ML2111
TYPICAL PERFORMANCE CURVES
(Continued)
5
12
10
Mode 1
TA = 25ºC
VIN = 0.5VRMS
3
fCLK/f0 Deviation (%)
fCLK/f0 Deviation (%)
4
2
Q = 50
1
Q = 20
0
Q = 10
–1
8
Mode 1
Q = 10
VIN = 0.5VRMS
6
TA = 85ºC
4
2
0
Q=5
–2
0
1
3
2
4
5
TA = 25ºC
7
6
8
–2
9
0
1
3
2
fCLK (MHz)
4
5
7
6
8
9
fCLK (MHz)
Figure 1D. fCLK/f0 vs. fCLK (100:1, VS = ±2.5V)
0.08
0.04
Mode 1
Q = 10
f0 = 100kHz
fCLK = 5MHz
VIN = 0.707VRMS
0.04
Mode 1
Q = 10
f0 = 50kHz
fCLK = 5MHz
VIN = 0.707VRMS
0.03
fCLK/f0 Deviation (%)
fCLK/f0 Deviation (%)
0.06
0.02
0.00
–0.02
0.02
0.01
0
–0.04
–0.06
–40
–20
0
20
40
60
80
–0.01
–40
100
–20
60
80
100
Figure 2B. fCLK/f0 Deviation vs. Temperature
(100:1, VS = ±5V)
0.10
0.06
0.08
0.04
0.04
fCLK/f0 Deviation (%)
Mode 1
Q = 10
f0 = 50kHz
fCLK = 2.5MHz
VIN = 0.5VRMS
0.06
fCLK/f0 Deviation (%)
40
Temperature (ºC)
Figure 2A. fCLK/f0 Deviation vs. Temperature
(50:1, VS = ±5V)
0.02
0.00
0.02
0.00
–0.02
–0.02
–0.04
–0.04
–0.06
–40
20
0
Temperature (ºC)
–20
0
20
40
60
80
100
Temperature (ºC)
Figure 2C. fCLK/f0 Deviation vs. Temperature
(50:1, VS = ±2.5V)
–0.06
–40
Mode 1
Q = 10
fo = 25kHz
fCLK = 2.5MHz
VIN = 0.5VRMS
–20
0
20
40
60
80
100
Temperature (ºC)
Figure 2D. fCLK/f0 Deviation vs. Temperature
(100:1, VS = ±2.5V)
7
ML2111
TYPICAL PERFORMANCE CURVES
(Continued)
20
20
Mode 1
TA = 25ºC
VIN = 0.707VRMS
Q Deviation (%)
12
16
8
Q=5
4
0
12
8
4
Q = 20
TA = 85ºC
0
Q = 50
–4
–8
TA = 25ºC
Mode 1
Q = 10
VIN = 0.707VRMS
Q = 10
Q Deviation (%)
16
2
0
6
4
8
–4
10
2
0
6
4
8
10
fCLK (MHz)
fCLK (MHz)
Figure 2E. Q Error vs. fCLK (50:1, VS = ±5V)
20
20
Mode 1
TA = 25ºC
VIN = 0.707VRMS
15
Mode 1
Q = 10
VIN = 0.707VRMS
16
Q = 10
5
Q=5
0
Q Deviation (%)
Q Deviation (%)
10
Q = 20
–5
12
TA = 85ºC
8
4
0
–10
TA = 25ºC
Q = 50
–15
2
0
6
4
8
–4
10
2
0
6
4
8
10
fCLK (MHz)
fCLK (MHz)
Figure 2F. Q Error vs. fCLK (100:1, VS = ±5V)
10
8
Q = 10
5
Mode 1
Q = 10
VIN = 0.5VRMS
0
Q=5
Q Deviation (%)
Q Deviation (%)
4
Q = 20
–5
Q = 50
–10
–20
0
1
2
0
TA = 85ºC
–4
Mode 1
TA = 25ºC
VIN = 0.5VRMS
–15
3
4
5
6
7
–8
0
1
fCLK (MHz)
2
3
4
fCLK (MHz)
Figure 2G. Q Error vs. fCLK (50:1, VS = ±2.5V)
8
TA = 25ºC
5
6
7
ML2111
TYPICAL PERFORMANCE CURVES
(Continued)
16
16
12
12
Mode 1
TA = 25ºC
VIN = 0.5VRMS
8
4
Q = 10
0
Q=5
Q Deviation (%)
Q Deviation (%)
8
Q = 20
–4
4
TA = 85ºC
0
TA = 25ºC
–4
Q = 50
–8
Mode 1
Q = 10
VIN = 0.5VRMS
–8
–12
–12
0
1
3
2
4
5
6
7
0
1
2
fCLK (MHz)
3
4
5
6
7
fCLK (MHz)
Figure 2H. Q Error vs. fCLK (100:1, VS = ±2.5V)
0.6
0.4
0.4
0.2
0.0
Q Deviation (%)
Q Deviation (%)
0.2
–0.2
–0.4
Mode 1
Q = 10
f0 = 100kHz
fCLK = 5MHz
VIN = 0.707VRMS
–0.6
–0.8
–40
–20
20
0
40
60
80
0.0
–0.2
–0.4
Mode 1
Q = 10
f0 = 50kHz
fCLK = 5MHz
VIN = 0.707VRMS
–0.6
–0.8
–1.0
–40
100
–20
0
Temperature (ºC)
20
60
40
80
100
Temperature (ºC)
Figure 3A. Q Deviation vs. Temperature
(50:1, VS = ±5V)
Figure 3B. Q Deviation vs. Temperature
(100:1, VS = ±5V)
0.2
0.2
0.0
–0.2
–0.4
–40
Q Deviation (%)
Q Deviation (%)
Mode 1
Q = 10
f0 = 25kHz
fCLK = 2.5MHz
VIN = 0.5VRMS
Mode 1
Q = 10
f0 = 50kHz
fCLK = 2.5MHz
VIN = 0.5VRMS
–20
0
20
40
60
80
100
Temperature (ºC)
Figure 3C. Q Deviation vs. Temperature
(50:1, VS = ±2.5V)
0.0
–0.2
–0.4
–40
–20
0
20
40
60
80
100
Temperature (ºC)
Figure 3D. Q Deviation vs. Temperature
(100:1, VS = ±2.5V)
9
ML2111
TYPICAL PERFORMANCE CURVES
(Continued)
0.05
4
fCLK/f0 Deviation (%)
fCLK/f0 Deviation (%)
Mode 1
TA = 25ºC
fCLK = 5MHz
VIN = 1VRMS
0
100:1
50:1
–4
–8
0.1
1
10
Mode 1
TA = 25ºC
50:1 or 100:1
fCLK = 5MHz
VIN = 1VRMS
0.0
–0.05
0.1
100
1
Figure 4A. fCLK/fNOTCH Deviation vs. Q (VS = ±5V)
4
2
0
0
Q Deviation (%)
Q Deviation (%)
Figure 4A. fCLK/f0 Deviation vs. Q (VS = ±5V)
–4
–8
–16
0.1
Mode 1
TA = 25ºC
f0 = 100kHz
fCLK = 5MHz
VS = ±5V
–2
–4
Mode 1
TA = 25ºC
f0 = 50kHz
fCLK = 5MHz
VS = ±5V
–6
1
10
–8
0.1
100
1
Ideal Q (R3/R2)
VOUT = 1.41V
70
VOUT = 0.5V
60
50
VOUT = 3V
40
Mode 1
Q=1
f0 = 100kHz
fCLK = 5MHz
VS = ±5V
TA = 25ºC
RL = 2kΩ
Low Pass Output
30
20
10
0
0
20
40
VOUT = 4V
60
80
100
fIN (kHz)
Figure 6A. Distortion vs. fIN (50:1, VS = ±5V)
10
100
Figure 5B. Q Deviation vs. Q (100:1, VS = ±5V)
Single Frequency Distortion Level (dB)
Single Frequency Distortion Level (dB)
VOUT = 2V
10
Ideal Q (R3/R2)
Figure 5A. Q Deviation vs. Q (50:1, VS = ±5V)
70
100
Ideal Q (R3/R2)
Ideal Q (R3/R2)
–12
10
VOUT = 3V
60
VOUT = 2V
VOUT = 4V
50
VOUT = 1.41V
VOUT = 0.5V
40
Mode 1
Q=1
f0 = 50kHz
fCLK = 5MHz
VS = ±5V
TA = 25ºC
RL = 2kΩ
Low Pass Output
30
20
10
0
0
10
20
30
40
50
fIN (kHz)
Figure 6B. Distortion vs. fIN (100:1, VS = ±5V)
ML2111
TYPICAL PERFORMANCE CURVES
(Continued)
2500
250
Mode 1
50:1
R1 = R2 = R3 = 2kΩ
BANDPASS OUTPUT
VS = ±5V
f0 = 100kHz
fCLK = 5MHz
150
2000
Noise (nV/√Hz)
Noise (nV/√Hz)
200
100
1500
1000
500
50
0
Mode 1
50:1
R1 = R3 = 20kΩ,
R2 = 2kΩ
BANDPASS OUTPUT
VS = ±5V
f0 = 100kHz
fCLK = 5MHz
0
0
100
200
300
400
500
0
100
200
Frequency (kHz)
Figure 7A. Noise Spectrum Density (Q = 1)
80
100:1
0.0
Notch Depth (dB)
fCLK/fNotch Deviation (%)
500
100
0.4
50:1
–0.4
–0.8
Mode 1
TA = 25ºC
Q = 10
VS = ±5V
VIN = 0.707VRMS
–1.2
0
2
100:1
60
50:1
40
Mode 1
TA = 25ºC
Q = 10
VS = ±5V
VIN = 0.707VRMS
20
6
4
8
0
10
2
0
4
fCLK (MHz)
6
8
10
fCLK (MHz)
Figure 8. fCLK/fNOTCH vs. fCLK
Figure 9. Notch Depth vs. fCLK
15
16
Q = 10
TA = 25ºC
LSh = VSS
50:1
fCLK = 10MHz
14
Supply Current (mA)
14
Supply Current (mA)
400
Figure 7B. Noise Spectrum Density (Q = 10)
0.8
–1.6
300
Frequency (kHz)
fCLK = 5MHz
fCLK = 3MHz
12
Mode 1
VS = ±5V
fCLK = 5MHz
50:1
13
12
fCLK = 250kHz
10
11
8
2
3
4
5
6
Supply Voltage (±V)
Figure 10. Supply Current vs. Supply Voltage
10
–40
–20
0
20
40
60
80
100
Temperature (ºC)
Figure 11. Supply Current vs. Temperature
11
ML2111
FUNCTIONAL DESCRIPTION
POWER SUPPLIES
fCLK/f0 RATIO
The analog (VA+) and digital (VD+) supply pins, in most
cases, are tied together and bypassed to AGND with
100nF and 10nF disk ceramic capacitors. The supply pins
can be bypassed separately if a high level of digital noise
exists. These pins are internally connected by the IC
substrate and should be biased from the same DC source.
The ML2111 operates from either a single supply from 4V
to 12V, or with dual supplies at ±2V to ±6V.
The ML2111 is a sampled data filter and approximates
continuous time filters. The filter deviates from its ideal
continuous filter model when the (fCLK/f0) ratio decreases
and when the Qs are low.
CLOCK INPUT PINS AND LEVEL SHIFT
With dual supplies equal to or higher than ±4.0V, the LSh
pin can be connected to the same potential as either the
AGND or the VA- pin. With single supply operation the
negative supply pins and LSh pin should be tied to the
system ground. The AGND pin should be biased half way
between VA+ and VA-. Under these conditions the clock
levels are TTL or CMOS compatible. Both input clock
pins share the same level shift pin.
50/100/HOLD
Tying the 50/100/HOLD pin to the VA+ and VD+ pins
makes the filter operate in the 50:1 mode. Tying the pin
half way between VA+ and VA- makes the filter operate in
the 100:1 mode. The input range for 50/100/HOLD is
either 2.5V ±0.5V with a total power supply range of 5V,
or 5V ±0.5V with a total power supply range of 10V.
When 50/100/HOLD is tied to the negative power supply
input, the filter operation is stopped and the bandpass and
lowpass outputs act as a sample/hold circuit which holds
the last sample.
S1A & S1B
These voltage signal input pins should be driven by a
source impedance of less than 5kW. The S1A and S1B pins
can be used to feedforward the input signal for allpass
filter configurations (see modes 4 & 5) or to alter the
clock-to-center-frequency ratio (fCLK/f0) of the filter (see
modes 1b, 1c, 2a, & 2b). When these pins are not used
they should be tied to the AGND pin.
SA/B
When SA/B is high, the S2 negative input of the voltage
summing device is tied to the lowpass output. When the
SA/B pin is connected to the negative supply, the S2 input
switches to ground.
AGND
AGND is connected to the system ground for dual supply
operation. When operating with a single positive supply
the analog ground pin should be biased half way between
VA+ and VA-, and bypassed with a 100nF capacitor. The
positive inputs of the internal op amps and the reference
point of the internal switches are connected to the AGND
pin.
12
f0 ´ Q PRODUCT RATIO
The f0 ´ Q product of the ML2111 depends on the clock
frequency and the mode of operation. The f0 ´ Q product
is mainly limited by the desired f0 and Q accuracy for
clock frequencies below 1MHz in mode 1 and its
derivatives. If the clock to center frequency ratio is
lowered below 50:1, the f0 ´ Q product can be further
increased for the same clock frequency and for the same
Q value.
Mode 3, (Figure 23) and the modes of operation where R4
is finite, are "slower" than the basic mode 1. The resistor
R4 places the input op amp inside the resonant loop. The
finite GBW of this op amp creates an additional phase
shift and enhances the Q value at high clock frequencies.
OUTPUT NOISE
The wideband RMS noise on the outputs of the ML2111 is
nearly independent of the clock frequency, provided that
the clock itself does not become part of the noise. Noise
at the BP and LP outputs increases for high values of Q.
FILTER FUNCTION DEFINITIONS
Each filter of the ML2111, along with external resistors
and a clock, approximates second order filter functions.
These are tabulated below in the frequency domain.
1. Bandpass function: available at the bandpass output
pins (BPA, BPB), Figure 12.
s w0
Q
G(s) = HOBP
(1)
s

w0
s2 +
+ w02
Q
where:
HOBP = Gain at w = w 0
f0 = w 0/2p. The center frequency of the complex pole
pair is f0. It is measured as the peak frequency of the
bandpass output.
Q = the Quality factor of the complex pole pair. It is
the ratio of f0 to the -3dB bandwidth of the 2nd order
bandpass function. The Q is always measured at the
filter BP output.
ML2111
FILTER FUNCTION DEFINITIONS (Continued)
2. Lowpass function: available at the LP output pins,
Figure 13.
BANDPASS OUTPUT
w02
s2 +
s w + w
Q 0
0
(2)
2
HOBP
GAIN (V/V)
G(s) = HOLP
where:
0.707 HOBP
HOLP = DC gain of the LP output
3. Highpass function: available only in mode 3 at
N/AP/HPA and N/AP/HPB, Figure 14.
G(s) = HOHP
2
s
s w0
+ w 02
s2 +
Q
fL
f0
fH
f (LOG SCALE)
(3)
Q=
HOHP = Gain of the HP output for f ® fCLK/2.
f0
; f0 = fL fH
fH - fL
-1
2Q +
1

2Q +
fL = f0
fH = f0
1 2Q 1 2Q 2
+ 1
+1
2
Figure 12.
LOWPASS OUTPUT
HIGHPASS OUTPUT
HOLP
0.707 HOLP
HOP
GAIN (V/V)
GAIN (V/V)
HOP
fP
HOHP
0.707 HOHP
fC
f (LOG SCALE)
fC = f0
1 - 1 + 1 - 1 2Q 2Q 2
2
fP = f0 1 -
1
2Q 2
fC
2
+1
1 1
1 2Q + 1- 2Q !
1 "#
f = f 1! 2Q #$
f (LOG SCALE)
fC = f0
2
HOP = HOLP
1
1
1Q
4Q 2
Figure 13.
2
-1
P
1
fP
0
2
"#
+ 1#
#$
-1
2
HOP = HOHP
1
1
1
1Q
4Q 2
Figure 14.
13
ML2111
FILTER FUNCTION DEFINITIONS
OPERATION MODES
4. Notch function: available at N/AP/HPA and N/AP/HPB
for several modes of operation.
There are three basic modes of operation — Modes 1, 2,
and 3 , each of which has derivatives; and four secondary
modes of operation — Modes 4, 5, 6, and 7, each of
which also has derivatives.
4s + w 9
s w + w
+
Q 2
G(s) = HON2
s2
n
2
0
0
(4)
2
HON2 = Gain of the notch output for f ® fCLK/2.
HON1 = Gain of the HP output for f ® 0
fn = w n/2p. The frequency of the notch occurrence is
f n.
5. Allpass function: available at N/AP/HPA and N/AP/
HPB for modes 4 and 4a.
s w0
+ w02
Q

s w0
s2 +
+ w02
Q
s2 -
G(s) = HOAP
(5)
HOAP = Gain of the allpass output for 0 < f < fCLK/2
For allpass functions, the center frequency and the Q of
the numerator complex zero pair is the same as the
denominator. Under these conditions the magnitude
response is a straight line. In mode 5, the center
frequency fZ of the numerator complex zero pair is
different than f0. For high numerator Q's, the
magnitude response will have a notch at fZ.
In Figure 15, the input amplifier is outside the resonant
loop. Because of this, mode 1 and its derivatives (modes
1a, 1b, 1c, and 1d) are faster than modes 2 and 3.
Mode 1 provides a clock tunable notch. It is a practical
configuration for second order clock tunable bandpass/
notch filters. In mode 1, a band pass output with a very
high Q, together with unity gain can be obtained with the
dynamics of the remaining notch and lowpass outputs.
Mode 1a (Figure 16) represents the simplest hookup of the
ML2111. It is useful when voltage gain at the bandpass
output is required. However, the bandpass voltage gain is
equal to the value of Q, and second order, clock tunable,
BP resonator can be achieved with only 2 resistors. The
filter center frequency directly depends on the external
clock frequency. Mode 1a is not practical for high order
filters as it requires several clock frequencies to tune the
overall filter response.
Modes 1b and 1c, Figures 17 and 18, are similar. They
both produce a notch with a frequency which is always
equal to the filter center frequency. The notch and the
center frequency can be adjusted with an external resistor
ratio.
½ ML2111
½ ML2111
R3
R2
VIN
R3
N
S1A
5 (16)
3 (18)
BP
2 (19)
LP
R2
1 (20)
BP2
S1A
5 (16)
3 (18)
BP1
LP
2 (19)
1 (20)
R1
VIN
4 (17)
SA/B
6
+
+
Σ
4 (17)
+
+
Σ
15
SA/B
6
V+
15
V+
f0 =
fCLK
R2
R3
; fn = f0 ; HOLP = ; HOBP = ;
100(50)
R1
R1
HON1 = -
R2
R3
;Q =
R1
R2
Figure 15. Mode 1: 2nd Order Filter Providing Notch,
Bandpass, Lowpass
14
f0 =
fCLK
R3
R3
;Q =
; HOBP1 = ;
100(50)
R2
R2
HOBP2 = 1(non - inverting); HOLP = -1
Figure 16. Mode 1a: 2nd Order Filter Providing
Bandpass, Lowpass
ML2111
MODE
BPA, BPB
N/AP/HPA, N/AP/HPB
fC
6a
LP
HP
fCLK
R2

100(50) R3
6b
LP
LP
fCLK
R2

100(50) R3
7
LP
AP
fCLK
R2

100(50) R3
fZ
fCLK
R2

100(50) R3
Table 1. First Order Functions.
MODE
LPA, LPB
BPA, BPB
N/AP/HPA&B
f0
fN
1
LP
BP
Notch
fCLK
100(50)
1a
LP
BP
BP
fCLK
100(50)
1b
LP
BP
Notch
fCLK
R6
1+
R5 + R6
100(50)
fCLK
R6
1+
R5 + R6
100(50)
1c
LP
BP
Notch
fCLK
R6

R5 + R6
100(50)
fCLK
R6

R5 + R6
100(50)
1d
LP
BP
2
LP
BP
Notch
fCLK
R2
1+
R4
100(50)
fCLK
100(50)
2a
LP
BP
Notch
fCLK
R2
R6
1+
+
R4 R5 + R6
100(50)
fCLK
R6
1+
R5 + R6
100(50)
2b
LP
BP
Notch
fCLK
R2
R6

+
R4 R5 + R6
100(50)
fCLK
R6

R5 + R6
100(50)
3
LP
BP
HP
fCLK
R2

R4
100(50)
3a
LP
BP
Notch
fCLK
R2

R4
100(50)
4
LP
BP
AP
fCLK
100(50)
4a
LP
BP
AP
fCLK
R2

R4
100(50)
5
LP
BP
CZ
fCLK
R2
1+
R4
100(50)
f0
fCLK
100(50)
R
fCLK
h
Rl
100(50)
fCLK
R2
1R4
100(50)
Table 2. Second Order Functions
15
ML2111
R5
R6
R3
R2
N
S1A
5 (16)
3 (18)
BP
2 (19)
f0 =
fCLK
R6
1+
; fn = f0
R5 + R6
100(50)
Q=
R3
R6
1+
;R5 < 5kW
R2
R5 + R6
LP
1 (20)
R1
VIN
4 (17)
SA/B
+
+
1
Σ
HOBP = -
15
6
6
HON1 f 0 = HON2 f
fCLK
R2
=2
R1
R3
-R2 / R1
; HOLP =
R1
1 + R6 / R5 + R6
0
5
V+
Figure 17. Mode 1b: 2nd Order Filter Providing Notch, Bandpass, Lowpass
R5
R6
R3
R2
N
BP
S1A
5 (16)
3 (18)
2 (19)
f0 =
fCLK
R6

; fn = f0
R5 + R6
100(50)
Q=
R3
R6

;
R2
R5 + R6
LP
1 (20)
R1
VIN
4 (17)
SA/B
+
+
1
Σ
HOBP = -
15
6
6
HON1 f 0 = HON2 f
fCLK
R2
=;
2
R1
R3
-R2 / R1
; HOLP =
; R5 < 5kW
R1
R6 / R5 + R6
0
5
V-
Figure 18. Mode 1c: 2nd Order Filter Providing Notch, Bandpass, Lowpass
R3B
R2
R3A
N
S1A
5 (16)
3 (18)
BP
2 (19)
LP
1 (20)
f0 =
R1
VIN
4 (17)
+
+
Σ
fCLK
R3
R2
; Q = 1 + A ; HOBP = Q;
R3B
R1
100(50)
HOLP = SA/B
6
R2
R2
; VN VIN
R1
R1
15
V+
Figure 19. Mode 1d: 2nd Order Filter Providing Bandpass and Lowpass for Qs Greater Than or Equal To 1.
16
ML2111
R4
R3
R2
N
BP
S1A
5 (16)
3 (18)
2 (19)
4 (17)
SA/B
+
+
Σ
Q=
R3
R2
-R2 / R1
1+
; HOLP =
;
R2
R4
1 + R2 / R4
0
HOBP =
1
6
5
-R3
-R2 / R1
; HON1 f 0 =
;
R1
1 + R2 / R 4
HON2 f
15
6
fCLK
f
R2
1+
; fn = CLK ;
100(50)
100(50)
R4
LP
1 (20)
R1
VIN
f0 =
0
5
fCLK
-R2
=
2
R1
V+
Figure 20. Mode 2: 2nd Order Filter Providing Notch, Bandpass, Lowpass
R4
R5
R6
f0 =
fCLK
R2
R6
R3
1+
+
; HOBP = ;
100(50)
R 4 R5 + R6
R1
fn =
fCLK
f
R6
R2
1+
; HON2 f CLK = ;
100(50)
R5 + R6
2
R1
Q=
R3
R2
R6
1+
+
;
R2
R 4 R5 + R6
R3
R2
N
S1A
5 (16)
3 (18)
BP
2 (19)
LP
4 (17)
+
+
Σ
1
6
HON1 f 0 = SA/B
15
6
1 (20)
R1
VIN
HOLP =
%&
' 0
0
5
()
*
1 + R6 / R5 + R6
R2
;
R1 1 + R2 / R4 + R6 / R5 + R6
5
-R2 / R1
1 + R2 / R4 + R6 / R5 + R6
0
V+
0
5
5
Figure 21. Mode 2a: 2nd Order Filter Providing Notch, Bandpass, Lowpass
R4
R5
R6
f0 =
fCLK
R2
R6

+
;
R 4 R5 + R6
100(50)
fn =
fCLK
R6
R3
R2
R6

;Q =

+
;
100(50)
R5 + R6
R2
R4 R5 + R6
R3
R2
N
S1A
5 (16)
3 (18)
BP
2 (19)
LP
1 (20)
VIN
4 (17)
+
+
Σ
6
fCLK
R2
R3
=; HOBP = ;
R1
R1
2
HON2 f
SA/B
6
V-
15
%& R6 / 0R5 + R65 ();
' 0R2 / R45 + R6 / R5 + R6 *
1
HON1 f 0 = -
R1
HOLP =
R2
R1
-R2 / R1
R2 / R4 + R6 / R5 + R6
0
5
0
5
Figure 22. Mode 2b: 2nd Order Filter Providing Notch, Bandpass, Lowpass
17
ML2111
OPERATION MODES
(Continued)
The clock to center frequency ratio range is:
500 fCLK 100 50

or
(mode 1c)
1
1
1
f0
(6)
100 50 fCLK 100 50
or

or
(mode 1b)
1
1
f0
2
2
(7)
Modes 2, 2a, and 2b (Figures 20, 21, and 22) have notch
outputs whose frequency, fn, can be tuned independently
from the center frequency, f0. However, for all cases fn <
f0. These modes are useful when cascading second order
functions to create an overall elliptic highpass, bandpass
or notch response. The input amplifier and its feedback
resistors R2 and R4 are now part of the resonant loop.
Because of this, mode 2 and its derivatives are slower
than mode 1 and its derivatives.
The input impedance of the S1 pin is clock dependent,
and in general R5 should not be larger than 5kW for fCLK <
2.5MHz and 2kW for fCLK > 2.5MHz. Mode 1c can be
used to increase the clock-to-center-frequency ratio
beyond 100:1. The limit for the (fCLK/f0) ratio is 500:1 for
this mode. The filter will exhibit large output offsets with
larger ratios. Mode 1d (Figure 19) is the fastest mode of
operation: center frequencies beyond 20kHz can easily
be achieved at a 50:1 ratio.
In Mode 3 (Figure 23) a single resistor ratio, R2/R4, can
tune the center frequency below or above the fCLK/100 (or
fCLK/50) ratio. Mode 3 is a state variable configuration
since it provides a highpass, bandpass, lowpass output
through progressive integration. Notches are acquired by
summing the highpass and lowpass outputs (mode 3a,
Figure 24). The notch frequency can be tuned below or
R4
R3
R2
HP
3 (18)
S1A
BP
LP
5 (16)
2 (19)
1 (20)
f0 =
R1
VIN
+
4 (17)
SA/B
6
+
Σ
fCLK
R2
R3
R2

;Q =

;
R4
R2
R4
100(50)
HOHP = -
R2
R4
R3
; HOLP = ; HOBP = R1
R1
R1
15
V-
Figure 23. Mode 3: 2nd Order Filter Providing Highpass, Bandpass, Lowpass — ½ ML2111
R2 R3

R4 R2
Q=
R4
f0 =
R3
R2
HP
3 (18)
S1A
BP
LP
5 (16)
2 (19)
1 (20)
HOHP = -
R1
VIN
4 (17)
+
+
SA/B
V-
15
1
R2
R3
R4
; HOBP = ; HOLP = ;
R1
R1
R1
6
HON f = f0 = Q
Σ
Rg
External
Op Amp
Rl
6
Rh
fCLK
f
R2

; fn = CLK
;
100(50)
100(50)
R4
Rl
Rh
+
R
R
g
HOLP -
l
HON2 f
NOTCH
1
Rg
Rh
R g R2
fCLK
=

;
2
R h R1
6
HON1 f 0 =
Figure 24. Mode 3a: 2nd Order Filter Providing Highpass, Bandpass, Lowpass, Notch — ½ ML2111
18
HOHP ;
Rg
Rl

R4
R1
ML2111
OPERATION MODES
(Continued)
above the center frequency through the resistor ratio Rh/
Rl. Because of this, modes 3 and 3a are the most versatile
and useful modes for cascading second order sections to
obtain high order elliptic filters. For very selective
bandpass/bandreject filters the mode 3a approach , as in
Figure 24, yields better dynamic range since the external
op amp helps to optimize the dynamics of the output
nodes of the ML2111.
frequency. Mode 4a (Figure 26) gives a non-inverting
output, but requires an external op amp. Mode 5 is
recommended if this response is unacceptable. Mode 5
(Figure 27) gives a flatter response than mode 4 if R1 = R2
= 0.02 ´ R4.
Modes 6 and 7 are used to construct 1st order filters.
Mode 6a (Figure 28) gives a lowpass and a highpass
single pole response. Mode 6b (Figure 29) gives an
inverting and non-inverting lowpass single pole filter
response. Mode 7 (Figure 30) gives an allpass and lowpass
single pole response.
Modes 4 and 5 are useful for constructing allpass response filters. Mode 4, Figure 25, gives an allpass
response, but due to the sampled nature of the filter, a
slight 0.5 dB peaking can occur around the center
R3
R2
AP
BP
S1A
5 (16)
3 (18)
LP
2 (19)
1 (20)
R1 = R2
VIN
4 (17)
SA/B
6
+
+
Σ
15
V+
fo =
fCLK
R3
R3
R2
; Q=
; HOAP = - ; HOLP = -2 ; HOBP = -2
100 50
R2
R2
R1
0 5
Figure 25. Mode 4: 2nd Order Filter Providing Allpass, Bandpass, Lowpass — ½ ML2111
R4
R3
R2
HP
3 (18)
S1A
BP
LP
5 (16)
2 (19)
1 (20)
f0 =
HOAP =
R1
VIN
4 (17)
+
+
SA/B
V-
15
R5
R2
; HOHP = ;
2R
R1
Σ
R5
6
fCLK
R2
R3
R2

;Q =

;
100(50)
R4
R2
R4
External
Op Amp
R
2R
HOLP = -
R4
;
R1
HOBP = -
R3
R1
+
Figure 26. Mode 4a: 2nd Order Filter Providing Highpass, Bandpass, Lowpass, Allpass — ½ ML2111
19
ML2111
R3
R4
R2
R3
HP
3 (18)
R2
CZ
S1A
5 (16)
3 (18)
BP
2 (19)
LP
1 (20)
+
4 (17)
VIN
4 (17)
SA/B
SA/B
1 (20)
+
+
Σ
Σ
+
15
6
V-
15
6
LP
2 (19)
R1
R1
VIN
S1A
5 (16)
V+
f0 =
fCLK
f
R2
R1
1+
; f Z = CLK 1 ;
100(50)
100(50)
R4
R4
Q=
HOBP =
fC =
R3
R2
R3
R1
1+
;QZ =
1;
R2
R4
R1
R4
1
fCLK
R2
R3
R2

; HOLP = ; HOHP = 100(50) R3
R1
R1
Figure 28. Mode 6a: 1st Order Filter Providing
Highpass, Lowpass — ½ ML2111
6 00 55
1 + 0R2 / R15
=
1 + 0R2 / R 45
R 4 / R1 - 1
R3
R2
1+
; HOZ f 0 =
;
R2
R1
R4 / R2 + 1
HOZ f
fCLK
R2
=
; HOLP
2
R1
Figure 27. Mode 5: 2nd Order Filter Providing
Numerator Complex Zeroes, Bandpass, Lowpass — ½
ML2111
VIN
R3
R3
R2
LP1
S1A
5 (16)
3 (18)
LP2
2 (19)
R2 = R1
1 (20)
AP
S1A
5 (16)
3 (18)
LP
2 (19)
1 (20)
R1 = R2
4 (17)
SA/B
6
+
+
Σ
VIN
4 (17)
SA/B
15
6
+
+
Σ
15
V-
V-
fC =
fCLK
R2
R3

; HOLP1 = 1; HOLP2 = 100(50) R3
R2
fP = fZ =
fCLK
R2
R2

; HOLP = 2 100(50) R3
R3
|GAIN AT OUTPUT| = 1 FOR 0 f
Figure 29. Mode 6b: 1st Order Filter Providing Lowpass
— ½ ML2111
20
fCLK
2
Figure 30. Mode 7: 1st Order Filter Providing Allpass,
Lowpass — ½ ML2111
ML2111
20
1
LPA
2
R21
3
BPA
HPA
HPB
INVA
INVB
18
R22
0
101,777Hz
–3.058dB
–10
17
–20
16
5
S1A
S1B
SA/B
AGND
VA +
V A-
V D+
VD-
LSh
50/100
15
6
5V
R32
BPB
4
VIN
1Vp-p
VOUT
19
VOUT/VIN (dB)
R31
LPB
Q1 = 0.541
Q2 = 1.302
14
7
13
8
CLKA
–50
–60
5V
11
10
–40
-5V
12
9
–30
–70
CLKB
–80
10k
Clock 5MHz
100k
1M
FREQUENCY (Hz)
1% RESISTOR VALUES
R22 = 1996Ω
R32 = 2604Ω
R21 = 3746Ω
R31 = 2003Ω
Figure 31. 4th Order, 100kHz Lowpass Butterworth Filter Obtained by Cascading Two Sections in Mode 1a.
VOUT
20
1
LPA
R21
VIN
2.82Vp-p
(1VRMS)
R11
LPB
2
BPA
BPB
HPA
HPB
3
R32
18
R22
0
–10
17
4
INVA
149,871Hz
–0.31dB
–20
INVB
16
5
S1A
5V
R12
19
S1B
Q1 = Q2 = 10
15
6
SA/B
AGND
14
7
VA +
V A-
VD+
VD-
LSh
50/100
13
8
12
9
11
10
CLKA
CLKB
VOUT/VIN (dB)
R31
–30
–40
–50
-5V
5V
–60
–70
–80
10k
Clock 7.5MHz
100k
1M
FREQUENCY (Hz)
RESISTOR VALUES
R12 = 20kΩ
R22 = 2kΩ
R32 = 20kΩ
R11 = 20kΩ
R21 = 2kΩ
R31 = 20kΩ
Figure 32. Cascasding 2 Sections Connected in Mode 1, each with Q = 10, to obtain a Bandpass Filter with Q = 15.5,
and f0 = 150kHz (fCLK = 7.5MHz).
21
ML2111
R12
20
1
LPA
LPB
BPA
BPB
19
2
HPA
HPB
INVA
VIN
1Vp-p
INVB
16
5
S1A
S1B
SA/B
AGND
VA+
V A-
V D+
VD-
15
6
5V
166,224Hz
–3.121dB
–10
17
4
R11
0
R22
18
3
VOUT/VIN (dB)
R21
10
VOUT
14
7
13
8
LSh
–40
–60
5V
50/100
–30
3–50
-5V
12
9
–20
11
10
CLKA
CLKB
–70
10k
100k
1M
FREQUENCY (Hz)
Clock 7.51MHz
RESISTOR VALUES
R11 = R21 = R12 = R22 = 2.0kΩ
Figure 33. Cascading Two Sections in Mode 1d, Each with Q =1, (Independent of Resistor Ratios) to Create a Sharper 4th
Order Lowpass Filter.
R23
VIN
2.82Vp-p
LPA
R24
19
BPA
BPB
HPA
HPB
INVA
INVB
18
3
5V
R21
–10
–15
16
5
S1A
S1B
SA/B
AGND
VA +
V A-
VD +
VD -
LSh
50/100
15
6
R34
–5
17
4
R32
0
LPB
2
R31
VOUT
20
1
VOUT/VIN (dB)
R22
14
7
13
8
12
9
11
10
CLKA
CLKB
–20
–25
–30
–35
-5V
5V
–40
129,070Hz
–45
–50
127
130
133
FREQUENCY (kHz)
Clock 6.5MHz
1% RESISTOR VALUES
R21 = R22 = R23 = R24 = 2kΩ
R32 = 4.9kΩ
R31 = 80kΩ
R34 = 100Ω
Figure 34. Notch Filter with Q = 50 and f0 = 130kHz. This Circuit Uses Side A in Mode 1d and the Side B Op Amp to
Create a Notch Whose Depth is Controlled by R31. The Notch is Created by Subtracting the Bandpass from V IN. The
Bandpass of Side A is Subtracted Using the Op Amp of Side B.
22
ML2111
OPERATION MODES
OFFSETS
(Continued)
Mode 1a is a good choice when Butterworth filters are
desired since they have poles in a circle with the same f0.
Figure 31 shows an example of a 4th order, 100kHz
lowpass Butterworth filter clocked at 5MHz.
A monotonic passband response with a smooth transition
band results, showing the circuit's low sensitivity, even
though 1% resistors are used which results in an
approximate value of Q.
These offsets are mainly the charge injection of the
CMOS switchers into the integrating capacitors. The
internal op amp offsets also add to the overall offset
budget.Figure 35 shows half of the ML2111 filter with its
equivalent input offsets VOS1, VOS2, & VOS3.
The DC offset at the filter bandpass output is always equal
to VOS3. The DC offsets at the remaining two outputs
(Notch and LP) depend on the mode of operation and
external resistor ratios. Table 3 illustrates this.
Figure 32 gives an example of a 4th order bandpass filter
implemented by cascading 2 sections, each with a Q of
10. This figure shows the amplitude response when fCLK =
7.5MHz, resulting in a center frequency of 150kHz and a
Q of 15.5.
Figure 33 uses mode 1d of a 4th order flter where each
section has a Q of 1, independent of resistor ratios. In this
mode, the input amplifier is outside the damping (Q)
loop. Therefore, its finite bandwidth does not degrade the
response at high frequency. This allows the amplifier to be
used as an anti-aliasing and continuous smoothing fliter
by placing a capacitor across R2.
It is important to know the value of the DC output offsets,
especially when the filter handles input signals with large
dynamic range. As a rule of thumb, the output DC offsets
increase when:
1. The Qs decrease
2. The ratio (fCLK/fo) increases beyond 100:1. This is done
by decreasing either the (R2/R4) or the R6/(R5 + R6)
resistor ratios.
(16)
(18)
3
4
Switched capacitor integrators generally exhibit higher
input offsets than discrete RC integrators.
(19)
5
(20)
1
2
VOS1
+
VOS2
+
(17)
+
Σ
VOS3
+
+
+
+
15
Figure 35. Equivalent Input Offsets of ½ of an ML2111 Filter.
23
ML2111
MODE
VOSN
VOSBP
VOSLP
N/AP/HPA, N/AP/HPB
BPA, BPB
LPA, LPB
1, 4
VOS1 [(1/Q) + 1 + ||HOLP||] – VOS3/Q
V OS3
VOSN – VOS2
1a
VOS1 [1 + (1/Q)] – VOS3/Q
V OS3
VOSN – VOS2
1b
VOS1 [(1/Q)] + 1 + R2/R1] – VOS3/Q
V OS3
~(VOSN – VOS2) (1 + R5/R6)
1c
VOS1 [(1/Q)] + 1 + R2/R1] – VOS3/Q
V OS3
~ VOSN - VOS2
1d
VOS1 [1 + R2/R1]
V OS3
VOSN – VOS2 – VOS3/Q
2, 5
[VOS1 (1 + R2/R1 + R2/R3 + R2/R4) – VOS3(R2/R3)] ´
V OS3
VOSN – VOS2
V OS3
~ VOSN - VOS2
V OS3
~ VOSN - VOS2 1+
V OS3
VOS1 1 +
[R4/(R2 + R4)] + VOS2[R2/(R2 + R4)]
2a
R411+ k6 "# + V R2 "# ;k = R6
!R2 + R411+ k6 #$
!R2 + R411+ k6 #$ R5 + R6
R 41k 6 "# + V R 2 "# ; k = R 6
! R 2 + R 41k 6 #$
! R 2 + R 41k 6 #$ R 5 + R 6
VOS2
Table 3.
24
1
6 RR55++2RR66
1
6
[VOS1 (1 + R2/R1 + R2/R3 + R2/R4) – VOS3(R2/R3)] ´
O S2
3, 4a
6 RR55++2RR66
[VOS1 (1 + R2/R1 + R2/R3 + R2/R4) – VOS3(R2/R3)] ´
OS2
2b
1
!
R5
R6
"#
$
R 4 R 4 R4
R4
R4
+
+
- VOS2
- VOS3
R1 R2 R3
R2
R3
ML2111
PHYSICAL DIMENSIONS
inches (millimeters)
Package: P20
20-Pin PDIP
1.010 - 1.035
(25.65 - 26.29)
20
0.240 - 0.260 0.295 - 0.325
(6.09 - 6.61) (7.49 - 8.26)
PIN 1 ID
1
0.060 MIN
(1.52 MIN)
(4 PLACES)
0.055 - 0.065
(1.40 - 1.65)
0.100 BSC
(2.54 BSC)
0.015 MIN
(0.38 MIN)
0.170 MAX
(4.32 MAX)
SEATING PLANE
0.016 - 0.022
(0.40 - 0.56)
0.125 MIN
(3.18 MIN)
0º - 15º
0.008 - 0.012
(0.20 - 0.31)
Package: S20
20-Pin SOIC
0.498 - 0.512
(12.65 - 13.00)
20
0.291 - 0.301 0.398 - 0.412
(7.39 - 7.65) (10.11 - 10.47)
PIN 1 ID
1
0.024 - 0.034
(0.61 - 0.86)
(4 PLACES)
0.050 BSC
(1.27 BSC)
0.095 - 0.107
(2.41 - 2.72)
0º - 8º
0.090 - 0.094
(2.28 - 2.39)
0.012 - 0.020
(0.30 - 0.51)
SEATING PLANE
0.005 - 0.013
(0.13 - 0.33)
0.022 - 0.042
(0.56 - 1.07)
0.007 - 0.015
(0.18 - 0.38)
25
ML2111
ORDERING INFORMATION
PART NUMBER
TEMPERATURE RANGE
PACKAGE
ML2111CCP (EOL)
0°C to 70°C
20-Pin PDIP (P20)
ML2111CCS
0°C to 70°C
20-Pin SOIC (S20)
ML2111CIP (OBS)
-40°C to 85°C
20-Pin PDIP (P20)
Micro Linear Corporation
2092 Concourse Drive
San Jose, CA 95131
Tel: (408) 433-5200
Fax: (408) 432-0295
© Micro Linear 1999.
is a registered trademark of Micro Linear Corporation. All other
trademarks are the property of their respective owners.
Products described herein may be covered by one or more of the following U.S. patents: 4,897,611; 4,964,026;
5,027,116; 5,281,862; 5,283,483; 5,418,502; 5,508,570; 5,510,727; 5,523,940; 5,546,017; 5,559,470; 5,565,761;
5,592,128; 5,594,376; 5,652,479; 5,661,427; 5,663,874; 5,672,959; 5,689,167; 5,714,897; 5,717,798; 5,742,151;
5,747,977; 5,754,012; 5,757,174; 5,767,653; 5,777,514; 5,793,168; 5,798,635; 5,804,950; 5,808,455; 5,811,999;
5,818,207; 5,818,669; 5,825,165; 5,825,223; 5,838,723; 5.844,378; 5,844,941. Japan: 2,598,946; 2,619,299;
2,704,176; 2,821,714. Other patents are pending.
Micro Linear makes no representations or warranties with respect to the accuracy, utility, or completeness of
the contents of this publication and reserves the right to makes changes to specifications and product
descriptions at any time without notice. No license, express or implied, by estoppel or otherwise, to any patents
or other intellectual property rights is granted by this document. The circuits contained in this document are
offered as possible applications only. Particular uses or applications may invalidate some of the specifications
and/or product descriptions contained herein. The customer is urged to perform its own engineering review
before deciding on a particular application. Micro Linear assumes no liability whatsoever, and disclaims any
express or implied warranty, relating to sale and/or use of Micro Linear products including liability or warranties
relating to merchantability, fitness for a particular purpose, or infringement of any intellectual property right.
Micro Linear products are not designed for use in medical, life saving, or life sustaining applications.
26
DS2111-01

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