LC2MOS Precision Quad SPST Switches ADG411/ADG412/ADG413 FEATURES The ADG411, ADG412, and ADG413 contain four independent SPST switches. The ADG411 and ADG412 differ only in that the digital control logic is inverted. The ADG411 switches are turned on with a logic low on the appropriate control input, while a logic high is required for the ADG412. The ADG413 has two switches with digital control logic similar to that of the ADG411 while the logic is inverted on the other two switches. 44 V supply maximum ratings ±15 V analog signal range Low on resistance (< 35 Ω) Ultralow power dissipation (35 μW) Fast switching times tON < 175 ns tOFF < 145 ns TTL-/CMOS-compatible Plug-in replacement for DG411/DG412/DG413 Each switch conducts equally well in both directions when on, and each has an input signal range that extends to the supplies. In the off condition, signal levels up to the supplies are blocked. All switches exhibit break-before-make switching action for use in multiplexer applications. Inherent in the design is low charge injection for minimum transients when switching the digital inputs. APPLICATIONS Audio and video switching Automatic test equipment Precision data acquisition Battery-powered systems Sample-and-hold systems Communication systems PRODUCT HIGHLIGHTS 1. Extended signal range The ADG411, ADG412, and ADG413 are fabricated on an enhanced LC2MOS, giving an increased signal range which extends fully to the supply rails. GENERAL DESCRIPTION The ADG411, ADG412, and ADG413 are monolithic CMOS devices comprising four independently selectable switches. They are designed on an enhanced LC2MOS process which provides low power dissipation yet gives high switching speed and low on resistance. 2. Ultralow power dissipation 3. Low RON The on resistance profile is very flat over the full analog input range ensuring excellent linearity and low distortion when switching audio signals. Fast switching speed coupled with high signal bandwidth also make the parts suitable for video signal switching. CMOS construction ensures ultralow power dissipation, making the parts ideally suited for portable and battery-powered instruments. 4. Break-before-make switching This prevents channel shorting when the switches are configured as a multiplexer. 5. Single-supply operation For applications where the analog signal is unipolar, the ADG411, ADG412, and ADG413 can be operated from a single-rail power supply. The parts are fully specified with a single 12 V power supply and remain functional with single supplies as low as 5 V. FUNCTIONAL BLOCK DIAGRAMS S1 IN1 D1 S2 D1 S2 D1 S2 IN2 IN2 ADG411 S1 IN1 D2 S3 IN2 D2 S3 ADG412 ADG413 IN3 IN3 IN3 D3 S4 D3 S4 D3 S4 IN4 SWITCHES SHOWN FOR A LOGIC 1 INPUT Figure 1. ADG411 IN4 D4 SWITCHES SHOWN FOR A LOGIC 1 INPUT Figure 2. ADG412 00024-002 D4 00024-001 IN4 D2 S3 D4 SWITCHES SHOWN FOR A LOGIC 1 INPUT 00024-003 S1 IN1 Figure 3. ADG413 Rev. D Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2010 Analog Devices, Inc. All rights reserved. ADG411/ADG412/ADG413 TABLE OF CONTENTS Features .............................................................................................. 1 Absolute Maximum Ratings ............................................................5 Applications ....................................................................................... 1 ESD Caution...................................................................................5 General Description ......................................................................... 1 Pin Configuration and Function Descriptions..............................6 Product Highlights ........................................................................... 1 Typical Performance Characteristics ..............................................7 Functional Block Diagrams ............................................................. 1 Terminology .......................................................................................9 Revision History ............................................................................... 2 Applications..................................................................................... 10 Specifications..................................................................................... 3 Test Circuits ..................................................................................... 11 Dual Supply ................................................................................... 3 Outline Dimensions ....................................................................... 13 Single Supply ................................................................................. 4 Ordering Guide .......................................................................... 15 REVISION HISTORY 6/10—Rev. C to Rev. D Updated Outline Dimensions ....................................................... 13 Changes to Ordering Guide .......................................................... 15 11/04—Rev. B to Rev. C Format Updated .................................................................. Universal Change to Package Drawing (Figure 23) ..................................... 13 Changes to Ordering Guide .......................................................... 14 7/04—Rev. A to Rev. B Changes to ORDERING GUIDE ..................................................... 5 Updated OUTLINE DIMENSIONS ............................................... 11 Rev. D | Page 2 of 16 ADG411/ADG412/ADG413 SPECIFICATIONS DUAL SUPPLY VDD = 15 V ± 10%, VSS = –15 V ± 10%, VL = 5 V ± 10%, GND = 0 V, unless otherwise noted. 1 Table 1. Parameter ANALOG SWITCH Analog Signal Range RON B Version −40°C to +25°C +85°C T Version −55°C to +25°C +125°C VDD to VSS 25 35 45 VDD to VSS 25 35 45 Unit V Ω typ Ω max Test Conditions/Comments VD = ±8.5 V, IS = −10 mA; VDD = +13.5 V, VSS = −13.5 V VDD = +16.5 V, VSS = −16.5 V VD = +15.5 V/−15.5 V, VS = −15.5 V/+15.5 V; Figure 15 VD = +15.5 V/−15.5 V, VS = −15.5 V/+15.5 V; Figure 15 VD = VS = +15.5 V/−15.5 V; Figure 16 LEAKAGE CURRENTS Source OFF Leakage IS (OFF) ±0.1 ±0.25 ±0.25 ±0.1 ±20 Drain OFF Leakage ID (OFF) ±0.25 ±0.1 nA max nA typ ±0.25 ±0.1 ±0.4 ±5 ±0.25 ±0.1 ±0.4 ±20 ± 40 nA max nA typ nA max 2.4 0.8 V min V max μA typ μA max VIN = VINL or VINH ±0.5 RL = 300 Ω, CL = 35 pF; VS = ±10 V; Figure 17 RL = 300 Ω, CL = 35 pF; VS = ±10 V; Figure 17 RL = 300 Ω, CL = 35 pF; VS1 = VS2 = 10 V; Figure 18 VS = 0 V, RS = 0 Ω, CL = 10 nF; Figure 19 RL = 50 Ω, CL = 5 pF, f = 1 MHz; Figure 20 RL = 50 Ω, CL = 5 pF, f = 1 MHz; Figure 21 f = 1 MHz f = 1 MHz f = 1 MHz VDD = +16.5 V, VSS = −16.5 V; Digital inputs = 0 V or 5 V Channel ON Leakage ID, IS (ON) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current IINL or IINH ±0.1 ±10 2.4 0.8 0.005 0.005 ±0.5 DYNAMIC CHARACTERISTICS 2 tON 110 110 Break-Before-Make Time Delay, tD (ADG413 Only) Charge Injection 25 25 ns typ ns max ns typ ns max ns typ 5 5 pC typ OFF Isolation 68 68 dB typ Channel-to-Channel Crosstalk 85 85 dB typ 9 9 35 9 9 35 pF typ pF typ pF typ 175 tOFF 100 175 100 145 CS (OFF) CD (OFF) CD, CS (ON) POWER REQUIREMENTS IDD ISS IL 1 2 nA typ 0.0001 1 0.0001 1 0.0001 1 5 5 5 145 0.0001 1 0.0001 1 0.0001 1 5 5 5 Temperature ranges are as follows: B versions: −40°C to +85°C; T versions: −55°C to +125°C. Guaranteed by design; not subject to production test. Rev. D | Page 3 of 16 μA typ μA max μA typ μA max μA typ μA max ADG411/ADG412/ADG413 SINGLE SUPPLY VDD = 12 V ± 10%, VSS = 0 V, VL = 5 V ± 10%, GND = 0 V, unless otherwise noted. 1 Table 2. Parameter ANALOG SIGNAL RANGE RON LEAKAGE CURRENTS Source OFF Leakage IS (OFF) Drain OFF Leakage ID (OFF) Channel ON Leakage ID, IS (ON) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current IINL or IINH +25°C 40 80 B Version −40°C to + 85°C 0 V to VDD 100 ±0.1 ±0.25 ±0.1 ±0.25 ±0.1 ±0.4 ±5 ±5 ±10 +25°C T Version −55°C to +125°C 0 V to VDD 40 80 100 ±0.1 ±0.25 ±0.1 ±0.25 ±0.1 ±0.4 0.005 DYNAMIC CHARACTERISTICS 2 tON μA typ μA max VIN = VINL or VINH ±0.5 RL = 300 Ω, CL = 35 pF; VS = 8 V; Figure 17 RL = 300 Ω, CL = 35 pF; VS = 8 V; Figure 17 RL = 300 Ω, CL = 35 pF; VS1 = VS2 = +10 V; Figure 18 VS = 0 V, RS = 0 Ω, CL = 10 nF; Figure 19 RL = 50 Ω, CL = 5 pF, f = 1 MHz; Figure 20 RL = 50 Ω, CL = 5 pF, f = 1 MHz; Figure 21 f = 1 MHz f = 1 MHz f = 1 MHz VDD = 13.2 V; Digital inputs = 0 V or 5 V Break-Before-Make Time Delay, tD (ADG413 Only) Charge Injection 25 25 ns typ ns max ns typ ns max ns typ 25 25 pC typ OFF Isolation 68 68 dB typ Channel-to-Channel Crosstalk 85 85 dB typ 9 9 35 9 9 35 pF typ pF typ pF typ tOFF 95 250 95 125 CS (OFF) CD (OFF) CD, CS (ON) POWER REQUIREMENTS IDD 0.0001 1 0.0001 1 IL 2 V min V max 175 250 1 2.4 0.8 0.005 175 5 5 125 0.0001 1 0.0001 1 0 < VD = 8.5 V, IS = −10 mA; VDD = 10.8 V VDD = 13.2 V VD = 12.2 V/1 V, VS = 1 V/12.2 V; Figure 15 VD = 12.2 V/1 V, VS = 1 V/12.2 V; Figure 15 VD = VS = 12.2 V/1 V; Figure 16 ±40 ±20 ±0.5 Test Conditions/Comments nA typ nA max nA typ nA max nA typ nA max ±20 2.4 0.8 Unit V Ω typ Ω max 5 5 μA typ μA max μA typ μA max VL = 5.25 V Temperature ranges are as follows: B versions:−40°C to +85°C; T versions: −55°C to +125°C. Guaranteed by design; not subject to production test. Table 3. Truth Table (ADG411/ADG412) Table 4. Truth Table (ADG413) ADG411 In 0 1 Logic 0 1 ADG412 In 1 0 Switch Condition ON OFF Rev. D | Page 4 of 16 Switch 1, 4 OFF ON Switch 2, 3 ON OFF ADG411/ADG412/ADG413 ABSOLUTE MAXIMUM RATINGS TA = 25°C, unless otherwise noted. Table 5. Parameters VDD to VSS VDD to GND VSS to GND VL to GND Analog, Digital Inputs1 Continuous Current, S or D Peak Current, S or D (Pulsed at 1 ms, 10% Duty Cycle max) Operating Temperature Range Industrial (B Version) Extended (T Version) Storage Temperature Range Junction Temperature PDIP, Power Dissipation θJA Thermal Impedance Lead Temperature, Soldering (10 s) SOIC Package, Power Dissipation θJA Thermal Impedance TSSOP Package, Power Dissipation θJA Thermal Impedance θJC Thermal Impedance Lead Temperature, Soldering Vapor Phase (60 s) Infrared (15 s) 1 Ratings 44 V −0.3 V to +25 V +0.3 V to −25 V −0.3 V to VDD + 0.3 V VSS − 2 V to VDD + 2 V or 30 mA, whichever occurs first 30 mA 100 mA Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Only one absolute maximum rating may be applied at any one time. ESD CAUTION −40°C to +85°C −55°C to +125°C −65°C to +150°C 150°C 470 mW 117°C/W 260°C 600 mW 77°C/W 450 mW 115°C/W 35°C/W 215°C 220°C Overvoltages at IN, S, or D are clamped by internal diodes. Current should be limited to the maximum ratings given. Rev. D | Page 5 of 16 ADG411/ADG412/ADG413 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS IN1 1 16 IN2 D1 2 15 D2 14 S2 VSS 4 GND 5 ADG411/ ADG412/ ADG413 VDD TOP VIEW (Not to Scale) 12 VL 13 S4 6 11 S3 D4 7 10 D3 IN4 8 9 IN3 00024-004 S1 3 Figure 4. Pin Configuration Table 6. Pin Function Descriptions Pin No. 1, 8, 9, 16 2, 7, 10, 15 3, 6, 11, 14 4 Mnemonic IN1–IN4 D1–D4 S1–S4 VSS 5 12 13 GND VL VDD Description Logic Control Input. Drain Terminal. Can be an input or output. Source Terminal. Can be an input or output. Most Negative Power Supply Potential in Dual Supplies. In single supply applications, it may be connected to GND. Ground (0 V) Reference. Logic Power Supply (5 V). Most Positive Power Supply Potential. Rev. D | Page 6 of 16 ADG411/ADG412/ADG413 TYPICAL PERFORMANCE CHARACTERISTICS 50 50 TA = 25°C VL = +5V TA = 25°C VL = +5V VDD = +5V VSS = –5V VDD = +10V VSS = 0V 30 VDD = +10V VSS = –10V RON (Ω) 30 VDD = +12V VSS = –12V 20 VDD = +12V VSS = 0V 20 10 10 0 –20 VDD = +15V VSS = 0V 00024-005 VDD = +15V VSS = –15V –10 0 0 0 20 10 00024-008 RON (Ω) VDD = +5V VSS = 0V 40 40 5 10 20 15 VD OR VS – DRAIN OR SOURCE VOLTAGE (V) VD OR VS – DRAIN OR SOURCE VOLTAGE (V) Figure 8. On Resistance as a Function of VD (VS) Single Supply Figure 5. On Resistance as a Function of VD (VS) Dual Supplies 100m 50 VDD = +15V VSS = –15V VL = +5V VDD = +15V VSS = –15V VL = +5V 10m 4 SW 1 SW 40 ISUPPLY (A) 1m RON (Ω) 30 125°C 20 I+, I– 100μ 10μ 85°C IL 25°C 10 –15 –10 –5 0 5 10 15 100n 10 20 00024-009 00024-006 0 –20 1μ 100 1k 10k 100k 1M 10M FREQUENCY (Hz) VD OR VS – DRAIN OR SOURCE VOLTAGE (V) Figure 9. Supply Current vs. Input Switching Frequency Figure 6. On Resistance as a Function of VD (VS) for Different Temperatures 0.04 VDD = +15V VSS = –15V TA = 25°C VL = +5V 10 LEAKAGE CURRENT (nA) 1 VD = ±15V VS = ±15V IS (OFF) 0.1 ID (OFF) ID (ON) ID (ON) 0.02 IS (OFF) 0 ID (OFF) –0.02 0.001 100 1k 10k 100k 1M –0.04 –20 100M 00024-010 0.01 00024-007 LEAKAGE CURRENT (nA) VDD = +15V VSS = –15V VL = +5V –10 0 10 VD OR VS – DRAIN OR SOURCE VOLTAGE (V) FREQUENCY (Hz) Figure 10. Leakage Currents as a Function of VD (VS) Figure 7. Leakage Currents as a Function of Temperature Rev. D | Page 7 of 16 20 ADG411/ADG412/ADG413 120 110 VDD = +15V VSS = –15V VL = +5V VDD = +15V VSS = –15V VL = +5V 100 CROSSTALK (dB) 80 90 80 60 40 100 1k 10k 100k 1M 60 100 10M FREQUENCY (Hz) 00024-012 70 00024-011 OFF ISOLATION (dB) 100 1k 10k 100k FREQUENCY (Hz) Figure 11. Off Isolation vs. Frequency Figure 12. Crosstalk vs. Frequency Rev. D | Page 8 of 16 1M 10M ADG411/ADG412/ADG413 TERMINOLOGY RON tON Ohmic resistance between D and S. IS (OFF) Delay between applying the digital control input and the output switching on. Source leakage current with the switch OFF. tOFF ID (OFF) Delay between applying the digital control input and the output switching off. Drain leakage current with the switch OFF. ID, IS (ON) tD VD (VS) OFF time or ON time measured between the 90% points of both switches, when switching from one address state to another. Analog voltage on terminals D, S. Crosstalk CS (OFF) OFF switch source capacitance. A measure of unwanted signal which is coupled through from one channel to another as a result of parasitic capacitance. CD (OFF) Off Isolation OFF switch drain capacitance. A measure of unwanted signal coupling through an OFF switch. CD, CS (ON) Charge Injection ON switch capacitance. A measure of the glitch impulse transferred from the digital input to the analog output during switching. Channel leakage current with the switch ON. Rev. D | Page 9 of 16 ADG411/ADG412/ADG413 APPLICATIONS Due to switch and capacitor leakage, the voltage on the hold capacitor decreases with time. The ADG411/ADG412/ADG413 minimizes this droop due to its low leakage specifications. The droop rate is further minimized by the use of a polystyrene hold capacitor. The droop rate for the circuit shown is typically 30 μV/μs. the hold time glitch while optimizing the acquisition time. Using the illustrated op amps and component values, the pedestal error has a maximum value of 5 mV over the ±10 V input range. Both the acquisition and settling times are 850 ns. +15V +5V 2200pF +15V SW1 +15V S VIN A second switch, SW2, which operates in parallel with SW1, is included in this circuit to reduce pedestal error. Since both switches are at the same potential, they have a differential effect on the op amp AD711, which minimizes charge injection effects. Pedestal error is also reduced by the compensation network RC and CC. This compensation network also reduces Rev. D | Page 10 of 16 D SW2 AD845 S D –15V RC 75Ω CC 1000pF CH 2200pF AD711 VOUT –15V ADG411 ADG412 ADG413 –15V Figure 13. Fast, Accurate Sample-and-Hold 00024-013 Figure 13 illustrates a precise, fast, sample-and-hold circuit. An AD845 is used as the input buffer while the output operational amplifier is an AD711. During the track mode, SW1 is closed and the output VOUT follows the input signal VIN. In the hold mode, SW1 is opened and the signal is held by the hold capacitor CH. ADG411/ADG412/ADG413 TEST CIRCUITS IDS V1 D S A 00024-015 RON = V1/IDS ID (OFF) S A 00024-014 VD VS Figure 14. On Resistance ID (ON) A VD VS Figure 15. Off Leakage +15V D Figure 16. On Leakage +5V 0.1μF 0.1μF 3V VL S D VIN ADG411 VIN ADG412 VOUT RL 300Ω IN 50% 50% 50% 50% 3V CL 35pF 90% 90% VOUT VSS GND 0.1μF –15V tON 00024-017 VS VDD tOFF Figure 17. Switching Times +15V +5V 0.1μF 0.1μF 3V VS2 VL S1 D1 S2 D2 VIN VOUT2 GND RL1 300Ω 90% 90% VOUT1 CL1 35pF 50% 0V CL2 35pF RL2 300Ω IN1, IN2 50% 0V VOUT1 VSS 90% VOUT2 90% 0V tD 0.1μF –15V tD Figure 18. Break-Before-Make Time Delay RS VS +15V +5V VDD VL S D 3V VOUT VIN CL 10nF IN GND VSS VOUT ΔVOUT QINJ = CL × ΔVOUT –15V Figure 19. Charge Injection Rev. D | Page 11 of 16 00024-018 VDD VS1 VIN 00024-019 VS D 00024-016 IS (OFF) S ADG411/ADG412/ADG413 +15V +5V 0.1μF VDD VL S D GND VL S D 50Ω VIN2 D VOUT VSS 0.1μF –15V VDD VIN1 VS IN RL 50Ω 00024-020 VIN 0.1μF VOUT RL 50Ω VS +5V 0.1μF S GND 0.1μF –15V Figure 20. Off Isolation NC VSS CHANNEL-TO-CHANNEL CROSSTALK = 20 × LOG VS/VOUT Figure 21. Channel-to-Channel Crosstalk Rev. D | Page 12 of 16 00024-021 +15V 0.1μF ADG411/ADG412/ADG413 OUTLINE DIMENSIONS 10.00 (0.3937) 9.80 (0.3858) 4.00 (0.1575) 3.80 (0.1496) 9 16 1 6.20 (0.2441) 5.80 (0.2283) 8 1.27 (0.0500) BSC 0.25 (0.0098) 0.10 (0.0039) COPLANARITY 0.10 0.50 (0.0197) 0.25 (0.0098) 1.75 (0.0689) 1.35 (0.0531) SEATING PLANE 0.51 (0.0201) 0.31 (0.0122) 45° 8° 0° 0.25 (0.0098) 0.17 (0.0067) 1.27 (0.0500) 0.40 (0.0157) COMPLIANT TO JEDEC STANDARDS MS-012-AC 060606-A CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. Figure 22. 16-Lead Standard Small Outline Package [SOIC_N] Narrow Body (R-16) Dimensions shown in millimeters and (inches) 5.10 5.00 4.90 16 9 4.50 4.40 4.30 6.40 BSC 1 8 PIN 1 1.20 MAX 0.15 0.05 0.20 0.09 0.65 BSC 0.30 0.19 COPLANARITY 0.10 SEATING PLANE 8° 0° COMPLIANT TO JEDEC STANDARDS MO-153-AB Figure 23. 16-Lead Thin Shrink Small Outline Package [TSSOP] (RU-16) Dimensions shown in millimeters Rev. D | Page 13 of 16 0.75 0.60 0.45 ADG411/ADG412/ADG413 0.800 (20.32) 0.790 (20.07) 0.780 (19.81) 16 9 1 8 0.280 (7.11) 0.250 (6.35) 0.240 (6.10) 0.325 (8.26) 0.310 (7.87) 0.300 (7.62) 0.100 (2.54) BSC 0.060 (1.52) MAX 0.210 (5.33) MAX 0.195 (4.95) 0.130 (3.30) 0.115 (2.92) 0.015 (0.38) MIN 0.150 (3.81) 0.130 (3.30) 0.115 (2.92) 0.015 (0.38) GAUGE PLANE SEATING PLANE 0.022 (0.56) 0.018 (0.46) 0.014 (0.36) 0.005 (0.13) MIN 0.014 (0.36) 0.010 (0.25) 0.008 (0.20) 0.430 (10.92) MAX COMPLIANT TO JEDEC STANDARDS MS-001-AB CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. CORNER LEADS MAY BE CONFIGURED AS WHOLE OR HALF LEADS. Figure 24. 16-Lead Plastic Dual In-Line Package [PDIP] (N-16) Dimensions shown in inches and (millimeters) Rev. D | Page 14 of 16 073106-B 0.070 (1.78) 0.060 (1.52) 0.045 (1.14) ADG411/ADG412/ADG413 ORDERING GUIDE Model 1 ADG411BN ADG411BNZ ADG411BR ADG411BR-REEL ADG411BR-REEL7 ADG411BRZ ADG411BRZ-REEL ADG411BRZ-REEL7 ADG411BRU ADG411BRU-REEL ADG411BRU-REEL7 ADG411BRUZ ADG411BRUZ-REEL ADG411BRUZ-REEL7 ADG411BCHIPS ADG412BN ADG412BNZ ADG412BR ADG412BR-REEL ADG412BR-REEL7 ADG412BRZ ADG412BRZ-REEL ADG412BRZ-REEL7 ADG412BRU ADG412BRU-REEL ADG412BRU-REEL7 ADG412BRUZ ADG412BRUZ-REEL ADG412BRUZ-REEL7 ADG413BN ADG413BNZ ADG413BR ADG413BR-REEL ADG413BRZ ADG413BRZ-REEL ADG413BRUZ ADG413BRUZ-500RL7 ADG413BRUZ-REEL ADG413BRUZ-REEL7 1 Temperature Range −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C Package Description 16-Lead P-DIP 16-Lead P-DIP 16-Lead SOIC_N 16-Lead SOIC_N 16-Lead SOIC_N 16-Lead SOIC_N 16-Lead SOIC_N 16-Lead SOIC_N 16-Lead TSSOP 16-Lead TSSOP 16-Lead TSSOP 16-Lead TSSOP 16-Lead TSSOP 16-Lead TSSOP DIE 16-Lead P-DIP 16-Lead P-DIP 16-Lead SOIC_N 16-Lead SOIC_N 16-Lead SOIC_N 16-Lead SOIC_N 16-Lead SOIC_N 16-Lead SOIC_N 16-Lead TSSOP 16-Lead TSSOP 16-Lead TSSOP 16-Lead TSSOP 16-Lead TSSOP 16-Lead TSSOP 16-Lead P-DIP 16-Lead P-DIP 16-Lead SOIC_N 16-Lead SOIC_N 16-Lead SOIC_N 16-Lead SOIC_N 16-Lead TSSOP 16-Lead TSSOP 16-Lead TSSOP 16-Lead TSSOP Z = RoHS Compliant Part. Rev. D | Page 15 of 16 Package Option N-16 N-16 R-16 R-16 R-16 R-16 R-16 R-16 RU-16 RU-16 RU-16 RU-16 RU-16 RU-16 N-16 N-16 R-16 R-16 R-16 R-16 R-16 R-16 RU-16 RU-16 RU-16 RU-16 RU-16 RU-16 N-16 N-16 R-16 R-16 R-16 R-16 RU-16 RU-16 RU-16 RU-16 ADG411/ADG412/ADG413 NOTES ©2010 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D00024-0-6/10(D) Rev. D | Page 16 of 16