HIP1011 PCI Hot Plug Controller The HIP1011 is the PCI Hot Plug voltage bus control IC for use in modern computer systems that facilitates hot plugging of adapter cards into and out of an active or passive back plane. Along with discrete power MOSFETs and a few passive components, the HIP1011 creates a small and simple yet complete power control solution. Four independent supplies are controlled, +5V, +3.3V, +12V, and -12V. The +12V and 12V switches are integrated. For the +5V and +3.3V supplies, overcurrent protection is provided by sensing the voltage across external current-sense resistors. For the +12V and -12V supplies, overcurrent protection is provided internally. In addition, an on-chip reference is used to monitor the +5V, +3.3V and +12V outputs for undervoltage conditions. The PWRON input controls the state of the switches. During an overcurrent condition on any output, or an undervoltage condition on the +5V, +3.3V or +12V outputs, all MOSFETs are immediately latched-off and a LOW (0V) is asserted on the FLTN output. The FLTN latch is cleared when the PWRON input is toggled low again. During initial power-up of the main VCC supply (+12V), the PWRON input is inhibited from turning on the switches, and the latch is held in the Reset state until the VCC input is greater than 10V. User programmability of the overcurrent threshold and turn-on slew rate is provided. A resistor connected to the OCSET pin programs the overcurrent threshold. Capacitors connected to the gate pins set the turn-on rate. Also, a capacitor may be added to the FLTN pin to provide noise immunity. Ordering Information PART NUMBER TEMP. RANGE (°C) PACKAGE HIP1011CB 0 to 70 16 Ld SOIC HIP1011CB-T 0 to 70 Tape and Reel HIP1011CBZA (Note) 0 to 70 16 Ld SOIC (Pb-free) HIP1011CBZA-T (Note) 0 to 70 Tape and Reel (Pb-free) HIP1011EVAL1 DATASHEET ESIGNS R NE W D NT O F D E D N EME COMME REPL A C D E N OT R E D N enter at OMME upport C om/tsc S l NO REC a ic n h tersil.c our Tec contact ERSIL or www.in T N 1-888-I PKG. DWG. # M16.15 FN4311 Rev 9.00 March 2004 Features • Controls Distribution of Four Supplies: +5V, +3.3V, +12V, and -12V • Internal MOSFET Switches for +12V and -12V Outputs • Microprocessor Interface for On/Off Control and Fault Reporting • Adjustable Overcurrent Protection for All Supplies • Provides Fault Isolation • Adjustable Turn-On Slew Rate • Minimum Parts Count Solution • No Charge Pump • Pb-Free Package Options Applications • PCI Hot Plug • CompactPCI Pinout HIP1011 (SOIC) TOP VIEW M12VIN 1 FLTN 2 15 M12VG 3V5VG 3 14 12VG VCC 4 13 GND 16 M12VO 12VIN 5 12 12VO 3VISEN 6 11 5VISEN 3VS 7 10 5VS OCSET 8 9 PWRON M16.15 Evaluation Platform NOTE: Intersil Pb-free products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which is compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J Std-020B. FN4311 Rev 9.00 March 2004 Page 1 of 8 HIP1011 Typical Application 3.3V INPUT 3.3V, 7.6A OUT 5m, 1% 12V, 0.5A OUT -12V, 0.1A OUT 5V, 5A OUT 5m, 1% 5V INPUT HUF761315K8 HIP1011 -12V INPUT M12VIN FLTN 3V5VG VCC 12VIN 3VISEN 3VS OCSET 12V INPUT 6.04k 1% M12VO M12VG 12VG GND 12VO 5VISEN 5VS PWRON 0.033µF 0.033µF (OPTIONAL) POWER CONTROL INPUT FAULT OUTPUT (ACTIVE LOW) FN4311 Rev 9.00 March 2004 0.033µF NOTE: 1. All capacitors are 10%. Page 2 of 8 HIP1011 Simplified Schematic 5VREF SET (LOW = FAULT) FAULT LATCH LOW = FAULT COMP FLTN + 4.6V INHIBIT RESET COMP + 2.9V INHIBIT COMP + 10.8V INHIBIT VCC + - VOCSET/17 COMP VCC 5VS + - VCC 3V5VG VCC 5VREF 5VISEN VOCSET/13.3 12VIN POWER-ON RESET - VCC COMP LOW WHEN VCC < 10V + 5V ZENER REFERENCE 3VS + - 3VISEN VCC COMP VOCSET - OCSET VOCSET/0.8 + + 100µA HIGH = FAULT 0.3 12VIN VCC 12VG VCC 12VO HIGH = SWITCHES ON PWRON M12VIN 0.7 - GND VOCSET/3.3 + + COMP M12VG M12VIN M12VO FN4311 Rev 9.00 March 2004 Page 3 of 8 HIP1011 Pin Descriptions PIN DESIGNATOR FUNCTION 1 M12VIN -12V Input 2 FLTN Fault Output 3 3V5VG 4 VCC 12V VCC Input 5 12VIN 12V Input 6 3VISEN 3.3V Current Sense Connect to the load side of the current sense resistor in series with source of external 3.3V MOSFET. 7 3VS 3.3V Source Connect to source of 3.3V MOSFET. This connection along with pin 6 (3VISEN) senses the voltage drop across the sense resistor. 8 OCSET Overcurrent Set 9 PWRON Power On Control 10 5VS 5V Source Connect to source of 5V MOSFET switch. This connection along with pin 11(5VISEN) senses the voltage drop across the sense resistor. 11 5VISEN 5V Current Sense Connect to the load side of the current sense resistor in series with source of external 5V MOSFET. 12 12VO 13 GND Ground 14 12VG Gate of Internal PMOS Connect a capacitor between 12VG and 12VO to set the startup ramp for the +12V supply. This capacitor is charged with a 25A current source during startup. The 3.3V and 5V UV circuitry is enabled after the voltage on 12VG is less than 400mV. Therefore, if the capacitor on the pin 3 (3V5VG) is more than 25% larger than the capacitor on pin 14 (12VG) a false UV may be detected during startup. 15 M12VG Gate of Internal NMOS Connect a capacitor between M12VG and M12VO to set the startup ramp for the M12V supply. This capacitor is charged with 25A during startup. 16 M12VO Switched -12V Output Switched 12V Output. FN4311 Rev 9.00 March 2004 DESCRIPTION -12V Supply Input. Also provides power to the -12V overcurrent circuitry. 5V CMOS Fault Output; LOW = FAULT. An optional capacitor may be place from this pin to ground to provide additional immunity from power supply glitches. 3.3V/5V Gate Output Drive the gates of the 3.3V and 5V MOSFETs. Connect a capacitor to ground to set the startup ramp. During turn on, this capacitor is charged with a 25A current source. Connect to unswitched 12V supply. Switched 12V supply input. Connect a resistor from this pin to ground to set the overcurrent trip point of all four switches. All four over current trips can be programmed by changing the value of this resistor. The default (6.04k 1%) is compatible with the maximum allowable currents as outlined in the PCI specification. Controls all four switches. High to Turn Switches ON, Low to turn them OFF. Switched 12V Output Switched 12V output. Connect to common of power supplies. Page 4 of 8 HIP1011 Absolute Maximum Ratings Thermal Information VCC, 12VIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +14.0V 12VO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to V12VIN +0.5V 12VO, 12VG, 3V5VG . . . . . . . . . . . . . . . . . . . . . -0.5V to VCC +0.5V M12VIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -15.0V to +0.5V M12VO, M12VG. . . . . . . . . . . . . . . . . . . . . VM12VIN -0.5V to +0.5V 3VISEN, 5VISEN . . . . . . . . . . . -0.5V to the lesser of VCC or +7.0V Voltage, Any Other Pin. . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +7.0V 12VO Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3A M12VO Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.8A ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4KeV (HBM) Thermal Resistance (Typical, Note 1) JA (°C/W) SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68 Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . 125°C Maximum Storage Temperature Range . . . . . . . . . . -65°C to 150°C Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300°C (SOIC - Lead Tips Only) Die Characteristics Number of Transistors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 290 Operating Conditions VCC Supply Voltage Range. . . . . . . . . . . . . . . . . +10.8V to +13.2V 12V, 5V and 3.3V Input Supply Tolerances . . . . . . . . . . . . . . 10% 12VO Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to +0.5A M12VO Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to +0.1A Temperature Range (TA) . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTES: 1. JA is measured in free air with the component mounted on a high effective thermal conductivity test board in free air. See Technical Brief 379 for details. 2. All voltages are relative to GND, unless otherwise specified. Electrical Specifications Nominal 5V and 3.3V Input Supply Voltages, VCC = 12VIN = 12V, M12VIN = -12V, TA = TJ = 0 to 70°C, Unless Otherwise Specified PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS - 7.1 - A 66 72 79 mV 5V/3.3V SUPPLY CONTROL 5V Overcurrent Threshold IOC5V See Figure 1, Typical Application 5V Overcurrent Threshold Voltage VOC5V VOCSET = 1.2V 5V Undervoltage Trip Threshold V5VUV 4.42 4.6 4.75 V 5V Undervoltage Fault Response Time t5VUV - 150 350 ns - 6.5 - ms 5V Turn-On Time (PWRON High to 5VOUT = 4.75V) C3V5VG = 0.022F, C5VOUT = 2000F, RL = 1 IB5VS PWRON = High -40 -26 -20 A 5VISEN Input Bias Current IB5VISEN PWRON = High -160 -140 -110 A 3V Overcurrent Threshold IOC3V See Figure 1, Typical Application - 9.0 - A 3V Overcurrent Threshold Voltage VOC3V VOCSET = 1.2V 88 95 102 mV 3V Undervoltage Trip Threshold V3VUV 2.74 2.86 2.97 V 3V Undervoltage Fault Response Time t3VUV - 150 350 ns - 6.5 - ms 5VS Input Bias Current 3V Turn-On Time (PWRON High to 3VOUT = 3.00V) C3V5VG = 0.022F, C3VOUT = 2000F, RL = 0.43 IB3VS PWRON = High -40 -26 -20 A 3VISEN Input Bias Current IB3VISEN PWRON = High -160 -140 -110 A Gate Output Charge Current IC3V5VG PWRON = High, V3V5VG = 2V 22.5 25.0 27.5 A Gate Turn-On Time (PWRON High to 3V5VG = 11V) tON3V5V C3V5VG = 0.1F - 280 500 s Gate Turn-Off Time tOFF3V5V C3V5VG = 0.1F, 3V5VG from 9.5 V to 1V - 13 17 s C3V5VG = 0.022F, 3V5VG Falling 90% to 10% - 2 - s 3VS Input Bias Current Gate Turn-Off Time FN4311 Rev 9.00 March 2004 Page 5 of 8 HIP1011 Electrical Specifications Nominal 5V and 3.3V Input Supply Voltages, VCC = 12VIN = 12V, M12VIN = -12V, TA = TJ = 0 to 70°C, Unless Otherwise Specified (Continued) PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS rDS(ON)12 PWRON = High, ID = 0.5A, TA = TJ = 25°C 0.18 .300 0.350 VOCSET = 1.2V 1.25 1.50 1.8 A +12V SUPPLY CONTROL On Resistance of Internal PMOS Overcurrent Threshold IOC12V 12V Undervoltage Trip Threshold V12VUV 10.5 10.8 11.15 V Undervoltage Fault Response Time t12VUV - 150 - ns Gate Charge Current IC12VG PWRON = High, V12VG = 3V 23.5 25.0 28.5 A Turn-On Time (PWRON High to 12VG = 1V) tON12V C12VG = 0.022F - 16 20 ms Turn-Off Time tOFF12V C12VG = 0.1F, 12VG - 9 12 s C12VG = 0.022F, 12VG Rising 10% - 90% - 3 - s PWRON = High, ID = 0.1A, TA = TJ = 25°C 0.5 0.7 0.9 Turn-Off Time -12V SUPPLY CONTROL On Resistance of Internal NMOS rDS(ON)M12 Overcurrent Threshold IOCM12V VOCSET = 1.2V 0.30 0.37 0.50 A Gate Output Charge Current ICM12VG PWRON = High, VM12VG = -4V 22.5 25 27.5 A Turn-On Time (PWRON High to M12VG = -1V) tONM12V CM12VG = 0.022F - 160 300 s CM12VG = 0.022F, CM12VO = 50F, RL = 120 - 16 - ms CM12VG = 0.1F, M12VG - 18 23 s CM12VG = 0.022F, M12VG Falling 90% to 10% - 3 - s PWRON = High - 2 2.6 mA Turn-On Time (PWRON High to M12VO = -10.8V) Turn-Off Time tOFFM12V Turn-Off Time M12VIN Input Bias Current IBM12VIN CONTROL I/O PINS Supply Current IVCC 4 5 5.8 mA OCSET Current IOCSET 95 100 105 A tOC - 500 960 ns VTHPWRON 0.8 1.6 2.1 V - 0.6 0.9 V 3.9 4.3 4.9 V 1.8 2.3 3 V 9.4 10 10.6 V Overcurrent Fault Response Time PWRON Threshold Voltage FLTN Output Low Voltage VFLTN,OL IFLTN = 2mA FLTN Output High Voltage VFLTN,OH IFLTN = 0 to -4mA FLTN Output Latch Threshold VFLTN,TH 12V Power On Reset Threshold VPOR,TH FN4311 Rev 9.00 March 2004 VCC Voltage Falling Page 6 of 8 HIP1011 1000 320 900 300 800 PMOS +12 rON 280 2.862 4.631 5V UVTRIP (V) NMOS -12 rON 4.632 5 UV 2.861 4.630 2.860 4.629 3.3 UV 4.628 700 3.3V UVTRIP (V) 340 NMOS rON -12 (m) PMOS rON +12 (m) Typical Performance Curves 2.859 4.627 260 0 5 600 10 15 20 25 30 35 40 45 50 55 60 65 70 4.626 2.858 5 10 15 20 25 30 35 40 45 50 55 60 65 70 0 TEMPERATURE (°C) TEMPERATURE (°C) FIGURE 1. rON vs TEMPERATURE FIGURE 2. UV TRIP vs TEMPERATURE 10.84 100 OC Vth (mV) 12 UV TRIP (V) 90 10.83 10.82 3V OCVth 80 5V OCVth 70 10.81 60 0 5 0 10 15 20 25 30 35 40 45 50 55 60 65 70 5 10 15 20 25 30 35 40 45 50 55 60 65 TEMPERATURE (°C) TEMPERATURE (°C) FIGURE 4. OCVth vs TEMPERATURE (VROCSET = 1.21V) FIGURE 3. 12 UV TRIP vs TEMPERATURE 102 IOC SET (A) 101 100 99 98 0 5 10 15 20 25 30 35 40 45 50 55 60 65 70 TEMPERATURE (°C) FIGURE 5. OCSET I vs TEMPERATURE FN4311 Rev 9.00 March 2004 Page 7 of 8 70 HIP1011 M16.15 (JEDEC MS-012-AC ISSUE C) 16 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE Small Outline Plastic Packages (SOIC) N INCHES INDEX AREA H 0.25(0.010) M B M SYMBOL E -B- 1 2 3 L SEATING PLANE -A- h x 45o A D -C- A1 B 0.25(0.010) M C 0.10(0.004) C A M B S MILLIMETERS MAX MIN MAX NOTES A 0.053 0.069 1.35 1.75 - A1 0.004 0.010 0.10 0.25 - B 0.014 0.019 0.35 0.49 9 C 0.007 0.010 0.19 0.25 - D 0.386 0.394 9.80 10.00 3 E 0.150 0.157 3.80 4.00 4 e µ e MIN 0.050 BSC 1.27 BSC - H 0.228 0.244 5.80 6.20 - h 0.010 0.020 0.25 0.50 5 L 0.016 0.050 0.40 1.27 6 8° 0° N 16 0° 16 7 8° Rev. 1 02/02 NOTES: 1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension “E” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. “L” is the length of terminal for soldering to a substrate. 7. “N” is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch) 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. © Copyright Intersil Americas LLC 2004. All Rights Reserved. All trademarks and registered trademarks are the property of their respective owners. For additional products, see www.intersil.com/en/products.html Intersil products are manufactured, assembled and tested utilizing ISO9001 quality systems as noted in the quality certifications found at www.intersil.com/en/support/qualandreliability.html Intersil products are sold by description only. Intersil may modify the circuit design and/or specifications of products at any time without notice, provided that such modification does not, in Intersil's sole judgment, affect the form, fit or function of the product. Accordingly, the reader is cautioned to verify that datasheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com FN4311 Rev 9.00 March 2004 Page 8 of 8