LTC6421-20 Dual Matched 1.3GHz Differential Amplifiers/ADC Drivers DESCRIPTION FEATURES n n n n n n n n n n n n n n Matched Gain ±0.1dB Matched Phase ±0.2° at 100MHz Channel Separation 80dB at 100MHz 1.3GHz –3dB Bandwidth; Fixed Gain of 10V/V (20dB) IMD3 = –76dBc at 100MHz, 2VP-P Equivalent OIP3 = 42dBm at 100MHz 1nV/√Hz Internal Op Amp Noise 6.2dB Noise Figure Differential Inputs and Outputs Rail-to-Rail Output Swing 40mA Supply Current (120mW) per Amplifier 1V to 1.6V Output Common Mode Voltage, Adjustable DC- or AC-Coupled Operation 20-Lead 3mm × 4mm × 0.75mm QFN Package APPLICATIONS n n n n The LTC®6421-20 is a dual high speed differential amplifier targeted at processing signals from DC to 140MHz. The part has been specifically designed to drive 12-, 14- and 16-bit ADCs with low noise and low distortion, but can also be used as a general-purpose broadband gain block. The LTC6421-20 is easy to use, with minimal support circuitry required. The output common mode voltage is set using an external pin, independent of the inputs, which eliminates the need for transformers or AC-coupling capacitors in many applications. The gain is internally fixed at 20dB (10V/ V). The LTC6421-20 saves space and power compared to alternative solutions using IF gain blocks and transformers. The LTC6421-20 is packaged in a compact 20-lead 3mm × 4mm QFN package and operates over the – 40°C to 85°C temperature range. L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. Differential ADC Driver Differential Driver/Receiver Single Ended to Differential Conversion IF Sampling (Diversity) Receivers TYPICAL APPLICATION Matched Dual Amplifiers with Output Common Mode Biasing 3V 1000pF 0.1μF VOCMA V+ A 0.1μF VINA 0.1μF VINB Distribution of Gain Match ENABLEA 40 1000Ω –INA 100Ω 12.5Ω +OUTA +INA 100Ω 12.5Ω – OUTA V 0.1μF VOCMA LTC6421-20 – VOCMA V– 1000Ω ±0.1dB GAIN MATCHING ±0.1° PHASE MATCHING AT 100MHz 1000Ω +INB 100Ω 12.5Ω – OUTB – INB 100Ω 12.5Ω +OUTB 35 VOCMA PERCENTAGE OF UNITS ZIN = 200Ω 30 25 20 15 10 VOCMB 5 0.1μF ZIN = 200Ω VOCMB 1000Ω V+ B 1000pF 0.1μF 3V VOCMB 0 – 0.25 – 0.15 – 0.05 0.05 0.25 0.15 CHANNEL-TO-CHANNEL GAIN MATCH (dB) 642120 TA01b ENABLEB 642120 TA01a VOCMB 642120fa 1 LTC6421-20 ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION (Note 1) Supply Voltage (V + – V –) .........................................3.6V Input Current (Note 2)..........................................±10mA Operating Temperature Range (Note 3)....–40°C to 85°C Specified Temperature Range (Note 4) ....–40°C to 85°C Storage Temperature Range...................–65°C to 150°C Maximum Junction Temperature........................... 150°C Output Short-Circuit Duration .......................... Indefinite +OUTA ENABLEA VOCMA V+ A TOP VIEW 20 19 18 17 +INA 1 16 –OUTA 15 V + A –INA 2 V– 3 V– 4 14 V – 13 V – 21 +INB 6 11 –OUTB 9 10 +OUTB 8 ENABLEB 7 V+ B 12 V + B VOCMB –INB 5 UDC PACKAGE 20-LEAD (3mm × 4mm) PLASTIC QFN TJMAX = 150°C, θJA = 43°C/W, θJC = 5°C/W EXPOSED PAD (PIN 21) IS V–, MUST BE SOLDERED TO PCB ORDER INFORMATION LEAD FREE FINISH TAPE AND REEL PACKAGE DESCRIPTION SPECIFIED TEMPERATURE RANGE LTC6421CUDC-20#PBF LTC6421CUDC-20#TRPBF LDDN PART MARKING* 20-Lead (3mm × 4mm) Plastic QFN 0°C to 70°C LTC6421IUDC-20#PBF LTC6421IUDC-20#TRPBF 20-Lead (3mm × 4mm) Plastic QFN –40°C to 85°C LDDN Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. Consult LTC Marketing for information on non-standard lead based finish parts. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ SELECTOR GUIDE PART NUMBER GAIN (dB) GAIN (V/V) Z IN (DIFFERENTIAL) (Ω) COMMENT 8 2.5 400 Lowest Distortion 14 5 200 Lowest Distortion 20 10 200 Lowest Distortion 26 20 50 Lowest Distortion LTC6401-8 8 2.5 400 Lowest Power LTC6401-14 14 5 200 Lowest Power 20 10 200 Lowest Power 26 20 50 Lowest Power SINGLE DUAL LTC6400-8 LTC6400-14 LTC6400-20 LTC6420-20 LTC6400-26 LTC6401-20 LTC6401-26 LTC6421-20 642120fa 2 LTC6421-20 DC ELECTRICAL CHARACTERISTICS + The l –denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. V = 3V, V = 0V, +IN = –IN = VOCM = 1.25V, ENABLE = 0V, No RL unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Input/Output Characteristic GDIFF Gain VIN = ±100mV Differential l 20 20.4 dB ΔG Gain Matching Channel-to-Channel l ±0.1 ±0.25 dB TCGAIN Gain Temperature Drift VIN = ±100mV Differential l 0.0015 VSWINGMIN Output Swing Low (VOCM = 1.5V) Each Output, VIN = ±400mV Differential l 0.1 Each Output, VIN = ±400mV Differential l 2.75 2.9 V l 5 5.6 VP-P 19.6 VSWINGMAX Output Swing High (VOCM = 1.5V) VOUTDIFFMAX Maximum Differential Output Swing IOUT Output Current Drive 2VP-P, OUT (Note 10) l 10 VOS Input Offset Voltage Differential l –2 Differential l TCVOS Input Offset Voltage Drift IVRMIN Input Common Mode Voltage Range, MIN l IVRMAX Input Common Mode Voltage Range, MAX l 1.6 RINDIFF Input Resistance (+IN, –IN) Differential l 170 l dB/°C 0.25 V mA ±0.4 2 1.4 mV μV/°C 1 V V 200 230 ±1 ±2.5 Ω ΔRIN Input Impedance Matching Channel-to-Channel CINDIFF Input Capacitance (+IN, –IN) Differential, Includes Parasitic ROUTDIFF Output Resistance (+OUT, –OUT) Differential l 20 25 CMRR Common Mode Rejection Ratio Input Common Mode Voltage 1V to 1.6V l 45 68 dB 1 V/V 1 % pF 36 Ω Output Common Mode Voltage Control GCM Common Mode Gain VOCM = 1V to 1.6V VOCMMIN Output Common Mode Range, MIN l VOCMMAX Output Common Mode Range, MAX l 1.6 VOSCM Common Mode Offset Voltage l –10 TCVOSCM Common Mode Offset Voltage Drift l IVOCM VOCM Input Current l VOCM = 1.25V to 1.5V 1 V ±2 10 6 –15 V –3 mV μV/°C 0 μA 0.8 V ENABLEx Pins (x = A, B) VIL ENABLEx Input Low Voltage l VIH ENABLEx Input High Voltage l ENABLEx Input Current ENABLEx ≤ 0.8V ENABLEx ≥ 2.4V 2.4 l l V 1.5 ±0.5 3 μA μA 3 3.5 V Power Supply l VS Operating Supply Range 2.85 IS Supply Current ENABLEx ≤ 0.8V; per Amplifier l 40 50 mA ISHDN Shutdown Supply Current ENABLEx ≥ 2.4V; per Amplifier, Inputs Floating l 1 3 mA PSRR Power Supply Rejection Ratio (Differential Outputs) V + = 2.85V to 3.5V l 55 86 dB 642120fa 3 LTC6421-20 AC ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. V+ = 3V, V– = 0V, VOCM = 1.25V, ENABLE = 0V, No RL unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN ΔG Gain Matching f = 100MHz (Note 9) ΔP Phase Matching f = 100MHz l TYP MAX UNITS ±0.1 ±0.25 dB ±0.2 deg Channel Separation (Note 8) f = 100MHz 80 dB –3dBBW –3dB Bandwidth 200mVP-P, OUT (Note 6) 1.3 GHz 0.5dBBW Bandwidth for 0.5dB Flatness 200mVP-P, OUT (Note 6) 250 MHz 0.1dBBW Bandwidth for 0.1dB Flatness 200mVP-P, OUT (Note 6) 130 MHz NF Noise Figure RL = 375Ω (Note 5), f = 100MHz 6.2 dB eIN Input Referred Voltage Noise Density Includes Resistors (Short Inputs), f = 100MHz 2.2 nV/√Hz eON Output Referred Voltage Noise Density Includes Resistors (Short Inputs), f = 100MHz 22 nV/√Hz 1/f 1/f Noise Corner 12.5 kHz SR Slew Rate Differential (Note 6) 4500 V/μs tS1% 1% Settling Time 2VP-P, OUT (Note 6) 2 ns tOVDR Overdrive Recovery Time 1.9VP-P, OUT (Note 6) Single Ended 7 ns P1dB 1dB Compression Point RL = 375Ω (Notes 5, 7), f = 100MHz 18 dBm tON Turn-On Time +OUT, –OUT Within 10% of Final Values 80 ns tOFF Turn-Off Time ICC Falls to 10% of Nominal 150 ns –3dBBWVOCM VOCM Pin Small Signal –3dB BW 0.1VP-P at VOCM , Measured Single-Ended at Output (Note 6) 15 MHz IMD3 3rd Order Intermodulation Distortion f = 100MHz (1MHz Spacing), VOUT = 2VP-P Composite –76 dBc OIP3 3rd Order Output Intercept f = 100MHz (Note 7) 42 dBc IIP3 3rd Order Input Intercept f = 100MHz (ZIN = 50Ω) f = 100MHz (ZIN = 200Ω) 22 16 dBc dBc HD2 2nd Order Harmonic Distortion f = 100MHz, VOUT = 2VP-P –74 dBc HD3 3rd Order Harmonic Distortion f = 100MHz, VOUT = 2VP-P –78 dBc Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: Input pins (+IN, –IN) are protected by steering diodes to either supply. If the inputs go beyond either supply rail, the input current should be limited to less than 10mA. Note 3: The LTC6421C and LTC6421I are guaranteed functional over the operating temperature range of –40°C to 85°C. Note 4: The LTC6421C is guaranteed to meet specified performance from 0°C to 70°C. It is designed, characterized and expected to meet specified performance from –40°C to 85°C but is not tested or QA sampled at these temperatures. The LTC6421I is guaranteed to meet specified performance from –40°C to 85°C. Note 5: Input and output baluns used. See Test Circuit A. Note 6: Measured using Test Circuit B. RL = 87.5Ω on each output. Note 7: Since the LTC6421-20 is a feedback amplifier with low output impedance, a resistive load is not required when driving an AD converter. Therefore, typical output power is very small. In order to compare the LTC6421-20 with amplifiers that require 50Ω output load, the output voltage swing driving a given RL is converted to OIP3 and P1dB as if it were driving a 50Ω load. Using this modified convention, 2VP-P is by definition equal to 10dBm, regardless of actual RL. Note 8: Channel separation (the inverse of crosstalk) is measured by driving a signal into one input, while terminating the other input. Channel separation is the ratio of the resulting output signal at the driven channel to the channel that is not driven. Note 9: Not production tested. Guaranteed by design and by correlation to production tested parameters. Note 10: The output swing range is at least 2VP-P differential even when sourcing or sinking 20mA. Tested at VOCM = 1.5V. 642120fa 4 LTC6421-20 TYPICAL PERFORMANCE CHARACTERISTICS Channel-to-Channel Group Delay Match vs Frequency 0.5 0.4 0.3 0.3 0.2 0.1 0 –0.1 – 0.2 – 0.3 – 0.4 Channel-to-Channel Phase Match vs Frequency 1.0 PHASE MATCH (DEG) 0.5 0.4 GROUP DELAY MATCH (ns) GAIN MATCH (dB) Channel-to-Channel Gain Match vs Frequency 0.2 0.1 0 –0.1 –0.2 –0.3 0.5 0 –0.5 –0.4 – 0.5 –0.5 10 100 FREQUENCY (MHz) 10 1000 2000 100 FREQUENCY (MHz) 642120 G01 100 FREQUENCY (MHz) 10 500 642120 G02 642120 G03 S21 Phase and Group Delay vs Frequency Frequency Response 25 –1.0 1000 2000 100 TEST CIRCUIT B Input and Output Reflection and Reverse Isolation vs Frequency 0 1.5 TEST CIRCUIT B TEST CIRCUIT B –10 PHASE (DEGREE) 15 10 PHASE 0.9 –100 GROUP DELAY –200 0.6 –300 0.3 S PARAMETERS (dB) 1.2 0 GROUP DELAY (ns) GAIN (dB) 20 –20 S11 –30 S22 –40 –50 S12 –60 5 –70 0 100 1000 FREQUENCY (MHz) –400 3000 0 200 400 600 FREQUENCY (MHz) 800 225 80 60 40 175 ZOUT 125 20 0 ZIN –20 100 PHASE IMPEDANCE MAGNITUDE 75 50 25 ZOUT 0 1 10 100 FREQUENCY (MHz) –40 –60 –80 –100 1000 642120 G07 NOISE FIGURE (dB) 100 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 4 NOISE FIGURE 2 eIN 10 100 FREQUENCY (MHz) 3000 Small-Signal Transient Response 6 0 1000 642120 G08 INPUT REFERRED NOISE VOLTAGE (nV/√Hz) 250 ZIN 100 1000 FREQUENCY (MHz) 642120 G06 Noise Figure and Input Referred Noise Voltage vs Frequency IMPEDANCE PHASE (DEGREE) IMPEDANCE MAGNITUDE (Ω) Input and Output Impedance vs Frequency 150 10 642120 G05 642120 G04 200 –80 0 1000 1.35 OUTPUT VOLTAGE (V) 10 RL = 87.5Ω PER OUTPUT 1.30 +OUT 1.25 1.20 1.15 –OUT 0 5 10 TIME (ns) 15 20 642120 G09 642120fa 5 LTC6421-20 TYPICAL PERFORMANCE CHARACTERISTICS HARMONIC DISTROTION (dBc) 2.0 OUTPUT VOLTAGE (V) –40 RL = 87.5Ω PER OUTPUT – OUT 1.5 1.0 0.5 –40 DIFFERENTIAL INPUT VOUT = 2VP-P –50 DRIVING LTC2285 –60 –70 HD2 HD3 –80 –90 –100 0 50 100 TIME (ns) 150 –60 –70 –80 –90 –100 –110 +OUT 0 DIFFERENTIAL INPUT VOUT = 2VP-P COMPOSITE DRIVING LTC2235 –50 THIRD ORDER IMD (dBc) 2.5 Third Order Intermodulation Distortion vs Frequency Harmonic Distortion vs Frequency Overdrive Transient Response 0 200 50 100 150 FREQUENCY (MHz) 200 –120 0 50 100 150 FREQUENCY (MHz) 200 642120 G12 642120 G10 642120 G11 Equivalent Output Third Order Intercept vs Frequency 70 120 DIFFERENTIAL INPUT VOUT = 2VP-P COMPOSITE (NOTE 7) DRIVING LTC2285 (NOTE 8) CHANNEL SEPARATION (dB) 60 OUTPUT IP3 (dBm) Channel Separation vs Frequency 50 40 30 20 80 60 40 20 10 0 100 40 0 50 100 150 FREQUENCY (MHz) 200 642120 G13 1 10 100 FREQUENCY (MHz) 1000 642120 G14 642120fa 6 LTC6421-20 PIN FUNCTIONS +INA, –INA, –INB, +INB (Pins 1, 2, 5, 6): Differential Inputs of A and B channel respectively. –OUTA, +OUTA, –OUTB, +OUTB (Pins 16, 17, 11, 10): Differential Outputs of channels A and B respectively. V – (Pins 3, 4, 13, 14, 21): Negative Power Supply. All four pins, as well as the exposed back, must be connected to same voltage/ground. VOCMA , VOCMB (Pins 19, 8): These pins set the output common mode voltage for the respective channel. They are internally separate. A 0.1μF external bypass capacitor is recommended. ENABLEA, ENABLEB (Pins 9, 18): Logic inputs. If low, the amplifier is enabled. If high, the amplifier is disabled and placed in a low-power shutdown mode, making the amplifier outputs high impedance. These pins are internally separate. These pins should not be left floating. Exposed Pad (Pin 21): V –. The Exposed Pad must be connected to same voltage/ground as pins 3, 4, 13, 14. V + A , V + B (Pins 15, 20, 7, 12 ): Positive Power Supply (Normally tied to 3V or 3.3V). Supply pins of A and B channels are internally separate. Bypass each pin with 1000pF and 0.1μF capacitors as close to the pins as possible. 642120fa 7 LTC6421-20 BLOCK DIAGRAM V+ A VOCMA ENABLEA +OUTA 20 19 18 17 RG 100Ω +INA 1 RG 100Ω –INA 2 RG 100Ω –INB 5 +INB 6 ROUT 12.5Ω – + 16 –OUTA ROUT 12.5Ω + – 15 V + A RF 1000Ω V– 3 V– 4 RF 1000Ω RG 100Ω 14 V – 13 V – RF 1000Ω ROUT 12.5Ω + – + 12 V B ROUT 12.5Ω – + 11 –OUTB RF 1000Ω 7 8 9 10 V+ B VOCMB ENABLEB +OUTB 642120 BD 642120fa 8 LTC6421-20 APPLICATIONS INFORMATION Circuit Operation Input Impedance and Matching Each of the two channels of the LTC6421-20 is composed of a fully differential amplifier with on chip feedback and output common mode voltage control circuitry. Differential gain and input impedance are set by 100Ω/1000Ω resistors in the feedback network. Small output resistors of 12.5Ω improve the circuit stability over various load conditions. The differential input impedance of the LTC6421-20 is 200Ω. If a 200Ω source impedance is unavailable, then the differential inputs may need to be terminated to a lower value impedance, e.g. 50Ω, in order to provide an impedance match for the source. Several choices are available. One approach is to use a differential shunt resistor (Figure 1). Another approach is to employ a wide band transformer (Figure 2). Both methods provide a wide band impedance match. The termination resistor or the transformer must be placed close to the input pins in order to minimize the reflection due to input mismatch. Alternatively, one could apply a narrowband impedance match at the inputs of the LTC6421-20 for frequency selection and/or noise reduction. The LTC6421-20 is very flexible in terms of I/O coupling. It can be AC- or DC-coupled at the inputs, the outputs or both. If the inputs are AC-coupled, the input common mode voltage is automatically biased close to VOCM and thus no external circuitry is needed for bias. The LTC6421-20 provides an output common mode voltage set by VOCM , which allows driving an ADC directly without external components such as a transformer or AC coupling capacitors. The input signal can be either single-ended or differential with only minor differences in distortion performance. 1/2 LTC6421-20 100Ω 25Ω 1000Ω 1/2 LTC6421-20 100Ω 25Ω +IN OUT – VIN 1:4 + – 66.5Ω IN – 25Ω 100Ω VIN • • OUT + 1000Ω 25Ω –IN IN + OUT – IN – OUT + TCM4-19 IN + + – 1000Ω +IN 100Ω 1000Ω –IN 642120 F01 Figure 1. Input Termination for Differential 50Ω Input Impedance Using Shunt Resistor 642120 F02 Figure 2. Input Termination for Differential 50Ω Input Impedance Using a 1:4 Balun 642120fa 9 LTC6421-20 APPLICATIONS INFORMATION Referring to Figure 3, LTC6421-20 can be easily configured for single-ended input and differential output without a balun. The signal is fed to one of the inputs through a matching network while the other input is connected to the same matching network and a source resistor. Because the return ratios of the two feedback paths are equal, the two outputs have the same gain and thus symmetrical swing. In general, the single-ended input impedance and termination resistor RT are determined by the combination of RS, RG and RF. For example, when RS is 50Ω, it is found that the single-ended input impedance is 202Ω and RT is 66.5Ω in order to match to a 50Ω source impedance. The LTC6421-20 is unconditionally stable. However, the overall differential gain is affected by both source impedance and load impedance as follows: AV = VOUT RL 2000 = • VIN RS + 200 25 + RL RS 50Ω + – 0.1μF VIN The LTC6421-20 can drive an ADC directly without external output impedance matching. Alternatively, the differential output impedance of 25Ω can be matched to a higher value impedance, e.g. 50Ω, by series resistors or an LC network. Output Common Mode Adjustment The output common mode voltage is set by the VOCM pin, which is a high impedance input. The output common mode voltage is capable of tracking VOCM in a range from 1V to 1.6V. The bandwidth of VOCM control is typically 15MHz, which is dominated by a low pass filter connected to the VOCM pin and is aimed to reduce common mode noise generation at the outputs. The internal common mode feedback loop has a –3dB bandwidth of 300MHz, allowing fast rejection of any common mode output voltage disturbance. The VOCM pin should be tied to a DC bias LTC6421-20 100Ω 1000Ω +IN RT 66.5Ω RS //RT 0.1μF 28.7Ω Output Impedance Match 100Ω IN + OUT – IN – OUT + 1000Ω –IN 642120 F03 Figure 3. Input Termination for Single-Ended 50Ω Input Impedance 642120fa 10 LTC6421-20 APPLICATIONS INFORMATION voltage with a 0.1μF bypass capacitor. When interfacing with A/D converters such as the LTC22xx families, the VOCM pin can be connected to the VCM pin of the ADC. Driving A/D Converters The LTC6421-20 has been specifically designed to interface directly with high speed A/D converters. The back page of this data sheet shows the LTC6421-20 driving an LTC2285, which is a dual 14-bit, 125Msps ADC. The VOCM pins of the LTC6421-20 are connected to the VCM pins of the LTC2285, which provide a DC voltage level of 1.5V. Both ICs are powered from the same 3V supply voltage. The inputs to the LTC6421-20 can be configured in various ways, as described in the Input Impedance and Matching section of this datasheet. The outputs of the LTC6421-20 may be connected directly to the analog inputs of an ADC, or a simple lowpass or bandpass filter network may be inserted to reduce out-of-band noise. Test Circuits Due to the fully-differential design of the LTC6421 and its usefulness in applications with differing characteristic specifications, two test circuits are used to generate the information in this datasheet. Test Circuit A is DC1299, a two-port demonstration circuit for the LTC6420/LTC6421 family. The schematic and silkscreen are shown in Figure 4. This circuit includes input and output transformers (baluns) for single-ended-to-differential conversion and impedance transformation, allowing direct hook-up to a 2-port network analyzer. There are also series resistors at the output to avoid loading the amplifier directly with a 50Ω load. Due to the input and output transformers, the –3dB bandwidth is reduced from 1.3GHz to approximately 1.1GHz. Test Circuit B uses a 4-port network analyzer to measure S-parameters and gain/phase response. This removes the effects of the wideband baluns and associated circuitry, for a true picture of the >1GHz S-parameters and AC characteristics. 642120fa 11 LTC6421-20 APPLICATIONS INFORMATION Figure 4a. Top Silkscreen of DC1299 (Test Circuit A) 642120fa 12 LTC6421-20 APPLICATIONS INFORMATION V+ R1 1.21k 1% TD4 VOCMA TD5 GND R2 1k 1% J1 +INA C22 0.1μF 1 2 C18 0.1μF C21 [1] T1 5 1 J2 –INA 1 • • 4 3 [2] C22 0.1μF 2 C19 0.1μF R5 C25 [2] 0.1μF 2 C22 [1] 20 19 18 17 U1 V + A VOCMA ENABLEA +OUTA [2] R7 OPT R9 [2] 1 J5 –INB 1 T2 5 4 5 1 R10 C34 [2] 0.1μF 2 J7 +INB C30 0.1μF 1 2 • • 4 [2] C22 [1] TD2 V+ 2.85V TO 3.5V 3 V+ R16 1.21k 1% TD1 VOCMB V+ C14 4.7μF C15 1μF –OUTA –INA C30 0.1μF 2 +INA 2 3 C31 [1] C16 V + ENA 0.1μF JP1 1 DIS 2 3 EN R3 1.5k 1% V+ R18 1k 1% 6 R11 OPT R12 [2] V+ C18 0.1μF V– LTC6421-20 V– V+ A 15 V– 14 V– 13 –INB V+ B +INB –OUTB TCM4-19+ C35 1000pF 1 R15 88.7 J4 –OUTA C35 [1] J6 1 2 C32 0.1μF T4 –OUTB 4 2 1 5 TCM4-19+ C44 0.1μF C40 0.1μF J8 1 2 C41 [1] NOTES: UNLESS OTHERWISE SPECIFIED [1] DO NOT STUFF [2] VERSION U1 R5, R9, R10, R13 –A –B 2 2 3 R12 R14 88.7 [1] 1 C28 0.1μF C39 0.1μF 11 C34 [1] 5 1 C43 0.1μF C32 1000pF +OUTA 4 2 V+ 12 T2 3 R5 R5 88.7 [1] V + B VOCMB ENABLEB +OUTB 21 7 8 9 10 R17 V + ENB JP2 1.5k 1 1% DIS 2 3 C19 EN 0.1μF C42 0.1μF R4 88.7 16 C30 0.1μF J3 1 2 C17 [1] LTC6420CUDC-20 LTC6421CUDC-20 NONE NONE +OUTB T1, T3 TCM4-19+ TCM4-19+ 642020 F04b TD3 GND Figure 4b. Demo Circuit 1299 Schematic (Test Circuit A) 642120fa 13 LTC6421-20 TYPICAL APPLICATIONS Test Circuit B, 4-Port Measurements (Only the Signal-Path Connections Are Shown) 0.1μF PORT 1 (507) RF 10007 RG 1007 +INA –– 1/2 AGILENT E5071C 2007 +OUTA 0.1μF 37.47 PORT 3 (507) + RG 1007 –INA ROUT 12.57 ROUT 12.57 –OUTA 37.47 – + 0.1μF RF 10007 PORT 2 (507) 0.1μF PORT 4 (507) 1/2 AGILENT E5071C 642120 F04b (B CHANNEL NOT SHOWN) Parallel ADC Drivers to Reduce Wideband Noise 3.3V 3.3V C1 0.1μF C4 0.1μF R5 49.9Ω 1/2 LTC6421-20 + – VIN R6 49.9Ω R7 49.9Ω 1/2 LTC6421-20 VOCM R8 49.9Ω C2 R3 12pF 10Ω C5 R4 12pF 10Ω C3 12pF LTC2208 VCM 642120 TA02 –3dB FILTER BANDWIDTH = 120MHz C6 2.2μF 642120fa 14 LTC6421-20 PACKAGE DESCRIPTION UDC Package 20-Lead Plastic QFN (3mm × 4mm) (Reference LTC DWG # 05-08-1742 Rev Ø) 0.70 ±0.05 3.50 ± 0.05 2.10 ± 0.05 1.50 REF 2.65 ± 0.05 1.65 ± 0.05 PACKAGE OUTLINE 0.25 ±0.05 0.50 BSC 2.50 REF 3.10 ± 0.05 4.50 ± 0.05 RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED 0.75 ± 0.05 3.00 ± 0.10 1.50 REF 19 R = 0.05 TYP PIN 1 NOTCH R = 0.20 OR 0.25 s 45° CHAMFER 20 0.40 ± 0.10 1 PIN 1 TOP MARK (NOTE 6) 2 2.65 ± 0.10 4.00 ± 0.10 2.50 REF 1.65 ± 0.10 (UDC20) QFN 1106 REV Ø 0.200 REF 0.00 – 0.05 R = 0.115 TYP 0.25 ± 0.05 0.50 BSC BOTTOM VIEW—EXPOSED PAD NOTE: 1. DRAWING IS NOT A JEDEC PACKAGE OUTLINE 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 642120fa Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 15 LTC6421-20 TYPICAL APPLICATION Dual ADC Driver for Wideband Direct-Conversion Receivers 3V 3V C1 0.1μF C4 0.1μF R3 10Ω R1 40.2Ω + – 1/2 VIN LTC6421-20 R2 40.2Ω C2 12pF R4 10Ω C3 12pF 1/2 LTC2285 VCM –3dB FILTER BANDWIDTH = 140MHz 642120 TA03 RELATED PARTS PART NUMBER DESCRIPTION COMMENTS High-Speed Differential Amplifiers/Differential Op Amps LT®1993-2 800MHz Differential Amplifier/ADC Driver AV = 2V/V, OIP3 = 38dBm at 70MHz LT1993-4 900MHz Differential Amplifier/ADC Driver AV = 4V/V, OIP3 = 40dBm at 70MHz LT1993-10 700MHz Differential Amplifier/ADC Driver AV = 10V/V, OIP3 = 40dBm at 70MHz LT1994 Low Noise, Low Distortion Differential Op Amp 16-Bit SNR and SFDR at 1MHz, Rail-to-Rail Outputs LT5514 Ultralow Distortion IF Amplifier/ADC Driver with Digitally Controlled Gain OIP3 = 47dBm at 100MHz, Gain Control Range 10.5dB to 33dB LT5524 Low Distortion IF Amplifier/ADC Driver with Digitally Controlled Gain OIP3 = 40dBm at 100MHz, Gain Control Range 4.5dB to 37dB LTC6400-14/ LTC6400-20/ LTC6400-26 Low Noise, Low Distortion, Differential ADC Drivers AV = 14dB/20dB/26dB, Single Amplifier per IC, High Performance LTC6401-8/ LTC6401-14/ LTC6401-20/ LTC6401-26 Low Noise, Low Distortion, Differential ADC Drivers AV = 8dB/14dB/20dB/26dB, Single Amplifier per IC, Low Power LT6402-6 300MHz Differential Amplifier/ADC Driver AV = 6dB, Distortion < –80dBc at 25MHz LT6402-12 300MHz Differential Amplifier/ADC Driver AV = 12dB, Distortion < –80dBc at 25MHz LT6402-20 300MHz Differential Amplifier/ADC Driver AV = 20dB, Distortion < –80dBc at 25MHz LTC6404-1 600MHz, Low Noise, AC Precision, Fully Differential Input/Output Amplifier/Driver AV = Unity Gain, en = 1.5nV/Hz, Distortion < –90dBc at 10MHz LTC6404-2 900MHz, Low Noise, AC Precision, Fully Differential Input/Output Amplifier/Driver AV = 2V/V, en = 1.5nV/Hz, Distortion < –95dBc at 10MHz LTC6404-4 1800MHz, Low Noise, AC Precision, Fully Differential Input/Output Amplifier/Driver AV = 4V/V, en = 1.5nV/Hz, Distortion < –98dBc at 10MHz LTC6406 3GHz Rail-to-Rail Input Differential Op Amp 1.6nV/√Hz Noise, –72dBc Distortion at 50MHz, 18mA LT6411 Low Power Differential ADC Driver/Dual Selectable Gain Amplifier 16mA Supply Current, IMD3 = –83dBc at 70MHz, AV = 1, –1 or 2 642120fa 16 Linear Technology Corporation LT 1008 REV A • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com © LINEAR TECHNOLOGY CORPORATION 2008