APA2605 2.8W Stereo Class-D Audio Power Amplifier (with DC Volume Control, AGC Function) Features General Description • • Operating Voltage: 3.3V-5.5V High Efficiency 85% at PO=2.8W, 4Ω Speaker, The APA2605 is a stereo, high efficiency, filter-free ClassD audio amplifier available in SOP-18, SSOP-24, VDD=5V Filter-Free Class-D Amplifier SSOP-24P, and QFN4x4-20A packages. The APA2605 provides the precise DC volume control, Low Shutdown Current – IDD=1µA at VDD=5V the gain range is from -80dB (V VOLUME =0V) to +20dB (VVOLUME=5V) with 64 steps precise control. It’s easy to get 64 Steps Volume Adjustable from -80dB to +20dB by DC Voltage with Hysteresis the suitable amplifier’s gain with the 64 steps gain setting. The filter-free architecture eliminates the output filters AGC (Non-Clip) Function Output Power at THD+N=1% compared to the traditional Class-D audio amplifier, and reduces the external component counts and the compo- – 2.3W at VDD=5V, RL=4Ω – 1.3W at VDD=5V, RL=8Ω nents high, it could save the PCB space, system cost, simplifies the design and the power loss at filter. Output Power at THD+N=10% – 2.8W at VDD=5V, RL=4Ω APA2605 provides an AGC (Non-Clip) function, and this function can low down the dynamic range for large input – 1.6W at VDD=5V, RL=8Ω Less External Components Required signal. APA2605 can provide from 20dB to -80dB with 64 steps gain decrease for non-clipping function, and this Thermal and Over-Current Protections with AutoRecovery function can avoid output signal clipping. The APA2605 also integrates the de-pop circuitry that re- Power Enhanced Packages SSOP-24, SOP-18, SSOP-24P & QFN4x4-20A duces the pops and click noise during power on/off or shutdown enable process. Lead Free and Green Devices Available (RoHS Compliant) The APA2605 has build-in over-current and thermal protection that prevent the chip being destroyed by short- • • • • • • • • • circuit or over-temperature situation. APA2605 is capable of driving 2.8W at 5V into 4Ω speaker. Applications • • • The efficiency can archive 85% at RL=4Ω when PO=2.8W at VDD=5V. LCD TVs DVD Player Simplified Application Circuit Active Speakers ROUTP RINN Stereo Input Signals ROUTN LINN Stereo Speakers APA2605 LOUTN DC Volume Control Volume LOUTP ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise customers to obtain the latest version of relevant information to verify before placing orders. Copyright ANPEC Electronics Corp. Rev. A.7 - Mar., 2013 1 www.anpec.com.tw APA2605 Pin Configuration LOUTP 1 GND 2 LOUTN 3 PVDD 4 MUTE 5 VDD 6 LINN 7 VDC 8 VOLUME 9 18 17 16 15 14 13 12 APA2605 LOUTP 1 GND 2 GND 3 LOUTN 4 PVDD 5 MUTE 6 VDD 7 LINN 8 NC 9 VDC10 VOLUME 11 NC 12 ROUTP GND ROUTN PVDD SD GND RINN 11 AGC 10 BYPASS SOP-18 (Top View) APA2605 24 23 22 21 20 19 18 17 16 15 14 13 ROUTP GND GND ROUTN PVDD SD GND RINN AGC NC BYPASS NC 24 23 22 21 20 19 18 17 16 15 14 13 ROUTP PGND PGND ROUTN PVDD SD GND RINN AGC NC BYPASS NC 16 GND 17 ROUTP 18 NC 19 LOUTP 20 GND SSOP-24 (Top View) LOUTN 1 PVDD 2 MUTE 3 VDD 4 LOUTP 1 PGND 2 PGND 3 LOUTN 4 PVDD 5 MUTE 6 VDD 7 LINN 8 NC 9 VDC10 VOLUME 11 NC 12 15 ROUTN APA2605 QFN4X4-20A Top View 14 PVDD 13 SD 12 GND AGC 10 BYPASS 9 NC 8 VDC 6 11 RINN VOLUME 7 LINN 5 =Thermal Pad (connected the Thermal Pad to GND plane for better dissipation Copyright ANPEC Electronics Corp. Rev. A.7 - Mar., 2013 APA2605 Top View SSOP-24P 2 www.anpec.com.tw APA2605 Ordering and Marking Information Package Code N : SSOP-24 NA : SSOP-24P K : SOP-18 QA : QFN4x4-20A Operating Ambient Temperature Range I : -40 to 85 oC Handling Code TR : Tape & Reel Assembly Material G : Halogen and Lead Free Device APA2605 Assembly Material Handling Code Temperature Range Package Code APA2605 N: APA2605 XXXXX XXXXX - Date Code APA2605 NA: APA2605 XXXXX XXXXX - Date Code APA2605 K: APA2605 XXXXX XXXXX - Date Code APA2605 QA: APA2605 XXXXX XXXXX - Date Code Note : ANPEC lead-free products contain molding compounds/die attach materials and 100% matte tin plate termination finish; which are fully compliant with RoHS. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J-STD-020D for MSL classification at lead-free peak reflow temperature. ANPEC defines “Green” to mean lead-free (RoHS compliant) and halogen free (Br or Cl does not exceed 900ppm by weight in homogeneous material and total of Br and Cl does not exceed 1500ppm by weight). Copyright ANPEC Electronics Corp. Rev. A.7 - Mar., 2013 3 www.anpec.com.tw APA2605 Absolute Maximum Ratings (Note 1) Parameter Symbol VDD TJ Rating Supply Voltage (VDD, PVDD, VDC to GND) -0.3 to 6.5 Input Voltage (LINN, RINN to GND) -0.3 to VDD+0.3 Input Voltage (SD, MUTE, AGC, VDC, VOLUME and BYPASS to GND) -0.3 to VDD+0.3 Maximum Junction Temperature V 150 TSTG Storage Temperature Range TSDR Maximum Soldering Temperature Range, 10 Seconds PD Unit ο -65 to +150 C 260 Power Dissipation Internally Limited W Note1: Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Thermal Characteristics Symbol Parameter Thermal Resistance -Junction to Ambient Typical Value Unit (Note 2) θJA QFN4x4-20A SSOP-24 SOP-18 SSOP-24P 45 96 70 45 QFN4x4-20A SSOP-24 SOP-18 SSOP-24P 7 18 16 11 ο C/W Thermal Resistance -Junction to Case (Note 3) θJC ο C/W Note 2: Please refer to “ Layout Recommendation”, the GND PIN on the central of the IC should connect to the ground plan, and the PCB is a 2-layer, 5-inch square area with 2oz copper thickness. Note 3: The case temperature is measured at the center of the GND PIN on the underside of the SSOP-24, SOP-18 and QFN 4x4-20A packages. Recommended Operating Conditions Symbol VDD Parameter Range Supply Voltage Unit 3.3 ~ 5.5 VIH High Level Threshold Voltage SD, MUTE 2 ~ VDD VIL Low Level Threshold Voltage SD, MUTE 0 ~ 0.8 VICM Common Mode Input Voltage TA Ambient Temperature Range -40 ~ 85 TJ Junction Temperature Range -40 ~ 125 RL Speaker Resistance Copyright ANPEC Electronics Corp. Rev. A.7 - Mar., 2013 V 1 ~ VDD-1 3.5 ~ 4 ο C Ω www.anpec.com.tw APA2605 Electrical Characteristics o VDD=5V, VGND=0V, TA=25 C, Gain=20dB (unless otherwise noted) Symbol Parameter APA2605 Test Conditions Unit Min. Typ. Max. 0.49x VDD 0.5x VDD 0.51x VDD V mA VDD=5V, VGND=0V, TA= 25οC, GAIN=20dB VBYPASS Bypass Pin Voltage Supply Current VMUTE=0V, VSD=5V, No Load - 5 13 Shutdown Current VMUTE=0V, VSD=0V, No Load - - 1 Input Current SD, MUTE, VOLUME - - 1 FOSC Oscillator Frequency (VDD=3.3~5.5V, TA= -40~85οC) 400 500 600 kHz Ri(min) Minimum Input Resistance Gain=20dB 36 43 50 kΩ VDD=5.5V, IL=0.8A - 690 - VDD=4.5V, IL=0.6A - 720 - VDD=3.6V, IL=0.4A - 760 - - 1.2 - RL=4Ω - 2.3 - RL=8Ω - 1.3 - RL=4Ω - 2.8 - RL=8Ω - 1.6 - 80 85 - - 0.1 0.3 - 0.08 0.2 IDD ISD Ii RDSON TSTART-UP Static Drain-Source On-State Resistance Start-Up Time from Shutdown Power MOSFET (P+N) Bypass Capacitor, C1=2.2µF µA mΩ s VDD=5V, TA=25° C, GAIN=6dB THD+N=1% fin=1kHz PO Output Power THD+N=10% fin=1kHz η THD+N Crosstalk PSRR Efficiency RL=4Ω, PO=2.8W RL=4Ω, PO=1.6W RL=8Ω, PO=0.8W Total Harmonic Distortion Plus Noise fin=1kHz Channel Separation PO=0.2W, RL=4Ω, fin=1kHz - -100 -60 Power Supply Rejection Ratio RL=4Ω, Input AC-Ground fin=100Hz - -60 -50 fin=1kHz - -70 -60 -80 -85 - W % dB SNR Signal to Noise Ratio With A-Weighting Filter VO=1Vrms, RL=8Ω AttMute Mute Attenuation fin=1kHz, RL=8Ω, VIN=1Vrms - -100 -80 Shutdown Attenuation fin=1kHz, RL=8Ω, VIN=1Vrms With A-Weighting Filter (Gain = 20dB) - -120 -90 - 80 100 µVrms RL=4Ω (Gain=20dB) - 20 30 mV RL=4Ω 1.0 1.1 - RL=8Ω 0.6 0.65 - RL=4Ω - 1.4 - RL=8Ω - 0.85 - 78 83 - Attshutdown Vn Output Noise VOS Output Offset Voltage dB VDD=3.6V, TA=25° C, GAIN=6dB PO η Output Power Efficiency Copyright ANPEC Electronics Corp. Rev. A.7 - Mar., 2013 THD+N=1 % fin=1kHz THD+N=10 % fin=1kHz RL=4Ω, PO=1.4W 5 W % www.anpec.com.tw APA2605 Electrical Characteristics (Cont.) o VDD=5V, VGND=0V, TA=25 C, Gain=20dB (unless otherwise noted) Symbol Parameter APA2605 Test Conditions Unit Min. Typ. Max. RL=4Ω, PO=0.8W - 0.2 0.4 RL=8Ω, PO=0.5W - 0.1 0.3 - -100 -60 VDD=3.6V, TA=25° C, GAIN=6dB (CONT.) THD+N Crosstalk PSRR Total Harmonic Distortion Plus Noise fin=1kHz Channel Separation PO=0.1W, RL=4Ω, fin=1kHz Power Supply Rejection Ratio RL=4Ω, Input AC-Ground fin=100Hz - -60 -50 fin=1kHz - -70 -60 -80 -85 - SNR Signal to Noise Ratio With A-Weighting Filter VO=1Vrms, RL=8Ω AttMute Mute Attenuation % dB fin=1kHz, RL=8Ω, VIN=1Vrms - -100 -80 Shutdown Attenuation fin=1kHz, RL=8Ω, VIN=1Vrms - -120 -90 Vn Output Noise With A-Weighting Filter (Gain=20dB) - 80 - µVrms VOS Output Offset Voltage RL=4Ω (Gain=20dB) - 20 30 mV Attshutdown Copyright ANPEC Electronics Corp. Rev. A.7 - Mar., 2013 6 www.anpec.com.tw APA2605 Typical Operating Characteristics 100 90 90 80 80 70 70 60 50 RL=4Ω+33µH fin=1kHz THD+N≦10% AV=20dB AUX-0025 AES-17(20kHz) 40 20 10 0 0.0 0.5 60 50 40 20 10 1.0 1.5 2.0 Output Power (W) 2.5 0 0.0 3.0 80.0 70.0 70.0 Efficiency (%) 90.0 80.0 60.0 RL=4Ω+33µH fin=1kHz THD+N≦10% AV=20dB AUX-0025 AES-17(20kHz) QFN4X4-2A 40.0 30.0 20.0 10.0 0.0 0.0 20 10 0.5 1.0 2.5 0.0 0.0 3.0 0.5 1.0 1.5 THD+N vs. Output Power 20 10 5 VDD=5V 0.1 0.02 Copyright ANPEC Electronics Corp. Rev. A.7 - Mar., 2013 2 1 0.5 0.1 0.0 5 0.0 2 0.0 VDD=5.5V 0.4 1 Output Power (W) 2 0.2 0.05 0.1 30.0 THD+N vs. Output Power VDD=3.6V 0.01 RL=8Ω+33µH fin=1kHz THD+N≦10% AV=20dB AUX-0025 AES-17(20kHz) QFN4X4-2A 40.0 Output Power (W) 0.5 0.2 50.0 Output Power (W) 1 2 2.0 2.0 60.0 10.0 1.5 1.0 1.5 Output Power (W) Efficiency vs. Output Power (QFN4X4-20A 8Ω) 20.0 fin=1kHz RL=4Ω AV=20dB AUX-0025 AES-17(20kHz) VDD=3.3V QFN4X4-2A 5 0.5 100.0 90.0 50.0 RL=8Ω+33µH fin=1kHz THD+N≦10% AV=20dB AUX-0025 AES-17(20kHz) 30 Efficiency vs. Output Power (QFN4X4-20A 4Ω) 100.0 Efficiency (%) Efficiency (%) 100 30 THD+N (%) Efficiency vs. Output Power (8Ω) THD+N (%) Efficiency (%) Efficiency vs. Output Power (4Ω) 3 1 0.1 4 7 2.0 fin=1kHz RL=8Ω AV=20dB AUX-0025 AES17(20kHz) QFN4X4-20A VDD=3.3V VDD=5V VDD=3.6V VDD=5.5V 0.4 1 Output Power (W) 2 www.anpec.com.tw APA2605 Typical Operating Characteristics (Cont.) THD+N vs. Output Power 1 THD+N vs. Output Power 10 fin=1kHz RL=4Ω AV=20dB AUX-0025 AES-17(20kHz) SOP-18 1 VDD=3.3V THD+N (%) THD+N (%) 20 10 VDD=3.6V VDD=5V 0.1 fin=1kHz RL=4Ω AUX-0025 AES-17(20kHz) SOP-18 0.1 AV=20dB AV=12dB AV=6dB VDD=5.5V 0.01 0.03 0.1 1 Output Power (W) 0.01 0.070.01 4 0.1 Output Power (W) THD+N vs. Output Power 1 VDD=3.3V VDD=3.6V 0.1 VDD=5V VDD=5.5V 0.01 0.01 0.1 Output Power (W) 1 fin=1kHz RL=8Ω AUX-0025 AES-17(20kHz) SOP-18 AV=12dB 0.1 2 0.1 10 VDD=3.3/3.6/5.0/5.5V PO=0.7/0.85/1.7/2W RL=4Ω AUX-0025 AV=20dB,VDD=5.5V, AES-17(20kHz) PO=2W SOP-18 AV=20dB,VDD=5.0V, PO=1.7W 1 0.1 Output Power (W) 0.1 VDD=5.0V PO=1.7/0.85/0.1W RL=4Ω AUX-0025 AES-17(20kHz) SOP-18 AV=20dB,VDD=3.3V, PO=0.7W 100 Copyright ANPEC Electronics Corp. Rev. A.7 - Mar., 2013 2 3 0.001 20 10k 20k 8 AV=6dB, Po=1.7W AV=6dB, Po=0.85W AV=20dB,VDD=3.6V, PO=0.85W 1k Frequency (Hz) 1 AV=6dB, Po=0.1W 0.01 0.01 0.001 20 AV=6dB THD+N vs. Frequency THD+N (%) THD+N (%) 1 AV=20dB 0.01 0.07 0.01 THD+N vs. Frequency 10 4 10 fin=1kHz RL=8Ω AV=20dB AUX-0025 AES-17(20kHz) SOP-18 THD+N (%) THD+N (%) 1 2 THD+N vs. Output Power 20 10 1 100 1k Frequency (Hz) 10k 20k www.anpec.com.tw APA2605 Typical Operating Characteristics (Cont.) THD+N vs. Frequency THD+N vs. Frequency 10 10 VDD=3.3/3.6/5.0/5.5V PO=0.42/0.5/1/1.2W RL=8Ω AUX-0025 AES-17(20kHz) SOP-18 1 AV=20dB, VDD=5.5V, PO=1.2W THD+N (%) THD+N (%) 1 AV=20dB, VDD=5.0V, PO=1W 0.1 0.01 A =20dB, VDD=3.3V, A =20dB, VDD=3.6V, V V PO=0.42W 0.001 20 100 VDD=5.0V PO=1/0.5/0.1W RL=8Ω AUX-0025 AES-17(20kHz) SOP-18 0.1 AV=6dB, Po=0.1W 0.01 PO=0.5W 1k Frequency (Hz) AV=6dB, Po=0.5W 0.001 20 10k 20k -85 -90 -95 -100 -105 -110 -115 -120 10 -60 -70 AV=20dB, L-ch to R-ch -80 -100 AV=6dB, R-ch to L-ch AV=6dB, L-ch to R-ch -120 10k 20k 10 Crosstalk vs. Frequency -60 Crosstalk (dB) Crosstalk (dB) -80 -90 -100 AV=6dB, R-ch to L-ch AV=6dB, L-ch to R-ch 10 100 1k -85 -90 -95 10k 20k 10k 20k VDD=5.0V PO=1W RL=8Ω AUX-0025 AES-17(20kHz) SOP-18 AV=20dB, R-ch to L-ch AV=20dB, L-ch to R-ch -100 -105 -120 10 Frequency (Hz) Copyright ANPEC Electronics Corp. Rev. A.7 - Mar., 2013 -75 -80 -110 -115 -110 -120 100 1k Frequency (Hz) Crosstalk vs. Frequency -60 -65 -70 VDD=3.6V PO=0.5W RL=8Ω AUX-0025 AV=20dB, R-ch to L-ch AES-17(20kHz) SOP-18 AV=20dB, L-ch to R-ch -70 10k 20k -90 -110 AV=6dB, R-ch to L-ch AV=6dB, L-ch to R-ch 100 1k Frequency (Hz) 1k Frequency (Hz) VDD=5.0V PO=2W RL=4Ω AUX-0025 AV=20dB, R-ch to L-ch AES-17(20kHz) SOP-18 AV=20dB, L-ch to R-ch AV=20dB, R-ch to L-ch Crosstalk (dB) Crosstalk (dB) -70 -75 -80 VDD=3.6V PO=1W RL=4Ω AUX-0025 AES-17(20kHz) SOP-18 100 Crosstalk vs. Frequency Crosstalk vs. Frequency -60 -65 AV=6dB, Po=1W AV=6dB, R-ch to L-ch 100 AV=6dB, L-ch to R-ch 1k 10k 20k Frequency (Hz) 9 www.anpec.com.tw APA2605 Typical Operating Characteristics (Cont.) Output Noise Voltage vs. Frequency Output Noise Voltage vs. Frequency 200µ 200µ 180µ AV=20dB Output Noise Voltage (Vrms) Output Noise Voltage (Vrms) 180µ 160µ VDD=3.6V RL=8Ω Input AC Ground AUX-0025 AES-17(20kHz) SOP-18 140µ 120µ 100µ 80µ AV=10dB 60µ AV=6dB 40µ AV=20dB 160µ 140µ AV=10dB 120µ 100µ 80µ AV=6dB 60µ VDD=5.0V RL=8Ω Input AC Ground 40µ 20µ 20µ 10 100 1k Frequency (Hz) 10k 20k 10 Frequency Response +400 +20 Amplitude,AV=20dB +200 +10 +8 +100 Amplitude,AV=10dB Phase, AV=10dB +0 Gain (dB) +12 Phase, AV=20dB +6 -100 +4 +2 10 100 1k 10k Frequency (Hz) -200 200k +22 +21 +20 +19 +18 +17 +16 +15 +14 +13 +12 +11 +10 +9 +8 +7 +6 +5 +4 +3 +2 10 Mute Attenuation vs. Frequency Gain (dB) -70 T VDD=5.0V RL=4Ω AV=20dB VO=1Vrms AUX-0025 AES-17(20kHz) SOP-18 Amplitude,AV=20dB VDD=5.0V RL=8Ω Po=150mW AUX-0025 SOP-18 +100 Amplitude,AV=7.6dB 100 +300 +200 Phase, AV=7.6dB Phase, AV=20dB -80 -90 Right Channel -80 Left Channel -90 +400 +0 -100 1k 10k Frequency (Hz) -175 -200 200k Shutdown Attenuation vs. Frequency Gain (dB) -60 10k 20k Phase (Deg) +14 VDD=3.6V RL=8Ω Po=70mW AUX-0025 SOP-18 +300 Phase (Deg) Gain (dB) +16 100 1k Frequency (Hz) Frequency Response +22 +18 AUX-0025 AES-17(20kHz) SOP-18 T VDD=5.0V RL=4Ω AV=20dB VO=1Vrms AUX-0025 AES-17(20kHz) SOP-18 -100 Left Channel -110 Right Channel -100 20 100 1k Frequency (Hz) Copyright ANPEC Electronics Corp. Rev. A.7 - Mar., 2013 -120 20 10k 20k 100 1k 10k 20k Frequency (Hz) 10 www.anpec.com.tw APA2605 Typical Operating Characteristics (Cont.) PSRR vs. Frequency +0 20 VDD=5.0V RL=8Ω AV=20dB Vrr=0.2Vrms Input floating AUX-0025 AES-17(20kHz) SOP-18 -20 -30 -40 10 Gain Down 0 Gain Up -10 Gain (dB) -10 PSRR (dB) Gain vs. Volume Voltage -50 -20 -30 -40 -50 -60 VDD=5.0V No Load AUX-0025 AES-17(20kHz) -60 -70 -80 -70 20 100 1k Frequency (Hz) -80 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 10k 20k DC Volume Voltage (V) Shutdown Current vs. Supply Voltage Supply Current vs. Supply Voltage 1.0 8 No Load Shutdown Current (µA) 6 4 2 0 0.0 2.0 0.6 0.4 0.2 0.0 2.0 4.0 Voltage (V) 6.0 AGC Function Output Power vs. Input AC 1.6 1.4 2.6 2.4 2.2 2 1 0 0.8 0.0 6.0 AGC Function Output Power vs. Input AC 3 Output Power (W) 4.0 Voltage (V) Output Power (W) Shutdown Current (mA) No Load VDD=5.0V RL=4Ω AES-17(20kHz) SSOP-24 0.2 0.4 0.6 0.8 1 Input AC (Vrms) Copyright ANPEC Electronics Corp. Rev. A.7 - Mar., 2013 1.2 1 VDD=5.0V RL=8Ω AES-17(20kHz) SSOP-24 0.2 1.2 1.4 0.2 11 0.4 0.6 0.8 1 Input AC (Vrms) 1.2 1.4 www.anpec.com.tw APA2605 Pin Description PIN NO. I/O/P QFN4x4 FUNCTION NAME SSOP-24 SOP-18 1 1 19 LOUTP O Positive output of left channel power amplifier. 4 3 1 LOUTN O Negative output of left channel power amplifier. 5,20 4,15 2,14 PVDD P Power amplifier’s power supply. 6 5 3 MUTE I Mute control signal input. Place entire IC in mute mode when held low. 7 6 4 VDD P Control and bias block’s power supply. 8 7 5 LINN I Negative input of left channel power amplifier. 9,12,13,15 - 8,18 NC - No connection. 10 8 6 VDC P Volume control block’s power supply. 11 9 7 VOLUME I Internal gain setting input. 14 10 9 BYPASS P Bias voltage for power amplifiers. 16 11 10 AGC I Maximum output power setting input. When held high disable AGC function. 17 12 11 RINN I Negative input of right channel power amplifier. 2,3, 18,22,23 2,13,17 12,16,20 GND P Control and bias block’s ground. 19 14 13 SD I Shutdown mode control input. Place entire IC in shutdown mode when held low. 21 16 15 ROUTN O Negative output of right channel power amplifier. 24 18 17 ROUTP O Positive output of right channel power amplifier. -20A Copyright ANPEC Electronics Corp. Rev. A.7 - Mar., 2013 12 www.anpec.com.tw APA2605 Block Diagram GND Gate Drive RINN ROUTP PVDD Gate Drive BYPASS BYPASS AGC AGC Control Biases & Reference VDC MUTE VOLUME Protection Function GND Volume Control SD ROUTN Oscillator Shutdown Control VDD Gate Drive LINN LOUTP PVDD Gate Drive LOUTN GND Copyright ANPEC Electronics Corp. Rev. A.7 - Mar., 2013 13 www.anpec.com.tw APA2605 Typical Application Circuit PVDD CS1 10µF ROUTP 18 1 LOUTP CS2 0.1µF Mute Control Left Channel Ci2 Input Signal 1µF CS4 1µF PGND 17 2 PGND 4Ω VDD R1 50kΩ ROUTN 16 3 LOUTN APA2605 PVDD 15 5 MUTE (Top View) SD 14 4 PVDD 6 VDD GND 13 7 LINN RINN 12 8 VDC AGC 11 9 VOLUME BYPASS 10 4Ω CS3 0.1µF Shutdown Control 1µF CB Left Channel Ci2 Input Signal VDD R2 2.2µF CS5 1µF R3 VDD=5V RL (Ω) 4 8 R2 (kΩ) R3 (kΩ) PO (W) VAGC (V) 30.1 12.0 2.19 1.425 26.7 12.0 1.71 1.550 30.9 12.0 1.15 1.400 Note 4 :The resistance must use 1%. Copyright ANPEC Electronics Corp. Rev. A.7 - Mar., 2013 14 www.anpec.com.tw APA2605 DC Volume Control Table Step Gain Low (%) High (%) Recom (%) Low (5V) High (5V) Recom (5V) 1 20.0 97.7 100.0 100.0 4.885 5.000 5.00 2 19.6 96.2 96.6 96.4 4.808 4.830 4.82 3 19.2 94.6 95.1 94.8 4.731 4.753 4.74 4 18.8 93.1 93.5 93.3 4.653 4.675 4.66 5 18.4 91.5 92.0 91.7 4.576 4.598 4.59 6 18.0 90.0 90.4 90.2 4.499 4.521 4.51 7 17.6 88.4 88.9 88.6 4.421 4.443 4.43 8 17.2 86.9 87.3 87.1 4.344 4.366 4.36 9 16.8 85.3 85.8 85.6 4.267 4.289 4.28 10 16.4 83.8 84.2 84.0 4.189 4.211 4.20 11 16.0 82.2 82.7 82.5 4.112 4.134 4.12 12 15.6 80.7 81.1 80.9 4.035 4.057 4.05 13 15.2 79.1 79.6 79.4 3.957 3.980 3.97 14 14.8 77.6 78.0 77.8 3.880 3.902 3.89 15 14.4 76.1 76.5 76.3 3.803 3.825 3.81 16 14.0 74.5 75.0 74.7 3.725 3.748 3.74 17 13.6 73.0 73.4 73.2 3.648 3.670 3.66 18 13.2 71.4 71.9 71.6 3.571 3.593 3.58 19 12.8 69.9 70.3 70.1 3.493 3.516 3.50 20 12.4 68.3 68.8 68.5 3.416 3.438 3.43 21 12.0 66.8 67.2 67.0 3.339 3.361 3.35 22 11.6 65.2 65.7 65.5 3.261 3.284 3.27 23 11.2 63.7 64.1 63.9 3.184 3.207 3.20 24 10.8 62.1 62.6 62.4 3.107 3.129 3.12 25 10.4 60.6 61.0 60.8 3.029 3.052 3.04 26 10.0 59.0 59.5 59.3 2.952 2.975 2.96 27 9.6 57.5 57.9 57.7 2.875 2.897 2.89 28 9.2 55.9 56.4 56.2 2.797 2.820 2.81 29 8.8 54.4 54.9 54.6 2.720 2.743 2.73 30 8.4 52.9 53.3 53.1 2.643 2.665 2.65 31 8.0 51.3 51.8 51.5 2.565 2.588 2.58 32 7.6 49.8 50.2 50.0 2.488 2.511 2.50 33 7.2 48.2 48.7 48.4 2.411 2.433 2.42 34 6.8 46.7 47.1 46.9 2.333 2.356 2.34 35 6.4 45.1 45.6 45.3 2.256 2.279 2.27 36 6.0 43.6 44.0 43.8 2.179 2.202 2.19 37 5.6 42.0 42.5 42.3 2.101 2.124 2.11 38 5.2 40.5 40.9 40.7 2.024 2.047 2.04 Copyright ANPEC Electronics Corp. Rev. A.7 - Mar., 2013 15 www.anpec.com.tw APA2605 DC Volume Control Table (Cont.) Step Gain Low (%) High (%) Recom (%) Low (5V) High (5V) Recom (5V) 39 4.8 38.9 39.4 39.2 1.947 1.970 1.96 40 4.4 37.4 37.8 37.6 1.869 1.892 1.88 41 4.0 35.8 36.3 36.1 1.792 1.815 1.80 42 3.6 34.3 34.8 34.5 1.715 1.738 1.73 43 3.2 32.7 33.2 33.0 1.637 1.660 1.65 44 2.8 31.2 31.7 31.4 1.560 1.583 1.57 45 2.4 29.6 30.1 29.9 1.482 1.506 1.49 46 2.0 28.1 28.6 28.3 1.405 1.429 1.42 47 1.6 26.6 27.0 26.8 1.328 1.351 1.34 48 1.2 25.0 25.5 25.2 1.250 1.274 1.26 49 0.8 23.5 23.9 23.7 1.173 1.197 1.18 50 0.4 21.9 22.4 22.2 1.096 1.119 1.11 51 0.0 20.4 20.8 20.6 1.018 1.042 1.03 52 -1.0 18.8 19.3 19.1 0.941 0.965 0.95 53 -2.0 17.3 17.7 17.5 0.864 0.887 0.88 54 -3.0 15.7 16.2 16.0 0.786 0.810 0.80 55 -5.0 14.2 14.7 14.4 0.709 0.733 0.72 56 -7.0 12.6 13.1 12.9 0.632 0.655 0.64 57 -9.0 11.1 11.6 11.3 0.554 0.578 0.57 58 -11.0 9.5 10.0 9.8 0.477 0.501 0.49 59 -17.0 8.0 8.5 8.2 0.400 0.424 0.41 60 -23.0 6.4 6.9 6.7 0.322 0.346 0.33 61 -29.0 4.9 5.4 5.1 0.245 0.269 0.26 62 -35.0 3.4 3.8 3.6 0.168 0.192 0.18 63 -41.0 1.8 2.3 2.0 0.090 0.114 0.10 64 -80.0 0.0 3.8 0.0 0.000 0.192 0.00 Copyright ANPEC Electronics Corp. Rev. A.7 - Mar., 2013 16 www.anpec.com.tw APA2605 Function Description Bypass Voltage Class-D Operation Output = 0V The bypass voltage is equal to VDD/2, this voltage is for bias the internal preamplifier stages. The external ca- VOUTP pacitor for this reference (CB) is a critical component and serves several important functions. VOUTN DC Volume Control Function VOUT (VOUTP-VOUTN) The APA2605 has an internal stereo volume control whose setting is the function of the DC voltage applied to the IOUT VOLUME input pin. The APA2605 volume control consists of 64 steps that are individually selected by a variable DC Output > 0V VOUTP voltage level on the VOLUME control pin. The range of the steps controlled by the DC voltage, are from +20dB to VOUTN -80dB. Each gain step corresponds to a specific input voltage range, as shown in the table. To minimize the VOUT (VOUTP-VOUTN) effect of noise on the volume control pin, which can affect the selected gain level, hysteresis and clock delay are IOUT Output < 0V VOUTP implemented. The amount of hysteresis corresponds to half of the step width, as shown in the “DC Volume Con- VOUTN trol Graph.” For the highest accuracy, the voltage shown in the “recommended voltage” column of the table is used to select a desired gain. This recommended voltage is exactly half- VOUT (VOUTP-VOUTN) way between the two nearest transitions. The gains level have are 0.4dB/step from 20dB to 0dB; 1dB/step from IOUT 0dB to -3dB; 2dB/step from -3dB to -11dB and 6dB/step from -11dB to -41dB and the last step at -80dB as mute Figure 1. The APA2605 Output Waveform (Voltage & Current) mode. The APA2605 power amplifier modulation scheme is AGC (Non-Clipping) Function shown in figure 1; the outputs VOUTP and VOUTN are in phase with each other when no input signals. When output > 0V, The APA2605 provides the 64 steps non-clipping Control, and the range is from 20dB to -80dB. When the output reaches the maximum power setting value, the internal the duty cycle of VOUTP is greater than 50% and VOUTN is less than 50%; when Output <0V, the duty cycle of VOUTP is less than 50% and VOUTN is greater than 50%. This method reduces the switching current across the load, and re- Programmable Gain Amplifier (PGA) will decrease the gain for prevent the output waveform clipping. This feature pre- duces the I 2R losses in the load that improve the amplifier’s efficiency. vents speaker damage from occurring clipping. Using the AGC pin to set the non-clipping function and limit the This modulation scheme has very short pulses across the load, this making the small ripple current and very output power. little loss on the load, and the LC filter can be eliminated in most applications. Added the LC filter can increase the efficiency by filter the ripple current. Copyright ANPEC Electronics Corp. Rev. A.7 - Mar., 2013 17 www.anpec.com.tw APA2605 Function Description (Cont.) Table 1: AGC Setting Threshold v.s Output Power AGC Function Output Power VDD~0.45VDD Disable AGC Function 0.45VDD~0.27VDD 1 8 x0.95 VDD − VAGC 2 PO = Thermal Protection The over-temperature circuit limits the junction temperature of the APA2605. When the junction temperature exceeds TJ=+150oC, a thermal sensor turns off the output 2 buffer, allowing the devices to cool. The thermal sensor allows the amplifier to start-up after the junction tempera- RL 0.27VDD~GND (AGC Floating) (Max Output Power 4Ω) Po=2.513W (Max Output Power 8Ω) Po=1.26W ture going down to about 125oC. The thermal protection is designed with a 25oC hysteresis to lower the average TJ during continuous thermal overload conditions, increasing lifetime of the IC. Shutdown Operation In order to reduce power consumption while not in use, the APA2605 contains a shutdown function to externally turn off the amplifier bias circuitry. This shutdown feature turns the amplifier off when logic low is placed on the SD pin for APA2605. The trigger point between a logic high and logic low level is typically 0.65V. It is the best to switch between ground and the supply voltage VDD to provide maximum device performance. By switching the SD pin to a low level, the amplifier enters a low-consumptioncurrent state, IDD for APA2605 is in shutdown mode. On normal operating, APA2605’s SD pin should pull to a high level to keep the IC out of the shutdown mode. The SD pin should be tied to a definite voltage to avoid unwanted state changes. Over-Current Protection The APA2605 monitors the output current, and when the current exceeds the current-limit threshold, the APA2605 turn-off the output stage to prevent the output device from damages in over-current or short-circuit condition. The IC will turn-on the output buffer after 1ms, but if the overcurrent or short-circuits condition is still remain, it enters the Over-Current protection again. The situation will circulate until the over-current or short-circuits has be removed. Copyright ANPEC Electronics Corp. Rev. A.7 - Mar., 2013 18 www.anpec.com.tw APA2605 Application Information Square Wave into the Speaker The value of Ci must be considered carefully because it directly affects the low frequency performance of the circuit. Apply the square wave into the speaker may cause the voice coil of speaker jumping out of the air gap and defac- Where Ri is 36kΩ (minimum) and the specification calls for a flat bass response down to 50Hz. The equation is ing the voice coil. However, this depends on the amplitude of square wave is high enough and the bandwidth of reconfigured as below: Ci = speaker is higher than the square wave’s frequency. For 500kHz switching frequency, this is not issued for the 1 2πRifc (2) speaker because the frequency is beyond the audio band and can’t significantly move the voice coil, as cone move- When the input resistance variation is considered, the Ci is 0.08µF, so a value in the range of 0.01µF to 0.022µF ment is proportional to 1/f2 for frequency out of audio band. would be chosen. A further consideration for this capacitor is the leakage path from the input source through the Input Resistor, Ri input network (Ri + Rf, Ci) to the load. This leakage current creates a DC offset voltage at the input to the amplifier 140 Gain vs. Input Resistance that reduces useful headroom, especially in high gain applications. For this reason, a low-leakage tantalum or 130 Input Resistance (kΩ) 120 ceramic capacitor is the best choice. When polarized capacitors are used, the positive side of the capacitor should 110 100 face the amplifiers’ input in most applications because the DC level of the amplifiers’ inputs are held at VDD/2. 90 80 Please note that it is important to confirm the capacitor polarity in the application. 70 60 50 Effective Bypass Capacitor, CB 40 As with any power amplifier, proper supply bypassing is 30 20 -40 -35 -30 -25 -20 -15 -10 -5 0 Gain (dB) 5 critical for low noise performance and high power supply rejection. 10 15 20 For achieving the 64 steps gain setting, it varies the input The bypass capacitance sffects the startiup time. It is determined in the following wquation: resistance network (R i & R f ) of amplifier. The input resistor’s range form smallest to maximum is about six TSTART-UP=0.5(sec/µF) x CB + 0.2(sec) times. Therefore, the input high-pass filter’s low cutoff frequency will change for six times from low to high. The (3) The capacitor location on the bypass pin should be as close to the device as possible. The effect of a larger half bypass capacitor is improved PSRR due to increased cutoff frequency can be calculated by equation 1. Input Capacitor, Ci half-supply stability. The selection of bypass capacitors, especially CB, is thus dependent upon desired PSRR In the typical application, an input capacitor, Ci, is required to allow the amplifier to bias the input signal to the proper requirements, click and pop performance.To avoid the start-up pop noise occurred, choose Ci which is not larger DC level for optimum operation. In this case, Ci and the input impedance Ri form a high-pass filter with the corner than CB. frequency determined in the following equation: f C(highpass) = 1 2πRiCi Copyright ANPEC Electronics Corp. Rev. A.7 - Mar., 2013 (1) 19 www.anpec.com.tw APA2605 Application Information (Cont.) Ferrite Bead Selection If the traces form APA2605 to speaker are short, the ferrite bead filters can reduce the high frequency radiated to meet the FCC & CE required. OUTP 36µH A ferrite that has very low impedance at low frequencies and high impedance at high frequencies (above 1 MHz) 1µF is recommended. OUTN 36µH 8Ω 1µF Output Low-Pass Filter If the traces form APA2605 to speaker are short, it doesn’t require output filter for FCC & CE standard. A ferrite bead may be needed if it’s failing the test for FCC Figure 3. LC Output Filter for 8Ω Speaker or CE tested without the LC filter. The figure 2 is the sample for added ferrite bead; the ferrite shows choosing high impedance in high frequency. OUTP 18µH 2.2µF VON OUTN Ferrite Bead 18µH 4Ω 2.2µF 1nF Ferrite Bead VOP 4Ω Figure 4. LC Output Filter for 4Ω Speaker Figure 3 and 4’s low pass filter cut-off frequency are 25kHz 1nF (FC). fC(lowpass) = 1 (5) 2π LC Power-Supply Decoupling Capacitor, CS Figure 2. Ferrite Bead Output Filter The APA2605 is a high-performance CMOS audio amplifier that requires adequate power supply decoupling to Figure 3 and 4 are examples for added the LC filter (Butterworth), it’s recommended for the situation that the ensure the output total harmonic distortion (THD) is as low as possible. Power supply decoupling also prevents trace form amplifier to speaker is too long and needs to eliminate the radiated emission or EMI. the oscillations being caused by long lead length between the amplifier and the speaker. Copyright ANPEC Electronics Corp. Rev. A.7 - Mar., 2013 20 www.anpec.com.tw APA2605 Application Information (Cont.) Power-Supply Decoupling Capacitor, CS (Cont.) The optimum decoupling is achieved by using two different types of capacitors that target on different types of noise on the power supply leads. For higher frequency transients, spikes, or digital hash on the line, a good low equivalent-series-resistance (ESR) ceramic capacitor, typically 0.1µF placed as close as possible to the device VDD pin for works best. For filtering lower frequency noise signals, a large aluminum electrolytic capacitor of 10µF or greater placed near the audio power amplifier is recommended. Layout Recommendation ThermalVia diameter 0.3mm X 5 1mm 3.2mm 0.28mm 0.5mm Solder Mask to Prevent Short-Circuit 2.2mm Ground plane for Thermal PAD Figure 5. QFN4x4-20A Land Pattern Recommendation 1. All components should be placed close to the APA2605. For example, the input capacitor (Ci) should be close to APA2605’s input pins to avoid causing noise coupling to APA2605’s high impedance inputs; the decoupling capacitor (Cs) should be placed by the APA2605’s power pin to decouple the power rail noise. 2. The output traces should be short, wide ( >50mil), and symmetric. 3. The input trace should be short and symmetric. 4. The power trace width should greater than 50mil. 5. The QFN4X4-20A Thermal PAD should be soldered on PCB, and the ground plane needs soldered mask (to avoid short-circuit) except the Thermal PAD area. Copyright ANPEC Electronics Corp. Rev. A.7 - Mar., 2013 21 www.anpec.com.tw APA2605 Package Information SSOP-24 D h x 45o E E1 SEE VIEW A c 0.25 A GAUGE PLANE SEATING PLANE A1 A2 b L θ e VIEW A S Y M B O L SSOP-24 (150mil) MILLIMETERS MIN. INCHES MAX. A MIN. MAX. 1.75 0.069 0.004 0.25 0.010 A1 0.10 A2 1.24 b 0.20 0.30 0.008 0.012 c 0.15 0.25 0.006 0.010 D 8.56 8.76 0.337 0.345 E 5.80 6.20 0.228 0.244 E1 3.80 4.00 0.150 0.158 e 0.049 0.635 BSC 0.025 BSC L 0.40 1.27 0.016 0.050 h 0.25 0.50 0.010 0.020 θ 0o 8o 0o 8o Copyright ANPEC Electronics Corp. Rev. A.7 - Mar., 2013 22 www.anpec.com.tw APA2605 Package Information SSOP-24P D SEE VIEW A h X 45o E E1 E2 D2 b c 0.25 A1 NX A A2 e L GAUGE PLANE SEATING PLANE θ aaa c VIEW A S Y M B O L A SSOP-24P INCHES MILLIMETERS MIN. MAX. MIN. MAX. 0.004 0.010 0.069 1.75 0.25 A1 0.10 A2 1.24 b 0.20 0.30 0.008 c 0.15 0.25 0.006 0.010 D 8.56 8.76 0.337 0.345 D2 3.20 4.00 0.126 0.158 0.244 0.049 0.012 E 5.80 6.20 0.228 E1 3.80 4.00 0.150 0.158 E2 e 2.00 2.80 0.079 0.110 L 0.40 1.27 0.016 0.050 h 0.25 0.50 0.010 0.020 0o 8o 0.635 BSC θ aaa 0.025 BSC 0.10 0o 8o 0.004 Note : 1. Rerfence to JEDEC MO-137 AE. 2. Dimension "D" does not include mold flash, protrusions or gate burrs. Mold flash, protrusion or gate burrs shall not exceed 6 mil per side. 3. Dimension "E" does not include inter-lead flash or protrusions. Inter-lead flash and protrusions shall not exceed 10 mil per side. Copyright ANPEC Electronics Corp. Rev. A.7 - Mar., 2013 23 www.anpec.com.tw APA2605 Package Information SOP-18 D e h x 45o E1 E SEE VIEW A c A1 0.25 A2 A b θ L GAUGE PLANE SEATING PLANE VIEW A S Y M B O L SOP-18 (300mil) INCHES MILLIMETERS MIN. MAX. A MIN. MAX. 2.65 0.104 0.004 0.30 0.012 A1 0.10 A2 2.05 b 0.31 0.51 0.012 0.020 c 0.20 0.33 0.008 0.013 D 11.35 11.75 0.447 0.463 E 10.10 10.50 0.398 0.413 E1 7.40 7.60 0.291 0.299 e 0.081 1.27 BSC 0.050 BSC h 0.25 0.75 0.010 0.030 L 0.40 1.27 0.016 0.050 θ 0o 8o 0o 8o Note : 1. Followed from JEDEC MS-013 AB. 2. Dimension "D" does not include mold flash, protrusions or gate burrs. Mold flash, protrusion or gate burrs shall not exceed 6 mil per side . 3. Dimension "E" does not include inter-lead flash or protrusions. Inter-lead flash and protrusions shall not exceed 10 mil per side. Copyright ANPEC Electronics Corp. Rev. A.7 - Mar., 2013 24 www.anpec.com.tw APA2605 Package Information QFN4x4-20A D b E A Pin 1 A1 D2 A3 L K E2 Pin 1 Corner e S Y M B O L QFN4x4-20A MILLIMETERS INCHES MIN. MAX. MIN. MAX. A 0.80 1.00 0.031 0.039 A1 0.00 0.05 0.000 0.002 A3 0.20 REF 0.008 REF b 0.18 0.30 0.008 0.012 D 3.90 4.10 0.154 0.161 D2 2.00 2.50 0.079 0.098 E 3.90 4.10 0.154 0.161 E2 2.00 2.50 0.079 0.098 0.45 0.014 e 0.50 BSC L 0.35 K 0.20 0.020 BSC 0.018 0.008 Note : 1. Followed from JEDEC MO-220 VGGD-5. Copyright ANPEC Electronics Corp. Rev. A.7 - Mar., 2013 25 www.anpec.com.tw APA2605 Carrier Tape & Reel Dimensions P0 P2 P1 A B0 W F E1 OD0 K0 A0 A OD1 B B T SECTION A-A SECTION B-B H A d T1 Application SSOP-24 Application SSOP-24P Application SOP-18 A H T1 330±2.00 50MIN 24.40+2.00 -0.00 P0 P1 P2 C 13.0+0.50 -0.20 D0 d D W E1 F 1.5MIN 20.2MIN 24.0±0.30 1.75±0.10 11.5±0.10 T A0 B0 K0 13.50±0.10 2.60±0.10 D1 5+0.10 -0.00 4.0±0.10 12.0±0.10 A H T1 C d D W E1 F 330.0±2.00 50 MIN. 16.4+2.00 -0.00 13.0+0.50 -0.20 1.5 MIN. 20.2 MIN. 16.0±0.30 1.75±0.10 7.50±0.10 P0 P1 P2 D0 D1 T A0 B0 K0 1.5 MIN. 0.6+0.00 -0.40 6.40±0.20 9.00±0.20 2.10±0.20 2.0±0.10 1.5MIN 0.60+0.00 8.50±0.10 -0.40 4.0±0.10 8.0±0.10 2.0±0.10 1.5+0.10 -0.00 A H T1 C d D W E1 F 330.0±2.00 50 MIN. 16.4+2.00 -0.00 13.0+0.50 -0.20 1.5 MIN. 20.2 MIN. 16.0±0.30 1.75±0.10 7.5±0.10 P0 P1 P2 D0 D1 T A0 B0 K0 2.0±0.10 1.5+0.10 -0.00 1.5 MIN. 0.6+0.00 -0.40 10.9±0.20 10.70±0.20 3.1±0.20 4.0±0.10 8.0±0.10 (mm) Copyright ANPEC Electronics Corp. Rev. A.7 - Mar., 2013 26 www.anpec.com.tw APA2605 Carrier Tape & Reel Dimensions (Cont.) Application QFN4x4-20A A H T1 C d D W E1 F 330.0±2.00 50 MIN. 12.4+2.00 -0.00 13.0+0.50 -0.20 1.5 MIN. 20.2 MIN. 12.0±0.30 1.75±0.10 5.5±0.05 P0 P1 P2 D0 D1 T A0 B0 K0 2.0±0.05 1.5+0.10 -0.00 1.5 MIN. 0.6+0.00 -0.40 4.30±0.20 4.30±0.20 1.30±0.20 4.0±0.10 8.0±0.10 (mm) Devices Per Unit Package Type QFN4x4-20A SSOP-24(P) SOP-18 Unit Tape & Reel Tape & Reel Tape & Reel Quantity 3000 2500 1000 Taping Direction Information SSOP-24(P) USER DIRECTION OF FEED Copyright ANPEC Electronics Corp. Rev. A.7 - Mar., 2013 27 www.anpec.com.tw APA2605 Taping Direction Information (Cont.) SOP-18 USER DIRECTION OF FEED QFN4x4-20A USER DIRECTION OF FEED Copyright ANPEC Electronics Corp. Rev. A.7 - Mar., 2013 28 www.anpec.com.tw APA2605 Classification Profile Classification Reflow Profiles Profile Feature Sn-Pb Eutectic Assembly Pb-Free Assembly 100 °C 150 °C 60-120 seconds 150 °C 200 °C 60-120 seconds 3 °C/second max. 3 °C/second max. 183 °C 60-150 seconds 217 °C 60-150 seconds See Classification Temp in table 1 See Classification Temp in table 2 Time (tP)** within 5°C of the specified classification temperature (Tc) 20** seconds 30** seconds Average ramp-down rate (Tp to Tsmax) 6 °C/second max. 6 °C/second max. 6 minutes max. 8 minutes max. Preheat & Soak Temperature min (Tsmin) Temperature max (Tsmax) Time (Tsmin to Tsmax) (ts) Average ramp-up rate (Tsmax to TP) Liquidous temperature (TL) Time at liquidous (tL) Peak package body Temperature (Tp)* Time 25°C to peak temperature * Tolerance for peak profile Temperature (Tp) is defined as a supplier minimum and a user maximum. ** Tolerance for time at peak profile temperature (tp) is defined as a supplier minimum and a user maximum. Copyright ANPEC Electronics Corp. Rev. A.7 - Mar., 2013 29 www.anpec.com.tw APA2605 Classification Reflow Profiles (Cont.) Table 1. SnPb Eutectic Process – Classification Temperatures (Tc) 3 Package Thickness <2.5 mm Volume mm <350 235 °C Volume mm ≥350 220 °C ≥2.5 mm 220 °C 220 °C 3 Table 2. Pb-free Process – Classification Temperatures (Tc) Package Thickness <1.6 mm 1.6 mm – 2.5 mm ≥2.5 mm Volume mm <350 260 °C 260 °C 250 °C 3 Volume mm 350-2000 260 °C 250 °C 245 °C 3 Volume mm >2000 260 °C 245 °C 245 °C 3 Reliability Test Program Test item SOLDERABILITY HOLT PCT TCT HBM MM Latch-Up Method JESD-22, B102 JESD-22, A108 JESD-22, A102 JESD-22, A104 MIL-STD-883-3015.7 JESD-22, A115 JESD 78 Description 5 Sec, 245°C 1000 Hrs, Bias @ Tj=125°C 168 Hrs, 100%RH, 2atm, 121°C 500 Cycles, -65°C~150°C VHBM≧2KV VMM≧200V 10ms, 1tr≧100mA Customer Service Anpec Electronics Corp. Head Office : No.6, Dusing 1st Road, SBIP, Hsin-Chu, Taiwan Tel : 886-3-5642000 Fax : 886-3-5642050 Taipei Branch : 2F, No. 11, Lane 218, Sec 2 Jhongsing Rd., Sindian City, Taipei County 23146, Taiwan Tel : 886-2-2910-3838 Fax : 886-2-2917-3838 Copyright ANPEC Electronics Corp. Rev. A.7 - Mar., 2013 30 www.anpec.com.tw