LINER LTC1250 Very low noise zero-drift bridge amplifier Datasheet

LTC1250
Very Low Noise
Zero-Drift Bridge Amplifier
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DESCRIPTIO
FEATURES
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The LTC®1250 is a high performance, very low noise zerodrift operational amplifier. The LTC1250’s combination of
low front-end noise and DC precision makes it ideal for use
with low impedance bridge transducers. The LTC1250
features typical input noise of 0.75µVP-P from 0.1Hz to
10Hz, and 0.2µVP-P from 0.1Hz to 1Hz. The LTC1250 has
DC to 1Hz noise of 0.35µVP-P, surpassing that of low noise
bipolar parts including the OP-07, OP-77, and LT1012.
The LTC1250 uses the industry-standard single op amp
pinout, and requires no external components or nulling
signals, allowing it to be a plug-in replacement for bipolar
op amps.
Very Low Noise: 0.75µVP-P Typ, 0.1Hz to 10Hz
DC to 1Hz Noise Lower Than OP-07
Full Output Swing into 1k Load
Offset Voltage: 10µV Max
Offset Voltage Drift: 50nV/°C Max
Common Mode Rejection Ratio: 110dB Min
Power Supply Rejection Ratio: 115dB Min
No External Components Required
Pin Compatible with Standard 8-Pin Op Amps
Available in Standard 8-Pin Plastic DIP
and 8-Pin SO Packages
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APPLICATIO S
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Electronic Scales
Strain Gauge Amplifiers
Thermocouple Amplifiers
High Resolution Data Acquisition
Low Noise Transducers
Instrumentation Amplifiers
, LTC and LT are registered trademarks of Linear Technology Corporation. All other
trademarks are the property of their respective owners. Protected by U.S. Patents
including 4933642.
The LTC1250 incorporates an improved output stage
capable of driving 4.3V into a 1k load with a single 5V
supply; it will swing ±4.9V into 5k with ±5V supplies. The
input common mode range includes ground with single
power supply voltages above 12V. Supply current is 3mA
with a ±5V supply, and overload recovery times from
positive and negative saturation are 0.5ms and 1.5ms,
respectively. The internal nulling clock is set at 5kHz for
optimum low frequency noise and offset drift; no external
connections are necessary.
The LTC1250 is available in a standard 8-pin plastic DIP
and 8-pin SO packages.
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TYPICAL APPLICATIO
Differential Bridge Amplifier
Input Referred Noise 0.1Hz to 10Hz
2
5V
5V
50Ω
GAIN
TRIM
VS = ±5V
AV = 10k
1000pF
0.1µF
1
µV
18.2k
350Ω
STRAIN
GAUGE
2
1000pF
+
0
7
LTC1250
3
–5V
–
6
AV = 100
–1
4
18.2k
–2
–5V
1250 TA01
0
2
6
4
TIME (s)
8
10
LT1250 TA02
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LTC1250
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ABSOLUTE
AXI U RATI GS
(Note 1)
Total Supply Voltage (V + to V –) ............................. 18V
Input Voltage ........................ (V + + 0.3V) to (V – – 0.3V)
Output Short Circuit Duration ......................... Indefinite
Storage Temperature Range ................ – 65°C to 150°C
Lead Temperature (Soldering, 10 sec.)................ 300°C
Operating Temperature Range
LTC1250M (OBSOLETE) ............ – 55°C to 125°C
LTC1250C .......................................... 0°C TO 70°C
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PACKAGE/ORDER I FOR ATIO
TOP VIEW
NC 1
8
NC
–IN 2
7
V+
+IN 3
6
OUT
V– 4
5
NC
ORDER PART
NUMBER
ORDER PART
NUMBER
TOP VIEW
LTC1250CN8
N8 PACKAGE
8-LEAD PLASTIC DIP
NC 1
8
NC
–IN 2
7
V+
+IN 3
6
OUT
5
NC
V–
TJMAX = 110°C, θJA = 130°CW
J8 PACKAGE
8-LEAD CERAMIC DIP
TJMAX = 150°C, θJA = 100°CW (J8)
4
LTC1250CS8
S8 PART MARKING
S8 PACKAGE
8-LEAD PLASTIC SO
LTC1250MJ8
LTC1250CJ8
1250
TJMAX = 110°C, θJA = 200°CW
OBSOLETE PACKAGE
Consider the N8 or S8 for Alternative Source
Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full operating
temperature range, VIN = ±5V, otherwise specifications are at TA = 25°C.
SYMBOL PARAMETER
VOS
Input Offset Voltage
∆VOS
Average Input Offset Drift
Long Term Offset Drift
Input Noise Voltage (Note 3)
en
CONDITIONS
TA = 25°C (Note 2)
(Note 2)
in
IB
Input Noise Current
Input Bias Current
TA = 25°C, 0.1Hz to 10Hz
TA = 25°C, 0.1Hz to 1Hz
f = 10Hz
TA = 25°C (Note 4)
IOS
Input Offset Current
TA = 25°C (Note 4)
CMRR
PSRR
AVOL
Common Mode Rejection Ratio
Power Supply Rejection Ratio
Large-Signal Voltage Gain
Maximum Output Voltage Swing
VCM = – 4V to 3V
VS = ±2.375V to ±8V
RL = 10k, VOUT = ±4V
RL = 1k
RL = 100k
RL = 10k, CL = 50pF
●
●
●
SR
GBW
IS
Slew Rate
Gain-Bandwidth Product
Supply Current
LTC1250M
TYP
MAX
±5
±10
±0.01 ±0.05
50
0.75
1.0
0.2
4.0
±50
±150
±950
±100 ±300
±500
110
130
115
130
125
170
±4.0 4.3/–4.7
±4.92
10
1.5
3.0
4.0
7.0
MIN
●
●
●
●
No Load, TA = 25°C
●
MIN
110
115
125
±4.0
LTC1250C
TYP
MAX
±5
±10
±0.01 ±0.05
50
0.75
1.0
0.2
4.0
±50
±200
±450
±100 ±400
±500
130
130
170
4.3 /–4.7
±4.95
10
1.5
3.0
4.0
5.0
UNITS
µV
µV/°C
nV/√Mo
µVP-P
µVP-P
fA/√Hz
pA
pA
pA
pA
dB
dB
dB
V
V
V/µs
MHz
mA
mA
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LTC1250
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full operating
temperature range, VIN = ±5V, otherwise specifications are at TA
SYMBOL PARAMETER
CONDITIONS
fS
VOS
∆VOS
en
Internal Sampling Frequency
Input Offset Voltage
Average Input Offset Drift
Input Noise Voltage (Note 3)
IB
IOS
Input Bias Current
Input Offset Current
Maximum Output Voltage Swing
TA = 25°C
TA = 25°C (Note 2)
(Note 2)
TA = 25°C, 0.1Hz to 10Hz
TA = 25°C, 0.1Hz to 1Hz
TA = 25°C (Note 4)
TA = 25°C (Note 4)
RL = 1k
RL = 100k
TA = 25°C
TA = 25°C
IS
fS
Supply Current
Sampling Frequency
MIN
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: These parameters are guaranteed by design. Thermocouple effects
preclude measurement of these voltage levels during automated testing.
Note 3: 0.1Hz to 10Hz noise is specified DC coupled in a 10s window;
0.1Hz to 1Hz noise is specified in a 100s window with an RC high-pass
LTC1250M
TYP
MAX
4.75
±2
±0.01
1.0
0.3
±20
±40
4.3
4.95
1.8
3
●
4.0
MIN
±5
±0.05
±100
±200
4.0
2.5
LTC1250C
TYP
MAX
4.75
±2
±0.01
1.0
0.3
±20
±40
4.3
4.95
1.8
3
±5
±0.05
±100
±200
2.5
UNITS
kHz
µV
µV/°C
µVP-P
µVP-P
pA
pA
V
V
mA
kHz
filter at 0.1Hz. The LTC1250 is sample tested for noise; for 100% tested
parts contact LTC Marketing Dept.
Note 4: At T ≤ 0°C these parameters are guaranteed by design and not
tested.
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TYPICAL PERFOR A CE CHARACTERISTICS
6
4.0
1.6
1.2
3.0
1.0
0.1Hz TO 10Hz
0.6
0.4
SAMPLING FREQUENCY (kHz)
3.5
SUPPLY CURRENT (mA)
1.4
0.8
TA = 25°C
TA = 25°C
TA = 25°C
INPUT NOISE (µVP-P)
Sampling Frequency vs Supply
Voltage
Supply Current vs Supply Voltage
Input Noise vs Supply Voltage
2.5
2.0
1.5
1.0
0.1Hz TO 1Hz
5
4
3
0.5
0.2
2
0
0
4
10
6
8
12
14
TOTAL SUPPLY VOLTAGE, V + TO V – (V)
16
1250 G01
4
10
6
8
12
14
TOTAL SUPPLY VOLTAGE, V + TO V – (V)
16
1250 G02
4
10
6
8
12
14
TOTAL SUPPLY VOLTAGE, V + TO V – (V)
16
1250 G03
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LTC1250
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TYPICAL PERFOR A CE CHARACTERISTICS
Input Noise vs Temperature
8
4.5
1.2
7
SAMPLING FREQUENCY (kHz)
1.0
4.0
SUPPLY CURRENT (mA)
0.8
0.1Hz TO 10Hz
0.6
0.4
0.1Hz TO 1Hz
3.5
3.0
2.5
0.2
50
25
75
0
TEMPERATURE (°C)
100
2.0
–50 –25
125
50
25
0
75
TEMPERATURE (°C)
2
150
1000
VS = ±5V
80
80
GAIN (dB)
40
30
GAIN
40
40
PHASE:
RL = 1k
20
VS = ±5V OR
SINGLE 5V
TA = 25°C
CL = 100pF
20
0
10
100
1k
FREQUENCY (Hz)
10k
1k
10k
20
100
0
–20
0
60
PHASE:
RL = 100k
PHASE MARGIN (DEG)
60
50
10
100
1250 G06
100
60
1
75
50
25
TEMPERATURE (°C)
0
Bias Current (Magnitude) vs
Temperature
100
VS = ±5V
RS = 10Ω
70
0
–50 –25
Gain/Phase vs Frequency
80
10
–50
–20
10M
100k
1M
FREQUENCY (Hz)
–25
Common Mode Rejection Ratio vs
Frequency
140
8
VS = ±5V
VCM = 1VRMS
500µs/DIV
AV = 100, RL = 100k, CL = 50pF, VS = ±5V
6
120
4
100
2
CMRR (dB)
INPUT COMMON MODE RANGE (V)
TA = 25°C
–5
125
100
1250 G09
Common Mode Input Range
vs Supply Voltage
Overload Recovery
0
50
75
0
25
TEMPERATURE (°C)
1250 G08
1250 G07
INPUT (V)
3
1250 G05
Voltage Noise vs Frequency
OUTPUT (V)
4
125
100
1250 G04
0
5
1
0
–50 –25
0.2
6
BIAS CURRENT (|pA|)
INPUT NOISE (µVP-P)
VS = ±5V
VS = ±5V
VS = ±5V
VOLTAGE NOISE (nV/√Hz)
Sampling Frequency vs
Temperature
Supply Current vs Temperature
0
–2
80
60
40
–4
20
–6
0
–8
2
3
5
4
6
SUPPLY VOLTAGE (±V)
7
8
1250 G11
1
10
100
1k
FREQUENCY (Hz)
10k
100k
1250 G12
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LTC1250
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TYPICAL PERFOR A CE CHARACTERISTICS
Output Swing vs Load
Resistance, Dual Supplies
Transient Response
Output Voltage Swing vs Load
Resistance, Single Supply
10
18
RL TO GND
9
14
7
OUTPUT SWING (V)
OUTPUT SWING (±V)
2V/DIV
8
6
VS = ±5V
5
4
VS = ±2.5V
3
NEGATIVE SWING
POSITIVE SWING
1
AV = 1, RL = 100k, CL = 50pF, VS = ±5V
0
12
VS = 10V
10
8
6
VS = 5V
4
2
1µs/DIV
VS = 16V
16
VS = ±8V
0
2
1
3 4 5 6 7 8
LOAD RESISTANCE (kΩ)
0
10
9
V – = GND
RL TO GND
2
0
1
2
3 4 5 6 7 8
LOAD RESISTANCE (kΩ)
1250 G14
Output Swing vs Output Current,
±5V Supply
40
VS = SINGLE 5V
OUTPUT VOLTAGE (V)
2
1
0
–1
–2
–3
SHORT-CIRCUIT CURRENT (mA)
5
3
OUTPUT VOLTAGE (V)
Short-Circuit Current
vs Temperature
6
VS = ±5V
10
1250 G15
Output Swing vs Output Current,
Single 5V Supply
5
4
9
4
3
2
1
VS = ±15V
30
VOUT = V –
20
10
0
–10
–20
VOUT = V +
–30
–4
–5
0.01
0.1
1
OUTPUT CURRENT (mA)
0
0.01
10
0.1
1
OUTPUT CURRENT (mA)
–40
–50 –25
10
0
50
25
75
TEMPERATURE (°C)
1250 G17
1250 G16
100
125
1250 G18
TEST CIRCUITS
DC to 10Hz Noise Test Circuit
(for DC to 1Hz Multiply All Capacitor Values by 10)
Offset Test Circuit
100pF
100pF
100k
100k
2
5V
2
10Ω
–
+
10Ω
7
LTC1250
3
–
7
LTC1250
6
3
OUTPUT
4
–5V
5V
5V
+
800k
4
–5V
1250 TC01
2
6
0.02µF
3
–
8
1/2
LT1057
+4
–5V
0.04µF
6
–
1/2
LT1057
1
800k
800k
5
7
OUTPUT
+
0.01µF
1250 TC02
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LTC1250
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APPLICATI
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Input Noise
The LTC1250, like all CMOS amplifiers, exhibits two types
of low frequency noise: thermal noise and 1/f noise. The
LTC1250 uses several design modifications to minimize
these noise sources. Thermal noise is minimized by raising the gM of the front-end transistors by running them at
high bias levels and using large transistor geometries. 1/f
noise is combated by optimizing the zero-drift nulling loop
to run at twice the 1/f corner frequency, allowing it to
reduce the inherently high CMOS 1/f noise to near thermal
levels at low frequencies. The resultant noise spectrum is
quite low at frequencies below the internal 5kHz clock
frequency, approaching the best bipolar op amps at 10Hz
and surpassing them below 1Hz (Figure 1). All this is
accomplished in an industry-standard pinout; the LTC1250
requires no external capacitors, no nulling or clock signals, and conforms to industry-standard 8-pin DIP and
8-pin SO packages.
CF ≥
55pF
AV
where AV = closed-loop gain. Note that CF is not dependent
on the value of RF. Circuits with higher gain (AV > 50) or
low loop impedance should not require CF for stability.
CF
RF
RIN
CP
–
LTC1250
+
1250 F02
80
70
OP-27
VOLTAGE NOISE (nV/√Hz)
stability with a feedback network impedance as low as
1.9k. This effect can be eliminated by adding a capacitor
across the feedback resistor, adding a zero which cancels
the input pole (Figure 2). The value of this capacitor should
be:
OP-07
VS = ±5V
RS = 10Ω
Figure 2. CF Cancels Phase Shift Due to Parasitic CP
60
50
40
LTC1250
30
20
10
0
0.01
0.1
FREQUENCY (Hz)
1
LTC1250 F01
Figure 1. Voltage Noise vs Frequency
Input Capacitance and Compensation
The large input transistors create a parasitic 55pF capacitance from each input to V +. This input capacitance will
react with the external feedback resistors to form a pole
which can affect amplifier stability. In low gain, high
impedance configurations, the pole can land below the
unity-gain frequency of the feedback network and degrade
phase margin, causing ringing, oscillation, and other
unpleasantness. This is true of any op amp, however, the
55pF capacitance at the LTC1250’s inputs can affect
Larger values of CF, commonly used in band-limited DC
circuits, may actually increase low frequency noise. The
nulling circuitry in the LTC1250 closes a loop that includes
the external feedback network during part of its cycle. This
loop must settle to its final value within 150µs or it will not
fully cancel the 1/f noise spectrum and the low frequency
noise of the part will rise. If the loop is underdamped (large
RF, no CF) it will ring for more than 150µs and the noise and
offset will suffer.
The solution is to add CF as above but beware! Too large
a value of CF will overdamp the loop, again preventing it
from reaching a final value by the 150µs deadline. This
condition doesn’t affect the LTC1250’s offset or output
stability, but 1/f noise begins to rise. As a rule of thumb,
the RFCF feedback pole should be ≥ 7kHz (1/150µs, the
frequency at which the loop settles) for best 1/f performance; values between 100pF and 500pF work well with
feedback resistors below 100k. This ensures adequate
gain at 7kHz for the LTC1250 to properly null. High value
feedback resistors (above 1M) may require experimentation to find the correct value because parasitics, both in the
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LTC1250
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APPLICATI
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LTC1250 and on the PC board, play an increasing role.
Low value resistors (below 5k) may not require a capacitor at all.
Input Bias Current
The inputs of the LTC1250, like all zero-drift op amps,
draw only small switching spikes of AC bias current; DC
leakage current is negligible except at very high temperatures. The large front-end transistors cause switching
spikes 3 to 4 times greater than standard zero-drift op
amps: the ±50pA bias current spec is still many times
better than most bipolar parts. The spikes don’t match
from one input pin to the other, and are sometimes (but
not always) of opposite polarity. As a result, matching the
impedances at the inputs (Figure 3) will not cancel the
bias current, and may cause additional errors. Don’t do it.
RF
RIN
–
LTC1250
+
1250 F03
Figure 3. Extra Resistor Will Not Cancel Bias Current Errors
Output Drive
The LTC1250 includes an enhanced output stage which
provides nearly symmetrical output source/sink currents.
This output is capable of swinging a minimum of ±4V into
a 1k load with ±5V supplies, and can sink or source >20mA
into low impedance loads. Lightly loaded (RL ≥100k), the
LTC1250 will swing to within millivolts of either rail. In
single supply applications, it will typically swing 4.3V into
a 1k load with a 5V supply.
when the LTC1250’s output is heavily loaded, the chip
may dissipate substantial power, raising the temperature
of the package and aggravating thermocouples at the
inputs. Although the LTC1250 will maintain its specified
accuracy under these conditions, care must be taken in
the layout to prevent or compensate circuit errors. Be
especially careful of air currents when measuring low
frequency noise; nearby moving objects (like people) can
create very large noise peaks with an unshielded circuit
board. For more detailed explanations and advice on how
to avoid these errors, see the LTC1051/LTC1053 data
sheet.
Sampling Behavior
The LTC1250’s zero-drift nulling loop samples the input at
≈ 5kHz, allowing it to process signals below 2kHz with no
aliasing. Signals above this frequency may show aliasing
behavior, although wideband internal circuitry generally
keeps errors to a minimum. The output of the LTC1250
will have small spikes at the clock frequency and its
harmonics; these will vary in amplitude with different
feedback configurations. Low frequency or band-limited
systems should not be affected, but systems with higher
bandwidth (oversampling A/Ds, for example) may need to
filter out these clock artifacts. Output spikes can be
minimized with a large feedback capacitor, but this will
adversely affect noise performance (see Input Capacitance and Compensation on the previous page). Applications which require spike-free output in addition to minimum noise will need a low-pass filter after the LTC1250;
a simple RC will usually do the job (Figure 4). The
LTC1051/LTC1053 data sheet includes more information
about zero-drift amplifier sampling behavior.
CF
RF
Minimizing External Errors
The input noise, offset voltage, and bias current specs for
the LTC1250 are all well below the levels of circuit board
parasitics. Thermocouples between the copper pins of the
LTC1250 and the tin/lead solder used to connect them can
overwhelm the offset voltage of the LTC1250, especially
if a soldering iron has been around recently. Note also that
–
47k
LTC1250
+
0.01
1250 F04
Figure 4. RC Output Pole Limits Bandwidth to 330Hz
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LTC1250
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Single Supply Operation
The LTC1250 will operate with single supply voltages as
low as 4.5V, and the output swings to within millivolts of
either supply when lightly loaded. The input stage will
common mode to within 250mV of ground with a single
5V supply, and will common mode to ground with single
supplies above 11V. Most bridge transducers bias their
inputs above ground when powered from single supplies,
allowing them to interface directly to the LTC1250 in
single supply applications. Single-ended, ground-referenced signals will need to be level shifted slightly to
interface to the LTC1250’s inputs.
Fault Conditions
ally severe fault conditions can destroy the part. All pins
are protected against faults of ±25mA or 5V beyond
either supply, whichever comes first. If the external
circuitry can exceed these limits, series resistors or
voltage clamp diodes should be included to prevent
damage.
The LTC1250 includes internal protection against ESD
damage. All data sheet parameters are maintained to 1kV
ESD on any pin; beyond 1kV, the input bias and offset
currents will increase, but the remaining specs are unaffected and the part remains functional to 5kV at the input
pins and 8kV at the output pin. Extreme ESD conditions
should be guarded against by using standard antistatic
precautions.
The LTC1250 is designed to withstand most external fault
conditions without latch-up or damage. However, unusu-
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LTC1250
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PACKAGE DESCRIPTIO
J8 Package
8-Lead CERDIP (Narrow .300 Inch, Hermetic)
(Reference LTC DWG # 05-08-1110)
CORNER LEADS OPTION
(4 PLCS)
0.023 – 0.045
(0.584 – 1.143)
HALF LEAD
OPTION
0.045 – 0.068
(1.143 – 1.727)
FULL LEAD
OPTION
0.005
(0.127)
MIN
0.405
(10.287)
MAX
8
7
6
5
0.025
(0.635)
RAD TYP
0.220 – 0.310
(5.588 – 7.874)
1
0.300 BSC
(0.762 BSC)
2
3
4
0.200
(5.080)
MAX
0.015 – 0.060
(0.381 – 1.524)
0.008 – 0.018
(0.203 – 0.457)
0.385 ± 0.025
(9.779 ± 0.635)
0° – 15°
0.045 – 0.068
(1.143 – 1.727)
0.014 – 0.026
(0.360 – 0.660)
NOTE: LEAD DIMENSIONS APPLY TO SOLDER DIP/PLATE OR TIN PLATE LEADS.
0.125
3.175
0.100 ± 0.010 MIN
(2.540 ± 0.254)
J8 0694
OBSOLETE PACKAGE
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LTC1250
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PACKAGE DESCRIPTIO
N8 Package
8-Lead PDIP (Narrow .300 Inch)
(Reference LTC DWG # 05-08-1510)
.400*
(10.160)
MAX
8
7
6
5
1
2
3
4
.255 ± .015*
(6.477 ± 0.381)
.300 – .325
(7.620 – 8.255)
.008 – .015
(0.203 – 0.381)
+.035
.325 –.015
(
8.255
+0.889
–0.381
)
.045 – .065
(1.143 – 1.651)
.130 ± .005
(3.302 ± 0.127)
.065
(1.651)
TYP
.100
(2.54)
BSC
.120
(3.048) .020
MIN (0.508)
MIN
.018 ± .003
(0.457 ± 0.076)
N8 1002
NOTE:
1. DIMENSIONS ARE
INCHES
MILLIMETERS
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .010 INCH (0.254mm)
1250fb
10
LTC1250
U
PACKAGE DESCRIPTIO
S8 Package
8-Lead Plastic Small Outline (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1610)
.189 – .197
(4.801 – 5.004)
NOTE 3
.045 ±.005
.050 BSC
8
.245
MIN
7
6
5
.160 ±.005
.150 – .157
(3.810 – 3.988)
NOTE 3
.228 – .244
(5.791 – 6.197)
.030 ±.005
TYP
1
RECOMMENDED SOLDER PAD LAYOUT
.010 – .020
× 45°
(0.254 – 0.508)
.008 – .010
(0.203 – 0.254)
.053 – .069
(1.346 – 1.752)
0°– 8° TYP
.016 – .050
(0.406 – 1.270)
NOTE:
1. DIMENSIONS IN
.014 – .019
(0.355 – 0.483)
TYP
INCHES
(MILLIMETERS)
2. DRAWING NOT TO SCALE
3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)
2
3
4
.004 – .010
(0.101 – 0.254)
.050
(1.270)
BSC
SO8 0303
1250fb
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However,
no responsibility is assumed for its use. Linear Technology Corporation makes no representation that
the interconnection of its circuits as described herein will not infringe on existing patent rights.
11
LTC1250
UO
TYPICAL APPLICATI
S
Differential Thermocouple Amplifier
Reference Buffer
15V
7.5k
3
3
1
7
+
LTC1250
2
LM399
–
R1
10k
0.1%
6
5V
2
7
–
LTC1250
4
3
4
R3
1M
0.1%
C1
100pF
–
2
+
R2
10k
0.1%
TYPE K †
1250 TA03
C2
100pF
5V
10mV/°C
VOUT
LT1025
GND
R7
500Ω
FULL-SCALE TRIM
R8
5k
1%
R5
3k
VIN
VOUT
100mV/°C
R6
7.5k
1%
4
–5V
R4
1M
0.1%
VCM
±10ppm ERROR AT ±15mA
1µVP-P OUTPUT NOISE
2.5µV/°C DRIFT (DUE TO LM399)
+
6
R9
33k
†
FOR BEST ACCURACY, THERMOCOUPLE
RESISTANCE SHOULD BE LESS THAN 100Ω
–5V
1250 TA04
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LTC1050/LTC1051/
LTC1053
Single/Dual/Quad Precision Zero-Drift Op Amp
VOS Max = 5µV, VSUPPLY Max = 16.5V
LTC1150/LTC1151
Single/Dual ±15V Zero-Drift Op Amp
High Voltage Operation
LTC2050/LTC2051/
LTC2052
Single/Dual/Quad Zero-Drift Op Amp
Single Supply 2.7V to =/–5V, SOT-23/MS8/GN16 Package
LTC2053
Zero-Drift Instrumentation Amp
Rail-Rail, MS8, 116dB, Two Resistors Set Gain
LTC2054/LTC2055
Single/Dual Zero-Drift Op Amp
150µA per Amplifier (Max), SOT-23/MS8 Package
LTC6800
Rail-to-Rail Input/Output Instrumentation Amp
Low Cost, Single Supply, MS8, Two Resistors Set Gain
1250fb
12
Linear Technology Corporation
LT/GP 0205 1K REV B • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear.com
© LINEAR TECHNOLOGY CORPORATION 1994