1 CY7C261 CY7C263/CY7C264 8K x 8 Power-Switched and Reprogrammable PROM Features the CY7C261 automatically powers down into a low-power standby mode. It is packaged in a 300-mil-wide package. The CY7C263 and CY7C264 are packaged in 300-mil-wide and 600-mil-wide packages respectively, and do not power down when deselected. The reprogrammable packages are equipped with an erasure window; when exposed to UV light, these PROMs are erased and can then be reprogrammed. The memory cells utilize proven EPROM floating-gate technology and byte-wide intelligent programming algorithms. • CMOS for optimum speed/power • Windowed for reprogrammability • High speed — 20 ns (Commercial) — 25 ns (Military) • Low power — 660 mW (Commercial) — 770 mW (Military) • Super low standby power (7C261) — Less than 220 mW when deselected — Fast access: 20 ns EPROM technology 100% programmable Slim 300-mil or standard 600-mil packaging available 5V ± 10% VCC, commercial and military Capable of withstanding greater than 2001V static discharge • TTL-compatible I/O • Direct replacement for bipolar PROMs • • • • The CY7C261, CY7C263, and CY7C264 are plug-in replacements for bipolar devices and offer the advantages of lower power, superior performance and programming yield. The EPROM cell requires only 12.5V for the supervoltage and low current requirements allow for gang programming. The EPROM cells allow for each memory location to be tested 100%, as each location is written into, erased, and repeatedly exercised prior to encapsulation. Each PROM is also tested for AC performance to guarantee that after customer programming the product will meet DC and AC specification limits. Read is accomplished by placing an active LOW signal on CS. The contents of the memory location addressed by the address line (A0−A12) will become available on the output lines (O0−O7). Functional Description The CY7C261, CY7C263, and CY7C264 are high-performance 8192-word by 8-bit CMOS PROMs. When deselected, Logic Block Diagram Pin Configurations O7 A2 A3 ROW ADDRESS PROGRAMMABLE ARRAY COLUMN MULTIPLEXER DIP/Flatpack Top View O6 A7 A6 A5 A4 A3 A2 A1 A0 O0 O1 A4 A5 O5 A6 A7 ADDRESS DECODER O4 A8 O3 A9 A10 A11 COLUMN ADDRESS O2 A12 O2 GND VCC A8 A9 A10 CS A11 A12 O7 O6 O5 O4 O3 1 24 2 23 3 22 4 21 5 20 6 19 7 18 7C261 17 8 7C263 9 7C264 16 10 15 11 14 12 13 LCC/PLCC (OpaqueOnly) Top View A5 A6 A7 NC VCC A8 A9 A1 A4 A3 A2 A1 A0 NC O0 4 3 2 1 28 27 26 25 5 24 6 23 7C261 7 22 8 7C263 21 9 20 10 19 11 12 1314151617 18 A10 CS A11 A12 NC O7 O6 O1 O2 GND NC O3 O4 O5 A0 O1 POWER DOWN (7C261) O0 CS For an 8K x 8 Registered PROM, see theCY7C265. Cypress Semiconductor Corporation Document #: 38-04010 Rev. *B • 3901 North First Street • San Jose • CA 95134 • 408-943-2600 Revised December 28, 2002 CY7C261 CY7C263/CY7C264 Selection Guide Maximum Access Time Maximum Operating Current Commercial Maximum Standby Current (7C261 only) Commercial 7C261-20 7C263-20 7C264-20 7C261-25 7C263-25 7C264-25 7C261-35 7C263-35 7C264-35 7C261-45 7C263-45 7C264-45 7C261-55 7C263-55 7C264-55 Unit 20 25 35 45 55 ns 120 120 100 100 100 mA 140 120 120 120 mA 40 30 30 30 mA 40 30 30 30 mA Military 40 Military Maximum Ratings[1] Static Discharge Voltage............................................ >2001V (per MIL-STD-883, Method 3015) (Above which the useful life may be impaired. For user guidelines, not tested.) Storage Temperatures .................................–65°C to+150°C Latch-Up Current..................................................... >200 mA Ambient Temperature with Power Applied..............................................–55°C to+125°C Operating Range UV Exposure ................................................ 7258 Wsec/cm2 Range Ambient Temperature VCC DC Voltage Applied to Outputs in High Z State ................................................ –0.5V to+7.0V Commercial 0°C to + 70°C 5V ± 10% –55°C to + 125°C 5V ± 10% DC Input Voltage........................................... –3.0V to + 7.0V Notes: 1. The volatge on any input or I/O pin cannot exceed the power pin during power-up. 2. TA is the “instant on” case temperature. Supply Voltage to Ground Potential (Pin 24 to Pin 12) ............................................ –0.5V to+7.0V DC Program Voltage (Pin 19 DIP, Pin 23 LCC) ..............................................13.0V Document #: 38-04010 Rev. *B Military[2] Page 2 of 14 CY7C261 CY7C263/CY7C264 Electrical Characteristics Over the Operating Range[3,4] 7C261-20, 25 7C263-20, 25 7C264-20, 25 Parameter Description Test Conditions VOH Output HIGH Voltage VCC = Min., IOH = –2.0 mA VOH Output HIGH Voltage VCC = Min., IOH = –4.0 mA VOL Output LOW Voltage VCC = Min., IOL = 8 mA (6 mA Mil) VOL Output LOW Voltage VCC = Min., IOL = 16 mA VIH Input HIGH Level VIL Input LOW Level IIX Input Current VCD Input Diode Clamp Voltage IOZ Output Leakage Current GND < VOUT < VCC Output Disabled IOS Output Short Circuit Current[5] VCC = Max., VOUT = GND ICC Power Supply Current VCC = Max., f = Max. IOUT = 0 mA Com’l Mil VCC = Max., CS > VIH ISB Min. 7C261-35, 45, 55 7C263-35, 45, 55 7C264-35, 45, 55 Max. Min. Max. 2.4 V 2.4 V 0.4 V 0.4 2.0 Standby Supply Current (7C261) VPP Programming Supply Voltage IPP Programming Supply Current VIHP Input HIGH Programming Voltage VILP Input LOW Programming Voltage –10 V 2.0 V 0.8 GND < VIN < VCC Unit +10 –10 Note 4 0.8 V +10 µA µA Note 4 Com’l –10 +10 –10 +10 Mil –40 +40 –40 +40 µA –20 –90 –20 –90 mA 120 100 mA 140 120 Com’l 40 30 Mil 40 30 12 13 12 50 4.75 mA 13 V 50 mA 4.75 0.4 V 0.4 V Capacitance[4] Parameter Description CIN Input Capacitance COUT Output Capacitance Test Conditions TA = 25°C, f = 1 MHz, VCC = 5.0V Max. Unit 10 pF 10 pF Notes: 3. See the last page of this specification for Group A subgroup testing information. 4. See the “Introduction to CMOS PROMs” section of the Cypress Data Book for general information on testing. 5. For test purposes, not more than one output at a time should be shorted. Short circuit test duration should not exceed 30 seconds.] Document #: 38-04010 Rev. *B Page 3 of 14 CY7C261 CY7C263/CY7C264 AC Test Loads and Waveforms[4] Test Load for -20 through -30 speeds R1 500 (658Ω MIL) R1 500Ω (658Ω MIL) 5V 5V OUTPUT 3.0V OUTPUT R2 333Ω (403Ω MIL) 30 pF INCLUDING JIG AND SCOPE GND R2 333Ω (403Ω MIL) 5 pF 90% 10% 90% 10% ≤ 5 ns ≤ 5 ns INCLUDING JIG AND SCOPE (a) Normal Load (b) High Z Load Equivalent to: THÉVENIN EQUIVALENT RTH 200Ω (250Ω MIL) OUTPUT 2.0V(1.9VMIL) Test Load for -35 through -55 speeds R1250 Ω R1 250Ω 5V 5V OUTPUT OUTPUT R2167 Ω 30pF INCLUDING JIG AND SCOPE INCLUDING JIG AND SCOPE (c) Normal Load Equivalent to: R2167 Ω 5 pF (d) High Z Load THÉVENIN EQUIVALENT OUTPUT RTH 100Ω 2.0V Switching Characteristics Over the Operating Range [1,3,4] 7C261-20 7C263-20 7C264-20 Parameter Description Min. Max. 7C261-25 7C263-25 7C264-25 Min. Max. 7C261-35 7C263-35 7C264-35 Min. 7C261-45 7C263-45 7C264-45 Max. Min. Max. 7C261-55 7C263-55 7C264-55 Min. Max. Unit tAA Address to Output Valid 20 25 35 45 55 ns tHZCS1 Chip Select Inactive to High Z (7C263 and 7C264) 12 12 20 30 35 ns tHZCS2 Chip Select Inactive to High Z (7C261) 20 25 35 45 55 ns tACS1 Chip Select Active to Output Valid (7C263 and 7C264) 12 12 20 30 35 ns tACS2 Chip Select Active to Output Valid (7C261) 20 25 35 45 55 ns tPU Chip Select Active to Power-Up (7C261) tPD Chip Select Inactive to Power-Down (7C261) Document #: 38-04010 Rev. *B 0 0 20 0 25 0 35 0 45 ns 55 ns Page 4 of 14 CY7C261 CY7C263/CY7C264 Switching Waveforms[4] tPU tPD VCC SUPPLY CURRENT 50% 50% A0 - A12 ADDRESS CS tAA tHZCS tACS O0 - O7 Erasure Characteristics Operating Modes Wavelengths of light less than 4000 angstroms begin to erase the devices in the windowed package. For this reason, an opaque label should be placed over the window if the PROM is exposed to sunlight or fluorescent lighting for extended periods of time. Read The recommended dose of ultraviolet light for erasure is a wavelength of 2537 angstroms for a minimum dose (UV intensity multiplied by exposure time) of 25 Wsec/cm2. For an ultraviolet lamp with a 12 mW/cm2 power rating, the exposure time would be approximately 35 minutes. The 7C261 or 7C263 needs to be within 1 inch of the lamp during erasure. Permanent damage may result if the PROM is exposed to high-intensity UV light for an extended period of time. 7258 Wsec/cm2 is the recommended maximum dosage. Read is the normal operating mode for programmed device. In this mode, all signals are normal TTL levels. The PROM is addressed with a 13-bit field, a chip select, (active LOW), is applied to the CS pin, and the contents of the addressed location appear on the data out pins. Program, Program Inhibit, Program Verify These modes are entered by placing a high voltage VPP on pin 19, with pins 18 and 20 set to VILP. In this state, pin 21 becomes a latch signal, allowing the upper 5 address bits to be latched into an onboard register, pin 22 becomes an active LOW program (PGM) signal and pin 23 becomes an active LOW verify (VFY) signal. Pins 22 and 23 should never be active LOW at the same time. The PROGRAM mode exists when PGM is LOW, and VFY is HIGH. The verify mode exists when the reverse is true, PGM HIGH and VFY LOW and the program inhibit mode is entered with both PGM and VFY HIGH. Program inhibit is specifically provided to allow data to be placed on and removed from the data pins without conflict Table 1. Mode Selection Pin Function[6, 7] Read or Output Disable A12 A11 A10 A9 A8 CS O7–O0 Program NA VPP LATCH PGM VFY CS D7–D0 Read A12 A11 A10 A9 A8 VIL O7–O0 Output Disable A12 A11 A10 A9 A8 VIH High Z Program VILP VPP VILP VILP VIHP VILP D7–D0 Program Inhibit VILP VPP VILP VIHP VIHP VILP High Z Program Verify VILP VPP VILP VIHP VILP VILP O7–O0 Blank Check VILP VPP VILP VIHP VILP VILP O7–O0 Mode Notes: 6. X = “don’t care” but not to exceed VCC ±5%. 7. Addresses A8-A12 must be latched through lines A0-A4 in programming modes. Document #: 38-04010 Rev. *B Page 5 of 14 CY7C261 CY7C263/CY7C264 DIP/Flatpack Top View 2 23 VFY A5 3 22 PGM 4 21 5 20 CS A2/A10 6 19 VPP A1/A9 7 18 NA A0/A8 8 7C261 17 D7 D0 9 D6 D1 7C263 16 10 7C264 15 D5 D2 11 14 D4 GND 12 13 D3 A4/A12 A3/A11 A2/A10 A1/A9 A0/A8 NC D0 4 3 2 1 28 27 26 25 5 24 6 7C261 23 7 22 8 21 9 7C263 20 10 19 11 12 13 14 15 16 17 18 D1 A4 /A 12 A 3/ A 11 LATCH VFY PGM A6 LATCH CS VPP NA NC D7 D6 D5 VCC NC D3 D4 24 GND 1 D2 A7 A5 A6 A7 NC VCC LCC/PLCC (Opaque only) Top View Figure 1. Programming Pinouts Programming Information Programming support is available from Cypress as well as from a number of third-party software vendors. For detailed programming information, including a listing of software Document #: 38-04010 Rev. *B packages, please see the PROM Programming Information located at the end of this section. Programming algorithms can be obtained from any Cypress representative. Page 6 of 14 CY7C261 CY7C263/CY7C264 Typical DC and AC Characteristics 1.2 1.4 1.2 1.0 TA = 25°C f = f MAX 0.8 4.5 5.0 5.5 1.1 1.0 0.9 0.8 –55 6.0 SUPPLY VOLTAGE (V) 1.6 1.4 1.2 1.0 0.8 125 TA = 25°C 0.4 4.0 30 40 30 20 10 1.0 2.0 3.0 6.0 20 15 10 VCC = 4.5V TA = 25°C 5 0 5.5 25 4.0 0 0 OUTPUT VOLTAGE (V) 200 400 600 800 1000 CAPACITANCE (pF) NORMALIZED SUPPLY CURRENT vs. CYCLE PERIOD 1.05 150 1.00 125 100 75 VCC = 5.0V TA = 25°C 50 5.0 TYPICAL ACCESS TIME CHANGE vs. OUTPUT LOADING 50 0 4.5 SUPPLY VOLTAGE (V) 35 175 25 VCC = 5.5V TA = 25°C 0.95 0.90 0.85 0.80 0.75 1.0 2.0 3.0 OUTPUT VOLTAGE (V) Document #: 38-04010 Rev. *B 0.6 60 OUTPUT SINK CURRENT vs. OUTPUT VOLTAGE 0 0.0 0.8 OUTPUT SOURCE CURRENT vs. VOLTAGE AMBIENT TEMPERATURE (°C) OUTPUT SINK CURRENT (mA) 125 DELTA t AA (ns) OUTPUT SOURCE CURRENT (mA) NORMALIZED ACCESS TIME NORMALIZED ACCESS TIME vs. TEMPERATURE 25 25 1.0 AMBIENT TEMPERATURE (°C) NORMALIZED I CC 0.6 4.0 NORMALIZED ACCESS TIME 1.2 NORMALIZED I CC NORMALIZED I CC 1.6 0.6 –55 NORMALI ZED ACCESS TIME vs. SUPPLY VOLTAGE NORMALIZED SUPPLY CURRENT vs. AMBIENT TEMPERATURE NORMALIZED SUPPLY CURRENT vs. SUPPLY VOLTAGE 4.0 0.70 0 25 50 75 100 CYCLE PERIOD (ns) Page 7 of 14 CY7C261 CY7C263/CY7C264 ] Ordering Information Speed (ns) Ordering Code Package Name Package Type 20 CY7C261-20PC P13 CY7C261-20WC W14 24-Lead (300-Mil) Windowed CerDIP 25 CY7C261-25JC J64 28-Lead Plastic Leaded Chip Carrier 35 24-Lead (300-Mil) Molded DIP Operating Range Commercial Commercial CY7C261-25PC P13 24-Lead (300-Mil) Molded DIP CY7C261-25WMB W14 24-Lead (300-Mil) Windowed CerDIP Military Commercial CY7C261-35PC P13 24-Lead (300-Mil) Molded DIP CY7C261-35WC W14 24-Lead (300-Mil) Windowed CerDIP CY7C261-35WMB W14 24-Lead (300-Mil) Windowed CerDIP Military CY7C261-45PC P13 224-Lead (300-Mil) Molded DIP Commercial CY7C261-45WC W14 24-Lead (300-Mil) Windowed CerDIP CY7C261-45WMB W14 24-Lead (300-Mil) Windowed CerDIP Military 55 CY7C261-55WC W14 24-Lead (300-Mil) Windowed CerDIP Commercial 20 CY7C263-20JC J64 28-Lead Plastic Leaded Chip Carrier Commercial 45 25 35 CY7C263-20PC P13 24-Lead (300-Mil) Molded DIP CY7C263-20WC W14 24-Lead (300-Mil) Windowed CerDIP CY7C263-25JC J64 28-Lead Plastic Leaded Chip Carrier CY7C263-25PC P13 24-Lead (300-Mil) Molded DIP CY7C263-25WC W14 24-Lead (300-Mil) Windowed CerDIP CY7C263-25DMB D14 24-Lead (300-Mil) CerDIP CY7C263-25QMB Q64 28-Pin Windowed Leadless Chip Carrier CY7C263-25WMB W14 24-Lead (300-Mil) Windowed CerDIP CY7C263-35PC P13 24-Lead (300-Mil) Molded DIP CY7C263-35WC W14 24-Lead (300-Mil) Windowed CerDIP Commercial Military Commercial CY7C263-35WMB W14 24-Lead (300-Mil) Windowed CerDIP Military 45 CY7C263-45WMB W14 24-Lead (300-Mil) Windowed CerDIP Military 55 CY7C263-55JI J64 28-Lead Plastic Leaded Chip Carrier Industrial CY7C263-55PC P13 24-Lead (300-Mil) Molded DIP Commercial CY7C263-55WMB W14 24-Lead (300-Mil) Windowed CerDIP Military 35 CY7C264-35PC P11 24-Lead (600-Mil) Molded DIP Commercial 45 CY7C264-45WC W12 24-Lead (600-Mil) Windowed CerDIP Commercial CY7C264-45WMB W12 24-Lead (600-Mil) Windowed CerDIP Military CY7C264-55WC W12 24-Lead (600-Mil) Windowed CerDIP Commercial 55 Document #: 38-04010 Rev. *B Page 8 of 14 CY7C261 CY7C263/CY7C264 MILITARY SPECIFICATION Group A Subgroup Testing DC Characteristics Switching Characteristics Parameter Subgroups Parameter Subgroups VOH 1, 2, 3 tAA 7, 8, 9, 10, 11 VOL 1, 2, 3 tACS1[9] 7, 8, 9, 10, 11 VIH 1, 2, 3 7, 8, 9, 10, 11 VIL 1, 2, 3 IIX 1, 2, 3 tACS2[8] Notes: 8. 7C261 only. 9. 7C263 and 7C264 only. IOZ 1, 2, 3 ICC 1, 2, 3 ISB[8] 1, 2, 3 Document #: 38-04010 Rev. *B Page 9 of 14 CY7C261 CY7C263/CY7C264 Package Diagrams 24-Lead (300-Mil) CerDIP D14 MIL-STD-1835 D- 9 Config.A 51-80031 28-Lead Plastic Leaded Chip Carrier J64 51-85001-A Document #: 38-04010 Rev. *B Page 10 of 14 CY7C261 CY7C263/CY7C264 Package Diagrams (continued) 24-Lead (600-Mil) Molded DIP P11 51-85016-A 24-Lead (300-Mil) Molded DIP P13/P13A 51-85013-A Document #: 38-04010 Rev. *B Page 11 of 14 CY7C261 CY7C263/CY7C264 Package Diagrams (continued) 28-Pin Windowed Leadless Chip Carrier Q64 MIL–STD–1835 C–4 51-80102 Document #: 38-04010 Rev. *B Page 12 of 14 CY7C261 CY7C263/CY7C264 Package Diagrams (continued) 24-Lead (600-Mil) Windowed CerDIP W12 MIL-STD-1835 D-3 Config. A 51-80089-** 24-Lead (300-Mil) Windowed CerDIP W14 MIL-STD-1835 D-9 Config. A 51-80086 All product and company names mentioned in this document may be the trademarks of their respective holders. Document #: 38-04010 Rev. *B Page 13 of 14 © Cypress Semiconductor Corporation, 2002. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under patent or other rights. Cypress Semiconductor does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges. CY7C261 CY7C263/CY7C264 Document History Page Document Title: CY7C261 CY7C263/CY7C264 8K x 8 Power Switched and Reprogrammable PROM Document Number: 38-04010 REV. ECN NO. Issue Date Orig. of Change Description of Change ** 113866 3/6/02 DSG Change from Spec number: 38-00005 to 38-04010 *A 118895 10/09/02 GBI Update Ordering Information *B 122251 12/28/02 RBI Add power up requirements to Maximum Ratings information ) Document #: 38-04010 Rev. *B Page 14 of 14