IPS12CN10L G IPP12CN10L G OptiMOS®2 Power-Transistor Product Summary Features • N-channel, logic level • Excellent gate charge x R DS(on) product (FOM) VDS 100 V RDS(on),max 12 mW ID 69 A • Very low on-resistance R DS(on) • 175 °C operating temperature • Pb-free lead plating; RoHS compliant • Qualified according to JEDEC1) for target application • Ideal for high-frequency switching and synchronous rectification Type IPP12CN10L G IPS12CN10L G Package PG-TO220-3 PG-TO251-3-11 Marking 12CN10L 12CN10L Maximum ratings, at T j=25 °C, unless otherwise specified Parameter Symbol Conditions Continuous drain current ID Value T C=25 °C 69 T C=100 °C 49 Pulsed drain current2) I D,pulse T C=25 °C 276 Avalanche energy, single pulse E AS I D=69 A, R GS=25 W 150 Reverse diode dv /dt dv /dt I D=69 A, V DS=80 V, di /dt =100 A/µs, T j,max=175 °C 6 Gate source voltage3) V GS Power dissipation P tot Operating and storage temperature T j, T stg T C=25 °C IEC climatic category; DIN IEC 68-1 1) Unit A mJ kV/µs ±20 V 125 W -55 ... 175 °C 55/175/56 J-STD20 and JESD22 2) see figure 3 3) Tjmax=150°C and duty cycle D=0.01 for Vgs<-5V Rev. 1.03 page 1 2011-09-05 IPS12CN10L G IPP12CN10L G Parameter Values Symbol Conditions Unit min. typ. max. - - 1.2 minimal footprint - - 62 6 cm2 cooling area4) - - 40 Thermal characteristics Thermal resistance, junction - case R thJC Thermal resistance, junction ambient R thJA K/W Electrical characteristics, at T j=25 °C, unless otherwise specified Static characteristics Drain-source breakdown voltage V (BR)DSS V GS=0 V, I D=1 mA 100 - - Gate threshold voltage V GS(th) V DS=V GS, I D=83 µA 1.2 1.84 2.4 Zero gate voltage drain current I DSS V DS=80 V, V GS=0 V, T j=25 °C - 0.1 1 V DS=80 V, V GS=0 V, T j=125 °C - 10 100 V µA Gate-source leakage current I GSS V GS=20 V, V DS=0 V - 1 100 nA Drain-source on-state resistance R DS(on) V GS=4.5 V, I D=34.5 A, (TO220) - 11.7 15.8 mW V GS=10 V, I D=69 A, (TO220) - 9.9 12 V GS=4.5 V, I D=34.5 A, (TO251) - 11.7 15.8 V GS=10 V, I D=69 A, (TO251) - 9.9 11.8 - 1.3 - W 57 113 - S Gate resistance RG Transconductance g fs |V DS|>2|I D|R DS(on)max, I D=69 A 4) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm 2 (one layer, 70 µm thick) copper area for drain connection. PCB is vertical in still air. Rev. 1.03 page 2 2011-09-05 IPS12CN10L G IPP12CN10L G Parameter Values Symbol Conditions Unit min. typ. max. - 4210 5600 - 528 702 Dynamic characteristics Input capacitance C iss Output capacitance C oss Reverse transfer capacitance C rss - 29 - Turn-on delay time t d(on) - 14 - Rise time tr - 9 - Turn-off delay time t d(off) - 39 - Fall time tf - 5 - Gate to source charge Q gs - 16 - Gate to drain charge Q gd - 10 - Switching charge Q sw - 13 - Gate charge total Qg - 58 - Gate plateau voltage V plateau - 3.7 - V Output charge Q oss - 54 - nC - - 69 - - 276 - 1 1.2 V - 101 - ns - 193 - nC V GS=0 V, V DS=50 V, f =1 MHz V DD=50 V, V GS=10 V, I D=34.5 A, R G=1.6 W pF ns Gate Charge Characteristics5) V DD=50 V, I D=69 A, V GS=0 to 10 V V DD=50 V, V GS=0 V nC Reverse Diode Diode continous forward current IS Diode pulse current I S,pulse Diode forward voltage V SD Reverse recovery time t rr Reverse recovery charge Q rr 5) A T C=25 °C V GS=0 V, I F=69 A, T j=25 °C V R=50 V, I F=I S, di F/dt =100 A/µs See figure 16 for gate charge parameter definition Rev. 1.03 page 3 2011-09-05 IPS12CN10L G IPP12CN10L G 1 Power dissipation 2 Drain current P tot=f(T C) I D=f(T C); V GS≥10 V 140 80 70 120 60 100 ID [A] Ptot [W] 50 80 40 60 30 40 20 20 10 0 0 0 50 100 150 200 0 50 TC [°C] 100 150 200 TC [°C] 3 Safe operating area 4 Max. transient thermal impedance I D=f(V DS); T C=25 °C; D =0 Z thJC=f(t p) parameter: t p parameter: D =t p/T 103 101 1 µs 10 µs 102 100 0.5 ZthJC [K/W] ID [A] 100 µs 1 ms 101 10 ms 0.2 0.1 10-1 DC 0.05 0.02 100 0.01 single pulse 10-1 10-2 10-1 100 101 102 103 VDS [V] Rev. 1.03 10-5 10-4 10-3 10-2 10-1 100 tp [s] page 4 2011-09-05 IPS12CN10L G IPP12CN10L G 5 Typ. output characteristics 6 Typ. drain-source on resistance I D=f(V DS); T j=25 °C R DS(on)=f(I D); T j=25 °C parameter: V GS parameter: V GS 250 30 10 V 7.5 V 25 5V 200 3.2 V 20 RDS(on) [mW] 4.5 V ID [A] 150 100 4V 3.5 V 15 4V 4.5 V 10 50 3.5 V 10 V 5 3.2 V 3V 0 0 0 1 2 3 4 5 0 20 40 VDS [V] 60 80 100 ID [A] 7 Typ. transfer characteristics 8 Typ. forward transconductance I D=f(V GS); |V DS|>2|I D|R DS(on)max g fs=f(I D); T j=25 °C parameter: T j 150 160 140 120 100 ID [A] gfs [S] 100 80 60 50 40 175 °C 20 25 °C 0 0 0 2 4 6 VGS [V] Rev. 1.03 0 20 40 60 80 100 120 140 ID [A] page 5 2011-09-05 IPS12CN10L G IPP12CN10L G 9 Drain-source on-state resistance 10 Typ. gate threshold voltage R DS(on)=f(T j); I D=69 A; V GS=10 V V GS(th)=f(T j); V GS=V DS parameter: I D 30 2.5 25 2 830 µA 20 15 VGS(th) [V] RDS(on) [mW] 83 µA 1.5 98 % typ 1 10 0.5 5 0 0 -60 -20 20 60 100 140 180 -60 -20 20 Tj [°C] 60 100 140 180 Tj [°C] 11 Typ. capacitances 12 Forward characteristics of reverse diode C =f(V DS); V GS=0 V; f =1 MHz I F=f(V SD) parameter: T j 104 103 Ciss Coss 103 102 IF [A] C [pF] 175 °C, 98% 25 °C, 98% 25 °C 175 °C Crss 102 101 101 100 0 20 40 60 80 VDS [V] Rev. 1.03 0 0.5 1 1.5 2 VSD [V] page 6 2011-09-05 IPS12CN10L G IPP12CN10L G 13 Avalanche characteristics 14 Typ. gate charge I AS=f(t AV); R GS=25 W V GS=f(Q gate); I D=69 A pulsed parameter: T j(start) parameter: V DD 100 10 8 25 °C 100 °C 80 V VGS [V] IAS [A] 6 150 °C 10 50 V 20 V 4 2 1 0 1 10 100 1000 0 10 tAV [µs] 20 30 40 50 60 Qgate [nC] 15 Drain-source breakdown voltage 16 Gate charge waveforms V BR(DSS)=f(T j); I D=1 mA 115 V GS Qg VBR(DSS) [V] 110 105 V gs(th) 100 95 Q g(th) Q sw Q gs 90 -60 -20 20 60 100 140 Q gate Q gd 180 Tj [°C] Rev. 1.03 page 7 2011-09-05 IPS12CN10L G IPP12CN10L G PG-TO220-3: Outline Rev. 1.03 page 8 2011-09-05 IPS12CN10L G IPP12CN10L G Rev. 1.03 page 9 2011-09-05 IPS12CN10L G IPP12CN10L G Published by Infineon Technologies AG 81726 Munich, Germany © 2011 Infineon Technologies AG All Rights Reserved. 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Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. Rev. 1.03 page 10 2011-09-05