LINER LT6650 Micropower, 400mv reference with rail-to-rail buffer amplifier in sot-23 Datasheet

LT6650
Micropower, 400mV
Reference with Rail-to-Rail
Buffer Amplifier in SOT-23
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DESCRIPTIO
FEATURES
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■
■
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Low Quiescent Current 5.6µA (typical)
Wide Supply Range: 1.4V to 18V
400mV Reference ±1% Maximum Accuracy Over
Temperature at 5V
Rail-to-Rail Buffer Amplifier
0.5% 400mV Maximum Initial Accuracy at 5V
Shunt Configurable
Sinks and Sources Current
Wide Operational Range –40°C to 125°C
Externally Adjustable Output Voltage
Low Profile 1mm 5-lead SOT-23
(ThinSOT™) Package
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APPLICATIO S
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The reference is postpackage-trimmed to increase the
output accuracy. The output can sink and source 200µA
over temperature. Quiescent power dissipation is 28µW.
Stability is ensured with any output capacitor of 1µF or
higher.
The LT6650 is the lowest voltage series reference available
in the 5-lead SOT-23 package.
Battery-Operated Systems
Handheld Instruments
Industrial Control Systems
Data Acquisition Systems
Negative Voltage References
, LTC and LT are registered trademarks of Linear Technology Corporation.
ThinSOT is a trademark of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
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The LT®6650 is a micropower, low voltage 400mV reference. Operating with supplies from 1.4V up to 18V, the
device draws only 5.6µA typical, making it ideal for low
voltage systems as well as handheld instruments and
industrial control systems. With only two resistors the
internal buffer amplifier can scale the 400mV reference to
any desired value up to the supply voltage.
TYPICAL APPLICATIO
Battery-Powered 0.4V Reference
LT6650 Temperature Drift
402
VIN = 1.4V TO 18V
LT6650
IN
VR = 400mV
REFERENCE
+
–
GND
1µF
OUT 5
VOUT
0.4V
REFERENCE VOLTAGE (mV)
IQ ≈ 6µA
4
TYPICAL LT6650 PART
VIN = 5V
NO LOAD
401
SINK 200µA
400
SOURCE –200µA
399
FB 1
2
1µF
6650 TA01a
398
–50 –30 –10 10 30 50 70 90 110 130
TEMPERATURE (°C)
6650 TA01b
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LT6650
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ABSOLUTE
AXI U RATI GS
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PACKAGE/ORDER I FOR ATIO
(Note 1)
TOP VIEW
Total Supply Voltage (VIN to GND)........................... 20V
FB Voltage (Note 2) ....................... 20V to (GND – 0.3V)
Output Voltage (OUT) .................... 20V to (GND – 0.3V)
Output Short-Circuit Duration .......................... Indefinite
FB Input Current ................................................... 10mA
Operating Temperature Range ............... –40°C to 125°C
Specified Temperature Range
LT6650CS5 ............................................. 0°C to 70°C
LT6650IS5 ........................................... –40°C to 85°C
LT6650HS5 (Note 3) ......................... –40°C to 125°C
Maximum Junction Temperature .......................... 150°C
Storage Temperature Range (Note 4) .... –65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
5 OUT
FB 1
GND 2
DNC* 3
4 IN
S5 PACKAGE
5-LEAD PLASTIC TSOT-23
*Do Not Connect
TJMAX = 150°C, θJA = 230°C/W
ORDER PART NUMBER
LT6650CS5
LT6650IS5
LT6650HS5
S5 PART MARKING
LBDV
LBDV
LBDV
Order Options Tape and Reel: Add #TR
Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF
Lead Free Part Marking: http://www.linear.com/leadfree/
The temperature grades are identified by a label on the shipping container.
Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 5V, CIN = 1µF, FB = OUT, no DC load, CL = 1µF, unless
otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
VOUT
Output Voltage (Notes 4, 5)
LT6650
398
–0.5
400
402
0.5
mV
%
VIN
Operating Input Voltage
∆VOUT/∆VIN
Line Regulation
LT6650CS5
●
●
397
–0.75
400
403
0.75
mV
%
LT6650IS5
●
●
396
–1
400
404
1
mV
%
LT6650HS5
●
●
394
–1.5
400
406
1.5
mV
%
1.4
1
150
∆VOUT/∆IOUT
Load Regulation (Note 6)
18
V
6
900
mV
ppm/V
1.4V ≤ VIN ≤ 18V
LT6650CS5, LT6650IS5
●
●
7.5
1130
mV
ppm/V
LT6650HS5
●
●
8.5
1280
mV
ppm/V
–0.04
500
–0.2
2500
–0.4
5000
mV
ppm/mA
mV
ppm/mA
0.24
3000
1
12500
2
20000
mV
ppm/mA
mV
ppm/mA
Sourcing from 0µA to –200µA
●
●
Sinking from 0µA to 200µA
●
●
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LT6650
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 5V, CIN = 1µF, FB = OUT, no DC load, CL = 1µF, unless
otherwise noted.
SYMBOL
PARAMETER
TC
Output Voltage Temperature
Coefficient (Note 10)
∆VDO
Dropout Voltage (Note 7)
CONDITIONS
MIN
●
Referred to VIN = 1.8V, VOUT = 1.4V
(RF = 100k, RG = 39.2k)
∆VOUT = –0.1%, IOUT = 0µA
TYP
30
mV
mV
165
250
350
mV
mV
–300
–150
0
mV
mV
●
ISC
Short-Circuit Output Current
IIN
Supply Current
VOUT Shorted to GND
VOUT Shorted to VIN
5
9
VIN = 18V
11
14
µA
µA
5.9
12
15
µA
µA
1.2
10
15
30
nA
nA
nA
●
FB Pin Input Current
mA
mA
5.6
●
IFB
ppm/°C
100
150
●
∆VOUT = –0.1%, IOUT = 200µA Sinking (Note 11)
UNITS
75
●
∆VOUT = –0.1%, IOUT = –200µA Sourcing
MAX
VFB = VOUT = 400mV
LT6650CS5, LT6650IS5
LT6650HS5
●
●
TON
Turn-On Time
CLOAD = 1µF
0.5
ms
en
Output Noise (Note 8)
0.1Hz ≤ ƒ ≤ 10Hz
10Hz ≤ ƒ ≤ 1KHz, IOUT = –200µA Sourcing
20
23
µVP-P
µVRMS
VHYS
Hysteresis (Note 9)
∆T = 0°C to 70°C
∆T = –40°C to 85°C
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: The FB pin is protected by an ESD diode to the ground. If the FB
input voltage exceeds –0.3V below ground, the FB input current should be
limited to less than 10mA. If the FB input voltage is greater than 5V, the FB
input current is expected to meet specified performance from Typical
Performance Characteristics but is not tested or QA sampled at this
voltage.
Note 3: If the part is operating at temperatures above 85°C, it is
recommended to enhance the stability margin by using an output
capacitor greater than 10µF or a series RC combination having a 100µs
equivalent time constant. See Application section for details.
Note 4: If the part is stored outside of the specified temperature range, the
output voltage may shift due to hysteresis.
Note 5: ESD (Electrostatic Discharge) sensitive devices. Extensive use of
ESD protection devices are used internal to the LT6650; however, high
electrostatic discharge can damage or degrade the device. Use proper ESD
handling precautions.
●
●
●
●
0.1
250
0.24
600
mV
ppm
mV
ppm
Note 6: Load regulation is measured on a pulse basis from no load to the
specified load current. Output changes due to die temperature change
must be taken into account separately.
Note 7: Dropout Voltage is (VIN – VOUT) when VOUT falls to 0.1% below its
nominal value at VIN = 1.8V.
Note 8: Peak-to-Peak noise is measured with a single pole highpass filter
at 0.1Hz and a 2-pole lowpass filter at 10Hz. The unit is enclosed in a still
air environment to eliminate thermocouple effects on the leads. The test
time is 10 seconds.
Note 9: Hysteresis in the output voltage is created by package stress that
differs depending on whether the IC was previously at a higher or lower
temperature. Output voltage is always measured at 25°C, but the IC is
cycled to 85°C or –40°C before a successive measurement. Hysteresis is
roughly proportional to the square of the temperature change.
Note 10: Temperature coefficient is measured by dividing the change in
output voltage by the specified temperature range.
Note 11: This feature guarantees the shunt mode operation of the device.
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LT6650
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TYPICAL PERFOR A CE CHARACTERISTICS
Output Voltage Temperature
Drift
404
(See Applications, Figure 1)
Output Voltage Temperature
Drift
403
TYPICAL PART
Supply Current vs Input Voltage
10
THREE PARTS
VIN = 5V
403
8
OUTPUT VOLTAGE (mV)
OUTPUT VOLTAGE (mV)
401
VIN = 1.4V
400
399
VIN = 18V
398
VIN = 5V
SUPPLY CURRENT (µA)
402
402
401
400
125°C
6
25°C
4
–55°C
399
2
398
–60 –40 –20 0 20 40 60 80 100 120
TEMPERATURE (°C)
0
397
396
–60 –40 –20 0 20 40 60 80 100 120
TEMPERATURE (°C)
6650 G01
Supply Current vs Input Voltage
–55°C
2
0
404
403
403
402
TA = 125°C
401
TA = –55°C
400
TA = 25°C
399
398
0
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
INPUT VOLTAGE (V)
2
4
6
8
10 12 14
INPUT VOLTAGE (V)
16
Load Regulation (Sourcing)
1000
–30
–55°C
–40
400
TA = 25°C
–50
–60
–70
–80
–90
TA = 125°C
398
0.8
18
1.0
1.2
1.6
1.4
INPUT VOLTAGE (V)
700
–55°C
25°C
500
400
2.0
Minimum Input-Output Voltage
Differential (Sourcing)
800
600
1.8
6650 G06
500
TYPICAL PART
VIN = 5V
900
OUTPUT VOLTAGE CHANGE (µV)
OUTPUT VOLTAGE CHANGE (µV)
25°C
125°C
–20
TA = –55°C
Load Regulation (Sinking)
TYPICAL PART
VIN = 5V
–10
401
6550 G05
6650 G04
0
402
399
INPUT-OUTPUT VOLTAGE (mV)
4
6 8 10 12 14 16 18 20
INPUT VOLTAGE (V)
Line Regulation
404
OUTPUT VOLTAGE (mV)
OUTPUT VOLTAGE (mV)
SUPPLY CURRENT (µA)
25°C
4
6650 G03
Line Regulation
125°C
6
2
6650 G02
10
8
0
125°C
300
200
VOUT = 1.425V - TYP (RF = 100k, RG = 39.2k)
0.1% VOUT
400
125°C
300
25°C
200
–55°C
100
100
–100
0
10
100
OUTPUT CURRENT (µA)
1000
6650 G07
0
10
100
OUTPUT CURRENT (µA)
1000
6650 G08
10
100
OUTPUT CURRENT (µA)
1000
6650 G09
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TYPICAL PERFOR A CE CHARACTERISTICS
Minimum Input-Output Voltage
Differential (Sinking)
Output Short-Circuit Current vs
Input Voltage
14
VOUT = 1.425V - TYP (RF = 100k, RG = 39.2k)
0.1% VOUT
Output Short-Circuit Current vs
Input Voltage
14
OUTPUT SHORTED TO GND
–55°C
–200
25°C
–300
10
125°C
8
25°C
6
–400
OUTPUT SHORTED TO VIN
12
OUTPUT CURRENT (mA)
12
–100
OUTPUT CURRENT (mA)
INPUT-OUTPUT VOLTAGE (mV)
0
(See Applications, Figure 1)
4
25°C
125°C
10
–55°C
8
6
4
–55°C
125°C
–500
100
OUTPUT CURRENT(µA)
2
1000
0
2
4
6650 G10
FB PIN CURRENT (nA)
0
–4
VFB ≠ VOUT
CURRENT IS POSITIVE WHEN
IT ENTERS THE DEVICE
125°C
1
0.1
25°C
–8
25°C
–10
–0.6 –0.4 –0.2 0 0.2 0.4 0.6
FB PIN VOLTAGE (V)
0.8
1.0
–55°C
0.01
1
3
5
7
9 11 13 15
FB PIN VOLTAGE (V)
17
120
120
100
100
80
80
60
GAIN
19
40
20
20
Output Noise 0.1Hz to 10Hz
–20
1
10
FREQUENCY (kHz)
VIN = 5V
NOISE LEVEL (µV/√Hz)
Integrated Noise 10Hz to 1kHz
100
VIN = 5V
CL = 1µF
15
10
IOUT = 0µA
–40
100
6650 G15
Output Voltage Noise Spectrum
20
OUTPUT NOISE (5µV/DIV)
0
6650 G14
6650 G13
60
PHASE
40
0 T = 25°C
A
UNITY GAIN
–20 R = 2k
L
CL = 1µF
–40
0.01
0.1
–55°C
–6
6 8 10 12 14 16 18 20
INPUT VOLTAGE (V)
PHASE (DEG)
FB PIN CURRENT (nA)
VFB ≠ VOUT
8 CURRENT IS POSITIVE WHEN
IT ENTERS THE DEVICE
6
–2
4
Gain and Phase vs Frequency
GAIN (dB)
10
125°C
2
6650 G12
FB Pin Current vs FB Pin Voltage
10
4
0
6650 G11
FB Pin Current vs FB Pin Voltage
2
2
6 8 10 12 14 16 18 20
INPUT VOLTAGE (V)
IOUT = –200µA
5
INTEGRATED NOISE (µVRMS)
10
VIN = 5V
CL = 1µF
IOUT = –200µA
10
IOUT = –40µA
0
0
1
2
3
4 5 6
TIME (s)
7
8
9
10
6650 G16
10
100
1k
FREQUENCY (Hz)
10k
6650 G17
1
10
100
FREQUENCY (Hz)
1k
6650 G18
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LT6650
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TYPICAL PERFOR A CE CHARACTERISTICS
IOUT = 0µA
RZ = 0Ω
CL = 10µF
100
OUTPUT IMPEDANCE (Ω)
CL = 1µF
10
CL = 47µF
1
IOUT = –40µA
RZ = 0Ω
100
CL = 10µF
CL = 1µF
CL = 47µF
10
1
100
1k
10k
FREQUENCY (Hz)
100k
100
1k
10k
FREQUENCY (Hz)
6650 G19
POWER SUPPLY REJECTION RATIO (dB)
POWER SUPPLY REJECTION RATIO (dB)
CL = 10µF
CL = 1µF
–20
–30
–40
–50
CL = 47µF
–60
–70
–80
100
1k
10k
FREQUENCY (Hz)
IOUT = –40µA
10 RZ = 0Ω
0
CL = 10µF
CL = 1µF
–10
CL = 47µF
–20
–30
–40
–50
–60
–70
100k
Power Supply Rejection Ratio vs
Frequency
–60
CL = 47µF
–70
–80
100
1k
10k
FREQUENCY (Hz)
100
1k
10k
FREQUENCY (Hz)
100k
6650 G25
0
–10
CL = 1µF
–20
–30
CL = 10µF
–40
–50
CL = 47µF
–60
–70
100k
10
100
1k
10k
FREQUENCY (Hz)
–20
CL = 10µF
–30
–40
CL = 1µF
–50
100k
6650 G24
Power Supply Rejection Ratio vs
Frequency
20
IOUT = –40µA
10 RZ = 0Ω
C = 1µF
0 RIN = 1k
IN
–10
CL = 47µF
–60
–70
–80
10
IOUT = 0µA
10 CL • RZ = 100µs
Power Supply Rejection Ratio vs
Frequency
POWER SUPPLY REJECTION RATIO (dB)
–50
100k
6650 G21
20
–40
1k
10k
FREQUENCY (Hz)
6650 G23
20
CL = 1µF
100
–80
10
Power Supply Rejection Ratio vs
Frequency
–30
CL = 47µF
20
6650 G22
IOUT = 0µA
10 RZ = 0Ω
C = 1µF
0 RIN = 1k
IN
–10
CL = 10µF
–20
10
10
–80
10
CL = 10µF
100k
20
0
100
Power Supply Rejection Ratio vs
Frequency
20
–10
CL = 1µF
6650 G20
Power Supply Rejection Ratio vs
Frequency
IOUT = 0µA
10 RZ = 0Ω
IOUT = 0µA
CL • RZ = 100µs
1
10
POWER SUPPLY REJECTION RATIO (dB)
10
POWER SUPPLY REJECTION RATIO (dB)
Output Impedance vs Frequency
1000
POWER SUPPLY REJECTION RATIO (dB)
OUTPUT IMPEDANCE (Ω)
Output Impedance vs Frequency
1000
OUTPUT IMPEDANCE (Ω)
Output Impedance vs Frequency
1000
(See Applications, Figure 1)
IOUT = 0µA
10 CL • RZ = 100µs
C = 1µF
0 RIN = 1k
IN
–10
–20
CL = 10µF
–30
CL = 1µF
–40
–50
CL = 47µF
–60
–70
–80
10
100
1k
10k
FREQUENCY (Hz)
100k
6650 G26
10
100
1k
10k
FREQUENCY (Hz)
100k
6650 G27
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LT6650
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FB (Pin 1): Resistor Divider Feedback Pin. Connect a
resistor divider from OUT to GND and the center tap to FB.
This pin sets the output potential.
GND (Pin 2): Ground Connection.
DNC (Pin 3): Do not connect. Connected internally for post
package trim. This pin must be left unconnected.
IN (Pin 4): Positive Supply. Bypassing with a 1µF capacitor
is recommended if the output loading changes.
OUT (Pin 5): Reference Output. The output sources and
sinks current. It is stable with any load capacitor with a
total capacitance of 1µF or more. Higher load capacitance
improves load transient response.
W
BLOCK DIAGRA
IN
4
VR = 400mV
REFERENCE
LT6650
+
5 OUT
–
DNC 3
1 FB
2
6650 BD
GND
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APPLICATIO S I FOR ATIO
Long Battery Life
The LT6650 is a micropower, adjustable reference which
operates from supply voltages ranging from 1.4V to 18V.
The series regulated output may be configured with external resistors to any voltage from 400mV to nearly the
supply potential. Under no-load conditions, the LT6650
dissipates only 8µW when operating on a 1.4V supply.
Other operating configurations allow the LT6650 to be
used as a micropower positive or negative adjustable
shunt reference from 1.4V to 18V.
Bypass and Load Capacitor
The LT6650 voltage reference requires a 1µF or greater
output capacitance for proper operation. This capacitance
may be provided by either a single capacitor connected
between OUT and GND or formed by the aggregate of
several capacitors that may be serving other decoupling
functions. Output impedance can be reduced by DC loading of the output by 40µA to 200µA, and/or adding an RZ
to the output capacitor for a 100µs time constant as shown
in Figure 1 and the Typical Performance Characteristics
graphs.
The LT6650 Voltage reference should have an input bypass capacitor of 0.1µF or larger. When the circuit is
RIN
VIN
IN
CIN
4
5
OUT
CL
LT6650
1
2
VOUT
FB
RZ
6650 F01
GND
Figure 1. LT6650 Input-Output Configuration
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APPLICATIO S I FOR ATIO
operated from a small battery or other relatively high
impedance source, a minimum 1µF capacitor is recommended. PSRR can be significantly enhanced by adding a
low-pass RC filter on the input, with a time-constant of
1ms or higher, as shown in Figure 1. The Typical Performance Characteristics graphs show performance as a
function of several combinations of input and output
capacitance.
the same circuit responding to input transients of 0.5V,
settling in about 0.3ms. Figures 5 through 7 show the
same circuit responding to various load steps: changes
between ±100µA in Figure 5; sourcing current step between –100µA and –200µA in Figure 6; and sinking current
VIN
3V
2.5V
An input RC of 100ms or more is recommended (such as
5k and 22µF) when output transients must be minimized
in the face of high supply noise, such as in automotive
applications. Figure 2 shows an input filter structure that
effectively eliminates supply transients from affecting the
output. With this extra input decoupling and the LT6650
operating normally from a 12V bus, 50V transients induce
less than <0.5% VOUT perturbations.
VOUT
0.4V
0V
Figure 3 shows the turn-on response time for the circuit in
Figure 1. The input voltage steps from 0V to 3V, and the
output is configured to produce 400mV. Input bypass and
output load capacitance are 1µF, RIN = 0Ω, RZ = 0Ω, and
the output settles in approximately 0.5ms. Figure 4 shows
VOUT
10mV/DIV
SINKING
6650 F04
Figure 4. Output Response to ±0.5V Input Step
SOURCING
IOUT
100µA
SINKING
NOISY
POWER BUS
33k
2ms/DIV
100µA
SOURCING
4.7k
VIN
1µF
6650 F05
1N751
5V
22µF
Figure 5. Output Response to Bidirectional Load Step
(100µA to –100µA)
6650 F02
Figure 2. High Noise-Immunity Input Network
VOUT
10mV/DIV
AC
VIN
3V
IOUT
–100µA
VOUT
–200µA
0.4V
0V
0V
6650 F06
0.2ms/DIV
6650 F03
Figure 3. LT6650 Turn-On Characteristic
Figure 6. Output Response to Current-Sourcing Load Step
(–100µA to –200µA)
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APPLICATIO S I FOR ATIO
step between 100µA and 200µA in Figure 7. Load step settling
occurs in about 0.5ms or less (to ±0.2%).
Output Adjustment
If the LT6650 is to be used as a 400mV reference, then the
output and feedback pins may be tied together without any
scale-setting components as shown in the front-page
application circuit. Setting the output to any higher voltage
is a simple matter of selecting two feedback resistors to
configure the non-inverting gain of the internal operational
amplifier, as shown in Figure 8. A feedback resistor RF is
connected between the OUT pin and the FB pin, and a gain
resistor RG is connected from the FB pin to GND. The
resistor values are related to the output voltage by the
following relationship:
RF = RG • (VOUT – 0.4)/(0.4 – IFB • RG)
The IFB term represents the FB pin bias current, and can
generally be neglected when RG is 100k or less. For
RG ≤ 20k, even worst-case IFB can be neglected (error
contribution <0.15%). Since the VOUT error distribution
increases at twice the resistor tolerance, high accuracy
resistors or resistor networks are recommended. The
output voltage may be set to any level from 400mV up to
350mV below the supply voltage with source or sink
capability.
Noise Reduction Capacitor
In applications involving the use of resistive feedback for
reference scaling, the intrinsic reference noise is amplified
along with the DC level. To minimize noise amplification,
the use of a 1nF feedback capacitor is recommended, as
shown in Figure 8 and other circuits with scaling resistors.
Shunt Reference Operation
The circuits shown in Figure 9 and Figure 10 form adjustable shunt references. Along with the external bias resistor
RB, the LT6650 provides positive or negative reference
operation for outputs between 1.4V and 18V (positive or
negative). Just like a Zener diode, a supply VS is required,
somewhat higher in magnitude than the desired reference
VS
VOUT
10mV/DIV
AC
RB
VOUT = 0.4V • (1 + RF/RG)
4
IN
OUT
IOUT
LT6650
200µA
FB
RF
1
10µF
GND
RG
2
100µA
VOUT
1nF
5
6650 F09
6650 F07
Figure 7. Output Response to Current-Sinking Load Step
(100µA to 200µA)
4
VOUT = 0.4V • (1 + RF/RG)
1k
VS
4
1µF
OUT
LT6650
GND
FB
VOUT
1nF
5
IN
Figure 9. Typical Configuration of LT6650 as Adjustable Positive
Shunt Reference
OUT
LT6650
RF
GND
1
1µF
1nF
5
IN
2
FB
RF
1
10µF
RG
VOUT
RG
2
RB
VOUT = –0.4V • (1 + RF/RG)
6650 F08
–VS
Figure 8. Typical Configuration for Output Voltages
Greater than 0.4V
6650 F10
Figure 10. Typical Configuration of LT6650 as Adjustable
Negative Shunt Reference
6650fa
9
LT6650
U
W
U
U
APPLICATIO S I FOR ATIO
VOUT. RB must be within the following range for proper
operation (the optimal value depends greatly on the direction and magnitude of the load current):
RB > |VS – VOUT|/(200µA + 0.4/RG)
RB < |VS – VOUT|/(15µA + 0.4/RG)
Limits of Operation
Hysteresis
Due to various mechanical stress mechanisms inherent to
integrated-circuit packaging, internal offsets may not precisely recover from variations that occur over temperature, and this effect is referred to as hysteresis. Proprietary
manufacturing steps minimize this hysteresis, though
some small residual error can occur. Hysteresis measurements for the LT6650 can be seen in Figures 11 and 12.
Figure 11 presents the worst-case data taken on parts
subjected to thermal cycling between 0°C to 70°C, while
Figure 12 shows data for –40°C to 85°C cycling. Units
were cycled several times over these temperature ranges
and the largest changes are shown. As would be expected,
6
the parts cycled over the higher temperature extremes
exhibit a broader hysteresis distribution. The worst hysteresis measurements indicate voltage shifts of less than
1000ppm (0.1%) from their initial value.
The LT6650 is a robust bipolar technology part. ESD
clamp diodes are integrated into the design and are
depicted in the Simplified Schematic for reference. Diodes
are included between the GND pin and the IN, OUT, and FB
pins to prevent reverse voltage stress on the device.
Unusual modes of operation that forward-bias any these
diodes should limit current to 10mA to avoid permanent
damage to the device. The LT6650 is fabricated using a
relatively high-voltage process, allowing any pin to independently operate at up to 20V with respect to GND. The
part does not include any over voltage protection mechanisms; therefore caution should be exercised to avoid
inadvertent application of higher voltages in circuits involving high potentials.
7
LIGHT COLUMNS 0°C TO 25°C
DARK COLUMNS 70°C TO 25°C
6
NUMBER OF UNITS
NUMBER OF UNITS
5
4
3
2
1
0
–400
LIGHT COLUMNS –40°C TO 25°C
DARK COLUMNS 85°C TO 25°C
5
4
3
2
1
–200
200
400
0
DISTRIBUTION (ppm)
600
6650 F11
Figure 11. Worst-Case 0°C to 70°C Hysteresis
0
–1000 –750 –500 –250 0 250 500 750 1000
DISTRIBUTION (ppm)
6650 F12
Figure 12. Worst-Case –40°C to 85°C Hysteresis
6650fa
10
LT6650
W
W
SI PLIFIED SCHE ATIC
4 IN
IN
IN
5 OUT
IN
2 GND
1 FB
6650 SS
U
PACKAGE DESCRIPTIO
S5 Package
5-Lead Plastic TSOT-23
(Reference LTC DWG # 05-08-1635 Rev B)
0.62
MAX
0.95
REF
2.90 BSC
(NOTE 4)
1.22 REF
3.85 MAX 2.62 REF
1.4 MIN
2.80 BSC
1.50 – 1.75
(NOTE 4)
PIN ONE
RECOMMENDED SOLDER PAD LAYOUT
PER IPC CALCULATOR
0.30 – 0.45 TYP
5 PLCS (NOTE 3)
0.95 BSC
0.80 – 0.90
0.20 BSC
0.01 – 0.10
1.00 MAX
DATUM ‘A’
0.30 – 0.50 REF
0.09 – 0.20
(NOTE 3)
NOTE:
1. DIMENSIONS ARE IN MILLIMETERS
2. DRAWING NOT TO SCALE
3. DIMENSIONS ARE INCLUSIVE OF PLATING
4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR
5. MOLD FLASH SHALL NOT EXCEED 0.254mm
6. JEDEC PACKAGE REFERENCE IS MO-193
1.90 BSC
S5 TSOT-23 0302 REV B
6650fa
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
11
LT6650
U
TYPICAL APPLICATIO
Adjustable Micropower “Zener” 2-Terminal Reference
CATHODE
4
CATHODE
5
IN
1nF
OUT
LT6650
FB
RF
1
GND
10µF
=
1.4V ≤ VZ ≤ 18V
30µA ≤ IZ ≤ 220µA
VZ = 0.4V • (1 + RF/RG)
RG
2
ANODE
ANODE
6650 TA02
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LT1790
Micropower LDO Precision Reference
0.05% Max Sources/Sinks-Current Available in SOT-23
LT1460
Micropower Precision Reference
0.075% Max 10ppm/ºC Available in SOT-23
LT1461
Micropower LDO Low TC Precision Reference
0.04% Max 3ppm/ºC 35µA Supply Current
LT1494/LT1495/
LT1496
Single/Dual/Quad Micropower Op Amps
1.5µA, VOS < 375µV, IB < 1000pA
LTC1540
Nanopower Comparator with Reference
300nA, Available in 3mm × 3mm DFN Package
LTC1798
Micropower LDO Reference
0.15% Max 6.5µA Supply Current
LT6700
Micropower Dual Comparator with Reference
6.5µA, Choice of Polarities Available in SOT-23
6650fa
12
Linear Technology Corporation
LT/LT 1005 • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear.com
© LINEAR TECHNOLOGY CORPORATION 2003