Atmel ATmega169A/PA/329A/PA/3290A/PA/649A/P/6490A/P 8-bit Atmel Microcontroller with 16/32/64KB In-System Programmable Flash SUMMARY Features • • • • • • • • • • • High performance, low power Atmel® AVR® 8-Bit Microcontroller Advanced RISC architecture – 130 powerful instructions – most single clock cycle execution – 32 × 8 general purpose working registers – Fully static operation – Up to 16MIPS throughput at16MHz (Atmel ATmega169A/169PA/649A/649P) – Up to 20 MIPS throughput at 20MHz (Atmel ATmega329A/329PA/3290A/3290PA/6490A/6490P) – On-chip 2-cycle multiplier High endurance non-volatile memory segments – In-system self-programmable flash program memory • 16Kbytes (Atmel ATmega169A/ATmega169PA) • 32Kbytes (Atmel ATmega329A/ATmega329PA/ATmega3290A/ATmega3290PA) • 64Kbytes (Atmel ATmega649A/ATmega649P/ATmega6490A/ATmega6490P) – EEPROM • 512bytes (ATmega169A/ATmega169PA) • 1Kbytes (ATmega329A/ATmega329PA/ATmega3290A/ATmega3290PA) • 2Kbytes (ATmega649A/ATmega649P/ATmega6490A/ATmega6490P) – Internal SRAM • 1Kbytes (ATmega169A/ATmega169PA) • 2Kbytes (ATmega329A/ATmega329PA/ATmega3290A/ATmega3290PA) • 4Kbytes (ATmega649A/ATmega649P/ATmega6490A/ATmega6490P) – Write/erase cyles: 10,000 flash/100,000 EEPROM – Data retention: 20 years at 85°C/100 years at 25°C (1) – Optional Boot Code Section with Independent Lock Bits • In-System Programming by On-chip Boot Program • True read-while-write operation – Programming lock for software security Atmel QTouch® library support – Capacitive touch buttons, sliders and wheels – Atmel QTouch and QMatrix acquisition – Up to 64 sense channels JTAG (IEEE std. 1149.1 compliant) Interface – Boundary-scan capabilities according to the JTAG standard – Extensive on-chip debug support – Programming of Flash, EEPROM, Fuses, and Lock Bits through the JTAG Interface Peripheral features – 4 × 25 segment LCD driver (ATmega169A/ATmega169PA/ATmega329A/ATmega329PA/ATmega649A/ATmega649P) – 4 × 40 segment LCD driver (ATmega3290A/ATmega3290PA/ATmega6490A/ATmega6490P) – Two 8-bit Timer/Counters with Separate Prescaler and Compare mode – One 16-bit Timer/Counter with Separate Prescaler, Compare mode, and Capture mode – Real Time Counter with separate oscillator – Four PWM channels – 8-channel, 10-bit ADC – Programmable Serial USART – Master/Slave SPI Serial Interface – Universal Serial Interface with Start Condition Detector – Programmable Watchdog Timer with Separate On-chip oscillator – On-chip analog comparator – Interrupt and Wake-up on pin change Special microcontroller features – Power-on reset and programmable Brown-out detection – Internal calibrated oscillator – External and internal interrupt sources – Five sleep modes: Idle, ADC Noise Reduction, Power-save, Power-down, and Standby I/O and packages – 54/69 programmable I/O lines – 64/100-lead TQFP, 64-pad QFN/MLF, and 64-pad DRQFN Speed Grade: – ATmega169A/169PA/649A/649P: • 0 - 16MHz @ 1.8 - 5.5V – ATmega3290A/3290PA/6490A/6490P: • 0 - 20MHz @ 1.8 - 5.5V Temperature range: – -40°C to 85°C industrial Ultra-low power consumption (picoPower® devices) – Active mode: • 1MHz, 1.8V: 215µA • 32kHz, 1.8V: 8µA (including oscillator) • 32kHz, 1.8V: 25µA (including oscillator and LCD) – Power-down mode: • 0.1µA at 1.8V – Power-save mode: • 0.6µA at 1.8V (Including 32kHz RTC) • 750nA at 1.8V 8284ES–AVR–02/2013 1. Pin configurations Pinout - 64A (TQFP) and 64M1 (QFN/MLF) LCDCAP 1 (RXD/PCINT0) PE0 2 GND AREF PF0 (ADC0) PF1 (ADC1) PF2 (ADC2) PF3 (ADC3) PF4 (ADC4/TCK) PF5 (ADC5/TMS) PF6 (ADC6/TDO) PF7 (ADC7/TDI) GND VCC PA0 (COM0) PA1 (COM1) PA2 (COM2) 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 Pinout Atmel ATmega169A/ATmega169PA/ATmega329A/ATmega329PA/ATmega649A/ATmega649P. AVCC Figure 1-1. 64 1.1 48 PA3 (COM3) 47 PA4 (SEG0) INDEX CORNER (SCK/PCINT9) PB1 11 38 PC3 (SEG9) (MOSI/PCINT10) PB2 12 37 PC2 (SEG10) (MISO/PCINT11) PB3 13 36 PC1 (SEG11) (OC0A/PCINT12) PB4 14 35 PC0 (SEG12) (OC1A/PCINT13) PB5 15 34 PG1 (SEG13) (OC1B/PCINT14) PB6 16 33 PG0 (SEG14) (SEG15) PD7 32 39 PC4 (SEG8) (SEG16) PD6 31 10 (SEG17) PD5 30 (SS/PCINT8) PB0 29 40 PC5 (SEG7) (SEG18) PD4 9 28 (CLKO/PCINT7) PE7 (SEG19) PD3 41 PC6 (SEG6) 27 8 (SEG20) PD2 (DO/PCINT6) PE6 26 42 PC7 (SEG5) (INT0/SEG21) PD1 7 25 (DI/SDA/PCINT5) PE5 (ICP1/SEG22) PD0 43 PG2 (SEG4) 24 6 (TOSC1) XTAL1 (USCK/SCL/PCINT4) PE4 23 44 PA7 (SEG3) (TOSC2) XTAL2 5 22 (AIN1/PCINT3) PE3 GND 45 PA6 (SEG2) VCC 21 4 RESET/PG5 20 (XCK/AIN0/PCINT2) PE2 (T0/SEG23) PG4 19 46 PA5 (SEG1) (T1/SEG24) PG3 18 3 (OC2A/PCINT15) PB7 17 (TXD/PCINT1) PE1 ATmega169A/PA/329A/PA/649A/P/3290A/PA/6490A/P [SUMMARY] 8284ES–AVR–02/2013 2 1.2 Pinout - 100A (TQFP) Figure 1-2. Pinout Atmel ATmega3290A/ATmega3290PA/ATmega6490A/ATmega6490P. AVCC AGND AREF PF0 (ADC0) PF1 (ADC1) PF2 (ADC2) PF3 (ADC3) PF4 (ADC4/TCK) PF5 (ADC5/TMS) PF6 (ADC6/TDO) PF7 (ADC7/TDI) DNC DNC PH7 (PCINT23/SEG36) PH6 (PCINT22/SEG37) PH5 (PCINT21/SEG38) PH4 (PCINT20/SEG39) DNC DNC GND VCC DNC PA0 (COM0) PA1 (COM1) PA2 (COM2) 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 TQFP LCDCAP 1 75 PA3 (COM3) (RXD/PCINT0) PE0 2 74 PA4 (SEG0) 73 PA5 (SEG1) INDEX CORNER (TXD/PCINT1) PE1 3 (XCK/AIN0/PCINT2) PE2 4 72 PA6 (SEG2) (AIN1/PCINT3) PE3 5 71 PA7 (SEG3) (USCK/SCL/PCINT4) PE4 6 70 PG2 (SEG4) (DI/SDA/PCINT5) PE5 7 69 PC7 (SEG5) Note: (DO/PCINT6) PE6 8 68 PC6 (SEG6) (CLKO/PCINT7) PE7 9 67 DNC VCC 10 66 PH3 (PCINT19/SEG7) GND 11 65 PH2 (PCINT18/SEG8) 45 46 47 48 49 50 (SEG23) PD3 (SEG22) PD4 (SEG21) PD5 (SEG20) PD6 (SEG19) PD7 PG0 (SEG18) 44 51 (SEG24) PD2 25 (INT0/SEG25) PD1 (OC1B/PCINT14) PB6 43 PG1 (SEG17) (ICP1/SEG26) PD0 52 42 24 DNC PC0 (SEG16) (OC1A/PCINT13) PB5 41 53 (PCINT30/SEG27) PJ6 23 40 PC1 (SEG15) (OC0A/PCINT12) PB4 (PCINT29/SEG28) PJ5 54 (PCINT28/SEG29) PJ4 22 39 PC2 (SEG14) (MISO/PCINT11) PB3 38 55 (PCINT27/SEG30) PJ3 21 37 PC3 (SEG13) (MOSI/PCINT10) PB2 (PCINT26/SEG31) PJ2 (SCK/PCINT9) PB1 56 36 PC4 (SEG12) 20 DNC 57 35 19 DNC PC5 (SEG11) (SS/PCINT8) PB0 (TOSC1) XTAL1 58 34 18 33 DNC DNC (TOSC2) XTAL2 59 32 DNC 17 GND 60 DNC 31 DNC 30 DNC 16 VCC 61 RESET/PG5 15 29 DNC DNC (T0/SEG32) PG4 62 28 14 (T1/SEG33) PG3 PH0 (PCINT16/SEG10) (PCINT25/SEG34) PJ1 27 PH1 (PCINT17/SEG9) 63 26 64 13 DNC 12 (OC2A/PCINT15) PB7 DNC (PCINT24/SEG35) PJ0 The large center pad underneath the QFN/MLF packages is made of metal and internally connected to GND. It should be soldered or glued to the board to ensure good mechanical stability. If the center pad is left unconnected, the package might loosen from the board. ATmega169A/PA/329A/PA/649A/P/3290A/PA/6490A/P [SUMMARY] 8284ES–AVR–02/2013 3 Pinout - 64MC (DRQFN) Pinout Atmel ATmega169A/ATmega169PA. A4 A22 B4 B19 A21 A5 B5 B18 B6 A20 B17 A6 A7 A19 B16 A18 A34 B29 A33 B30 A31 B28 A32 B26 A30 B27 A3 B3 B20 A22 A4 B4 A5 B19 A21 B18 B5 A6 A20 B17 A19 B6 B16 B7 A7 A8 A18 A17 A16 B15 B8 A10 B9 A11 B10 A12 B11 A13 B12 A14 B13 A15 B14 A9 A2 A17 B15 B7 A8 B2 A23 A9 B3 A23 B20 B1 A10 B8 B21 B22 A24 B21 B10 A11 B9 B2 A3 A1 A25 A13 B11 A12 B22 A24 A16 B14 A15 A25 B1 A2 Table 1-1. A26 A26 A1 B23 A27 B24 Bottom view A27 B23 A34 B30 A33 B29 A32 B28 A31 B27 A30 B26 A29 B25 A28 B24 Top view A28 B25 A29 Figure 1-3. B13 A14 B12 1.3 DRQFN-64 Pinout ATmega169A/ATmega169PA. A1 PE0 A9 PB7 A18 PG1 (SEG13) A26 PA2 (COM2) B1 VLCDCAP B8 PB6 B16 PG0 (SEG14) B23 PA3 (COM3) A2 PE1 A10 PG3 A19 PC0 (SEG12) A27 PA1 (COM1) B2 PE2 B9 PG4 B17 PC1 (SEG11) B24 PA0 (COM0) A3 PE3 A11 RESET A20 PC2 (SEG10) A28 VCC B3 PE4 B10 VCC B18 PC3 (SEG9) B25 GND A4 PE5 A12 GND A21 PC4 (SEG8) A29 PF7 B4 PE6 B11 XTAL2 (TOSC2) B19 PC5 (SEG7) B26 PF6 A5 PE7 A13 XTAL1 (TOSC1) A22 PC6 (SEG6) A30 PF5 B5 PB0 B12 PD0 (SEG22) B20 PC7 (SEG5) B27 PF4 A6 PB1 A14 PD1 (SEG21) A23 PG2 (SEG4) A31 PF3 B6 PB2 B13 PD2 (SEG20) B21 PA7 (SEG3) B28 PF2 A7 PB3 A15 PD3 (SEG19) A24 PA6 (SEG2) A32 PF1 B7 PB5 B14 PD4 (SEG18) B22 PA4 (SEG0) B29 PF0 A8 PB4 A16 PD5 (SEG17) A25 PA5 (SEG1) A33 AREF B15 PD7 (SEG15) B30 AVCC A17 PD6 (SEG16) A34 GND ATmega169A/PA/329A/PA/649A/P/3290A/PA/6490A/P [SUMMARY] 8284ES–AVR–02/2013 4 2. Overview The Atmel ATmega169A/169PA/329A/329PA/3290A/3290PA/649A/649P/6490A/6490P is a low-power CMOS 8-bit microcontroller based on the Atmel®AVR® enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the ATmega169A/169PA/329A/329PA/3290A/3290PA/649A/649P/6490A/6490P achieves throughputs approaching 1 MIPS per MHz allowing the system designer to optimize power consumption versus processing speed. Block diagram GND Block diagram. PF0 - PF7 VCC PA0 - PA7 DATA DIR. REG. PORTF DATA REGISTER PORTF PC0 - PC7 PORTA DRIVERS PORTF DRIVERS PORTC DRIVERS DATA DIR. REG. PORTA DATA REGISTER PORTA XTAL2 Figure 2-1. XTAL1 2.1 DATA REGISTER PORTC DATA DIR. REG. PORTC 8-BIT DATA BUS AVCC AGND CALIB. OSC ADC INTERNAL OSCILLATOR AREF WATCHDOG TIMER ON-CHIP DEBUG PROGRAM FLASH SRAM MCU CONTROL REGISTER BOUNDARYSCAN INSTRUCTION REGISTER TIMING AND CONTROL LCD CONTROLLER/ DRIVER TIMER/ COUNTERS GENERAL PURPOSE REGISTERS X PROGRAMMING LOGIC INSTRUCTION DECODER CONTROL LINES + - INTERRUPT UNIT ALU EEPROM STATUS REGISTER AVR CPU ANALOG COMPARATOR Z Y RESET DATA DIR. REG. PORTH DATA REGISTER PORTH JTAG TAP STACK POINTER DATA DIR. REG. PORTJ DATA REGISTER PORTJ PORTH DRIVERS PORTJ DRIVERS PJ0 - PJ6 PH0 - PH7 OSCILLATOR PROGRAM COUNTER USART UNIVERSAL SERIAL INTERFACE DATA REGISTER PORTE DATA DIR. REG. PORTE PORTE DRIVERS PE0 - PE7 SPI DATA REGISTER PORTB DATA DIR. REG. PORTB PORTB DRIVERS PB0 - PB7 DATA REGISTER PORTD DATA DIR. REG. PORTD PORTD DRIVERS PD0 - PD7 DATA REG. PORTG DATA DIR. REG. PORTG PORTG DRIVERS PG0 - PG4 The AVR core combines a rich instruction set with 32 general purpose working registers. All the 32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent registers to be accessed in one single instruction executed in one clock cycle. The resulting architecture is more code efficient while achieving throughputs up to ten times faster than conventional CISC microcontrollers. ATmega169A/PA/329A/PA/649A/P/3290A/PA/6490A/P [SUMMARY] 8284ES–AVR–02/2013 5 The Atmel ATmega169A/169PA/329A/329PA/3290A/3290PA/649A/649P/6490A/6490P provides the following features: 16K/32K/64K bytes of In-System Programmable Flash with Read-While-Write capabilities, 512/1K/2K bytes EEPROM, 1K/2K/4K byte SRAM, 54/69 general purpose I/O lines, 32 general purpose working registers, a JTAG interface for Boundary-scan, On-chip Debugging support and programming, a complete On-chip LCD controller with internal contrast control, three flexible Timer/Counters with compare modes, internal and external interrupts, a serial programmable USART, Universal Serial Interface with Start Condition Detector, an 8-channel, 10-bit ADC, a programmable Watchdog Timer with internal Oscillator, an SPI serial port, and five software selectable power saving modes. The Idle mode stops the CPU while allowing the SRAM, Timer/Counters, SPI port, and interrupt system to continue functioning. The Power-down mode saves the register contents but freezes the Oscillator, disabling all other chip functions until the next interrupt or hardware reset. In Power-save mode, the asynchronous timer and the LCD controller continues to run, allowing the user to maintain a timer base and operate the LCD display while the rest of the device is sleeping. The ADC Noise Reduction mode stops the CPU and all I/O modules except asynchronous timer, LCD controller and ADC, to minimize switching noise during ADC conversions. In Standby mode, the XTAL/resonator Oscillator is running while the rest of the device is sleeping. This allows very fast start-up combined with low-power consumption. Atmel offers the QTouch library for embedding capacitive touch buttons, sliders and wheels functionality into AVR microcontrollers. The patented charge-transfer signal acquisition offers robust sensing and includes fully debounced reporting of touch keys and includes Adjacent Key Suppression® (AKS®) technology for unambiguous detection of key events. The easy-to-use QTouch Suite toolchain allows you to explore, develop and debug your own touch applications. The device is manufactured using the Atmel high density non-volatile memory technology. The On-chip In-System re-Programmable (ISP) Flash allows the program memory to be reprogrammed In-System through an SPI serial interface, by a conventional non-volatile memory programmer, or by an On-chip Boot program running on the AVR core. The Boot program can use any interface to download the application program in the Application Flash memory. Software in the Boot Flash section will continue to run while the Application Flash section is updated, providing true Read-While-Write operation. By combining an 8-bit RISC CPU with In-System Self-Programmable Flash on a monolithic chip, the ATmega169A/169PA/329A/329PA/3290A/3290PA/649A/649P/6490A/6490P is a powerful microcontroller that provides a highly flexible and cost effective solution to many embedded control applications. The ATmega169A/169PA/329A/329PA/3290A/3290PA/649A/649P/6490A/6490P AVR is supported with a full suite of program and system development tools including: C Compilers, Macro Assemblers, Program Debugger/Simulators, In-Circuit Emulators, and Evaluation kits. ATmega169A/PA/329A/PA/649A/P/3290A/PA/6490A/P [SUMMARY] 8284ES–AVR–02/2013 6 2.2 Comparison between Atmel ATmega169A/169PA/329A/329PA/649A/649P/3290A/3290PA/6490A/6490P Table 2-1. Differences between: ATmega169A/169PA/329A/329PA/649A/649P/3290A/3290PA/6490A/6490P. Device Flash EEPROM RAM LCD Segments ATmega169A 16Kbyte 512Bytes 1Kbyte 4 × 25 ATmega169PA 16Kbyte 512Bytes 1Kbyte 4 × 25 ATmega329A 32Kbyte 1Kbyte 2Kbyte 4 × 25 ATmega329PA 32Kbyte 1Kbyte 2Kbyte 4 × 25 ATmega3290A 32Kbytes 1Kbyte 2Kbyte 4 × 40 ATmega3290PA 32Kbyte 1Kbyte 2Kbyte 4 × 40 ATmega649A 64Kbyte 2Kbyte 4Kbyte 4 × 25 ATmega649P 64Kbyte 2Kbyte 4Kbyte 4 × 25 ATmega6490A 64Kbyte 2Kbyte 4Kbyte 4 × 40 ATmega6490P 64Kbyte 2Kbyte 4Kbyte 4 × 40 ATmega169A/PA/329A/PA/649A/P/3290A/PA/6490A/P [SUMMARY] 8284ES–AVR–02/2013 7 2.3 Pin descriptions The following section describes the I/O-pin special functions. 2.3.1 VCC Digital supply voltage. 2.3.2 GND Ground. 2.3.3 Port A (PA7...PA0) Port A is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port A output buffers have symmetrical drive characteristics with both high sink and source capability. As inputs, Port A pins that are externally pulled low will source current if the pull-up resistors are activated. The Port A pins are tri-stated when a reset condition becomes active, even if the clock is not running. Port A also serves the functions of various special features of the Atmel ATmega169A/169PA/329A/329PA/3290A/3290PA/649A/649P/6490A/6490P as listed on page 73. 2.3.4 Port B (PB7...PB0) Port B is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port B output buffers have symmetrical drive characteristics with both high sink and source capability. As inputs, Port B pins that are externally pulled low will source current if the pull-up resistors are activated. The Port B pins are tri-stated when a reset condition becomes active, even if the clock is not running. Port B has better driving capabilities than the other ports. Port B also serves the functions of various special features of the ATmega169A/169PA/329A/329PA/3290A/3290PA/649A/649P/6490A/6490P as listed on page 74. 2.3.5 Port C (PC7...PC0) Port C is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port C output buffers have symmetrical drive characteristics with both high sink and source capability. As inputs, Port C pins that are externally pulled low will source current if the pull-up resistors are activated. The Port C pins are tri-stated when a reset condition becomes active, even if the clock is not running. Port C also serves the functions of special features of the ATmega169A/169PA/329A/329PA/3290A/3290PA/649A/649P/6490A/6490P as listed on page 77. 2.3.6 Port D (PD7...PD0) Port D is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port D output buffers have symmetrical drive characteristics with both high sink and source capability. As inputs, Port D pins that are externally pulled low will source current if the pull-up resistors are activated. The Port D pins are tri-stated when a reset condition becomes active, even if the clock is not running. Port D also serves the functions of various special features of the ATmega169A/169PA/329A/329PA/3290A/3290PA/649A/649P/6490A/6490P as listed on page 78. 2.3.7 Port E (PE7...PE0) Port E is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port E output buffers have symmetrical drive characteristics with both high sink and source capability. As inputs, Port E pins that are externally pulled low will source current if the pull-up resistors are activated. The Port E pins are tri-stated when a reset condition becomes active, even if the clock is not running. ATmega169A/PA/329A/PA/649A/P/3290A/PA/6490A/P [SUMMARY] 8284ES–AVR–02/2013 8 Port E also serves the functions of various special features of the ATmega169A/169PA/329A/329PA/3290A/3290PA/649A/649P/6490A/6490P as listed on page 80. 2.3.8 Port F (PF7...PF0) Port F serves as the analog inputs to the A/D Converter. Port F also serves as an 8-bit bi-directional I/O port, if the A/D Converter is not used. Port pins can provide internal pull-up resistors (selected for each bit). The Port F output buffers have symmetrical drive characteristics with both high sink and source capability. As inputs, Port F pins that are externally pulled low will source current if the pull-up resistors are activated. The Port F pins are tri-stated when a reset condition becomes active, even if the clock is not running. If the JTAG interface is enabled, the pull-up resistors on pins PF7(TDI), PF5(TMS), and PF4(TCK) will be activated even if a reset occurs. Port F also serves the functions of the JTAG interface. 2.3.9 Port G (PG5...PG0) Port G is a 6-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port G output buffers have symmetrical drive characteristics with both high sink and source capability. As inputs, Port G pins that are externally pulled low will source current if the pull-up resistors are activated. The Port G pins are tri-stated when a reset condition becomes active, even if the clock is not running. Port G also serves the functions of various special features of the ATmega169A/169PA/329A/329PA/3290A/3290PA/649A/649P/6490A/6490P as listed on page 84. 2.3.10 Port H (PH7...PH0) Port H is a 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port H output buffers have symmetrical drive characteristics with both high sink and source capability. As inputs, Port H pins that are externally pulled low will source current if the pull-up resistors are activated. The Port H pins are tri-stated when a reset condition becomes active, even if the clock is not running. Port H also serves the functions of various special features of the ATmega3290PA/6490P as listed on page 86. 2.3.11 Port J (PJ6...PJ0) Port J is a 7-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port J output buffers have symmetrical drive characteristics with both high sink and source capability. As inputs, Port J pins that are externally pulled low will source current if the pull-up resistors are activated. The Port J pins are tri-stated when a reset condition becomes active, even if the clock is not running. Port J also serves the functions of various special features of the ATmega3290PA/6490P as listed on page 88. 2.3.12 RESET Reset input. A low level on this pin for longer than the minimum pulse length will generate a reset, even if the clock is not running. The minimum pulse length is given in ”System and reset characteristics” on page 334. Shorter pulses are not guaranteed to generate a reset. 2.3.13 XTAL1 Input to the inverting Oscillator amplifier and input to the internal clock operating circuit. 2.3.14 XTAL2 Output from the inverting Oscillator amplifier. ATmega169A/PA/329A/PA/649A/P/3290A/PA/6490A/P [SUMMARY] 8284ES–AVR–02/2013 9 2.3.15 AVCC AVCC is the supply voltage pin for Port F and the A/D Converter. It should be externally connected to VCC, even if the ADC is not used. If the ADC is used, it should be connected to VCC through a low-pass filter. 2.3.16 AREF This is the analog reference pin for the A/D Converter. 2.3.17 LCDCAP An external capacitor (typical > 470 nF) must be connected to the LCDCAP pin as shown in Figure 24-2, if the LCD module is enabled and configured to use internal power. This capacitor acts as a reservoir for LCD power (VLCD). A large capacitance reduces ripple on VLCD but increases the time until VLCD reaches its target value. ATmega169A/PA/329A/PA/649A/P/3290A/PA/6490A/P [SUMMARY] 8284ES–AVR–02/2013 10 3. Resources A comprehensive set of development tools, application notes and datasheets are available for download on http://www.atmel.com/avr. Note: 1. 4. Data retention Reliability Qualification results show that the projected data retention failure rate is much less than 1 PPM over 20 years at 85°C or 100 years at 25°C. 5. About code examples This documentation contains simple code examples that briefly show how to use various parts of the device. These code examples assume that the part specific header file is included before compilation. Be aware that not all C compiler vendors include bit definitions in the header files and interrupt handling in C is compiler dependent. Please confirm with the C compiler documentation for more details. For I/O Registers located in extended I/O map, “IN”, “OUT”, “SBIS”, “SBIC”, “CBI”, and “SBI” instructions must be replaced with instructions that allow access to extended I/O. Typically “LDS” and “STS” combined with “SBRS”, “SBRC”, “SBR”, and “CBR”. 6. Capacitive touch sensing The Atmel® QTouch® Library provides a simple to use solution to realize touch sensitive interfaces on most Atmel AVR® microcontrollers. The QTouch Library includes support for the QTouch and QMatrix® acquisition methods. Touch sensing can be added to any application by linking the appropriate Atmel QTouch Library for the AVR Microcontroller. This is done by using a simple set of APIs to define the touch channels and sensors, and then calling the touch sensing API’s to retrieve the channel information and determine the touch sensor states. The QTouch Library is FREE and downloadable from the Atmel website at the following location: www.atmel.com/qtouchlibrary. For implementation details and other information, refer to the Atmel QTouch Library User Guide - also available for download from the Atmel website. ATmega169A/PA/329A/PA/649A/P/3290A/PA/6490A/P [SUMMARY] 8284ES–AVR–02/2013 11 7. Ordering information 7.1 Atmel ATmega169A Speed [MHz] (3) 16 Notes: Power supply 1.8 - 5.5V Ordering code (2) Package type (1) ATmega169A-AU ATmega169A-AUR (4) ATmega169A-MU ATmega169A-MUR (4) ATmega169A-MCH ATmega169A-MCHR (4) 64A 64A 64M1 64M1 64MC 64MC ATmega169A-AN ATmega169A-ANR (4) ATmega169A-MN ATmega169A-MNR (4) 64A 64A 64M1 64M1 Operational range Industrial (-40C to 85C) Extended (-40C to 105C) 1. This device can also be supplied in wafer form. Please contact your local Atmel sales office for detailed ordering information and minimum quantities. 2. Pb-free packaging, complies to the European Directive for Restriction of Hazardous Substances (RoHS directive). Also Halide free and fully Green. 3. For Speed vs. VCC, see Figure 29-1 on page 332. 4. Tape & Reel. Package type 64A 64-lead, thin (1.0mm) plastic Gull Wing Quad Flat Package (TQFP) 64M1 64-pad, 9 × 9 × 1.0mm body, lead pitch 0.50mm, Quad Flat No-Lead/Micro Lead Frame Package (QFN/MLF) 64MC 64-lead (2-row Staggered), 7 × 7 × 1.0mm body, 4.0 × 4.0 mm Exposed Pad, Quad Flat No-Lead Package (QFN) ATmega169A/PA/329A/PA/649A/P/3290A/PA/6490A/P [SUMMARY] 8284ES–AVR–02/2013 12 7.2 Atmel ATmega169PA Speed [MHz] (3) 16 Notes: Power supply Ordering code (2) Package type(1) 64A 64A 64M1 64M1 64MC 64MC Industrial (-40C to 85C) 1.8 - 5.5V ATmega169PA-AU ATmega169PA-AUR(4) ATmega169PA-MU ATmega169PA-MUR(4) ATmega169PA-MCH ATmega169PA-MCHR(4) ATmega169PA-AN ATmega169PA-ANR(4) ATmega169PA-MN ATmega169PA-MNR(4) 64A 64A 64M1 64M1 Extended (-40C to 105C)(5) Operational range 1. This device can also be supplied in wafer form. Please contact your local Atmel sales office for detailed ordering information and minimum quantities. 2. Pb-free packaging, complies to the European Directive for Restriction of Hazardous Substances (RoHS directive). Also Halide free and fully Green. 3. For Speed vs. VCC, see Figure 29-1 on page 332. 4. Tape & Reel. 5. See characterization specification at 105°C. Package type 64A 64-lead, thin (1.0mm) plastic Gull Wing Quad Flat Package (TQFP) 64M1 64-pad, 9 × 9 × 1.0mm body, lead pitch 0.50mm, Quad Flat No-Lead/Micro Lead Frame Package (QFN/MLF) 64MC 64-lead (2-row Staggered), 7 × 7 × 1.0mm body, 4.0 × 4.0mm Exposed Pad, Quad Flat No-Lead Package (QFN) ATmega169A/PA/329A/PA/649A/P/3290A/PA/6490A/P [SUMMARY] 8284ES–AVR–02/2013 13 7.3 Atmel ATmega329A Speed [MHz] (3) 20 Notes: Power supply 1.8 - 5.5V Ordering code (2) Package type (1) Operational range ATmega329A-AU ATmega329A-AUR (4) ATmega329A-MU ATmega329A-MUR (4) 64A 64A 64M1 64M1 Industrial (-40C to 85C) ATmega329A-AN ATmega329A-ANR (4) ATmega329A-MN ATmega329A-MNR (4) 64A 64A 64M1 64M1 Extended (-40C to 105C)(5) 1. This device can also be supplied in wafer form. Please contact your local Atmel sales office for detailed ordering information and minimum quantities. 2. Pb-free packaging complies to the European Directive for Restriction of Hazardous Substances (RoHS directive). Also Halide free and fully Green. 3. For Speed vs. VCC see Figure 29-2 on page 332. 4. Tape & Reel. 5. See characterization specifications at 105°C. Package type 64A 64-lead, 14 × 14 × 1.0mm, thin profile plastic Quad Flat Package (TQFP) 64M1 64-pad, 9 × 9 × 1.0mm, Quad Flat No-Lead/Micro Lead Frame Package (QFN/MLF) ATmega169A/PA/329A/PA/649A/P/3290A/PA/6490A/P [SUMMARY] 8284ES–AVR–02/2013 14 7.4 Atmel ATmega329PA Speed [MHz] (3) 20 Notes: Power supply 1.8 - 5.5V Ordering code (2) Package type (1) Operational range ATmega329PA-AU ATmega329PA-AUR(4) ATmega329PA-MU ATmega329PA-MUR(4) 64A 64A 64M1 64M1 Industrial (-40C to 85C) ATmega329PA-AN ATmega329PA-ANR(4) ATmega329PA-MN ATmega329PA-MNR(4) 64A 64A 64M1 64M1 Extended (-40C to 105C)(5) 1. This device can also be supplied in wafer form. Please contact your local Atmel sales office for detailed ordering information and minimum quantities. 2. Pb-free packaging complies to the European Directive for Restriction of Hazardous Substances (RoHS directive). Also Halide free and fully Green. 3. For Speed vs. VCC see Figure 29-2 on page 332. 4. Tape &Reel. 5. See characterization specification at 105°C. Package type 64A 64-lead, 14 × 14 × 1.0mm, thin profile Plastic Quad Flat Package (TQFP) 64M1 64-pad, 9 × 9 × 1.0mm, Quad Flat No-Lead/Micro Lead Frame Package (QFN/MLF) ATmega169A/PA/329A/PA/649A/P/3290A/PA/6490A/P [SUMMARY] 8284ES–AVR–02/2013 15 7.5 Atmel ATmega3290A Speed [MHz] (3) 20 Notes: Power supply 1.8 - 5.5V Ordering code (2) Package type (1) Operational range ATmega3290A-AU ATmega3290A-AUR (4) 100A 100A Industrial (-40C to 85C) ATmega3290A-AN ATmega3290A-ANR (4) 100A 100A Extended (-40C to 105C)(5) 1. This device can also be supplied in wafer form. Please contact your local Atmel sales office for detailed ordering information and minimum quantities. 2. Pb-free packaging complies to the European Directive for Restriction of Hazardous Substances (RoHS directive). Also Halide free and fully Green. 3. For Speed vs. VCC see Figure 29-2 on page 332. 4. Tape & Reel. 5. See characterization specification at 105°C. Package type 100A 100-lead, 14 × 14 × 1.0mm, 0.5mm Lead Pitch, Thin Profile Plastic Quad Flat Package (TQFP) ATmega169A/PA/329A/PA/649A/P/3290A/PA/6490A/P [SUMMARY] 8284ES–AVR–02/2013 16 7.6 Atmel ATmega3290PA Speed [MHz] (3) 20 Notes: Power supply 1.8 - 5.5V Ordering code (2) Package type (1) Operational range ATmega3290PA-AU ATmega3290PA-AUR(4) 100A 100A Industrial (-40C to 85C) ATmega3290PA-AN ATmega3290PA-ANR(4) 100A 100A Industrial (-40C to 105C)(5) 1. This device can also be supplied in wafer form. Please contact your local Atmel sales office for detailed ordering information and minimum quantities. 2. Pb-free packaging complies to the European Directive for Restriction of Hazardous Substances (RoHS directive). Also Halide free and fully Green. 3. For Speed vs. VCC see Figure 29-2 on page 332. 4. Tape & Reel. 5. See characterization specification at 105°C. Package type 100A 100-lead, 14 × 14 × 1.0mm, 0.5mm Lead Pitch, Thin Profile Plastic Quad Flat Package (TQFP) ATmega169A/PA/329A/PA/649A/P/3290A/PA/6490A/P [SUMMARY] 8284ES–AVR–02/2013 17 7.7 Atmel ATmega649A Speed [MHz] (3) 16 Notes: Power supply 1.8 - 5.5V Ordering code (2) ATmega649A-AU ATmega649A-AUR (4) ATmega649A-MU ATmega649A-MUR (4) Package type (1) 64A 64A 64M1 64M1 Operational range Industrial (-40C to 85C) 1. This device can also be supplied in wafer form. Please contact your local Atmel sales office for detailed ordering information and minimum quantities. 2. Pb-free packaging complies to the European Directive for Restriction of Hazardous Substances (RoHS directive). Also Halide free and fully Green. 3. For Speed vs. VCC see Figure 29-1 on page 332. 4. Tape & Reel. Package type 64A 64-lead, 14 × 14 × 1.0mm, Thin Profile Plastic Quad Flat Package (TQFP) 64M1 64-pad, 9 × 9 × 1.0mm, Quad Flat No-Lead/Micro Lead Frame Package (QFN/MLF) ATmega169A/PA/329A/PA/649A/P/3290A/PA/6490A/P [SUMMARY] 8284ES–AVR–02/2013 18 7.8 Atmel ATmega649P Speed [MHz] (3) 16 Notes: Power supply 1.8 - 5.5 V Ordering code (2) ATmega649P-AU ATmega649P-AUR (4) ATmega649P-MU ATmega649P-MUR (4) Package type (1) 64A 64A 64M1 64M1 Operational range Industrial (-40C to 85C) 1. This device can also be supplied in wafer form. Please contact your local Atmel sales office for detailed ordering information and minimum quantities. 2. Pb-free packaging complies to the European Directive for Restriction of Hazardous Substances (RoHS directive). Also Halide free and fully Green. 3. For Speed vs. VCC see Figure 29-1 on page 332. 4. Tape & Reel. Package type 64A 64-lead, 14 × 14 × 1.0mm, Thin Profile Plastic Quad Flat Package (TQFP) 64M1 64-pad, 9 × 9 × 1.0mm, Quad Flat No-Lead/Micro Lead Frame Package (QFN/MLF) ATmega169A/PA/329A/PA/649A/P/3290A/PA/6490A/P [SUMMARY] 8284ES–AVR–02/2013 19 7.9 Atmel ATmega6490A Speed [MHz] (3) 20 Notes: Power supply 1.8 - 5.5V Ordering code (2) ATmega6490A-AU ATmega6490A-AUR (4) Package type (1) 100A 100A Operational range Industrial (-40C to 85C) 1. This device can also be supplied in wafer form. Please contact your local Atmel sales office for detailed ordering information and minimum quantities. 2. Pb-free packaging complies to the European Directive for Restriction of Hazardous Substances (RoHS directive). Also Halide free and fully Green. 3. For Speed vs. VCC see Figure 29-2 on page 332. 4. Tape & Reel. Package type 100A 100-lead, 14 × 14 × 1.0mm, 0.5mm Lead Pitch, Thin Profile Plastic Quad Flat Package (TQFP) ATmega169A/PA/329A/PA/649A/P/3290A/PA/6490A/P [SUMMARY] 8284ES–AVR–02/2013 20 7.10 Atmel ATmega6490P Speed [MHz] (3) 20 Notes: Power supply 1.8 - 5.5V Ordering code (2) ATmega6490P-AU ATmega6490P-AUR (4) Package type (1) 100A 100A Operational range Industrial (-40C to 85C) 1. This device can also be supplied in wafer form. Please contact your local Atmel sales office for detailed ordering information and minimum quantities. 2. Pb-free packaging complies to the European Directive for Restriction of Hazardous Substances (RoHS directive). Also Halide free and fully Green. 3. For Speed vs. VCC see Figure 29-2 on page 332. 4. Tape & Reel. Package Type 100A 100-lead, 14 × 14 × 1.0mm, 0.5mm Lead Pitch, Thin Profile Plastic Quad Flat Package (TQFP) ATmega169A/PA/329A/PA/649A/P/3290A/PA/6490A/P [SUMMARY] 8284ES–AVR–02/2013 21 8. Packaging Information 8.1 64A PIN 1 B PIN 1 e B PIN 1 IDENTIFIER e PIN 1 IDENTIFIER E1 E E1 E D1 D1 DD C C 0°~7° 0°~7° A1 A1 A2 A2 AA LL COMMON DIMENSIONS COMMON DIMENSIONS (Unit of of measure = mm) (Unit measure = mm) SYMBOL MIN SYMBOL MIN – – – A1 0.05 – A2 0.95 1.00 1.05 D 15.75 16.00 16.25 D1 13.90 14.00 14.10 E 15.75 16.00 16.25 A A1 A2 D D1 Notes: E Notes: 1.This package conforms to JEDEC reference MS-026, Variation AEB. 1.This package conforms to do JEDEC reference Variation AEB. 2. Dimensions D1 and E1 not include moldMS-026, protrusion. Allowable 2. Dimensions and E1 do include mold protrusion. Allowable protrusionD1 is 0.25mm pernot side. Dimensions D1 and E1 are maximum protrusion is 0.25mm per side. Dimensions D1mismatch. and E1 are maximum plastic body size dimensions including mold 3. Leadbody coplanarity is 0.10mmincluding maximum.mold mismatch. plastic size dimensions 3. Lead coplanarity is 0.10mm maximum. NOM MAX NOTE NOTE NOM MAX A E1 E1 B B 0.05 0.95 15.75 13.90 15.75 13.90 0.09 0.45 eL e 0.15 1.05 14.00 16.00 14.00 16.25 – Note 2 16.25 14.10 14.00 – Note 2 14.10 – 0.30 0.09 – 16.00 13.90 C L 1.20 0.15 1.00 0.30 C 1.20 – Note 2 14.10 0.45 Note 2 0.45 0.20 – – 0.45 0.80 TYP – 0.20 0.75 0.75 0.80 TYP 2010-10-20 TITLE 2325 Orchard Parkway TITLE 64A, 64-lead, 14 x 14mm Body Size, 1.0mm Body Thickness, San Jose, CA 95131 2325 Orchard Parkway 0.8mm Lead Pitch, Thin Profile Quad Flat Package (TQFP) 64A, 64-lead, 14 x 14mm BodyPlastic Size, 1.0mm Body Thickness, San Jose, CA 95131 0.8mm Lead Pitch, Thin Profile Plastic Quad Flat Package (TQFP) DRAWING NO.2010-10-20 REV. DRAWING NO. 64A 64A ATmega169A/PA/329A/PA/649A/P/3290A/PA/6490A/P [SUMMARY] 8284ES–AVR–02/2013 REV. C C 22 8.2 64M1 D D Marked Pin# 1 ID Marked Pin# 1 ID E E SEATING PLANE CSEATING PLANE C A1 A1 TOP VIEW TOP VIEW AA KK 0.08 C C 0.08 L L Pin Pin #1 #1 Corner Corner D2 D2 11 22 33 Option A Option SIDEVIEW VIEW SIDE Pin Pin#1 #1 Triangle Triangle COMMON DIMENSIONS COMMON DIMENSIONS (Unit of of Measure = mm) (Unit Measure = mm) SYMBOL MIN SYMBOL MIN E2E2 Option B Option B Pin #1 Pin #1 Chamfer Chamfer (C 0.30) (C 0.30) NOM NOM MAX MAX NOTE NOTE A A 0.80 0.80 0.90 1.00 A1 – 0.02 0.05 A1 K b b Option C e e Pin #1 Notch Pin #1 (0.20 NotchR) (0.20 R) BOTTOM VIEW 0.30 D 8.90 9.00 9.10 D2 5.20 5.40 5.60 E 8.90 9.00 9.10 D2 E E2 0.18 8.90 5.20 8.90 5.20 E2 e L L K Notes: Notes: 1. JEDEC Standard MO-220, (SAW Singulation) Fig. 1, VMMD. 0.05 0.25 5.20 e BOTTOM VIEW 0.02 0.18 D Option C 1.00 b b K – 0.90 0.35 0.35 1.25 K 1.25 0.25 0.30 9.00 9.10 5.40 5.60 9.00 9.10 5.40 5.60 5.40 5.60 0.50 BSC 0.50 BSC 0.40 0.40 0.45 0.45 1.40 1.55 1.40 1.55 2. Dimension and MO-220, tolerance (SAW conform to ASMEY14.5M-1994. 1. JEDEC Standard Singulation) Fig. 1, VMMD. 2. Dimension and tolerance conform to ASMEY14.5M-1994. TITLE 2325 Orchard Parkway 64M1, 64-pad, 9 x 9 x 1.0 mm Body, Lead Pitch 0.50 mm, TITLE SanOrchard Jose, CA 95131 2325 Parkway 5.40 mm Exposed Pad, Micro Lead Frame Package (MLF) R R San Jose, CA 95131 64M1, 64-pad, 9 x 9 x 1.0 mm Body, Lead Pitch 0.50 mm, 5.40 mm Exposed Pad, Micro Lead Frame Package (MLF) 2010-10-19 2010-10-19 DRAWING NO. REV. DRAWING 64M1 NO. HREV. 64M1 H ATmega169A/PA/329A/PA/649A/P/3290A/PA/6490A/P [SUMMARY] 8284ES–AVR–02/2013 23 64MC C Pin 1 ID D SIDE VIEW y A1 E A TOP VIEW eT eT/2 L A26 eR 8.3 A34 B23 B30 COMMON DIMENSIONS (Unit of Measure = mm) A1 A25 B1 B22 R0.20 0.40 b D2 SYMBOL MIN NOM MAX A 0.80 0.90 1.00 A1 0.00 0.02 0.05 b 0.18 0.23 0.28 C eT B7 B16 A8 A18 A9 A17 L (0.18) REF B8 B15 E2 K BOTTOM VIEW Note: 1. The terminal #1 ID is a Laser-marked Feature. Package Drawing Contact: [email protected] (0.1) REF NOTE 0.20 REF D 6.90 7.00 7.10 D2 3.95 4.00 4.05 E 6.90 7.00 7.10 E2 3.95 4.00 4.05 eT – 0.65 – eR – 0.65 – K 0.20 – – L 0.35 0.40 0.45 y 0.00 – 0.075 GPC TITLE 64MC, 64QFN (2-Row Staggered), ZXC 7 x 7 x 1.00 mm Body, 4.0 x 4.0 mm Exposed Pad, Quad Flat No Lead Package (REF) 10/3/07 DRAWING NO. REV. 64MC ATmega169A/PA/329A/PA/649A/P/3290A/PA/6490A/P [SUMMARY] 8284ES–AVR–02/2013 A 24 8.4 100A PIN 1 B PIN 1 IDENTIFIER E1 e E D1 D C 0°~7° A1 A2 A L COMMON DIMENSIONS (Unit of Measure = mm) SYMBOL Notes: 1. This package conforms to JEDEC reference MS-026, Variation AED. 2. Dimensions D1 and E1 do not include mold protrusion. Allowable protrusion is 0.25mm per side. Dimensions D1 and E1 are maximum plastic body size dimensions including mold mismatch. 3. Lead coplanarity is 0.08mm maximum. MIN NOM MAX A – – 1.20 A1 0.05 – 0.15 A2 0.95 1.00 1.05 D 15.75 16.00 16.25 D1 13.90 14.00 14.10 E 15.75 16.00 16.25 E1 13.90 14.00 14.10 B 0.17 – 0.27 C 0.09 – 0.20 L 0.45 – 0.75 e NOTE Note 2 Note 2 0.50 TYP 2010-10-20 R 2325 Orchard Parkway San Jose, CA 95131 DRAWING NO. TITLE 100A, 100-lead, 14 x 14mm Body Size, 1.0mm Body Thickness, 0.5mm Lead Pitch, Thin Profile Plastic Quad Flat Package (TQFP) 100A REV. D ATmega169A/PA/329A/PA/649A/P/3290A/PA/6490A/P [SUMMARY] 8284ES–AVR–02/2013 25 9. Errata 9.1 Atmel ATmega169A No known errata 9.2 Atmel ATmega169A/169PA Rev. A to F Not sampled. 9.3 Atmel ATmega169PA Rev. G No known errata. 9.4 Atmel ATmega329A/329PA rev. A • Interrupts may be lost when writing the timer registers in the asynchronous timer • Using BOD disable will make the chip reset 1. Interrupts may be lost when writing the timer registers in the asynchronous timer The interrupt will be lost if a timer register that is synchronous timer clock is written when the asynchronous Timer/Counter register (TCNTx) is 0x00. Problem Fix/ Workaround Always check that the asynchronous Timer/Counter register neither have the value 0xFF nor 0x00 before writing to the asynchronous Timer Control Register (TCCRx), asynchronous Timer Counter Register (TCNTx), or asynchronous Output Compare Register (OCRx). 2. Using BOD disable will make the chip reset If the part enters sleep with the BOD turned off with the BOD disable option enabled, a BOD reset will be generated at wakeup and the chip will reset. Problem Fix/Workaround Do not use BOD disable 9.5 Atmel ATmega329A/329PA rev. B • Interrupts may be lost when writing the timer registers in the asynchronous timer 1. Interrupts may be lost when writing the timer registers in the asynchronous timer The interrupt will be lost if a timer register that is synchronous timer clock is written when the asynchronous Timer/Counter register (TCNTx) is 0x00. Problem Fix/ Workaround Always check that the asynchronous Timer/Counter register neither have the value 0xFF nor 0x00 before writing to the asynchronous Timer Control Register (TCCRx), asynchronous Timer Counter Register (TCNTx), or asynchronous Output Compare Register (OCRx). ATmega169A/PA/329A/PA/649A/P/3290A/PA/6490A/P [SUMMARY] 8284ES–AVR–02/2013 26 9.6 Atmel ATmega329A/329PA rev. C • Interrupts may be lost when writing the timer registers in the asynchronous timer 1. Interrupts may be lost when writing the timer registers in the asynchronous timer The interrupt will be lost if a timer register that is synchronous timer clock is written when the asynchronous Timer/Counter register (TCNTx) is 0x00. Problem Fix/ Workaround Always check that the asynchronous Timer/Counter register neither have the value 0xFF nor 0x00 before writing to the asynchronous Timer Control Register (TCCRx), asynchronous Timer Counter Register (TCNTx), or asynchronous Output Compare Register (OCRx). 9.7 Atmel ATmega3290A/3290PA rev. A • Interrupts may be lost when writing the timer registers in the asynchronous timer • Using BOD disable will make the chip reset 1. Interrupts may be lost when writing the timer registers in the asynchronous timer The interrupt will be lost if a timer register that is synchronous timer clock is written when the asynchronous Timer/Counter register (TCNTx) is 0x00. Problem Fix/ Workaround Always check that the asynchronous Timer/Counter register neither have the value 0xFF nor 0x00 before writing to the asynchronous Timer Control Register (TCCRx), asynchronous Timer Counter Register (TCNTx), or asynchronous Output Compare Register (OCRx). 2. Using BOD disable will make the chip reset If the part enters sleep with the BOD turned off with the BOD disable option enabled, a BOD reset will be generated at wakeup and the chip will reset. Problem Fix/Workaround Do not use BOD disable 9.8 Atmel ATmega3290A/3290PA rev. B • Interrupts may be lost when writing the timer registers in the asynchronous timer 1. Interrupts may be lost when writing the timer registers in the asynchronous timer The interrupt will be lost if a timer register that is synchronous timer clock is written when the asynchronous Timer/Counter register (TCNTx) is 0x00. Problem Fix/ Workaround Always check that the asynchronous Timer/Counter register neither have the value 0xFF nor 0x00 before writing to the asynchronous Timer Control Register (TCCRx), asynchronous Timer Counter Register (TCNTx), or asynchronous Output Compare Register (OCRx). ATmega169A/PA/329A/PA/649A/P/3290A/PA/6490A/P [SUMMARY] 8284ES–AVR–02/2013 27 9.9 Atmel ATmega3290A/3290PA rev. C • Interrupts may be lost when writing the timer registers in the asynchronous timer 1. Interrupts may be lost when writing the timer registers in the asynchronous timer The interrupt will be lost if a timer register that is synchronous timer clock is written when the asynchronous Timer/Counter register (TCNTx) is 0x00. Problem Fix/ Workaround Always check that the asynchronous Timer/Counter register neither have the value 0xFF nor 0x00 before writing to the asynchronous Timer Control Register (TCCRx), asynchronous Timer Counter Register (TCNTx), or asynchronous Output Compare Register (OCRx). 9.10 Atmel ATmega649A/649P/ATmega6490A/6490P No known errata. ATmega169A/PA/329A/PA/649A/P/3290A/PA/6490A/P [SUMMARY] 8284ES–AVR–02/2013 28 Atmel Corporation 1600 Technology Drive Atmel Asia Limited Unit 01-5 & 16, 19F Atmel Munich GmbH Business Campus Atmel Japan G.K. 16F Shin-Osaki Kangyo Bldg San Jose, CA 95110 BEA Tower, Millennium City 5 Parkring 4 1-6-4 Osaki, Shinagawa-ku USA 418 Kwun Tong Roa D-85748 Garching b. Munich Tokyo 141-0032 Tel: (+1) (408) 441-0311 Kwun Tong, Kowloon GERMANY JAPAN Fax: (+1) (408) 487-2600 HONG KONG Tel: (+49) 89-31970-0 Tel: (+81) (3) 6417-0300 www.atmel.com Tel: (+852) 2245-6100 Fax: (+49) 89-3194621 Fax: (+81) (3) 6417-0370 Fax: (+852) 2722-1369 © 2013 Atmel Corporation. All rights reserved. / Rev.: 8284ES–AVR–02/2013 Atmel®, Atmel logo and combinations thereof, Enabling Unlimited Possibilities®, and others are registered trademarks or trademarks of Atmel Corporation or its subsidiaries. Other terms and product names may be trademarks of others. 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