HAT2092R Silicon N Channel Power MOS FET High Speed Power Switching REJ03G0511-0300 (Previous ADE-208-1236A(Z)) Rev.3.00 Jan.13.2005 Features • • • • Low on-resistance Capable of 4.5 V gate drive Low drive current High density mounting Outline 7 8 D D SOP-8 8 5 7 6 2 G 3 1 2 5 6 D D 4 G 4 S1 MOS1 S3 1, 3 Source 2, 4 Gate 5, 6, 7, 8 Drain MOS2 Absolute Maximum Ratings (Ta = 25°C) Item Drain to source voltage Gate to source voltage Drain current Drain peak current Body–drain diode reverse drain current Channel dissipation Channel dissipation Symbol VDSS VGSS ID ID(pulse)Note1 IDR Pch Note2 Pch Note3 Ratings 30 ±20 11 88 11 2 3 Channel temperature Tch 150 Storage temperature Tstg –55 to +150 Notes: 1. PW ≤ 10 µs, duty cycle ≤ 1 % 2. 1 Drive operation: When using the glass epoxy board (FR4 40 x 40 x 1.6 mm), PW ≤ 10s 3. 2 Drive operation: When using the glass epoxy board (FR4 40 x 40 x 1.6 mm), PW ≤ 10s Rev.3.00 Jan. 13, 2005 page 1 of 7 Unit V V A A A W W °C °C HAT2092R Electrical Characteristics (Ta = 25°C) Item Drain to source breakdown voltage Gate to source breakdown voltage Gate to source leak current Zero gate voltage drain current Gate to source cutoff voltage Static drain to source on state resistance Forward transfer admittance Input capacitance Output capacitance Reverse transfer capacitance Total gate charge Gate to source charge Gate to drain charge Turn-on delay time Rise time Turn-off delay time Fall time Body–drain diode forward voltage Body–drain diode reverse recovery time Note: 4. Pulse test Rev.3.00 Jan. 13, 2005 page 2 of 7 Symbol V(BR)DSS V(BR)GSS IGSS IDSS VGS(off) RDS(on) RDS(on) |yfs| Ciss Coss Crss Qg Qgs Qgd td(on) tr td(off) Min 30 ±20 — — 1.0 — — 12 — — — — — — — — — Typ — — — — — 13 17 20 1400 340 190 22 4 4 15 17 50 Max — — ±10 1 2.5 16 25 — — — — — — — — — — Unit V V µA µA V mΩ mΩ S pF pF pF nc nc nc ns ns ns tf VDF — — 9 0.85 — 1.10 trr — 50 — ns V ns Test Conditions ID = 10 mA, VGS = 0 IG = ±100 µA, VDS = 0 VGS = ±16 V, VDS = 0 VDS = 30 V, VGS = 0 VDS = 10 V, ID = 1 mA ID = 5.5 A, VGS = 10 V Note4 ID = 5.5 A, VGS = 4.5 V Note4 ID = 5.5 A, VDS = 10 V Note4 VDS = 10V VGS = 0 f = 1MHz VDD = 10 V VGS = 10 V ID = 11 A VGS = 10 A, ID = 5.5 A VDD ≅ 10 V RL = 1.83 Ω Rg = 4.7 Ω IF = 11A, VGS = 0 Note4 IF = 11A, VGS = 0 diF/ dt =50A/µs HAT2092R Main Characteristics Power vs. Temperature Derating Maximum Safe Operation Area 500 2.0 ive Dr at er Op 1 Dr Op er 0 50 10 at ion 100 150 Ambient Temperature 200 Ta (°C) DC Op tio 1 0µ 1m PW era s s =1 0m s n (P W Operation in this area is 0.1 limited by RDS(on) ion ive 1.0 10 Drain Current 3.0 10 µs 100 ID (A) Test Condition : When using the glass epoxy board (FR4 40x40x1.6 mm), PW < 10 s 2 Channel Dissipation Pch (W) 4.0 < 1Note 0s 4 ) Ta = 25°C 1 shot Pulse 0.01 0.1 0.3 1 3 10 30 100 Drain to Source Voltage VDS (V) Note 4 : When using the glass epoxy board (FR4 40x40x1.6 mm) Typical Output Characteristics 10 V Pulse Test 40 3.5 V 30 20 VGS = 3 V 10 0 VDS = 10 V Pulse Test 4V 2 4 6 Drain to Source Voltage 40 ID (A) ID (A) 4.5 V Drain Current Typical Transfer Characteristics 50 Drain Current 50 0.12 ID = 10 A 0.08 5A 0.04 0 2A 4 8 12 Gate to Source Voltage Rev.3.00 Jan. 13, 2005 page 3 of 7 16 VGS 20 (V) Drain to Source On State Resistance RDS(on) (mΩ) (V) VDS(on) Drain to Source Voltage 0.16 Pulse Test 20 Tc = 75°C 25°C -25°C 10 0 8 10 VDS (V) Drain to Source Saturation Voltage vs. Gate to Source Voltage 0.20 30 1 2 3 Gate to Source Voltage 4 VGS 5 (V) Static Drain to Source on State Resistance vs. Drain Current 100 Pulse Test 50 20 10 VGS= 4.5 V 10 V 5 2 1 0.1 0.2 0.5 1 2 5 10 20 Drain Current ID (A) 50 100 Static Drain to Source on State Resistance vs. Temperature 50 Forward Transfer Admittance vs. Drain Current Forward Transfer Admittance |yfs| (S) Static Drain to Source on State Resistance RDS(on) (mΩ) HAT2092R Pulse Test 40 30 20 ID = 2 A, 5 A 10 A VGS = 4.5 V 2 A, 5 A, 10 A 10 10 V 0 -40 100 Tc = -25°C 30 10 75°C 25°C 3 1 0.3 0.1 0.1 0 40 80 120 160 Case Temperature Tc (°C) VDS = 10 V Pulse Test 0.3 10000 Capacitance C (pF) Reverse Recovery Time trr (ns) 50 20 3000 10 0.1 0.2 0.5 1 2 Reverse Drain Current Ciss 1000 Coss 300 Crss 100 30 di/dt = 50 A/µs VGS = 0, Ta = 25°C VGS = 0 f = 1 MHz 10 5 10 20 IDR (A) 0 10 VDD = 25 V 10 V 5V 8 16 24 32 Gate Charge Qg (nc) Rev.3.00 Jan. 13, 2005 page 4 of 7 50 4 0 40 VGS (V) 100 Switching Time t (ns) VDD = 25 V 10 V 8 5V 20 0 16 12 VDS 40 Switching Characteristics Gate to Source Voltage Drain to Source Voltage VDS (V) VGS 40 30 200 20 ID = 11 A 20 Drain to Source Voltage VDS (V) Dynamic Input Characteristics 10 100 Typical Capacitance vs. Drain to Source Voltage 100 30 30 10 Drain Current ID (A) Body–Drain Diode Reverse Recovery Time 50 3 1 td(off) 50 tf 20 tr td(on) 10 5 VGS = 10 V, VDS = 10 V Rg = 4.7 Ω, duty < 1 % 2 0.1 0.2 0.5 1 2 5 10 Drain Current ID (A) 20 HAT2092R Reverse Drain Current vs. Source to Drain Voltage Reverse Drain Current IDR (A) 50 10 V 40 VGS = 0 5V 30 20 10 Pulse Test 0 0.4 0.8 1.2 Source to Drain Voltage 1.6 2.0 VSD (V) Normalized Transient Thermal Impedance vs. Pulse Width (1 Drive Operation) Normalized Transient Thermal Impedance γ s (t) 10 D=1 1 0.1 0.05 θ ch - f(t) = γs (t) x θ ch - f θ ch - f = 125°C/W, Ta = 25°C When using the glass epoxy board (FR4 40x40x1.6 mm) 0.02 0.01 0.01 uls e p ot PDM h 1s 0.001 D= PW T PW T 0.0001 10 µ 100 µ 1m 10 m 100 m 1 10 Pulse Width PW (S) 100 1000 10000 Normalized Transient Thermal Impedance vs. Pulse Width (2 Drive Operation) Normalized Transient Thermal Impedance γ s (t) 10 1 D=1 0.5 0.2 0.1 0.01 0.1 0.05 θ ch - f(t) = γs (t) x θ ch - f θ ch - f = 166°C/W, Ta = 25°C When using the glass epoxy board (FR4 40x40x1.6 mm) 0.02 0.01 0.001 1s h p ot uls e PDM D= PW T PW T 0.0001 10 µ 100 µ 1m 10 m 100 m 1 10 Pulse Width PW (S) Rev.3.00 Jan. 13, 2005 page 5 of 7 100 1000 10000 HAT2092R Switching Time Test Circuit Switching Time Waveform Vout Monitor Vin Monitor Rg 90% D.U.T. RL Vin Vin 10 V V DS = 10 V Vout 10% 10% 90% td(on) Rev.3.00 Jan. 13, 2005 page 6 of 7 tr 10% 90% td(off) tf HAT2092R Package Dimensions As of January, 2003 Unit: mm 3.95 4.90 5.3 Max 5 8 1 1.75 Max *0.22 ± 0.03 0.20 ± 0.03 4 0.75 Max + 0.10 6.10 – 0.30 1.08 *0.42 ± 0.08 0.40 ± 0.06 0.14 – 0.04 + 0.11 0˚ – 8˚ 1.27 + 0.67 0.60 – 0.20 0.15 0.25 M *Dimension including the plating thickness Base material dimension Package Code JEDEC JEITA Mass (reference value) FP-8DA Conforms — 0.085 g Ordering Information Part Name HAT2092R-EL-E HAT2092RJ-EL-E Quantity 2500 pcs 2500 pcs Shipping Container Taping Taping Note: For some grades, production may be terminated. Please contact the Renesas sales office to check the state of production before ordering the product. Rev.3.00 Jan. 13, 2005 page 7 of 7 Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Keep safety first in your circuit designs! 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corp. product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Renesas Technology Corp. or a third party. 2. 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