Maxim MAX4747EUD+ 50î©, low-voltage, quad spst/dual spdt analog switches in wlp Datasheet

19-2646; Rev 3; 1/12
50Ω, Low-Voltage, Quad SPST/Dual SPDT Analog
Switches in WLP
The MAX4747–MAX4750 low-voltage, quad single-pole
single-throw (SPST)/dual single-pole/double-throw
(SPDT) analog switches operate from a single +2V to
+11V supply and handle rail-to-rail analog signals.
These switches exhibit low leakage current (0.1nA) and
consume less than 0.5nW (typ) of quiescent power,
making them ideal for battery-powered applications.
When powered from a +3V supply, these switches feature 50Ω (max) on-resistance (RON), with 3.5Ω (max)
matching between channels and 9Ω (max) flatness
over the specified signal range.
The MAX4747 has four normally open (NO) switches, the
MAX4748 has four normally closed (NC) switches, and
the MAX4749 has two NO and two NC switches. The
MAX4750 has two SPDT switches. These switches are
available in 14-pin TSSOP, 16-pin TQFN (4mm x 4mm),
and 16-bump WLP packages. This tiny chip-scale package occupies a 2mm 2mm area and significantly
reduces the required PC board area.
Applications
Battery-Powered Systems
Audio/Video-Signal Routing
Low-Voltage Data-Acquisition Systems
Cell Phones
Communications Circuits
Glucose Meters
PDAs
Features
o 2mm 2mm WLP
o Guaranteed On-Resistance (RON)
25Ω (max) at +5V
50Ω (max) at +3V
o On-Resistance Matching
3Ω (max) at +5V
3.5Ω (max) at +3V
o Guaranteed < 0.1nA Leakage Current at
TA = +25°C
o Single-Supply Operation from +2.0V to +11V
o TTL/CMOS-Logic Compatible
o -84dB Crosstalk (1MHz)
o -72dB Off-Isolation (1MHz)
o Low Power Consumption: 0.5nW (typ)
o Rail-to-Rail Signal Handling
Ordering Information
MAX4747EUD+
TEMP
RANGE
-40°C to +85°C
PIN-/BUMPPACKAGE
14 TSSOP
MAX4747ETE+
-40°C to +85°C
16 Thin QFN-EP*
MAX4747EWE+T
-40°C to +85°C
16 WLP
PART
*EP = Exposed pad.
+Denotes a lead(Pb)-free/RoHS-compliant package.
T = Tape and reel.
Ordering Information continued at end of data sheet.
Pin/Bump Configurations/Truth Tables
TOP VIEW
(BUMPS SIDE DOWN)
TOP VIEW
NO1
V+
N.C.
IN1
+
MAX4747
16
15
14
13
MAX4747
+
COM1
1
12
IN4
NO2
2
11
NO4
10
*EP
5
6
7
8
NO3
N.C.
4
GND
IN2
MAX4747ETE
3
IN3
COM2
TQFN
*CONNECT EP TO V+
9
COM4
COM3
NO1 1
14 V+
COM1 2
13 IN1
NO2 3
12 IN4
COM2 4
10 COM4
IN3 6
9 COM3
GND 7
8 NO3
2
3
4
COM1
NO2
COM2
IN2
NO1
V+
A
IN3
B
11 NO4
IN2 5
1
IN1
GND
NO3
COM4
COM3
C
IN4
NO4
D
TSSOP
WLP
INPUT
LOW
SWITCH STATE
OFF
HIGH
ON
Pin Configurations/Truth Tables continued at end of data sheet.
________________________________________________________________ Maxim Integrated Products
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
1
MAX4747–MAX4750
General Description
MAX4747–MAX4750
50Ω, Low-Voltage, Quad SPST/Dual SPDT Analog
Switches in WLP
ABSOLUTE MAXIMUM RATINGS
(All voltages referenced to GND.)
V+ ...........................................................................-0.3V to +12V
IN_, COM_, NO_, NC_ (Note 1)....................-0.3V to (V+ + 0.3V)
Continuous Current (any pin) ...........................................±10mA
Peak Current (any pin, pulsed at 1ms, 10% duty cycle) ...±20mA
Continuous Power Dissipation (TA = +70°C)
14-Pin TSSOP (derate 9.1mW/°C above +70°C) .........727mW
16-Pin Thin QFN (derate 16.9mW/°C above +70°C) .....1349mW
16-Bump WLP (derate 7.3mW/°C above +70°C).........589mW
Operating Temperature Range ...........................-40°C to +85°C
Storage Temperature Range .............................-65°C to +150°C
Maximum Junction Temperature .....................................+150°C
Bump Temperature (soldering)
Infrared (15s) ...............................................................+220°C
Vapor Phase (60s) .......................................................+215°C
Lead Temperature (soldering, 10s) .................................+300°C
Soldering Temperature (reflow) .......................................+260°C
Note 1: Signals on IN_, NO_, NC_, or COM_ exceeding V+ or GND are clamped by internal diodes. Limit forward-diode current to
maximum current rating.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS—Single +3V Supply
(V+ = +3V ±10%, VIH = +2.0V, VIL = +0.8V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at V+ = +3V, TA = +25°C.)
(Notes 3, 4)
PARAMETER
SYMBOL
CONDITIONS
TA
MIN
TYP
MAX
UNITS
V+
V
ANALOG SWITCH
Analog Signal Range
VCOM_,
VNO_, VNC_
0
+25°C
17
50
RON
V+ = +2.7V, ICOM_ = 5mA,
VNO_ or VNC_ = +1.5V
On-Resistance Matching
Between Channels
(Notes 5, 6)
∆RON
V+ = +2.7V, ICOM_ = 5mA,
VNO_ or VNC_ = +1.5V
On-Resistance Flatness
(Note 7)
RFLAT(ON)
V+ = +2.7V, ICOM_ = 5mA,
VNO_ or VNC_ = +1V, +1.5V, +2V
-0.1
+0.1
INO_(OFF),
INC_(OFF)
V+ = +3.6V,
VCOM_ = +0.3V, +3V,
VNO_ or VNC_ = +3V, +0.3V
+25°C
NO_ or NC_ Off-Leakage Current
(Note 8)
TMIN to
TMAX
-2
+2
V+ = +3.6V,
ICOM_(OFF) VCOM_ = +0.3V, +3V,
VNO_ or VNC_ = +3V, +0.3V
+25°C
-0.1
+0.1
COM_ Off-Leakage Current
(Note 8)
TMIN to
TMAX
-2
+2
+25°C
-0.2
+0.2
On-Resistance
TMIN to
TMAX
60
+25°C
0.2
TMIN to
TMAX
COM_ On-Leakage Current
(Note 8)
2
ICOM_(ON)
V+ = +3.6V,
VCOM_ = +0.3V, +3.0V,
VNO_ or VNC_ = +0.3V, +3V, or
unconnected
3.5
4.5
+25°C
2.7
TMIN to
TMAX
Ω
Ω
9
11
Ω
nA
nA
nA
TMIN to
TMAX
-4
_______________________________________________________________________________________
+4
50Ω, Low-Voltage, Quad SPST/Dual SPDT Analog
Switches in WLP
(V+ = +3V ±10%, VIH = +2.0V, VIL = +0.8V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at V+ = +3V, TA = +25°C.)
(Notes 3, 4)
PARAMETER
SYMBOL
CONDITIONS
TA
MIN
TYP
MAX
57
150
UNITS
DYNAMIC
+25°C
Turn-On Time
tON
VNO_ or VNC_ = +1.5V,
RL = 300Ω, CL = 35pF, Figure 2
Turn-Off Time
tOFF
VNO_ or VNC_ = +1.5V,
RL = 300Ω, CL = 35pF, Figure 2
Break-Before-Make
(MAX4749/MAX4750 Only)
(Note 8)
tBBM
VNO_ or VNC_ = +1.5V,
RL = 300Ω, CL = 35pF, Figure 3
TMIN to
TMAX
170
+25°C
Charge Injection
24
TMIN to
TMAX
Q
60
70
+25°C
TMIN to
TMAX
ns
ns
33
ns
1
VGEN = 0V, RGEN = 0Ω, CL = 1.0nF,
+25°C
Figure 4
7
pC
On-Channel -3dB Bandwidth
BW
Signal = 0dBm, 50Ω in and out
+25°C
250
MHz
Off-Isolation (Note 9)
VISO
f = 1MHz, VNO_ = 1VRMS,
RL = 50Ω, CL = 5pF, Figure 5
+25°C
-72
dB
Crosstalk (Note 10)
VCT
f = 1MHz, VNO_ = 1VRMS,
RL = 50Ω, CL = 5pF, Figure 6
+25°C
84
dB
NO_ or NC_ Off-Capacitance
f = 1MHz, Figure 7
+25°C
20
pF
COM_ Off-Capacitance
CCOM_(OFF) f = 1MHz, Figure 7
COFF
+25°C
20
pF
COM_ On-Capacitance
CCOM_(ON) f = 1MHz, Figure 7
+25°C
40
pF
LOGIC INPUT
Input Logic High
VIH
Input Logic Low
VIL
Input Leakage Current
IIN
1.4
VIN_ = 0V or V+
-1
V
+0.005
0.8
V
+1
µA
11
V
1
µA
POWER SUPPLY
Power-Supply Range
V+
Positive Supply Current
I+
2
V+ = +5.5V, VIN_ = 0V or V+,
all switches on or off
0.0001
_______________________________________________________________________________________
3
MAX4747–MAX4750
ELECTRICAL CHARACTERISTICS—Single +3V Supply (continued)
MAX4747–MAX4750
50Ω, Low-Voltage, Quad SPST/Dual SPDT Analog
Switches in WLP
ELECTRICAL CHARACTERISTICS—Single +5V Supply
(V+ = +5V ±10%, VIH = +2.0V, VIL = +0.8V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at V+ = +5V, TA = +25°C.)
(Notes 3, 4)
PARAMETER
SYMBOL
CONDITIONS
TA
MIN
TYP
MAX
UNITS
V+
V
ANALOG SWITCH
Analog Signal Range
On-Resistance
VCOM_,
VNO_, VNC_
RON
0
V+ = +4.5V,
ICOM_ = 5mA,
VNO_ or VNC_ = +3.0V
+25°C
8.2
TMIN to
TMAX
25
30
+25°C
0.1
3
On-Resistance Matching
Between Channels
(Notes 5, 6)
∆RON
On-Resistance Flatness
(Notes 7)
RFLAT(ON)
V+ = +4.5V, ICOM_ = 5mA,
VNO_ or VNC_ = +1V, +2V, +3V
-0.1
+0.1
INO_(OFF),
INC_(OFF)
V+ = +5.5V,
VCOM_ = +1V, +4.5V,
VNO_ or VNC_ = +4.5V, +1V
+25°C
NO_ or NC_ Off-Leakage Current
(Note 8)
TMIN to
TMAX
-2
+2
V+ = +5.5V,
ICOM_(OFF) VCOM_ = +1V, +4.5V,
VNO_ or VNC_ = +4.5V, +1V
+25°C
-0.1
+0.1
COM_ Off-Leakage Current
(Note 8)
TMIN to
TMAX
-2
+2
+25°C
-0.2
+0.2
TMIN to
TMAX
-4
+4
V+ = +4.5V, ICOM_ = 5mA,
VNO_ or VNC_ = +3.0V
TMIN to
TMAX
4
+25°C
COM_ On-Leakage Current
(Note 8)
ICOM_(ON)
V+ = +5.5V,
VCOM_ = +1V, +4.5V,
VNO_ or VNC_ = +1V, +4.5V, or
unconnected
2.2
TMIN to
TMAX
Ω
Ω
5
7
Ω
nA
nA
nA
DYNAMIC
+25°C
36
85
Turn-On Time
tON
VNO_ or VNC_ = +3.0V,
RL = 300Ω, CL = 35pF,
Figure 2
Turn-Off Time
tOFF
VNO_ or VNC_ = +3.0V,
RL = 300Ω, CL = 35pF,
Figure 2
Break-Before-Make
(MAX4749/MAX4750 Only)
(Note 8)
tBBM
VNO_ or VNC_ = +3.0V,
RL = 300Ω, CL = 35pF,
Figure 3
Q
VGEN = 0V, RGEN = 0Ω,
CL = 1.0nF, Figure 4
+25°C
9
pC
Charge Injection
TMIN to
TMAX
95
+25°C
19
TMIN to
TMAX
TMIN to
TMAX
45
55
+25°C
ns
ns
14
ns
1
On-Channel -3dB Bandwidth
BW
Signal = 0dBm,
50Ω in and out
+25°C
250
MHz
Off-Isolation (Note 9)
VISO
f = 1MHz, VNO_= 1VRMS,
RL = 50Ω, CL = 5pF, Figure 5
+25°C
-72
dB
4
_______________________________________________________________________________________
50Ω, Low-Voltage, Quad SPST/Dual SPDT Analog
Switches in WLP
(V+ = +5V ±10%, VIH = +2.0V, VIL = +0.8V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at V+ = +5V, TA = +25°C.)
(Notes 3, 4)
PARAMETER
SYMBOL
Crosstalk (Note 10)
VCT
NO_ or NC_ Off-Capacitance
COFF
CONDITIONS
TA
MIN
TYP
MAX
UNITS
f = 1MHz, VNO_ = 1VRMS,
RL = 50Ω, CL = 5pF, Figure 6
+25°C
-84
dB
f = 1MHz, Figure 7
+25°C
20
pF
COM_ Off-Capacitance
CCOM_(OFF) f = 1MHz, Figure 7
+25°C
20
pF
COM_ On-Capacitance
CCOM_(ON) f = 1MHz, Figure 7
+25°C
40
pF
LOGIC INPUT
Input Logic High
VIH
Input Logic Low
VIL
Input Leakage Current
IIN
2
VIN_ = 0V or V+
V
-1
+0.005
0.8
V
+1
µA
11
V
1
µA
POWER SUPPLY
Power-Supply Range
V+
Positive Supply Current
I+
2
V+ = +5.5V, VIN_ = 0V or V+,
all switches on or off
0.0001
The algebraic convention, where the most negative value is a minimum and the most positive value a maximum, is used
in this data sheet.
Note 4: WLP parts are 100% tested at +25°C only, and are guaranteed by design over temperature. TSSOP and Thin QFN parts
are 100% tested at +85°C and guaranteed by design over temperature.
Note 5: ∆RON = RON(MAX) - RON(MIN).
Note 6: WLP and Thin QFN on-resistance matching between channels is guaranteed by design.
Note 7: Flatness is defined as the difference between the maximum and minimum value of on-resistance as measured over the
specified analog signal range.
Note 8: Guaranteed by design.
Note 9: Off-isolation = 20 log10 (VNO_/VCOM_), VNO_ = output, VCOM_ = input to off switch.
Note 10: Between any two switches.
Note 3:
Typical Operating Characteristics
(TA = +25°C, unless otherwise noted.)
V+ = 5V
TA = +85°C
12
8
TA = +25°C
TA = +85°C
20
RON (Ω)
30
V+ = 3V
25
TA = +25°C
RON (Ω)
RON (Ω)
V+ = 2V
30
MAX4747–50-toc02
MAX4747–50-toc01
40
ON-RESISTANCE vs. VCOM
ON-RESISTANCE vs. VCOM
16
MAX4747–50-toc03
ON-RESISTANCE vs. VCOM
50
15
20
V+ = 3V
10
10
TA = -40°C
4
V+ = 5V
TA = -40°C
5
V+ = 11V
0
0
0
0
2
4
6
VCOM (V)
8
10
12
0
1
2
3
VCOM (V)
4
5
0
0.5
1.0
1.5
2.0
2.5
3.0
VCOM (V)
_______________________________________________________________________________________
5
MAX4747–MAX4750
ELECTRICAL CHARACTERISTICS—Single +5V Supply (continued)
Typical Operating Characteristics (continued)
(TA = +25°C, unless otherwise noted.)
SUPPLY CURRENT
vs. TEMPERATURE
TA = -40°C
10
0
1.0
1.5
2.0
2.5
-15
VCOM (V)
10
35
60
-40
85
IN LOGIC THRESHOLD
vs. SUPPLY VOLTAGE
FREQUENCY RESPONSE
2.5
2.0
1.5
1.0
MAX4747–50-toc08
-20
LOSS
-30
-40
-50
-60
OFFISOLATION
-70
60
50
PHASE
CROSSTALK
-110
0.01
0
2
4
6
8
10
12
0.1
1
TURN-ON/OFF TIME
vs. TEMPERATURE
100
V+ = 3V
0
1000
0
30
4
6
8
10
12
VCOM (V)
TOTAL HARMONIC DISTORTION
vs. FREQUENCY
VNO = V+/2
100
tON
80
2
1
SOURCE AND LOAD = 600Ω
VCOM = 2VP-P
V+ = 3V
0.1
THD (%)
tON, V+ = 5V
40
20
10
120
TURN-ON/OFF TIME (ns)
MAX4747–50-toc10
70
tON, V+ = 3V
V+ = 5V
TURN-ON/OFF TIME
vs. SUPPLY VOLTAGE
80
50
30
FREQUENCY (MHz)
SUPPLY VOLTAGE (V)
60
40
10
-100
0.5
V+ = 11V
20
-80
-90
85
CHARGE INJECTION vs. VCOM
-10
GAIN (dB)/PHASE (DEGREES)
3.0
MAX4747–50-toc07
VNO_ = V+
3.5
60
35
10
TEMPERATURE (°C)
0
0
-15
TEMPERATURE (°C)
4.0
MAX4747–50-toc06
0.01
-40
CHARGE (pC)
0.5
OFF
0.1
0.1
0
LOGIC THRESHOLD (V)
ON
1
1
5
60
tOFF
V+ = 5V
0.01
40
tOFF, V+ = 3V tOFF, V+ = 5V
20
10
0
0.001
0
-40
-15
10
35
TEMPERATURE (°C)
6
10
MAX4747–50-toc09
10
100
V+ = 5V,
VCOM = 4.5V,
NO_ or NC_ = UNCONNECTED
MAX4747-50 toc12
15
100
MAX4747–50-toc11
RON (Ω)
20
V+ = 3V, 5V
1000
SUPPLY CURRENT (pA)
TA = +85°C
25
MAX4747–50-toc05
V+ = 2.5V
TA = +25°C
LEAKAGE vs. TEMPERATURE
10,000
MAX4747–50-toc04
30
LEAKAGE CURRENT (pA)
ON-RESISTANCE vs. VCOM
TURN-ON/OFF TIME (ns)
MAX4747–MAX4750
50Ω, Low-Voltage, Quad SPST/Dual SPDT Analog
Switches in WLP
60
85
0
2
4
6
8
SUPPLY VOLTAGE (V)
10
12
0.01
0.1
1
FREQUENCY (kHz)
_______________________________________________________________________________________
10
100
50Ω, Low-Voltage, Quad SPST/Dual SPDT Analog
Switches in WLP
PIN
MAX4747
NAME
FUNCTION
MAX4748
MAX4749
MAX4750
1, 3, 8, 11
—
—
—
NO1–NO4
Analog-Switch Normally Open Terminals
—
1, 3, 8, 11
—
—
NC1–NC4
Analog-Switch Normally Closed Terminals
—
—
1, 8
—
NO1, NO3
Analog-Switch Normally Open Terminals
—
—
—
1, 8
NO1, NO2
Analog-Switch Normally Open Terminals
—
—
—
4, 11
NC1, NC2
Analog-Switch Normally Closed Terminals
—
—
3, 11
—
NC2, NC4
Analog-Switch Normally Closed Terminals
2, 4, 9, 10
2, 4, 9, 10
2, 4, 9, 10
—
COM1–COM4
—
—
—
2, 9
COM1, COM2
13, 5, 6, 12
13, 5, 6, 12
13, 5, 6, 12
—
IN1–IN4
Logic-Control Digital Input
—
—
—
13, 6
IN1, IN2
Logic-Control Digital Input
7
7
7
7
GND
14
14
14
14
V+
—
—
—
3, 5, 10, 12
N.C.
Analog-Switch Common Terminal
Analog-Switch Common Terminal
Ground. Connect to digital ground.
Positive Analog and Digital Supply Voltage
Input. Internally connected to substrate.
No Connection. Not internally connected.
Bump Description—WLP
PIN
MAX4747
NAME
FUNCTION
MAX4748
MAX4749
MAX4750
B1, A2, C4, D2
—
—
—
NO1–NO4
Analog-Switch Normally Open Terminals
—
B1, A2, C4, D2
—
—
NC1–NC4
Analog-Switch Normally Closed Terminals
—
—
B1, C4
—
NO1, NO3
Analog-Switch Normally Open Terminals
—
—
—
B1, C4
NO1, NO2
Analog-Switch Normally Open Terminals
—
—
—
A3, D2
NC1, NC2
Analog-Switch Normally Closed Terminals
Analog-Switch Normally Closed Terminals
—
—
A2, D2
—
NC2, NC4
A1, A3, D4, D3
A1, A3, D4, D3
A1, A3, D4, D3
—
COM1–COM4
Analog-Switch Common Terminal
—
—
—
A1, D4
COM1, COM2
C1, A4, B4, D1
C1, A4, B4, D1
C1, A4, B4, D1
—
IN1–IN4
Logic-Control Digital Input
Analog-Switch Common Terminal
—
—
—
C1, B4
IN1, IN2
Logic-Control Digital Input
C3
C3
C3
C3
GND
B2
B2
B2
B2
V+
—
—
—
A2, A4, D1, D3
N.C.
Ground. Connect to digital ground.
Positive Analog and Digital Supply
Voltage Input. Internally connected to
substrate.
No Connection. Not internally connected.
_______________________________________________________________________________________
7
MAX4747–MAX4750
Pin Description—TSSOP
50Ω, Low-Voltage, Quad SPST/Dual SPDT Analog
Switches in WLP
MAX4747–MAX4750
Pin Description—TQFN-EP
PIN
8
NAME
MAX4747
MAX4748
MAX4749
MAX4750
1, 3
1, 3
1, 3
1, 9
COM1, COM2
2
—
—
7
NO2
4, 13
4, 13
4, 13
5, 13
IN2, IN1
5, 12
5, 12
5, 12
—
IN3, IN4
6
6
6
6
GND
FUNCTION
Analog-Switch Common Terminals
Analog-Switch Normally Open Terminal
Logic-Control Digital Inputs
Logic-Control Digital Inputs
Ground. Connect to digital ground.
7
—
7
—
NO3
Analog-Switch Normally Open Terminal
8, 14
8, 14
8, 14
2, 4, 8, 10, 12, 14
N.C.
No Connection. Not internally connected.
9, 10
9, 10
9, 10
—
COM3, COM4
Analog-Switch Common Terminals
11
—
—
—
NO4
15
15
15
15
V+
Analog-Switch Normally Open Terminal
16
—
16
16
NO1
Analog-Switch Normally Open Terminal
—
2
2
11
NC2
Analog-Switch Normally Closed Terminal
—
7
—
—
NC3
Analog-Switch Normally Closed Terminal
—
11
11
—
NC4
Analog-Switch Normally Closed Terminal
—
16
—
3
NC1
Analog-Switch Normally Closed Terminal
—
—
—
—
EP
Positive Supply-Voltage Input
Exposed Pad. Connect EP to V+.
_______________________________________________________________________________________
50Ω, Low-Voltage, Quad SPST/Dual SPDT Analog
Switches in WLP
Test Circuits/Timing Diagrams
Operating Considerations for
High-Voltage Supply
The MAX4747–MAX4750 operate to +11V with some
precautions. The absolute maximum rating for V+ is
+12V (referenced to GND). When operating near this
region, bypass V+ with a minimum 0.1µF capacitor to
ground as close to the IC as possible.
V+
D1
EXTERNAL BLOCKING DIODE
MAX4747–
MAX4750
V+
*
*
NO_
COM_
Logic Levels
The MAX4747–MAX4750 are TTL compatible when
powered from a single +3V supply. When powered from
other supply voltages, the logic inputs should be driven
rail-to-rail. For example, with a +11V supply, IN_ should
be driven low to 0V and high to 11V. With a +3.3V supply, IN_ should be driven low to 0V and high to 3.3V.
Driving IN_ rail-to-rail minimizes power consumption.
Analog Signal Levels
Analog signals that range over the entire supply voltage (GND to V+) pass with very little change in RON
(see the Typical Operating Characteristics). The bidirectional switches allow NO_, NC_, and COM_ connections to be used as either inputs or outputs.
Power-Supply Sequencing and
Overvoltage Protection
CAUTION: Do not exceed the absolute maximum
ratings. Stresses beyond the listed ratings can
cause permanent damage to the devices.
Proper power-supply sequencing is recommended for
all CMOS devices. Always apply V+ before applying
analog signals, especially if the analog signal is not
current limited. If this sequencing is not possible, and if
the analog inputs are not current limited to < 20mA, add
small-signal diode D1 as shown in Figure 1. If the analog signal can dip below GND, add D2. Adding protection diodes reduces the analog signal range to a diode
drop (about 0.7V) below V+ (for D1), and to a diode
drop above ground (for D2). Leakage is unaffected by
adding the diodes. On-resistance increases slightly at
low supply voltages. Maximum supply voltage (V+) must
not exceed +11V.
*
*
GND
EXTERNAL BLOCKING DIODE
D2
GND
*INTERNAL PROTECTION DIODES
Figure 1. Overvoltage Protection Using External Blocking Diodes
Adding protection diodes causes the logic thresholds to
be shifted relative to the power-supply rails. The most
significant shift occurs when using low supply voltages
(+5V or less). With a +5V supply, TTL compatibility is
not guaranteed when protection diodes are added.
Driving IN_ and IN_ all the way to the supply rails (i.e., to
a diode drop higher than the V+ pin, or to a diode drop
lower than the GND pin) is always acceptable.
Protection diodes D1 and D2 also protect against some
overvoltage situations. Using the circuit in Figure 1, no
damage results if the supply voltage is below the
absolute maximum rating (+12V) and if a fault voltage
up to the absolute maximum rating (V+ + 0.3V) is
applied to an analog signal terminal.
WLP Applications Information
For the latest application details on WLP construction,
dimensions, tape carrier information, PC board techniques, bump-pad layout, and recommended reflow
temperature profile, as well as the latest information on
reliability testing results, refer to the Application Note
1891: Wafer-Level Packaging (WLP) and its Applications
on Maxim’s web site at www.maxim-ic.com/wlp.
_______________________________________________________________________________________
9
MAX4747–MAX4750
Applications Information
MAX4747–MAX4750
50Ω, Low-Voltage, Quad SPST/Dual SPDT Analog
Switches in WLP
Test Circuits/Timing Diagrams (continued)
MAX4747–
MAX4750
V+
V+
COM_
NO_
OR NC_
VN_
LOGIC
INPUT
50%
VIL
VOUT
CL
35pF
RL
300Ω
tOFF
IN_
VOUT
SWITCH
OUTPUT
GND
LOGIC
INPUT
tr < 5ns
tf < 5ns
VIH
0.9 x VOUT
0.9 x VOUT
0
tON
CL INCLUDES FIXTURE AND STRAY CAPACITANCE.
RL
VOUT = VN_ ( RL + RON )
LOGIC INPUT WAVEFORMS INVERTED FOR SWITCHES
THAT HAVE THE OPPOSITE LOGIC SENSE.
Figure 2. Switching Time
V+
MAX4749
V+
NO_
VN_
VOUT1
COM_
VOUT2
COM_
NC_
RL2
300Ω
IN_
IN_
LOGIC
INPUT
LOGIC
INPUT
RL1
300Ω
tr < 5ns
tf < 5ns
VIH
50%
VIL
CL1
35pF
SWITCH
OUTPUT 1
(VOUT1)
CL2
35pF
0.9 x V0UT1
0
SWITCH
OUTPUT 2
(VOUT2)
GND
0.9 x VOUT2
0
tBBM
tBBM
CL INCLUDES FIXTURE AND STRAY CAPACITANCE.
Figure 3. Break-Before-Make Interval
V+
MAX4747–
MAX4750
∆VOUT
V+
RGEN
V GEN
NC_
OR NO_
GND
VOUT
COM
CL
1nF
VOUT
IN
OFF
ON
OFF
IN_
VILTO VIH
IN
OFF
ON
OFF
Q = (∆V OUT )(C L )
IN DEPENDS ON SWITCH CONFIGURATION;
INPUT POLARITY DETERMINED BY SENSE OF SWITCH.
Figure 4. Charge Injection
10
______________________________________________________________________________________
50Ω, Low-Voltage, Quad SPST/Dual SPDT Analog
Switches in WLP
10nF
SIGNAL
GENERATOR 0dBm
10nF
V+
MAX4747–
MAX4750
V+
COM_
IN_
VIL OR
VIH
NC_
OR NO_
ANALYZER
SIGNAL
GENERATOR 0dBm
0 OR 2.4V
V+
V+
COM_
NO_/NC_
IN_
IN_
COM_
NO_/NC_
ANALYZER
GND
RL
MAX4747–
MAX4750
50Ω
0 OR
2.4V
N.C.
GND
RL
10nF
VDUAL SUPPLIES USED TO ACCOMMODATE GROUND-REFERENCED INSTRUMENTS.
Figure 5. Off-Isolation/On-Channel Bandwidth
10nF
VDUAL SUPPLIES USED TO ACCOMMODATE GROUND-REFERENCED INSTRUMENTS.
Figure 6. Crosstalk
Ordering Information (continued)
10nF
PART
V+
MAX4747–
MAX4750
V+
COM_
CAPACITANCE
METER
f = 1MHz
IN_
NC_ OR
NO_
GND
Figure 7. Channel Off-/On-Capacitance
VIL OR
VIH
TEMP
RANGE
PIN-/BUMPPACKAGE
MAX4748EUD+
-40°C to +85°C
14 TSSOP
MAX4748ETE+
-40°C to +85°C
16 Thin QFN-EP*
MAX4748EWE+T
-40°C to +85°C
16 WLP
MAX4749EUD+
-40°C to +85°C
14 TSSOP
MAX4749ETE+
-40°C to +85°C
16 Thin QFN-EP*
MAX4749EWE+T**
-40°C to +85°C
16 WLP
MAX4750EUD+
-40°C to +85°C
14 TSSOP
MAX4750ETE+
-40°C to +85°C
16 Thin QFN-EP*
MAX4750EWE+T**
-40°C to +85°C
16 WLP
*EP = Exposed pad.
+Denotes a lead(Pb)-free/RoHS-compliant package.
**Future products. Contact factory for availability.
T = Tape and reel.
______________________________________________________________________________________
11
MAX4747–MAX4750
Test Circuits/Timing Diagrams (continued)
50Ω, Low-Voltage, Quad SPST/Dual SPDT Analog
Switches in WLP
MAX4747–MAX4750
Pin/Bump Configurations/Truth Tables (continued)
V+
N.C.
IN1
+
TOP VIEW
(BUMPS SIDE DOWN)
NC1
TOP VIEW
16
15
14
13
MAX4748
+
COM1
1
12
IN4
NC2
2
11
NO4
4
10
5
6
7
8
NC3
N.C.
*EP
GND
IN2
MAX4748ETE
3
IN3
COM2
9
COM4
COM3
NC1 1
14 V+
COM1 2
13 IN1
NC2 3
12 IN4
COM2 4
10 COM4
IN3 6
9 COM3
8 NC3
GND 7
INPUT
SWITCH STATE
LOW
HIGH
ON
OFF
*CONNECT EP TO V+
NO1
V+
N.C.
IN1
TOP VIEW
16
15
14
13
12
IN4
NC2
2
11
NC4
4
10
5
6
7
8
GND
NO3
N.C.
*EP
IN3
IN2
9
COM4
COM3
14 V+
COM1 2
13 IN1
NC2 3
12 IN4
COM2 4
NO1
V+
N.C.
IN1
16
15
14
13
12
N.C.
N.C.
2
11
NC2
*EP
10 COM4
IN3 6
9 COM3
8 NO3
INPUT
NO1, NO3
NC2, NC4
LOW
HIGH
OFF
ON
ON
OFF
6
7
8
10
N.C.
9
COM2
14 V+
COM1 2
13 IN1
N.C. 3
12 N.C.
NC1 4
11 NC2
N.C. 5
10 N.C.
IN4
12
IN2
GND
NO2
N.C.
NC4
COM4
COM3
MAX4749
1
2
3
4
COM1
NC2
COM2
IN2
NO1
V+
A
IN3
B
IN1
GND
NO3
COM4
COM3
C
IN4
NC4
D
WLP
8 NO2
MAX4750
1
2
3
4
COM1
N.C.
NC1
N.C.
NO1
V+
A
IN2
B
IN1
GND
NO2
N.C.
COM2
C
9 COM2
GND 7
N.C.
NC2
D
TSSOP
WLP
TQFN
*CONNECT EP TO V+
NC3
MAX4748
NO1 1
IN2 6
5
GND
D
MAX4750
1
MAX4750ETE
IN3
IN1
TOP VIEW
(BUMPS SIDE DOWN)
COM1
4
V+
C
+
N.C.
NC1
11 NC4
IN2 5
TOP VIEW
3
IN2
TSSOP
*CONNECT EP TO V+
NC1
COM2
WLP
NO1 1
GND 7
TQFN
+
NC2
B
MAX4749
1
MAX4749ETE
COM1
TOP VIEW
(BUMPS SIDE DOWN)
COM1
3
4
A
+
COM2
3
TSSOP
TQFN
+
2
11 NC4
IN2 5
MAX4748
1
INPUT
NO1, NO2
NC1, NC2
LOW
HIGH
OFF
ON
ON
OFF
______________________________________________________________________________________
50Ω, Low-Voltage, Quad SPST/Dual SPDT Analog
Switches in WLP
PROCESS: CMOS
For the latest package outline information and land patterns
(footprints), go to www.maxim-ic.com/packages. Note that a
“+”, “#”, or “-” in the package code indicates RoHS status only.
Package drawings may show a different suffix character, but
the drawing pertains to the package regardless of RoHS status.
PACKAGE
TYPE
PACKAGE
CODE
OUTLINE
NO.
LAND
PATTERN NO.
14 TSSOP
U14+1
21-0066
90-0113
16 TQFN
T1644+4
21-0139
90-0070
16 WLP
W162D2+1
21-0200
Refer to
Application
Note 1891
______________________________________________________________________________________
13
MAX4747–MAX4750
Package Information
Chip Information
MAX4747–MAX4750
50Ω, Low-Voltage, Quad SPST/Dual SPDT Analog
Switches in WLP
Revision History
REVISION
NUMBER
REVISION
DATE
2
12/06
Various changes
3
1/12
Updated UCSP to WLP packaging, corrected pin configuration, added lead-free
packaging
DESCRIPTION
PAGES
CHANGED
1-15
1-9, 11-13
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits) shown in
the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
14 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2012 Maxim Integrated Products
Maxim is a registered trademark of Maxim Integrated Products, Inc.
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