IRS21952SPBF Features • • • • • • • 2 low side output channels sharing common ground 1 high side output channel CMOS Schmitt trigger inputs with pull down resistor Under voltage lockout on all channels 5 V compatible logic level Inputs Immune to –Vs spike and tolerant to dVs/dt & dVss/dt Shoot through prevention logic Descriptions The IRS21952 contains 2 low side outputs sharing common ground and 1 high side output. Low side drivers can tolerate up to -600 V below input signal (VSS: input supply return). High side driver can tolerate up to 600 V above low side ground (COM: low side supply return). The IRS21952 has better propagation delay and thermal characteristics compared to a photo-coupler driver. The logic inputs are compatible with standard CMOS or LSTTL output. Proprietary HVIC and latch-up immune CMOS technologies enable ruggedized monolithic construction. HIGH SIDE & DUAL LOW SIDE DRIVER IC Product Summary VOFFSET (low side) -600 V (VSS) VOFFSET (high side) 600 V (COM) VOUT ton/toff (typ) Io+/- 10 V to 20 V 330 ns/330 ns 0.5 A/0.5 A Package 16-Lead SOIC (narrow body) Typical Connection Diagram IRS21952SPBF Absolute Maximum Ratings Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. parameters are absolute voltages referenced to COM. Symbol HIN LIN1 LIN2 VDD VSS VB VS HO VCC LO1 LO2 dVS/dt dVSS/dt PD RθJA TJ TS TL Definition Min Max Floating logic level input voltage VSS-0.3 VDD+0.3 Floating logic input supply voltage Floating logic input supply return voltage High side floating well supply voltage High side floating well supply return voltage High side floating gate drive output voltage Low side supply voltage -0.3 VDD-25 -0.3 VB-25 VS-0.3 -0.3 625 VDD+0.3 625 VB+0.3 VB+0.3 25 Low side output voltage -0.3 VCC+0.3 Allowable VS offset transient relative to earth ground Allowable VSS offset transient relative to earth ground Package power dissipation @ TA<=+25 ºC -55 -55 - 50 50 1 100 150 150 300 Thermal resistance, junction to ambient Junction temperature Storage temperature Lead temperature (soldering, 10 seconds) All voltage Units V V/ns V/ns W ºC/W ºC ºC ºC Recommended Operating Conditions For proper operation, the device should be used within the recommended conditions. All voltage parameters are absolute voltages referenced to COM. Definition Symbol HIN LIN1 LIN2 VDD VSS VB VS HO VCC LO1 LO2 TA Note 1: Floating logic level input voltage Floating logic input supply voltage Floating logic input supply return voltage High side floating well supply voltage High side floating well supply return voltage High side floating gate drive output voltage Low side supply voltage Low side output voltage Ambient temperature Min Max VSS VDD VSS+4.5 -5 VS+10 -5 VS 10 VSS+5.5 600 VS+20 600 VB 20 0 VCC -40 125 Units V ºC Logic operation for VS of –5 V to 600 V. Logic state held for VS of –5 V to –VBS. (Please refer to Design Tip DT97-3 for more details). 2 IRS21952SPBF Static Electrical Characteristics (VB-VS)=15 V. The VIN, VIN,TH, VBSUV, VO, IO and IIN parameters are referenced to VS. TA = 25 oC unless otherwise specified. Symbol Definition Min Typ Max Units VCCUV+ VCC supply undervoltage positive going threshold 7.5 8.6 9.7 VCCUV- VCC supply undervoltage negative going threshold 7.0 8.2 9.4 VBSUV+ VBS supply undervoltage positive going threshold 7.5 8.6 9.7 VBSUV- VBS supply undervoltage negative going threshold 7.0 8.2 9.4 VDDUV+ VDD supply undervoltage positive going threshold 3.3 4.1 4.9 VDDUV- VDD supply undervoltage negative going threshold 2.9 3.7 4.5 ILKVCC ILKVBS Offset supply leakage current – both input well and output well --- --- 50 IQBS Quiescent VBS supply current --- 70 140 IQDD Quiescent VDD supply current --- 140 280 IQCC Quiescent VCC supply current --- 200 400 VIH Logic “1” input voltage 3.5 --- --- VIL Logic “0” input voltage --- --- 0.6 VOH High level output voltage, VBIAS-VO --- --- 0.1 VOL Low level output voltage, VO --- --- 0.1 IIN+ Logic “1” input bias current --- 2 10 Test Conditions V VB = VS = 600 V VCC = VCOM = 600 V µA VIN = 0 V or 5 V V Io= 0 A Io= 0 A VIN = 5 V µA IIN- Logic “0” input bias current --- --- 5 VIN = 0 V Io+ Output high short circuit pulsed current --- 0.5 --- VO=0 V,VIN=0 V, PW<=10 µs A Io- Output low short circuit pulsed current --- 0.5 --- VO=15 V,VIN=5 V, PW<=10 µs 3 IRS21952SPBF Dynamic Electrical Characteristics (All values are target data) (VB-VS)= 15 V. CL = 1000 pF unless otherwise specified. All parameters are reference to COM. TA = 25 oC unless otherwise specified. Symbol ton toff tr tf MT_on MT_off Definition Turn-on propagation delay of high and low side Turn-off propagation delay of high and low side Turn-on rise time of high and low side Turn-off fall time of high and low side Turn on propagation delay matching Turn off propagation delay matching Min Typ Max Units --- 330 --- VSS=200 V, VS=0 V --- 330 --- VSS=200 V, VS=400 V --- 25 70 ns Test Conditions VSS=200 V, VS=0 V --- 25 70 VSS=200 V, VS=400 V --- --- 50 VSS=200 V, VS=0 V --- --- 50 VSS=200 V, VS=400 V 4 IRS21952SPBF Functional Block Diagram VB VDD UVLO UVLO R HIN LIN1 Level Pulse R Shift Filter S HO Q VS Down LIN2 Shoot Through Prevention Logic VSS Level Shift Up VCC UVLO UVLO R R LO1 Q R Pulse Pulse R S Filter Filter S LO2 Q COM 5 IRS21952SPBF Lead Definitions Symbol Description VDD Input logic supply voltage HIN Logic input for high side gate driver LIN1, LIN2 Logic inputs for low side gate driver VSS LO1, LO2 Input logic supply return Low side outputs VCC Low side supply voltage COM Low side supply return HO High side output VB High side floating supply voltage VS High side floating supply return Lead Assignments 6 IRS21952SPBF Figure 1: Switching Time Waveforms Shoot Through Prevention Logic HIN1 1 0 0 1 1 0 1 0 LIN1 0 1 0 1 0 1 1 0 LIN2 0 0 1 0 1 1 1 0 HO1 1 0 0 0 0 0 0 0 LO1 0 1 0 0 0 1 0 0 LO2 0 0 1 0 0 1 0 0 7 800 800 700 700 Turn-On Delay Time (ns) Turn-On Delay Time (ns) IRS21952SPBF 600 500 400 300 Typ. 200 100 600 500 400 Typ. 300 200 100 0 0 -50 -25 0 25 50 75 100 125 10 12 500 400 400 Turn-Off Time (ns) Turn-Off Time (ns) 500 300 Typ. 100 20 18 20 Typ. 300 200 0 -25 0 25 50 75 100 125 10 12 Temperature ( C) 14 16 VBIAS Supply Voltage (V) o Figure 3A. Turn-Off Tim e vs. Tem perature Figure 3B. Turn-Off Tim e vs. Supply Voltage 80 Turn-On Rise Time (ns) 80 Turn-On Rise Time (ns) 18 100 0 -50 60 40 20 Typ. 0 -50 16 Figure 2B. Turn-On Tim e vs. Supply Voltage Figure 2A. Turn-On Tim e vs. Tem perature 200 14 VBIAS Supply Voltage (V) Temperature ( C) o 60 40 Typ. 20 0 -25 0 25 50 75 100 Temperature ( C) o Fiure 4A. Turn-On Rise Tim e vs.Tem perature 125 10 12 14 16 18 20 VBIAS Supply Voltage (V) Figure 4B. Turn-On Rise Tim e vs. Supply Voltage 8 IRS21952SPBF 80 Turn-Off Fall Time (ns) Turn-Off Fall Time (ns) 80 60 40 20 Typ. 0 -50 60 40 Typ. 20 0 -25 0 25 50 75 100 125 10 12 Temperature ( C) o 5 5 Input Voltage (V) Input Voltage (V) 6 4 Mi n. 3 2 1 -50 1 25 50 75 100 Min. 10 125 12 4 4 3 3 Input Voltage (V) Input Voltage (V) 16 18 20 Figure 6B. Logic "1" Input Voltage vs. Supply Voltage Figure 6A. Logic "1" Input Voltage vs. Tem perature 2 Max. 0 -50 14 Vcc Supply Voltage (V) Temperature (oC) 1 20 4 2 0 18 Figure 5B. Turn-Off Fall Tim e vs. Supply Voltage 6 -25 16 VBIAS Supply Voltage (V) Figure 5A. Turn-Off Fall Tim e vs. Tem perature 3 14 2 1 Max 0 -25 0 25 50 75 100 Temperature ( oC) Figure 7A. Logic "0" Input Voltage vs. Tem perature 125 10 12 14 16 18 20 Vcc Supply Voltage (V) Figure 7B. Logic "0" Input Voltage vs. Supply Voltage 9 IRS21952SPBF 0.5 High Level Output Voltage (V) High Level Output Voltage (V) 0.5 0.4 0.3 0.2 0.1 Max. 0.0 -50 0.4 0.3 0.2 Max. 0.1 0 -25 0 25 50 75 100 125 10 12 Temperature (oC) 20 0.5 Low Level Output Voltage (V) Low Level Output Voltage (V) 18 Figure 8B. High Level Output vs. Supply Voltage 0.5 0.4 0.3 0.2 Max. 0 -50 0.4 0.3 0.2 Max. 0.1 0 -25 0 25 50 75 100 125 10 12 Temperature ( C) o 14 16 18 20 Vcc Supply Voltage (V) Figure 9A. Low Level Output vs.Tem perature Figure 9B. Low Level Output vs. Supply Voltage 500 500 Offset Supply Leakage Current (uA) Offset Supply Leakage Current (uA) 16 Vcc Supply Voltage (V) Figure 8A. High Level Output vs. Tem perature 0.1 14 400 300 200 100 Max. 0 -50 -25 0 25 50 75 Temperature (oC) 100 125 Figure 10A. Offset Supply Leakage Current vs. Tem perature 400 300 200 100 Max. 0 0 100 200 300 400 500 600 VB Boost Voltage (V) Figure 10B. Offset Supply Leakage Current vs. Supply Voltage 10 IRS21952SPBF 400 VBS Supply Current (uA) VBS Supply Current (uA) 400 300 200 Max. 100 300 200 100 Max. Typ. 0 -50 Typ. 0 -25 0 25 50 75 100 125 10 12 800 600 400 Max. 200 Typ. 20 800 600 400 Max. 200 Typ. 0 -50 -25 0 25 50 75 100 0 125 10 Temperature ( C) o 12 14 16 18 20 Vcc Supply Voltage (V) Figure 12B. V CC Supply Current vs. Supply Voltage Figure 12A. V CC Supply Current vs. Tem perature 600 600 500 VDD Supply Current (uA) VDD Supply Current (uA) 18 1000 Vcc Supply Current (uA) Vcc Supply Current (uA) 1000 400 300 Max. 100 Typ. 0 -50 16 Figure 11B. V BS Supply Current vs. Supply Voltage Figure 11A. V BS Supply Current vs. Tem perature 200 14 VBS Supply Voltage (V) Temperature ( C) o 500 400 300 200 Max. 100 Typ. -25 0 25 50 75 100 Temperature (oC) Figure 13A. V DD Supply Current vs. Tem perature 125 0 10 12 14 16 18 20 V DD Supply Voltage (V) Figure 13B. V DD Supply Current vs. Supply Voltage 11 IRS21952SPBF 40 Logic "1" Input Current (uA) Logic "1" Input Current (uA) 40 30 20 10 Max. 30 20 Max. 10 Typ. Typ. 0 -50 0 -25 0 25 50 75 100 125 10 12 Temperature ( C) 16 18 20 Figure 14B. Logic "1" Input Current vs. Supply Voltage Figure 14A. Logic "1" Input Current vs. Tem perature 10 Logic "0" Input Current (uA) 10 Logic "0" Input Current (uA) 14 Vcc Supply Voltage (V) o 8 6 Max. 4 2 0 -50 8 6 4 Max. 2 0 -25 0 25 50 75 100 Temperature ( C) o Figure 15A. Logic "0" Input Current vs. Tem perature 125 10 12 14 16 18 20 Vcc Supply Voltage (V) Figure 15B. Logic "0" Input Current vs. Supply Voltage 12 IRS21952SPBF 12 Vcc UVLO Threshold (-) (V) Vcc UVLO Threshold (+) (V) 12 11 Max. 10 9 Typ. 8 Min. 7 6 -50 -25 0 25 50 75 100 11 10 Max 9 Typ. 8 Min. 7 6 -50 125 -25 0 Figure 16. Vcc Undervoltage Threshold (+) vs. Tem perature 75 100 125 Figure 17. V CC Undervoltage Threshold (-) vs. Tem perature 12 VBS UVLO Threshold (-) (V) 12 VBS UVLO Threshold (+) (V) 50 Temperature (oC) Temperature (oC) 11 10 Max. 9 Typ. 8 Min. 7 6 -50 -25 0 25 50 75 100 11 10 Max 9 Typ. 8 Min. 7 6 -50 125 -25 0 Temperature (oC) 50 75 100 125 Figure 19. V BS Undervoltage Threshold (-) vs. Tem perature 7.00 VDD UVLO Threshold (-) (V) 7 6.00 Max. 5.00 Typ. 4.00 Min. 3.00 2.00 1.00 -50 25 Temperature (oC) Figure 18. V BS Undervoltage Threshold (+) vs. Tem perature VDD UVLO Threshold (+) (V) 25 -25 0 25 50 75 100 Temperature ( C) o Figure 20. V DD Undervoltage Threshold (+) vs. Tem perature 125 6 5 4 Max. Typ. 3 Min. 2 1 -50 -25 0 25 50 75 100 125 Temperature (oC) Figure 21. V DD Undervoltage Threshold (-) vs. Tem perature 13 IRS21952SPBF 1000 Output Source Current (uA) Output Source Current (uA) 1000 800 Typ. 600 400 200 800 600 400 Typ. 200 0 0 -50 -25 0 25 50 75 100 10 125 12 Temperature ( C) o 16 18 20 V BIAS Supply Voltage (V) Figure 22B. Output Source Current vs. Supply Voltage Figure 22A. Output Source Current vs. Tem perature 1000 Output Sink Current (uA) 1000 Output Sink Current (uA) 14 800 Typ 600 400 200 0 -50 800 600 Typ. 400 200 0 -25 0 25 50 75 100 125 Temperature (oC) 10 12 14 16 18 20 VBIAS Supply Voltage (V) Figure 23B. Output Sink Current vs. Supply Voltage Figure 23A. Output Sink Current vs.Tem perature VS Offset Supply Voltage (V) 0 -2 Typ. -4 -6 -8 -10 -12 10 12 14 16 18 20 V BS Floating Supply Voltage (V) Figure 24. Maxim um V S Negative Offset vs. Supply Voltage 14 IRS21952SPBF NOTES: 1. DIMENSIONING & TOLERANCING PER ANSI Y14.5W-1982 2. CONTROLLING DIMENSION. MILLIMETER 3. DIMENSIONS ARE SHOWN IN MILLIMETER [INCHES] 4. OUTLINE CONFORMS TO JEDEC OUTLINE MS-012AC 5. DIMENSION IS THE LENGTH OF LEAD FOR SOLDERING TO A SUBSTRATE 6. DIMENSION DOES NOT INCLUDE MOLD PROTUSIONS. MOLD PROTUSIONS SHALL NOT EXCEED 0.15 [.006] 16-Lead SOIC (narrow body) 15 IRS21952SPBF LOADED TAPE FEED DIRECTION A B H D F C NOTE : CONTROLLING DIM ENSION IN M M E G CARRIER TAPE DIMENSION FOR Metric Code Min Max A 7.90 8.10 B 3.90 4.10 C 15.70 16.30 D 7.40 7.60 E 6.40 6.60 F 10.20 10.40 G 1.50 n/a H 1.50 1.60 16SOICN Imperial Min Max 0.311 0.318 0.153 0.161 0.618 0.641 0.291 0.299 0.252 0.260 0.402 0.409 0.059 n/a 0.059 0.062 F D C B A E G H REEL DIMENSIONS FOR 16SOICN Metric Imperial Code Min Max Min Max A 329.60 330.25 12.976 13.001 B 20.95 21.45 0.824 0.844 C 12.80 13.20 0.503 0.519 D 1.95 2.45 0.767 0.096 E 98.00 102.00 3.858 4.015 F n/a 22.40 n/a 0.881 G 18.50 21.10 0.728 0.830 H 16.40 18.40 0.645 0.724 16 IRS21952SPBF ORDER INFORMATION 16-Lead SOIC IRS21952SPBF 16-Lead SOIC Tape & Reel IRS21952STRPBF SO-16N package is MSL3 qualified. This product has been designed and qualified for the industrial level. Qualification standards can be found at IR’s Web Site http://www.irf.com/ WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105 Data and specifications subject to change without notice 06/22/2007 17