Approved
(Not Released)
PD - TBD
IRLB4132PbF
HEXFET® Power MOSFET
Applications
l
Optimized for UPS/Inverter Applications
l
Low Voltage Power Tools
VDSS
RDS(on) max
Qg
30V
3.5mΩ
36nC
Benefits
l Best in Class Performance for UPS/Inverter
Applications
l Very Low RDS(on) at 4.5V VGS
l Ultra-Low Gate Impedance
l Fully Characterized Avalanche Voltage
and Current
l Lead-Free
D
G
D
S
TO-220AB
G
D
S
Gate
Drain
Source
Absolute Maximum Ratings
Parameter
Max.
VDS
Drain-to-Source Voltage
30
VGS
± 20
ID @ TC = 25°C
Gate-to-Source Voltage
Continuous Drain Current, VGS @ 10V (Silicon Limited)
ID @ TC = 100°C
Continuous Drain Current, VGS @ 10V (Silicon Limited)
100
ID @ TC = 25°C
Continuous Drain Current, VGS @ 10V (Package Limited)
78
IDM
Pulsed Drain Current
620
PD @TC = 25°C
PD @TC = 100°C
f
c
Maximum Power Dissipation h
Maximum Power Dissipation h
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
Mounting torque, 6-32 or M3 screw
Thermal Resistance
h
Parameter
RθJC
Junction-to-Case
RθCS
Case-to-Sink, Flat Greased Surface
RθJA
Junction-to-Ambient g
Notes through are on page 9
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V
150
A
140
W
68
0.90
Linear Derating Factor
TJ
TSTG
Units
W/°C
-55 to + 175
°C
300 (1.6mm from case)
10lbfxin (1.1N m)
x
Typ.
Max.
–––
1.11
0.5
–––
–––
62
Units
°C/W
1
03/27/09
IRLB4132PbF
Static @ TJ = 25°C (unless otherwise specified)
Parameter
BVDSS
∆ΒVDSS/∆TJ
Min. Typ. Max. Units
Conditions
Drain-to-Source Breakdown Voltage
–––
–––
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
–––
–––
17
2.5
VGS(th)
∆VGS(th)/∆TJ
IDSS
Gate Threshold Voltage
–––
1.35
3.5
1.8
Gate Threshold Voltage Coefficient
Drain-to-Source Leakage Current
–––
–––
-7.7
–––
IGSS
Gate-to-Source Forward Leakage
–––
–––
–––
–––
Gate-to-Source Reverse Leakage
Forward Transconductance
–––
190
–––
–––
mV/°C Reference to 25°C, ID = 1mA
VGS = 10V, ID = 40A
mΩ
VGS = 4.5V, ID = 32A
4.5
2.35
V
VDS = VGS, ID = 100µA
––– mV/°C
1.0
VDS = 24V, VGS = 0V
µA
100
VDS = 24V, VGS = 0V, TJ = 125°C
VGS = 20V
100
nA
VGS = -20V
-100
–––
S VDS = 15V, ID = 32A
Total Gate Charge
Pre-Vth Gate-to-Source Charge
–––
–––
36
9.1
54
–––
Qgs2
Qgd
Post-Vth Gate-to-Source Charge
Gate-to-Drain Charge
–––
–––
4.2
13
–––
–––
Qgodr
Gate Charge Overdrive
Switch Charge (Qgs2 + Qgd)
–––
–––
13
17.2
–––
–––
Output Charge
Gate Resistance
–––
Turn-On Delay Time
Rise Time
–––
–––
–––
21
0.85
23
92
td(off)
tf
Turn-Off Delay Time
Fall Time
–––
–––
25
36
–––
–––
Ciss
Coss
Input Capacitance
Output Capacitance
–––
–––
5110
960
–––
–––
Crss
Reverse Transfer Capacitance
–––
440
–––
RDS(on)
gfs
Qg
Qgs1
Qsw
Qoss
RG
td(on)
tr
V
VGS = 0V, ID = 250µA
30
–––
3.5
e
e
VDS = 15V
nC
VGS = 4.5V
ID = 32A
–––
nC
VDS = 16V, VGS = 0V
1.5
–––
–––
Ω
ns
pF
VDD = 15V, VGS = 4.5V
ID = 32A
e
RG = 1.8Ω
VGS = 0V
VDS = 15V
ƒ = 1.0MHz
Avalanche Characteristics
Parameter
EAS
EAS
IAR
EAR
d
Single Pulse Avalanche Energyi
Avalanche Currentc
Repetitive Avalanche Energy c
Single Pulse Avalanche Energy
Typ.
–––
Max.
310
Units
mJ
–––
–––
900
32
mJ
A
–––
14
mJ
Diode Characteristics
Parameter
Min. Typ. Max. Units
Conditions
IS
Continuous Source Current
–––
–––
ISM
(Body Diode)
Pulsed Source Current
–––
–––
VSD
(Body Diode)
Diode Forward Voltage
–––
–––
1.0
V
p-n junction diode.
TJ = 25°C, IS = 32A, VGS = 0V
Reverse Recovery Time
Reverse Recovery Charge
–––
–––
29
49
44
74
ns
nC
TJ = 25°C, IF = 32A, VDD = 15V
di/dt = 200A/µs
trr
Qrr
ton
2
c
Forward Turn-On Time
150
f
MOSFET symbol
A
620
showing the
integral reverse
e
e
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
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IRLB4132PbF
1000
1000
BOTTOM
TOP
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
TOP
VGS
10V
9.0V
7.0V
5.0V
4.5V
4.0V
3.5V
3.0V
BOTTOM
VGS
10V
9.0V
7.0V
5.0V
4.5V
4.0V
3.5V
3.0V
100
100
≤60µs PULSE WIDTH
Tj = 25°C
3.0V
≤60µs PULSE WIDTH
3.0V
Tj = 175°C
10
10
0.1
1
10
0.1
100
10
100
V DS, Drain-to-Source Voltage (V)
V DS, Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
2.0
RDS(on) , Drain-to-Source On Resistance
(Normalized)
1000
T J = 25°C
ID, Drain-to-Source Current (A)
1
T J = 175°C
100
10
VDS = 15V
≤60µs PULSE WIDTH
ID = 78A
VGS = 10V
1.5
1.0
0.5
1.0
1
2
3
4
5
6
7
VGS, Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
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8
-60 -40 -20 0 20 40 60 80 100120140160180
T J , Junction Temperature (°C)
Fig 4. Normalized On-Resistance
vs. Temperature
3
IRLB4132PbF
100000
14.0
VGS = 0V,
f = 1 MHZ
C iss = C gs + C gd, C ds SHORTED
C rss = C gd
VGS, Gate-to-Source Voltage (V)
ID= 32A
C, Capacitance (pF)
C oss = C ds + C gd
10000
Ciss
Coss
1000
Crss
100
12.0
VDS= 24V
VDS= 15V
10.0
8.0
6.0
4.0
2.0
0.0
1
10
100
0
VDS, Drain-to-Source Voltage (V)
60
80
100
Fig 6. Typical Gate Charge vs.
Gate-to-Source Voltage
10000
1000
ID, Drain-to-Source Current (A)
T J = 175°C
ISD, Reverse Drain Current (A)
40
QG, Total Gate Charge (nC)
Fig 5. Typical Capacitance vs.
Drain-to-Source Voltage
100
10
TJ = 25°C
1
OPERATION IN THIS AREA
LIMITED BY R DS(on)
1000
100µsec
1msec
100
10msec
10
Tc = 25°C
Tj = 175°C
Single Pulse
VGS = 0V
DC
1
0.1
0.0
0.5
1.0
1.5
2.0
2.5
VSD, Source-to-Drain Voltage (V)
Fig 7. Typical Source-Drain Diode
Forward Voltage
4
20
3.0
0
1
10
100
VDS, Drain-to-Source Voltage (V)
Fig 8. Maximum Safe Operating Area
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IRLB4132PbF
2.5
ID, Drain Current (A)
140
VGS(th) , Gate Threshold Voltage (V)
160
Limited By Package
120
100
80
60
40
20
0
2.0
1.5
ID = 100µA
ID = 250µA
ID = 1.0mA
1.0
0.5
25
50
75
100
125
150
175
-75 -50 -25 0
T C , Case Temperature (°C)
25 50 75 100 125 150 175 200
T J , Temperature ( °C )
Fig 9. Maximum Drain Current vs.
Case Temperature
Fig 10. Threshold Voltage vs. Temperature
Thermal Response ( Z thJC ) °C/W
10
1
D = 0.50
0.20
0.10
0.05
0.1
0.02
0.01
0.01
τJ
R1
R1
τJ
τ1
R2
R2
R3
R3
τC
τ1
τ2
τ2
τ3
Ci= τi/Ri
Ci i/Ri
0.001
SINGLE PULSE
( THERMAL RESPONSE )
0.0001
1E-006
1E-005
R4
R4
τ3
τ4
τ4
Ri (°C/W)
τi (sec)
0.85073
0.006515
0.00562
8.246536
0.00099
6.148011
0.25266
0.000371
τ
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.0001
0.001
0.01
0.1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
9
1400
EAS , Single Pulse Avalanche Energy (mJ)
RDS(on), Drain-to -Source On Resistance (m Ω)
IRLB4132PbF
ID = 40A
8
ID
TOP
11A
18A
BOTTOM 32A
1200
7
1000
6
5
T J = 125°C
4
T J = 25°C
3
2
800
600
400
200
0
3
4
5
6
7
8
9
10
25
50
75
VGS, Gate -to -Source Voltage (V)
Fig 12. On-Resistance vs. Gate Voltage
V DS
L
20V
VGS
V GS
DRIVER
RG
D.U.T
RG
IAS
tp
+
V
- DD
125
150
175
Fig 13c. Maximum Avalanche Energy
vs. Drain Current
15V
VDS
100
Starting T J , Junction Temperature (°C)
RD
D.U.T.
+
-V DD
VGS
A
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
0.01Ω
Fig 13a. Unclamped Inductive Test Circuit
V(BR)DSS
tp
Fig 14a. Switching Time Test Circuit
VDS
90%
10%
VGS
td(on)
I AS
Fig 13b. Unclamped Inductive Waveforms
6
tr
t d(off)
tf
Fig 14b. Switching Time Waveforms
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IRLB4132PbF
D.U.T
Driver Gate Drive
P.W.
+
+
-
-
*
D.U.T. ISD Waveform
Reverse
Recovery
Current
+
RG
•
•
•
•
dv/dt controlled by RG
Driver same type as D.U.T.
I SD controlled by Duty Factor "D"
D.U.T. - Device Under Test
V DD
P.W.
Period
VGS=10V
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
D=
Period
+
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
VDD
Forward Drop
Inductor Curent
-
ISD
Ripple ≤ 5%
* VGS = 5V for Logic Level Devices
Fig 15. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
Current Regulator
Same Type as D.U.T.
Id
Vds
50KΩ
12V
Vgs
.2µF
.3µF
D.U.T.
+
V
- DS
Vgs(th)
VGS
3mA
IG
ID
Qgodr
Qgd
Qgs2 Qgs1
Current Sampling Resistors
Fig 16. Gate Charge Test Circuit
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Fig 17. Gate Charge Waveform
7
IRLB4132PbF
TO-220AB Package Outline (Dimensions are shown in millimeters (inches))
TO-220AB packages are not recommended for Surface Mount Application.
Note: For the most current drawing please refer to IR website at: http://www.irf.com/package/
8
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IRLB4132PbF
TO-220AB Part Marking Information
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Note: For the most current drawing please refer to IR website at: http://www.irf.com/package/
Notes:
`Repetitive rating; pulse width limited by
max. junction temperature.
Starting TJ = 25°C, L = 0.61mH, RG = 25Ω,
IAS = 32A.
Pulse width ≤ 400µs; duty cycle ≤ 2%.
Calculated continuous current based on maximum
allowable junction temperature. Package limitation
current is 78A.
When mounted on 1" square PCB (FR-4 or G-10 Material).
For recommended footprint and soldering techniques refer
to application note #AN-994.
Rθ is measured at TJ approximately 90°C.
Starting TJ = 25°C, L = 0.50mH, RG = 25Ω,
IAS = 60A, VDD = 25V.
Data and specifications subject to change without notice.
This product has been designed and qualified for the Industrial market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.03/2009
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9