LINER LT1460GCZ-10 Micropower precision series reference family Datasheet

LT1460
Micropower Precision
Series Reference Family
U
DESCRIPTIO
FEATURES
■
■
■
■
■
■
■
■
■
■
Trimmed to High Accuracy: 0.075% Max
Low Drift: 10ppm/°C Max
Industrial Temperature Range
Temperature Coefficient Guaranteed to 125°C
Low Supply Current: 130µA Max (LT1460-2.5)
Minimum Output Current: 20mA
No Output Capacitor Required
Reverse Battery Protection
Minimum Input/Output Differential: 0.9V
Available in S0-8, MSOP-8, PDIP-8, TO-92 and
SOT- 23 Package
U
APPLICATIO S
■
■
■
■
■
Handheld Instruments
Precision Regulators
A/D and D/A Converters
Power Supplies
Hard Disk Drives
The LT®1460 is a micropower bandgap reference that
combines very high accuracy and low drift with low power
dissipation and small package size. This series reference
uses curvature compensation to obtain low temperature
coefficient and trimmed precision thin-film resistors to
achieve high output accuracy. The reference will supply
up to 20mA with excellent line regulation characteristics,
making it ideal for precision regulator applications.
This series reference provides supply current and power
dissipation advantages over shunt references that must idle
the entire load current to operate. Additionally, the LT1460
does not require an output compensation capacitor, yet
is stable with capacitive loads. This feature is important
where PC board space is a premium or fast settling is
demanded. In the event of a reverse battery connection,
these references will not conduct current, and are therefore
protected from damage.
The LT1460 is available in the 8-lead MSOP, SO, PDIP and
the 3-lead TO-92 and SOT23 packages.
, LTC and LT are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
U
TYPICAL APPLICATIO
Typical Distribution of Output Voltage
S8 Package
Basic Connection
20
LT1460-2.5
IN
C1
0.1µF
OUT
18
2.5V
1400 PARTS
FROM 2 RUNS
16
GND
14
1460 TA01
UNITS (%)
3.4V
TO 20V
12
10
8
6
4
2
0
–0.10
–0.06 –0.02 0 0.02
0.06
OUTPUT VOLTAGE ERROR (%)
0.10
1460 TA02
1460f
1
LT1460
U
W W
W
ABSOLUTE
AXI U RATI GS
(Note 1)
Input Voltage.............................................................30V
Reverse Voltage ......................................................–15V
Output Short-Circuit Duration, TA = 25°C
VIN > 10V ............................................................5 sec
VIN ≤ 10V ..................................................... Indefinite
Specified Temperature Range
Commercial (C)........................................ 0°C to 70°C
Industrial (I) ......................................... –40°C to 85°C
High (H) ............................................. –40°C to 125°C
Storage Temperature Range (Note 2)..... –65°C to 150°C
Lead Temperature (Soldering, 10 sec) .................. 300°C
U
W
U
PACKAGE/ORDER I FOR ATIO
ORDER PART NUMBER
TOP VIEW
IN 1
3 GND
OUT 2
S3 PACKAGE
3-LEAD PLASTIC SOT-23
TJMAX = 125°C, θJA = 325°C/W
LT1460HCS3-2.5
LT1460JCS3-2.5
LT1460KCS3-2.5
LT1460HCS3-3
LT1460JCS3-3
LT1460KCS3-3
LT1460HCS3-3.3
LT1460JCS3-3.3
LT1460KCS3-3.3
LT1460HCS3-5
LT1460JCS3-5
LT1460KCS3-5
LT1460HCS3-10
LT1460JCS3-10
LT1460KCS3-10
S3 PART MARKING†
LTAC
LTAD
LTAE
LTAN
LTAP
LTAQ
LTAR
LTAS
LTAT
LTAK
LTAL
LTAM
LTAU
LTAV
LTAW
}
}
}
}
}
OR LTH8*
OR LTH9*
OR LTJ1*
OR LTJ2*
OR LTJ3*
*The temperature grades and parametric grades are identified by a label on the shipping container. †Product may be identified with either part marking.
1460f
2
LT1460
U
W
U
PACKAGE/ORDER I FOR ATIO
ORDER PART NUMBER
TOP VIEW
DNC* 1
8
DNC*
VIN 2
7
DNC*
DNC* 3
6
VOUT
GND 4
5
DNC*
N8 PACKAGE
8-LEAD PLASTIC DIP
*CONNECTED INTERNALLY.
DO NOT CONNECT EXTERNAL CIRCUITRY TO THESE PINS
TJMAX = 150°C, θJA = 130°C/W
TOP VIEW
DNC* 1
8
DNC*
VIN 2
7
DNC*
DNC* 3
6
VOUT
GND 4
5
DNC*
S8 PACKAGE
8-LEAD PLASTIC SO
*CONNECTED INTERNALLY.
DO NOT CONNECT EXTERNAL CIRCUITRY TO THESE PINS
TJMAX = 150°C, θJA = 190°C/W
LT1460ACN8-2.5
LT1460BIN8-2.5
LT1460DCN8-2.5
LT1460EIN8-2.5
LT1460ACN8-5
LT1460BIN8-5
LT1460DCN8-5
LT1460EIN8-5
LT1460ACN8-10
LT1460BIN8-10
LT1460DCN8-10
LT1460EIN8-10
ORDER PART NUMBER
S8 PART MARKING
LT1460ACS8-2.5
LT1460BIS8-2.5
LT1460DCS8-2.5
LT1460EIS8-2.5
LT1460LHS8-2.5
LT1460MHS8-2.5
1460A2
460BI2
1460D2
460EI2
60LH25
60MH25
LT1460ACS8-5
LT1460BIS8-5
LT1460DCS8-5
LT1460EIS8-5
LT1460LHS8-5
LT1460MHS8-5
1460A5
460BI5
1460D5
460EI5
460LH5
460MH5
LT1460ACS8-10
LT1460BIS8-10
LT1460DCS8-10
LT1460EIS8-10
1460A1
460BI1
1460D1
460EI1
1460f
3
LT1460
U
W
U
PACKAGE/ORDER I FOR ATIO
TOP VIEW
DNC*
VIN
DNC*
GND
BOTTOM VIEW
8
7
6
5
1
2
3
4
DNC*
DNC*
VOUT
DNC*
3
2
1
VIN
VOUT
GND
MS8 PACKAGE
8-LEAD PLASTIC MSOP
*CONNECTED INTERNALLY.
DO NOT CONNECT EXTERNAL
CIRCUITRY TO THESE PINS
TJMAX = 150°C, θJA = 250°C/W
ORDER PART NUMBER
Z PACKAGE
3-LEAD TO-92 PLASTIC
TJMAX = 150°C, θJA = 160°C/W
MS8 PART MARKING
LT1460CCMS8-2.5
LT1460FCMS8-2.5
LT1460CCMS8-5
LT1460FCMS8-5
LT1460CCMS8-10
LT1460FCMS8-10
ORDER PART NUMBER
LTAA
LTAB
LTAF
LTAG
LTAH
LTAJ
LT1460GCZ-2.5
LT1460GIZ-2.5
LT1460GCZ-5
LT1460GIZ-5
LT1460GCZ-10
LT1460GIZ-10
Order Options Tape and Reel: Add #TR
Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF
Lead Free Part Marking: http://www.linear.com/leadfree/
Consult LTC Marketing for parts specified with wider operating temperature ranges.
AVAILABLE OPTIONS
ACCURACY
(%)
TEMPERATURE
COEFFICIENT
(ppm/°C)
N8
S8
0°C to 70°C
0.075
10
LT1460ACN8
LT1460ACS8
–40°C to 85°C
0.10
10
LT1460BIN8
LT1460BIS8
0°C to 70°C
0.10
15
0°C to 70°C
0.10
20
LT1460DCN8
LT1460DCS8
–40°C to 85°C
0.125
20
LT1460EIN8
LT1460EIS8
0°C to 70°C
0.15
25
0°C to 70°C
0.25
25
–40°C to 85°C
0.25
25
–40°C to 85°C/125°C
0.20
20/50
LT1460LHS8
–40°C to 125°C
0.20
50
LT1460MHS8
0°C to 70°C
0.20
20
LT1460HCS3
0°C to 70°C
0.40
20
LT1460JCS3
0°C to 70°C
0.50
50
LT1460KCS3
TEMPERATURE
PACKAGE TYPE
MS8
Z
S3
LT1460CCMS8
LT1460FCMS8
LT1460GCZ
LT1460GIZ
1460f
4
LT1460
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = VOUT + 2.5V, IOUT = 0 unless otherwise specified.
PARAMETER
CONDITIONS
Output Voltage
LT1460ACN8-2.5, ACS8-2.5
2.49813
–0.075
MIN
2.50188
0.075
V
%
LT1460BIN8-2.5, BIS8-2.5, CCMS8-2.5,
DCN8-2.5, DCS8-2.5
2.4975
–0.10
2.5025
0.10
V
%
LT1460EIN8-2.5, EIS8-2.5
2.49688
–0.125
2.50313
0.125
V
%
LT1460FCMS8-2.5
2.49625
–0.15
2.50375
0.15
V
%
LT1460GCZ-2.5, GIZ-2.5
2.49375
–0.25
2.50625
0.25
V
%
2.495
–0.20
2.505
0.20
V
%
4.99625
–0.075
5.00375
0.075
V
%
4.995
–0.10
5.005
0.10
V
%
LT1460EIN8-5, EIS8-5
4.99375
–0.125
5.00625
0.125
V
%
LT1460FCMS8-5
4.9925
–0.15
5.0075
0.15
V
%
LT1460GCZ-5, GIZ-5
4.9875
–0.25
5.0125
0.25
V
%
LT1460LHS8-5, MHS8-5
4.990
–0.20
5.010
0.20
V
%
LT1460ACN8-10, ACS8-10
9.9925
–0.075
10.0075
0.075
V
%
LT1460BIN8-10, BIS8-10, CCMS8-10,
DCN8-10, DCS8-10
9.990
–0.10
10.010
0.10
V
%
LT1460EIN8-10, EIS8-10
9.9875
–0.125
10.0125
0.125
V
%
LT1460FCMS8-10
9.985
–0.15
10.0015
0.15
V
%
LT1460GCZ-10, GIZ-10
9.975
–0.25
10.025
0.25
V
%
LT1460HC
LT1460JC
LT1460KC
–0.2
–0.4
–0.5
0.2
0.4
0.5
%
%
%
LT1460LHS8-2.5, MHS8-2.5
LT1460ACN8-5, ACS8-5
LT1460BIN8-5, BIS8-5, CCMS8-5,
DCN8-5, DCS8-5
Output Voltage Temperature Coefficient (Note 3)
TYP
MAX
UNITS
TMIN ≤ TJ ≤ TMAX
LT1460ACN8, ACS8, BIN8, BIS8
LT1460CCMS8
LT1460DCN8, DCS8, EIN8, EIS8
LT1460FCMS8, GCZ, GIZ
LT1460LHS8
–40°C to 85°C
–40°C to 125°C
LT1460MHS8
–40°C to 125°C
●
●
●
●
●
●
●
5
7
10
12
10
25
25
10
15
20
25
20
50
50
ppm/°C
ppm/°C
ppm/°C
ppm/°C
ppm/°C
ppm/°C
ppm/°C
LT1460HC
LT1460JC
LT1460KC
●
●
●
10
10
25
20
20
50
ppm/°C
ppm/°C
ppm/°C
1460f
5
LT1460
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = VOUT + 2.5V, IOUT = 0 unless otherwise specified.
PARAMETER
CONDITIONS
Line Regulation
LT1460A, LT1460B, LT1460C, LT1460D, LT1460E,
LT1460F, LT1460G, LT1460H, LT1460L, LT1460M
VOUT + 0.9V ≤ VIN ≤ VOUT + 2.5V
LT1460HC, LT1460JC, LT1460KC
TYP
MAX
UNITS
30
60
80
ppm/V
ppm/V
10
25
35
ppm/V
ppm/V
150
800
1000
ppm/V
ppm/V
50
100
130
ppm/V
ppm/V
1500
2800
3500
ppm/mA
ppm/mA
80
135
180
ppm/mA
ppm/mA
70
100
140
ppm/mA
ppm/mA
1000
3000
4000
ppm/mA
ppm/mA
50
200
300
ppm/mA
ppm/mA
20
70
100
ppm/mA
ppm/mA
ΔP = 200mW
0.5
2.5
ppm/mW
ΔP = 200mW
2.5
10
ppm/mW
VOUT + 2.5V ≤ VIN ≤ 20V
MIN
●
●
VOUT + 0.9V ≤ VIN ≤ VOUT + 2.5V
●
VOUT + 2.5V ≤ VIN ≤ 20V
●
Load Regulation Sourcing (Note 4)
LT1460A, LT1460B, LT1460C, LT1460D, LT1460E,
LT1460F, LT1460G, LT1460H, LT1460L, LT1460M
IOUT = 100µA
IOUT = 10mA
IOUT = 20mA
0°C to 70°C
LT1460HC, LT1460JC, LT1460KC
●
●
●
IOUT = 100µA
●
IOUT = 10mA
●
IOUT = 20mA
●
Thermal Regulation (Note 5)
LT1460A, LT1460B, LT1460C, LT1460D, LT1460E,
LT1460F, LT1460G, LT1460H, LT1460L, LT1460M
LT1460HC, LT1460JC, LT1460KC
Dropout Voltage (Note 6)
VIN – VOUT, IOUT = 0
VIN – VOUT, IOUT = 10mA
Output Current
Short VOUT to GND
Reverse Leakage
VIN = –15V
Supply Current
LT1460-2.5
●
0.9
V
●
1.3
1.4
V
V
40
●
10
µA
100
130
165
µA
µA
125
175
225
µA
µA
190
270
360
µA
µA
115
145
175
µA
µA
145
180
220
µA
µA
145
180
220
µA
µA
160
200
240
µA
µA
215
270
350
µA
µA
●
LT1460-5
●
LT1460-10
●
LT1460S3-2.5
●
LT1460S3-3
●
LT1460S3-3.3
●
LT1460S3-5
●
LT1460S3-10
●
mA
0.5
1460f
6
LT1460
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = VOUT + 2.5V, IOUT = 0 unless otherwise specified.
PARAMETER
CONDITIONS
Output Voltage Noise (Note 7)
LT1460A, LT1460B, LT1460C, LT1460D, LT1460E,
LT1460F, LT1460G, LT1460H, LT1460L, LT1460M
LT1460-2.5
0.1Hz ≤ f ≤ 10Hz
10Hz ≤ f ≤ 1kHz
10
10
µVP-P
µVRMS
LT1460-5
0.1Hz ≤ f ≤ 10Hz
10Hz ≤ f ≤ 1kHz
20
20
µVP-P
µVRMS
LT1460-10
0.1Hz ≤ f ≤ 10Hz
10Hz ≤ f ≤ 1kHz
40
35
µVP-P
µVRMS
4
4
ppm (P-P)
ppm (RMS)
40
ppm/√kHr
100
ppm/√kHr
25
160
ppm
ppm
50
250
ppm
ppm
LT1460HC, LT1460JC, LT1460KC
MIN
0.1Hz ≤ f ≤ 10Hz
10Hz ≤ f ≤ 1kHz
Long-Term Stability of Output Voltage (Note 8)
S8 Pkg
LT1460HC, LT1460JC, LT1460KC
Hysteresis (Note 9)
LT1460A, LT1460B, LT1460C, LT1460D, LT1460E,
LT1460F, LT1460G, LT1460H, LT1460L, LT1460M
LT1460HC, LT1460JC, LT1460KC
ΔT = 0°C to 70°C
ΔT = –40°C to 85°C
ΔT = 0°C to 70°C
ΔT = –40°C to 85°C
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: If the part is stored outside of the specified temperature range, the
output may shift due to hysteresis.
Note 3: Temperature coefficient is measured by dividing the change in
output voltage by the specified temperature range. Incremental slope is
also measured at 25°C.
Note 4: Load regulation is measured on a pulse basis from no load to the
specified load current. Output changes due to die temperature change
must be taken into account separately.
Note 5: Thermal regulation is caused by die temperature gradients created
by load current or input voltage changes. This effect must be added to
normal line or load regulation. This parameter is not 100% tested.
Note 6: Excludes load regulation errors. For LT1460S3, ΔVOUT ≤ 0.2%. For
all other packages, ΔVOUT ≤ 0.1%.
Note 7: Peak-to-peak noise is measured with a single highpass filter at
0.1Hz and 2-pole lowpass filter at 10Hz. The unit is enclosed in a still-air
environment to eliminate thermocouple effects on the leads. The test time
is 10 sec. RMS noise is measured with a single highpass filter at 10Hz and
●
●
TYP
MAX
UNITS
a 2-pole lowpass filter at 1kHz. The resulting output is full wave rectified
and then integrated for a fixed period, making the final reading an average
as opposed to RMS. A correction factor of 1.1 is used to convert from
average to RMS and a second correction of 0.88 is used to correct for the
nonideal pass band of the filters.
Note 8: Long-term stability typically has a logarithmic characteristic and
therefore, changes after 1000 hours tend to be much smaller than before
that time. Total drift in the second thousand hours is normally less than
one third that of the first thousand hours with a continuing trend toward
reduced drift with time. Significant improvement in long-term drift can
be realized by preconditioning the IC with a 100 hour to 200 hour, 125°C
burn-in. Long-term stability will also be affected by differential stresses
between the IC and the board material created during board assembly. See
PC Board Layout in the Applications Information section.
Note 9: Hysteresis in output voltage is created by package stress that
differs depending on whether the IC was previously at a higher or lower
temperature. Output voltage is always measured at 25°C, but the IC is
cycled to 85°C or –40°C before successive measurements. Hysteresis
is roughly proportional to the square of the temperature change. For
instruments that are stored at reasonably well-controlled temperatures
(within 20 or 30 degrees of operating temperature) hysteresis is generally
not a problem.
1460f
7
LT1460
U W
TYPICAL PERFOR A CE CHARACTERISTICS
LT1460-2.5 (N8, S8, MS8, Z Packages)
2.5V Minimum Input-Output
Voltage Differential
2.5V Load Regulation, Sourcing
10
–55°C
25°C
125°C
1
0.1
5
125°C
4
3
25°C
2
–55°C
1
0
0
0.5
1.0
1.5
2.0
INPUT-OUTPUT VOLTAGE (V)
80
OUTPUT VOLTAGE CHANGE (mV)
OUTPUT VOLTAGE CHANGE (mV)
OUTPUT CURRENT (mA)
2.5V Load Regulation, Sinking
6
100
2.5
125°C
60
50
25°C
40
30
20
–55°C
10
0
0.1
1
10
OUTPUT CURRENT (mA)
100
1460 G01
2.503
2.5014
3 TYPICAL PARTS
125°C
SUPPLY CURRENT (µA)
125
25°C
100
–55°C
75
125°C
2.5010
OUTPUT VOLTAGE (V)
150
2.502
50
2.5006
25°C
2.5002
2.4998
–55°C
2.499
2.4994
25
0
25
50
TEMPERATURE (°C)
–25
75
0
100
0
5
10
20
15
2
4
6 8 10 12 14 16 18 20
INPUT VOLTAGE (V)
1460 G05
2.5V Power Supply Rejection
Ratio vs Frequency
1460 G06
2.5V Output Impedance vs
Frequency
90
POWER SUPPLY REJECTION RATIO (dB)
0
INPUT VOLTAGE (V)
1460 G04
2.5V Transient Responses
1k
CL= 0.1µF
80
OUTPUT IMPEDANCE (Ω)
70
60
50
40
30
20
CL = 0
100
10
10
1
0.1
0
10
IOUT = 10mA
CL= 1µF
0
–10
100
2.4990
LOAD CAPACITANCE (µF)
2.498
–50
1.5
2.5V Line Regulation
175
2.500
0.5
1.0
OUTPUT CURRENT (mA)
1460 G03
2.5V Supply Current vs Input
Voltage
2.501
0
1460 G02
2.5V Output Voltage
Temperature Drift
OUTPUT VOLTAGE (V)
70
1460 G09
1
1k
10k
100k
FREQUENCY (Hz)
1M
1460 G07
10
100
1k
10k
FREQUENCY (Hz)
100k
1M
1460 G08
1460f
8
LT1460
U W
TYPICAL PERFOR A CE CHARACTERISTICS
2.5V Output Voltage Noise
Spectrum
2.5V Long-Term Drift
Three Typical Parts (S8 Package)
2.5V Output Noise 0.1Hz to 10Hz
1000
2.5000
OUTPUT VOLTAGE (V)
NOISE VOLTAGE (nV/√Hz)
OUTPUT NOISE (10µV/DIV)
2.4998
2.4996
2.4994
2.4992
100
2.4990
10
100
1k
10k
FREQUENCY (Hz)
0
100k
1
2
3
4 5 6
TIME (SEC)
7
8
9
1460 G10
200
0
10
600
400
TIME (HOURS)
800
1000
1460 G12
1460 G11
LT1460-5 (N8, S8, MS8, Z Packages)
5V Minimum Input-Output Voltage
Differential
5V Load Regulation, Sourcing
5V Load Regulation, Sinking
6
100
100
10
25°C
–55°C
1
OUTPUT VOLTAGE CHANGE (mV)
125°C
OUTPUT VOLTAGE CHANGE (mV)
OUTPUT CURRENT (mA)
90
5
4
125°C
25°C
3
2
–55°C
1
80
70
60
25°C
–55°C
50
40
30
125°C
20
10
0.1
0
0
0.5
1.0
1.5
2.0
INPUT-OUTPUT VOLTAGE (V)
2.5
0
0.1
1
10
OUTPUT CURRENT (mA)
1460 G13
5.004
3 TYPICAL PARTS
5V Line Regulation
125°C
180
5.002
25°C
5.000
25°C
140
120
OUTPUT VOLTAGE (V)
SUPPLY CURRENT (µA)
160
4.996
5
5.002
200
4.998
2
3
4
OUTPUT CURRENT (mA)
1460 G15
5V Supply Current vs Input
Voltage
5.000
1
1460 G14
5V Output Voltage
Temperature Drift
OUTPUT VOLTAGE (V)
0
100
–55°C
100
80
60
40
125°C
4.998
4.996
–55°C
4.994
20
4.994
–50
–25
0
25
50
TEMPERATURE (°C)
75
100
0
0
2
4
6
8
10 12 14 16 18 20
INPUT VOLTAGE (V)
1460 G16
1460 G17
4.992
0
2
4
6 8 10 12 14 16 18 20
INPUT VOLTAGE (V)
1460 G18
1460f
9
LT1460
U W
TYPICAL PERFOR A CE CHARACTERISTICS
LT1460-5 (N8, S8, MS8, Z Packages)
5V Power Supply Rejection Ratio
vs Frequency
5V Output Impedance vs
Frequency
POWER SUPPLY REJECTION RATIO (dB)
90
5V Transient Responses
1k
CL = 0
OUTPUT IMPEDANCE (Ω)
70
60
50
40
30
20
LOAD CAPACITANCE (µF)
80
CL= 0.1µF
100
10
10
1
0.1
0
1
CL= 1µF
0.2ms/DIV
10
IOUT = 10mA
0
100
1460 G21
0.1
1k
10k
100k
FREQUENCY (Hz)
1M
100
10
1k
10k
FREQUENCY (Hz)
100k
1M
1460 G20
1460 G19
5V Output Voltage Noise
Spectrum
5V Output Noise 0.1Hz to 10Hz
3000
OUTPUT NOISE (10µV/DIV)
NOISE VOLTAGE (nV/√Hz)
2000
1000
100
10
100
0
100k
1k
10k
FREQUENCY (Hz)
1
2
3
4 5 6
TIME (SEC)
7
8
1460 G22
9
10
1460 G23
LT1460-10 (N8, S8, MS8, Z Packages)
10V Minimum Input/Output
Voltage Differential
10V Load Regulation, Sourcing
10
125°C
1
– 55°C
25°C
100
9
90
8
7
6
5
0
0.5
1.0
1.5
2.0
INPUT/OUTPUT VOLTAGE (V)
2.5
1460 G24
125°C
25°C
4
3
2
1
0.1
10V Load Regulation, Sinking
10
OUTPUT VOLTAGE CHANGE (mV)
OUTPUT VOLTAGE CHANGE (mV)
OUTPUT CURRENT (mA)
100
0
0.1
– 55°C
80
70
25°C
60
– 55°C
50
125°C
40
30
20
10
1
10
OUTPUT CURRENT (mA)
100
1460 G25
0
0
1
3
4
2
OUTPUT CURRENT (mA)
5
1460 G26
1460f
10
LT1460
U W
TYPICAL PERFOR A CE CHARACTERISTICS
10V Output Voltage
Temperature Drift
10.006
10V Supply Current vs Input
Voltage
10V Line Regulation
10.004
400
3 TYPICAL PARTS
360
10.000
320
9.998
9.994
9.990
– 55°C
280
240
OUTPUT VOLTAGE (V)
SUPPLY CURRENT (µA)
OUTPUT VOLTAGE (V)
10.002
25°C
200
125°C
160
120
80
9.986
25°C
9.996
– 55°C
9.992
125°C
9.988
9.984
40
–25
75
0
25
50
TEMPERATURE (°C)
0
100
9.980
0
2
4
6 8 10 12 14 16 18 20
INPUT VOLTAGE (V)
1460 G27
10V Power Supply Rejection
Ratio vs Frequency
8
16
14
12
10
INPUT VOLTAGE (V)
18
20
1460 G29
10V Output Impedance vs
Frequency
10V Transient Responses
1000
100
90
CL = 0µF
OUTPUT IMPEDANCE (Ω)
80
70
60
50
40
30
100
CL = 0.1µF
10
CL = 1µF
1
10
1
0.1
0
20
200µs/DIV
10
10
100
1
INPUT FREQUENCY (kHz)
1000
0.1
0.01
0.1
1
10
FREQUENCY (kHz)
1460 G32
1000
100
1460 G31
1460 G30
10V Output Voltage Noise
Spectrum
10V Output Noise 0.1Hz to 10Hz
10
OUTPUT NOISE (50µV/DIV)
0
0.1
IOUT = 10mA
NOISE VOLTAGE (µV/√Hz)
POWER SUPPLY REJECTION RATIO (dB)
6
1460 G28
LOAD CAPACITANCE (µF)
9.982
– 50
1
0.1
0.01
0.1
1
10
FREQUENCY (kHz)
100
1460 G33
0
2
4
6
8
10
TIME (SEC)
12
14
1460 G34
1460f
11
LT1460
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Characteristic curves are similar for all voltage
options of the LT1460S3. Curves from the LT1460S3-2.5 and the LT1460S3-10 represent the extremes of the voltage options.
Characteristic curves for other output voltages fall between these curves, and can be estimated based on their voltage output.
LT1460S3-2.5V Minimum InputOutput Voltage Differential
LT1460S3-2.5V Load Regulation,
Sourcing
120
0
125°C
25°C
– 55°C
1
0.1
0
0.5
1.0
1.5
2.0
INPUT-OUTPUT VOLTAGE (V)
– 1.0
– 55°C
– 1.5
– 2.0
25°C
– 2.5
125°C
– 3.0
– 3.5
1
10
OUTPUT CURRENT (mA)
25°C
THREE TYPICAL PARTS
SUPPLY CURRENT (µA)
2.499
1
5
2
3
4
OUTPUT CURRENT (mA)
1460 G37
LT1460S3-2.5V Line Regulation
2.502
2.501
25°C
200
2.500
– 55°C
20
0
250
2.501
125°C
40
LT1460S3-2.5V Supply Current
vs Input Voltage
2.502
OUTPUT VOLTAGE (V)
60
1460 G36
LT1460S3-2.5V Output Voltage
Temperature Drift
25°C
125°C
– 55°C
150
100
2.500
– 55°C
2.499
2.498
125°C
2.497
2.496
50
2.498
2.495
2.497
–50 –25
50
25
75
0
TEMPERATURE (°C)
100
0
125
2.494
5
0
10
15
2
4
6 8 10 12 14 16 18 20
INPUT VOLTAGE (V)
1460 G40
1460 G39
LT1460S3-2.5V Power Supply
Rejection Ratio vs Frequency
LT1460S3-2.5V Output Impedance
vs Frequency
LT1460S3-2.5V Transient
Response
1000
80
CL = 0µF
OUTPUT IMPEDANCE (Ω)
60
50
40
30
20
20
LOAD CURRENT (mA)
70
CL = 0.1µF
100
10
CL = 1µF
10
1
0.1
1
200µs/DIV
10
0
0.1
0
20
INPUT VOLTAGE (V)
1460 G38
POWER SUPPLY REJECTION RATIO (dB)
80
100
1460 G35
2.503
100
0
– 4.0
0.1
2.5
OUTPUT VOLTAGE (V)
10
– 0.5
OUTPUT VOLTAGE CHANGE (mV)
OUTPUT VOLTAGE CHANGE (mV)
OUTPUT CURRENT (mA)
100
LT1460S3-2.5V Load Regulation,
Sinking
CLOAD = 0µF
1
10
100
FREQUENCY (kHz)
1000
1460 G41
0.1
0.01
0.1
1
10
FREQUENCY (kHz)
100
1460 G43
1000
1460 G42
1460f
12
LT1460
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Characteristic curves are similar for all voltage
options of the LT1460S3. Curves from the LT1460S3-2.5 and the LT1460S3-10 represent the extremes of the voltage options.
Characteristic curves for other output voltages fall between these curves, and can be estimated based on their voltage output.
LT1460S3-2.5V Output Voltage
Noise Spectrum
LT1460S3-2.5V Output Noise
0.1Hz to 10Hz
LT1460S3-10V Minimum InputOutput Voltage Differential
100
OUTPUT CURRENT (mA)
NOISE VOLTAGE (nV/√Hz)
OUTPUT NOISE (20µV/DIV)
1000
100
25°C
– 55°C
1
0.1
10
100
1k
10k
FREQUENCY (Hz)
0
TIME (2 SEC/DIV)
100k
LT1460S3-10V Load Regulation,
Sinking
35
LT1460S3-10V Output Voltage
Temperature Drift
10.006
250
10.004
15
10
5
– 55°C
0
–5
125°C
125°C
150
25°C
100
–55°C
50
10.000
9.998
9.996
9.994
9.992
9.990
9.988
9.986
9.984
25°C
1
10
OUTPUT CURRENT (mA)
100
0
0
1
3
4
2
OUTPUT CURRENT (mA)
1460 G47
5
9.982
– 50 – 25
50
25
0
75
TEMPERATURE (°C)
100
125
1460 G49
1460 G48
LT1460S3-10V Supply Current
vs Input Voltage
LT1460S3-10V Line Regulation
10.010
350
300
10.005
25°C
250
125°C
– 55°C
200
150
100
OUTPUT VOLTAGE (V)
SUPPLY CURRENT (µA)
–10
0.1
THREE TYPICAL PARTS
10.002
200
OUTPUT VOLTAGE (V)
OUTPUT VOLTAGE CHANGE (mV)
30
20
2.5
1460 G46
LT1460S3-10V Load Regulation,
Sourcing
25
0.5
1.0
1.5
2.0
INPUT-OUTPUT VOLTAGE (V)
1460 G45
1460 G44
OUTPUT VOLTAGE CHANGE (mV)
125°C
10
25°C
10.000
– 55°C
9.995
125°C
9.990
9.985
50
9.980
0
0
2
4
6 8 10 12 14 16 18 20
INPUT VOLTAGE (V)
1460 G50
6
8
14
12
16
10
INPUT VOLTAGE (V)
18
20
1460 G51
1460f
13
LT1460
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Characteristic curves are similar for all voltage
options of the LT1460S3. Curves from the LT1460S3-2.5 and the LT1460S3-10 represent the extremes of the voltage options.
Characteristic curves for other output voltages fall between these curves, and can be estimated based on their voltage output.
LT1460S3-10V Power Supply
Rejection Ratio vs Frequency
LT1460S3-10V Output Impedance
vs Frequency
1000
90
20
70
60
50
40
30
20
LOAD CURRENT (mA)
CL = 0µF
80
OUTPUT IMPEDANCE (Ω)
POWER SUPPLY REJECTION RATIO (dB)
100
LT1460S3-10V Transient
Response
100
CL = 0.1µF
10
CL = 1µF
1
0.1
1
200µs/DIV
10
0
0.1
10
CLOAD = 0µF
1
10
100
FREQUENCY (kHz)
1000
0.1
0.01
0.1
1
10
FREQUENCY (kHz)
100
1460 G52
1460 G54
1000
1460 G53
LT1460S3-10V Output Voltage
Noise Spectrum
LT1460S3-10V Output Noise
0.1Hz to 10Hz
OUTPUT NOISE (20µV/DIV)
NOISE VOLTAGE (µV/√Hz)
10
1
0.1
0.01
0.1
1
10
FREQUENCY (kHz)
100
TIME (2 SEC/DIV)
1460 G56
1460 G55
1460f
14
LT1460
U
U
W
U
APPLICATIO S I FOR ATIO
Longer Battery Life
Series references have a large advantage over older shunt
style references. Shunt references require a resistor from
the power supply to operate. This resistor must be chosen
to supply the maximum current that can ever be demanded
by the circuit being regulated. When the circuit being
controlled is not operating at this maximum current, the
shunt reference must always sink this current, resulting
in high dissipation and short battery life.
1µF, the ringing can be reduced with a small resistor in
series with the reference output as shown in Figure 4.
Figure 5 shows the response of the LT1460-2.5 with a
2.5V
VGEN
1.5V
The LT1460 series reference does not require a current setting resistor and can operate with any supply voltage from
VOUT + 0.9V to 20V. When the circuitry being regulated does
not demand current, the LT1460 reduces its dissipation and
battery life is extended. If the reference is not delivering load
current it dissipates only a few mW, yet the same configuration can deliver 20mA of load current when demanded.
VOUT
RL = 10k
VOUT
RL = 1k
1460 F02
1µs/DIV
Figure 2. CL = 0
2.5V
VGEN
Capacitive Loads
1.5V
The LT1460 is designed to be stable with capacitive loads.
With no capacitive load, the reference is ideal for fast settling, applications where PC board space is a premium,
or where available capacitance is limited.
The test circuit for the LT1460-2.5 shown in Figure 1 is
used to measure the response time for various load currents and load capacitors. The 1V step from 2.5V to 1.5V
produces a current step of 1mA or 100µA for RL = 1k or
RL = 10k. Figure 2 shows the response of the reference
with no load capacitance.
The reference settles to 2.5mV (0.1%) in less than 1µs
for a 100µA pulse and to 0.1% in 1.5µs with a 1mA step.
When load capacitance is greater than 0.01µF, the reference begins to ring due to the pole formed with the output
impedance. Figure 3 shows the response of the reference
to a 1mA and 100µA load current step with a 0.01µF load
capacitor. The ringing can be greatly reduced with a DC
load as small as 200µA. With large output capacitors, ≥
VIN = 5V
CIN
0.1µF
LT1460-2.5
RL
VOUT
VGEN
CL
RL = 10k
VOUT
RL = 1k
1460 F03
20µs/DIV
Figure 3. CL = 0.01µF
RS
VIN = 5V
VOUT
RL
LT1460-2.5
VGEN
CIN
0.1µF
2.5V
1.5V
CL
1460 F04
Figure 4. Isolation Resistor Test Circuit
VGEN
2.5V
1.5V
VOUT
RL = 1k
RS = 0
VOUT
RL = 1k
RS = 2Ω
2.5V
1.5V
1460 F01
Figure 1. Response Time Test Circuit
VOUT
0.1ms/DIV
1460 F05
Figure 5. Effect of RS for CL = 1µF
1460f
15
LT1460
U
U
W
U
APPLICATIO S I FOR ATIO
RS = 2Ω and CL = 1µF. RS should not be made arbitrarily
large because it will limit the load regulation.
Figure 6 to Figure 8 illustrate response in the LT1460-5.
The 1V step from 5V to 4V produces a current step of
1mA or 100µA for RL = 1k or RL = 10k. Figure 7 shows
the response of the reference with no load capacitance.
The reference settles to 5mV (0.1%) in less than 2µs for
a 100µA pulse and to 0.1% in 3µs with a 1mA step. When
load capacitance is greater than 0.01µF, the reference begins
to ring due to the pole formed with the output impedance.
Figure 8 shows the response of the reference to a 1mA
VIN = 5V
LT1460-5
RL
VOUT
The reference settles to 10mV (0.1%) in 0.4µs for a 100µA
pulse and to 0.1% in 0.8µs with a 1mA step. When load
capacitance is greater than 0.01µF, the reference begins
to ring due to the pole formed with the output impedance.
Figure 11 shows the response of the reference to a 1mA and
100µA load current step with a 0.01µF load capacitor.
VIN = 12.5V
VGEN
CIN
0.1µF
and 100µA load current step with a 0.01µF load capacitor.
Figure 9 to Figure 11 illustrate response of the LT1460-10.
The 1V step from 10V to 9V produces a current step of
1mA or 100µA for RL = 1k or RL = 10k. Figure 10 shows
the response of the reference with no load capacitance.
5V
4V
CL
LT1460-10
RL
VOUT
CIN
0.1µF
VGEN
10V
9V
CL
1460 F09
1460 F06
Figure 9. Response Time Test Circuit
Figure 6. Response Time Test Circuit
5V
VGEN
10V
VGEN
4V
VOUT
RL = 10k
VOUT
RL = 1k
2µs/DIV
9V
VOUT
RL = 10k
VOUT
1460 F07
RL = 1k
2µs/DIV
Figure 7. CL = 0
1460 F10
Figure 10. CL = 0
VGEN
10V
5V
4V
VOUT
RL = 10k
VOUT
RL = 1k
10µs/DIV
Figure 8. CL = 0.01µF
1460 F08
VGEN
9V
VOUT
RL = 10k
RL = 1k
VOUT
10µs/DIV
1460 F11
Figure 11. CL = 0.01µF
1460f
16
LT1460
U
W
U
U
APPLICATIO S I FOR ATIO
Table 1 gives the maximum output capacitance for various load currents and output voltages to avoid instability.
Load capacitors with low ESR (effective series resistance)
cause more ringing than capacitors with higher ESR such
as polarized aluminum or tantalum capacitors.
Table 1. Maximum Output Capacitance
VOLTAGE
OPTION
IOUT = 100µA
IOUT = 1mA
2.5V
>10µF
>10µF
2µF
0.68µF
3V
>10µF
>10µF
2µF
0.68µF
3.3V
>10µF
>10µF
1µF
0.68µF
5V
>10µF
>10µF
1µF
0.68µF
10V
>10µF
1µF
0.15µF
0.1µF
IOUT = 10mA IOUT = 20mA
Hysteresis
Hysteresis data shown in Figure 13 and Figure 14 represents
the worst-case data taken on parts from 0°C to 70°C and
from –40°C to 85°C. The device is capable of dissipating
relatively high power, i.e., for the LT1460S3-2.5, PD =
17.5V • 20mA = 350mW. The thermal resistance of the
SOT-23 package is 325°C/W and this dissipation causes
a 114°C internal rise producing a junction temperature of
TJ = 25°C + 114°C = 139°C. This elevated temperature will
cause the output to shift due to thermal hysteresis. For
highest performance in precision applications, do not
let the LT1460S3’s junction temperature exceed 85°C.
18
16
Long-Term Drift
WORST-CASE HYSTERESIS
ON 40 UNITS
NUMBER OF UNITS
14
Long-term drift cannot be extrapolated from accelerated
high temperature testing. This erroneous technique gives
drift numbers that are wildly optimistic. The only way
long-term drift can be determined is to measure it over
the time interval of interest. The LT1460S3 long-term
drift data was taken on over 100 parts that were soldered
into PC boards similar to a “real world” application. The
boards were then placed into a constant temperature oven
with TA = 30°C, their outputs were scanned regularly and
measured with an 8.5 digit DVM. Figure 12 shows typical
long-term drift of the LT1460S3s.
12
10
70°C TO 25°C
0°C TO 25°C
8
6
4
2
0
–240 –200 –160 –120 – 80 –40 0
40
HYSTERESIS (ppm)
80
120 160 200 240
1460 F13
Figure 13. 0°C to 70°C Hysteresis
150
9
8
100
WORST-CASE HYSTERESIS
ON 34 UNITS
NUMBER OF UNITS
7
ppm
50
0
– 50
85°C TO 25°C
–40°C TO 25°C
6
5
4
3
2
–100
1
–150
0 100 200 300 400 500 600 700 800 900 1000
HOURS
0
–600 –500 –400 –300 –200 –100 0 100 200 300 400 500 600
HYSTERESIS (ppm)
1460 F12
Figure 12. Typical Long-Term Drift
1460 F14
Figure 14. –40°C to 85°C Hysteresis
1460f
17
LT1460
U
W
U
U
APPLICATIO S I FOR ATIO
Input Capacitance
Total worst-case output error is:
It is recommended that a 0.1µF or larger capacitor be
added to the input pin of the LT1460. This can help with
stability when large load currents are demanded.
Output Accuracy
Like all references, either series or shunt, the error budget of
the LT1460-2.5 is made up of primarily three components:
initial accuracy, temperature coefficient and load regulation.
Line regulation is neglected because it typically contributes only 30ppm/V, or 75µV for a 1V input change. The
LT1460-2.5 typically shifts less than 0.01% when soldered
into a PCB, so this is also neglected (see PC Board Layout
section). The output errors are calculated as follows for a
100µA load and 0°C to 70°C temperature range:
LT1460AC
Initial accuracy = 0.075%
For IO = 100µA, and using the LT1460-2.5 for calculation,
⎛ 3500ppm⎞
∆VOUT = ⎜
⎟ 0.1mA 2.5V = 875µV
⎝ mA ⎠
(
)( )
which is 0.035%.
For temperature 0°C to 70°C the maximum ΔT = 70°C,
⎛ 10ppm⎞
∆VOUT = ⎜
⎟ 70°C 2.5V = 1.75mV
⎝ °C ⎠
( )( )
0.075% + 0.035% + 0.070% = 0.180%.
Table 1 gives worst-case accuracy for the LT1460AC, CC,
DC, FC, GC from 0°C to 70°C and the LT1460BI, EI, GI
from –40°C to 85°C.
Note that the LT1460-5 and LT1460-10 give identical accuracy as a fraction of their respective output voltages.
PC Board Layout
In 13- to 16-bit systems where initial accuracy and temperature coefficient calibrations have been done, the mechanical and thermal stress on a PC board (in a cardcage
for instance) can shift the output voltage and mask the
true temperature coefficient of a reference. In addition,
the mechanical stress of being soldered into a PC board
can cause the output voltage to shift from its ideal value.
Surface mount voltage references (MS8 and S8) are the
most susceptible to PC board stress because of the small
amount of plastic used to hold the lead frame.
A simple way to improve the stress-related shifts is to
mount the reference near the short edge of the PC board,
or in a corner. The board edge acts as a stress boundary,
or a region where the flexure of the board is minimum.
The package should always be mounted so that the leads
absorb the stress and not the package. The package is
generally aligned with the leads parallel to the long side
of the PC board as shown in Figure 16a.
A qualitative technique to evaluate the effect of stress on
voltage references is to solder the part into a PC board and
which is 0.07%.
Table 1. Worst-Case Output Accuracy Over Temperature
IOUT
LT1460AC
LT1460BI
LT1460CC
LT1460DC
LT1460EI
LT1460FC
LT1460GC
LT1460GI
LT1460HC
LT1460JC
LT1460KC
0
0.145%
0.225%
0.205%
0.240%
0.375%
0.325%
0.425%
0.562%
0.340%
0.540%
0.850%
100µA
0.180%
0.260%
0.240%
0.275%
0.410%
0.360%
0.460%
0.597%
0.380%
0.580%
0.890%
10mA
0.325%
0.405%
0.385%
0.420%
0.555%
0.505%
0.605%
0.742%
0.640%
0.840%
1.15%
20mA
0.425%
N/A
0.485%
0.520%
N/A
0.605%
0.705%
N/A
0.540%
0.740%
1.05%
1460f
18
LT1460
U
U
W
U
APPLICATIO S I FOR ATIO
deform the board a fixed amount as shown in Figure 15.
The flexure #1 represents no displacement, flexure #2 is
concave movement, flexure #3 is relaxation to no displacement and finally, flexure #4 is a convex movement. This
motion is repeated for a number of cycles and the relative
output deviation is noted. The result shown in Figure 16a
is for two LT1460S8-2.5s mounted vertically and Figure
16b is for two LT1460S8-2.5s mounted horizontally. The
parts oriented in Figure 16a impart less stress into the
package because stress is absorbed in the leads. Figures
16a and 16b show the deviation to be between 125µV and
1
250µV and implies a 50ppm and 100ppm change respectively. This corresponds to a 13- to 14-bit system and is
not a problem for most 10- to 12-bit systems unless the
system has a calibration. In this case, as with temperature
hysteresis, this low level can be important and even more
careful techniques are required.
The most effective technique to improve PC board stress
is to cut slots in the board around the reference to serve
as a strain relief. These slots can be cut on three sides of
the reference and the leads can exit on the fourth side. This
“tongue” of PC board material can be oriented in the long
direction of the board to further reduce stress transferred
to the reference.
2
The results of slotting the PC boards of Figures 16a and
16b are shown in Figures 17a and 17b. In this example
the slots can improve the output shift from about 100ppm
to nearly zero.
3
4
1460 F15
Figure 15. Flexure Numbers
2
OUTPUT DEVIATION (mV)
OUTPUT DEVIATION (mV)
2
1
LONG DIMENSION
0
–1
1
LONG DIMENSION
0
–1
0
10
20
30
FLEXURE NUMBER
0
40
20
40
30
FLEXURE NUMBER
1460 F16a
Figure 16a. Two Typical LT1460S8-2.5s, Vertical
Orientation Without Slots
1460 F16b
Figure 16b. Two Typical LT1460S8-2.5s, Horizontal
Orientation Without Slots
2
OUTPUT DEVIATION (mV)
2
OUTPUT DEVIATION (mV)
10
1
0
SLOT
–1
1
0
SLOT
–1
0
10
20
30
FLEXURE NUMBER
Figure 17a. Same Two LT1460S8-2.5s in Figure 16a,
but with Slots
40
1460 F17a
0
10
20
40
30
FLEXURE NUMBER
1460 F17b
Figure 17b. Same Two LT1460S8-2.5s in Figure 16b,
but with Slots
1460f
19
LT1460
SIMPLIFIED SCHEMATIC
VCC
VOUT
GND
1460 SS
1460f
20
LT1460
U
PACKAGE DESCRIPTIO
S3 Package
3-Lead Plastic SOT-23
(Reference LTC DWG # 05-08-1631)
0.764
2.80 – 3.04
(.110 – .120)
0.8 ±0.127
2.10 – 2.64
(.083 – .104)
2.74
1.20 – 1.40
(.047 – .060)
0.96 BSC
1.92
0.45 – 0.60
(.017 – .024)
0.89 – 1.03
(.035 – .041)
RECOMMENDED SOLDER PAD LAYOUT
0.37 – 0.51
(.015 – .020)
0.89 – 1.12
(.035 – .044)
0.55
(.022)
REF
0.09 – 0.18
(.004 – .007)
0.01 – 0.10
(.0004 – .004)
1.78 – 2.05
(.070 – .081)
S3 SOT-23 0502
NOTE:
1. CONTROLLING DIMENSION: MILLIMETERS
MILLIMETERS
2. DIMENSIONS ARE IN
(INCHES)
3. DRAWING NOT TO SCALE
4. DIMENSIONS ARE INCLUSIVE OF PLATING
5. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR
6. MOLD FLASH SHALL NOT EXCEED .254mm
7. PACKAGE JEDEC REFERENCE IS TO-236 VARIATION AB
1460f
21
LT1460
U
PACKAGE DESCRIPTIO
N8 Package
8-Lead PDIP (Narrow .300 Inch)
(Reference LTC DWG # 05-08-1510)
.400*
(10.160)
MAX
8
7
6
5
1
2
3
4
.255 ± .015*
(6.477 ± 0.381)
.300 – .325
(7.620 – 8.255)
.065
(1.651)
TYP
.008 – .015
(0.203 – 0.381)
(
+.035
.325 –.015
8.255
+0.889
–0.381
.130 ± .005
(3.302 ± 0.127)
.045 – .065
(1.143 – 1.651)
)
.120
(3.048) .020
MIN (0.508)
MIN
.018 ± .003
.100
(2.54)
BSC
(0.457 ± 0.076)
N8 1002
NOTE:
1. DIMENSIONS ARE
INCHES
MILLIMETERS
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .010 INCH (0.254mm)
S8 Package
8-Lead Plastic Small Outline (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1610)
.189 – .197
(4.801 – 5.004)
NOTE 3
.045 ±.005
.050 BSC
8
.245
MIN
7
6
5
.160 ±.005
.150 – .157
(3.810 – 3.988)
NOTE 3
.228 – .244
(5.791 – 6.197)
.030 ±.005
TYP
1
RECOMMENDED SOLDER PAD LAYOUT
.010 – .020
× 45°
(0.254 – 0.508)
.008 – .010
(0.203 – 0.254)
0°– 8° TYP
.016 – .050
(0.406 – 1.270)
NOTE:
1. DIMENSIONS IN
.053 – .069
(1.346 – 1.752)
.014 – .019
(0.355 – 0.483)
TYP
INCHES
(MILLIMETERS)
2. DRAWING NOT TO SCALE
3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)
2
3
4
.004 – .010
(0.101 – 0.254)
.050
(1.270)
BSC
SO8 0303
1460f
22
LT1460
U
PACKAGE DESCRIPTIO
MS8 Package
8-Lead Plastic MSOP
(Reference LTC DWG # 05-08-1660)
0.889 ± 0.127
(.035 ± .005)
5.23
(.206)
MIN
3.20 – 3.45
(.126 – .136)
0.42 ± 0.038
(.0165 ± .0015)
TYP
3.00 ± 0.102
(.118 ± .004)
(NOTE 3)
0.65
(.0256)
BSC
8
7 6 5
0.52
(.0205)
REF
RECOMMENDED SOLDER PAD LAYOUT
0.254
(.010)
3.00 ± 0.102
(.118 ± .004)
(NOTE 4)
4.90 ± 0.152
(.193 ± .006)
DETAIL “A”
0° – 6° TYP
GAUGE PLANE
1
0.53 ± 0.152
(.021 ± .006)
2 3
4
1.10
(.043)
MAX
DETAIL “A”
0.86
(.034)
REF
0.18
(.007)
SEATING
PLANE
0.22 – 0.38
(.009 – .015)
TYP
0.127 ± 0.076
(.005 ± .003)
0.65
(.0256)
BSC
MSOP (MS8) 0204
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
Z Package
3-Lead Plastic TO-92 (Similar to TO-226)
(Reference LTC DWG # 05-08-1410)
.180 ± .005
(4.572 ± 0.127)
.060 ± .005
(1.524± 0.127)
DIA
.90
(2.286)
NOM
.180 ± .005
(4.572 ± 0.127)
.500
(12.70)
MIN
.050 UNCONTROLLED
(1.270) LEAD DIMENSION
MAX
.016 ± .003
(0.406 ± 0.076)
.050
(1.27)
BSC
5°
NOM
.015 ± .002
(0.381 ± 0.051)
Z3 (TO-92) 0801
.060 ± .010
(1.524 ± 0.254)
3
2
1
.098 +.016/–.04
(2.5 +0.4/–0.1)
2 PLCS
TO-92 TAPE AND REEL
REFER TO TAPE AND REEL SECTION OF
LTC DATA BOOK FOR ADDITIONAL INFORMATION
.140 ± .010
(3.556 ± 0.127)
10° NOM
1460f
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
23
LT1460
TYPICAL APPLICATIONS
Handling Higher Load Currents
V+
40mA
+
47µF
IN
R1*
LT1460
10mA
VOUT
OUT
GND
RL
TYPICAL LOAD
CURRENT = 50mA
*SELECT R1 TO DELIVER 80% OF TYPICAL LOAD CURRENT.
LT1460 WILL THEN SOURCE AS NECESSARY TO MAINTAIN
PROPER OUTPUT. DO NOT REMOVE LOAD AS OUTPUT WILL
BE DRIVEN UNREGULATED HIGH. LINE REGULATION IS
DEGRADED IN THIS APPLICATION
Boosted Output Current with No Current Limit
V + ≥ (VOUT + 1.8V)
V + – VOUT
40mA
1460 TA03
Boosted Output Current with Current Limit
V+ ≥ VOUT + 2.8V
+
R1
220Ω
R1 =
D1*
LED
47µF
+
R1
220Ω
47µF
8.2Ω
2N2905
2N2905
IN
IN
LT1460
VOUT
100mA
OUT
GND
+
LT1460
OUT
2µF
SOLID
TANT
GND
1460 TA04
+
VOUT
100mA
2µF
SOLID
TANT
* GLOWS IN CURRENT LIMIT,
DO NOT OMIT
1460 TA05
RELATED PARTS
PART NUMBER DESCRIPTION
COMMENTS
LT1019
Precision Bandgap Reference
0.05% Max, 5ppm/°C Max
LT1027
Precision 5V Reference
0.02%, 2ppm/°C Max
LT1236
Precision Low Noise Reference
0.05% Max, 5ppm/°C Max, SO Package
LT1461
Micropower Precision Low Dropout
0.04% Max, 3ppm/°C Max, 50mA Output Current
LT1634
Micropower Precision Shunt Reference 1.25V, 2.5V Output
0.05%, 25ppm/°C Max
LT1790
Micropower Precision Series References
0.05% Max, 10ppm/°C Max, 60µA Supply, SOT23 Package
LTC®1798
Micropower Low Dropout Reference, Fixed or Adjustable
0.15% Max, 40ppm/°C, 6.5µA Max Supply Current
LT6660
Tiny Micropower Precision Series References
0.075% Max, 10ppm/°C Max, 20mA Output, 2mm × 2mm DFN Package
1460f
24 Linear Technology Corporation
LT 0106 • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear.com
© LINEAR TECHNOLOGY CORPORATION 2006
Similar pages