SRAM
AS8S512K32
& AS8S512K32A
Austin Semiconductor, Inc.
512K x 32 SRAM
PIN ASSIGNMENT
SRAM MEMORY ARRAY
(Top View)
AVAILABLE AS MILITARY
SPECIFICATIONS
NC
A0
A1
A2
A3
A4
A5
CS3\
GND
CS4\
WE1\
A6
A7
A8
A9
A10
Vcc
Operation with single 5V supply
High speed: 12, 15, 17, 20, 25 and 35ns
Built in decoupling caps for low noise
Organized as 512Kx32 , byte selectable
Low power CMOS
TTL Compatible Inputs and Outputs
Future offerings
3.3V Power Supply
• Timing
12ns
15ns
17ns
20ns
25ns
35ns
45ns
55ns
-12
-15
-17
-20
-25
-35
-45
-55
• Package
Ceramic Quad Flatpack
Ceramic Quad Flatpack
Ceramic Quad Flatpack
Pin Grid Array
Q
Q1
Q2
P
• Low Power Data Retention Mode
L
• Pinout
Military
Commercial
68 Lead CQFP
Commercial Pinout Option (Q & Q1 with A)
I/O 16
A18
A17
CS4\
CS3\
CS2\
CS1\
NC
Vcc
NC
NC
OE\
WE\
A16
A15
A14
I/O 15
XT
IT
I/O 16
I/O 17
I/O 18
I/O 19
I/O 20
I/O 21
I/O 22
I/O 23
GND
I/O 24
I/O 25
I/O 26
I/O 27
I/O 28
I/O 29
I/O 30
I/O 31
Vcc
A11
A12
A13
A14
A15
A16
CS1\
OE\
CS2\
A17
WE2\
WE3\
WE4\
A18
NC
NC
MARKINGS
• Operating Temperature Ranges
Military (-55oC to +125oC)
Industrial (-40oC to +85oC)
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
I/O17
I/O18
I/O19
Vss
I/O20
I/O21
I/O22
I/O23
Vcc
I/O24
I/O25
I/O26
I/O27
Vss
I/O28
I/O29
I/O30
9
8
7
6
5
4
3
2
1
68
67
66
65
64
63
62
61
OPTIONS
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
I/O 14
I/O 13
I/O 12
Vss
I/O 11
I/O 10
I/O 9
I/O 8
Vcc
I/O 7
I/O 6
I/O 5
I/O 4
Vss
I/O 3
I/O 2
I/O 1
I/O 31
A6
A5
A4
A3
A2
A1
A0
Vcc
A13
A12
A11
A10
A9
A8
A7
I/O 0
•
•
•
•
•
•
•
9
8
7
6
5
4
3
2
1
68
67
66
65
64
63
62
61
I/O 0
I/O 1
I/O 2
I/O 3
I/O 4
I/O 5
I/O 6
I/O 7
GND
I/O 8
I/O 9
I/O 10
I/O 11
I/O 12
I/O 13
I/O 14
I/O 15
FEATURES
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
SMD 5962-94611 (Military Pinout)
MIL-STD-883
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
•
•
68 Lead CQFP (Q, Q1 & Q2)
Military SMD Pinout Option
66 Lead PGA (P)
Military SMD Pinout
(no indicator)
A*
CS
CS
*(available with Q package only)
GENERAL DESCRIPTION
\
The Austin Semiconductor, Inc. AS8S512K32 and
AS8S512K32A are 16 Megabit CMOS SRAM Modules organized as
512Kx32 bits. These devices achieve high speed access, low power
consumption and high reliability by employing advanced CMOS
memory technology.
This military temperature grade product is ideally suited for
military and space applications.
AS8S512K32 & AS8S512K32A
Rev. 6.0 6/05
CS
CS
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
1
SRAM
Austin Semiconductor, Inc.
AS8S512K32
& AS8S512K32A
CS
M3
CS
M2
CS
M1
CS\1
CS1\
WE\
OE\
A0 - A18
M0
512K x 8
CS
512K x 8
CS\2
CS2\
512K x 8
CS3\
CS\3
512K x 8
CS\4
CS4\
I/O 24 - I/O 31
I/O 16 - I/O 23
I/O 8 - I/O 15
I/O 0 - I/O 7
COMMERCIAL PINOUT/BLOCK DIAGRAM
MILITARY PINOUT/BLOCK DIAGRAM
TRUTH TABLE
OE\
L
CE\
CS
L
WE\
H
I/O
DOUT
POWER
ACTIVE
Write(2)
X
L
L
DIN
ACTIVE
Standby
X
H
X
High Z
STANDBY
MODE
Read
AS8S512K32 & AS8S512K32A
Rev. 6.0 6/05
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
2
SRAM
AS8S512K32
& AS8S512K32A
Austin Semiconductor, Inc.
This is a stress rating only and functional operation on the
device at these or any other conditions above those indicated
in the operational sections of this specification is not implied.
Exposure to absolute maximum rating conditions for extended
periods may affect reliability.
**Junction temperature depends upon package type, cycle time,
loading, ambient temperature and airflow. See the Application
Information section at the end of this datasheet for more information.
ABSOLUTE MAXIMUM RATINGS*
Voltage of Vcc Supply Relative to Vss......................-.5V to +7V
Storage Temperature............................................-65°C to +150°C
Short Circuit Output Current(per I/O).................................20mA
Voltage on Any Pin Relative to Vss....................-.5V to Vcc+1V
Maximum Junction Temperature**...................................+150°C
*Stresses greater than those listed under “Absolute Maximum
Ratings” may cause permanent damage to the device.
ELECTRICAL CHARACTERISTICS AND RECOMMENDED DC OPERATING CONDITIONS
(-55oC < TA < 125oC and -40oC to +85oC; Vcc = 5V +10%)
DESCRIPTION
Input High (logic 1) Voltage
CONDITIONS
SYMBOL
VIH
MIN
2.2
VIL
-0.5
0.8
ILI1
-10
10
V
µA
ILI2
-10
10
µA
Output(s) Disabled
0V<VOUT<VCC
ILO
-10
10
µA
Output High Voltage
IOH = 4.0mA
VOH
2.4
Output Low Voltage
IOL = 8.0mA
VOL
Input Low (logic 1) Voltage
Input Leakage Current ADD,OE
0V<VIN<VCC
Input Leakage Current WE, CE
Output Leakage Current I/O
VCC
Supply Voltage
DESCRIPTION
CONDITIONS
SYMBOL -12
4.5
MAX UNITS NOTES
VCC+.5
V
1
1,2
V
1
0.4
V
1
5.5
V
1
-15
-17
MAX
-20 -25
-35
-45
-55 UNITS NOTES
CS\<VIL; VCC = MAX
Power Supply
f = MAX = 1/ tRC (MIN)
Current: Operating
Outputs Open
Icc
250
200
700
650
600
570
570
550
mA
3,13
CS\>VIH; VCC = MAX
Power Supply
f = MAX = 1/ tRC (MIN)
Current: Standby
Outputs Open
ISBT1
80
80
240
240
190
190
150
150
mA
3, 13
ISBT2
80
80
80
80
80
80
80
80
mA
CMOS Standby
AS8S512K32 & AS8S512K32A
Rev. 6.0 6/05
VIN = VCC - 0.2V, or
VSS +0.2V
VCC=Max; f = 0Hz
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
3
SRAM
AS8S512K32
& AS8S512K32A
Austin Semiconductor, Inc.
CAPACITANCE (VIN = 0V, f = 1MHz, TA = 25oC)1
CADD
SYMBOL
PARAMETER
A0 - A18 Capacitance
MAX
50
UNITS
pF
COE
CWE, CCS
OE\ Capacitance
50
pF
CIO
WE\ and CS\ Capacitance
20
pF
I/O 0- I/O 31 Capacitance
20
pF
CWE ("A" version)
WE\ Capacitance
50
pF
NOTE:
1. This parameter is sampled.
AC TEST CONDITIONS
Test Specifications
Input pulse levels.........................................VSS to 3V
Input rise and fall times.........................................5ns
Input timing reference levels...............................1.5V
Output reference levels........................................1.5V
Output load..............................................See Figure 1
IOL
Current Source
Device
Under
Test
-
+
Vz = 1.5V
(Bipolar
Supply)
+
Ceff = 50pf
Current Source
NOTES:
Vz is programmable from -2V to + 7V.
IOL and IOH programmable from 0 to 16 mA.
Vz is typically the midpoint of VOH and VOL.
IOL and IOH are adjusted to simulate a typical resistive load
circuit.
AS8S512K32 & AS8S512K32A
Rev. 6.0 6/05
IOH
Figure 1
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
4
SRAM
AS8S512K32
& AS8S512K32A
Austin Semiconductor, Inc.
ELECTRICAL CHARACTERISTICS AND RECOMMENDED AC OPERATING CONDITIONS
(NOTE 5) (-55oC<TA < 125oC and -40oC to +85oC; VCC = 5V +10%)
DESCRIPTION
READ CYCLE
READ cycle time
Address access time
Chip select access time
Output hold from address change
Chip select to output in Low-Z
Chip select to output in High-Z
Output enable access time
Output enable to output in Low-Z
Output disable to output in High-Z
WRITE CYCLE
WRITE cycle time
Chip select to end of write
Address valid to end of write
Address setup time
Address hold from end of write
WRITE pulse width
WRITE pulse width
Data setup time
Data hold time
Write disable to output in Low-z
Write enable to output in High-Z
AS8S512K32 & AS8S512K32A
Rev. 6.0 6/05
SYMBOL
t
RC
AA
t
ACS
t
OH
t
LZCS
t
HZCS
t
AOE
t
LZOE
t
HZOE
-12
-15
-17
-20
-25
-35
-45
-55
UNITS NOTES
MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX
12
t
t
WC
CW
t
AW
t
AS
t
AH
t
WP1
t
WP2
t
DS
t
DH
t
LZWE
t
HZWE
t
15
12
12
2
2
2
2
7
7
0
17
15
15
2
2
8
8
0
20
17
17
2
2
9
9
0
15
12
12
2
1
12
12
10
0
2
8
2
2
0
17
15
15
2
1
15
15
12
0
2
2
2
0
2
2
0
15
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
2
2
0
20
20
0
20
45
25
25
2
1
25
25
20
0
2
15
20
ns
ns
ns
ns
ns
ns
ns
ns
ns
55
55
20
20
15
35
20
20
2
1
20
20
15
0
2
13
55
45
45
15
15
12
25
17
17
2
1
17
17
12
0
2
11
45
35
35
12
12
12
20
15
15
2
1
15
15
10
0
2
9
35
25
25
10
10
12
12
10
10
2
1
10
10
8
0
2
7
25
20
20
55
25
25
2
1
25
25
20
0
2
15
4,6,7
4,6,7
4,6
4,6
4,6,7
4,6,7
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
5
SRAM
AS8S512K32
& AS8S512K32A
Austin Semiconductor, Inc.
READ CYCLE NO. 1
tRC
ADDRESS
DATA I/O
tAA
1234
112345
1234
1
1234
12345
1
1234
1 DATA VALID
PREVIOUS DATA VALID 1234
12345
1 1234
1
tOH
READ CYCLE NO. 2
tRC
ADDRESS
tAA
1234
12345
12345678
1234
12345
12345678
12345
1234
12345678
CS\ 12345
1234
12345678
1234
12345678
tACS
t
1234
123456789012
1234
123456789012 LZCS
12345
1234
12345
123456789012
1234
123456789012
OE\ 12345
12345
1234
123456789012
DATA I/O
AS8S512K32 & AS8S512K32A
Rev. 6.0 6/05
tAOE
tLZOE
HIGH IMPEDANCE
1234
1123
1234
1
1234
1123
1234
1
1234
11234
1
123
1234
11234
1
123
123456789
1234567
123456
123456789
1234567
123456
1234567
123456
123456789
123456789
1234567
123456
123456789
123456
t
123456789012
1234567
123456
HZCS
123456789012
1234567
123456
123456789012
1234567
123456
123456789012
1234567
123456
123456789012
1234567
123456
tHZOE
DATA VALID
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
6
SRAM
Austin Semiconductor, Inc.
AS8S512K32
& AS8S512K32A
WRITE CYCLE NO. 1
(Chip Select Controlled)
tWC
ADDRESS
t AW
12345
1234
12345678
1234
12345
12345678
12345
1234
12345678
CS\12345
1234
12345678
12345
1234
12345678
tAS
WE\
tAH 1234567
123456789012
12345
123456789012
1234567
12345
123456789012
1234567
12345
1234567
12345
123456789012
123456789012
1234567
12345
tCW
t WP1 1
123456
123456
123456
123456
tHZWE
1
12345678901234
1234
1
12345678901234
1
1234
1
12345678901234
1234
1
DATA I/O 1
tDS
tLZWE
tDH
DATA VALID
1234
1234
1234
1234
1234
1234
1234
WRITE CYCLE NO. 2
(Write Enable Controlled)
tWC
ADDRESS
tAS
123456
123456
123456
123456
12345678
12345678
WE\ 12345678
12345678
CS\
t AW
123456789012
123456
12345
123456789012
123456
12345
123456789012
123456
12345
123456789012
123456
12345
t WP2 1
tDS
DATA I/O
AS8S512K32 & AS8S512K32A
Rev. 6.0 6/05
tAH
tCW
tDH
DATA VALID
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
7
SRAM
AS8S512K32
& AS8S512K32A
Austin Semiconductor, Inc.
NOTES
1. All voltages referenced to VSS (GND).
2. -2V for pulse width <20ns.
3. ICC is dependent on output loading and cycle rates.
unloaded, and f=
7. At any given temperature and voltage condition,
tHZCS, is less than tLZCS, and tHZWE is less than tLZWE.
8. WE\ is HIGH for READ cycle.
9. Device is continuously selected. Chip selects and output
enable are held in their active state.
10. Address valid prior to or coincident with latest occurring
chip enable.
11. tRC= READ cycle time.
12. Chip enable (CS\) and write enable (WE\) can initiate and
terminate a WRITE cycle.
13. ICC is for 32 bit mode.
1
t RC(MIN) HZ.
The specified value applies with the outputs
4. This parameter guaranteed but not tested.
5. Test conditions as specified with output loading as
shown in Fig. 1 unless otherwise noted.
6. tHZCS, tHZOE and tHZWE are specified with CL= 5pF as in Fig. 2.
Transition is measured +/- 200 mV typical from steady state
voltage, allowing for actual tester RC time constant.
LOW POWER CHARACTERISTICS (L Version Only)
CONDITIONS
DESCRIPTION
VCC for Retention Data
Data Retention Current
All Inputs @ Vcc + 0.2V
or Vss + 0.2V,
CS\ = Vcc + 0.2V
SYMBOL
VDR
MIN
2
MAX
UNITS
V
VCC = 2V
ICCDR
20
mA
VCC = 3V
ICCDR
28*
mA
Chip Deselect to Data
Retention Time
NOTES
tCDR
0
ns
4
tR
tRC
ns
4, 11
Operation Recovery Time
* -12 and -15 have a 32mA limit.
LOW VCC DATA RETENTION WAVEFORM
DATA RETENTION MODE
VCC
4.5V
4.5V
VDR>2V
t
t
CDR
CS\ 1-4
R
123456789012345678
12345
12345678
123456789012345678
12345
12345678
12345678
12345
123456789012345678
12345
12345678
123456789012345678
12345
12345678
123456789012345678
12345
12345678
123456789012345678
12345
12345678
123456789012345678
12345
12345678
123456789012345678
AS8S512K32 & AS8S512K32A
Rev. 6.0 6/05
VDR
123456789012345678
12345678
12345
123456789012345678
12345678
12345
123456789012345678
12345678
12345
123456789012345678
12345678
12345
123456789012345678
12345678
12345
123456789012345678
12345678
12345
123456789012345678
12345678
12345
123456789012345678
12345678
12345
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
8
SRAM
AS8S512K32
& AS8S512K32A
Austin Semiconductor, Inc.
MECHANICAL DEFINITIONS*
ASI Case #702 (Package Designator Q)
SMD 5962-94611, Case Outline M
4 x D2
DETAIL A
4 x D1
D
R
1o - 7o
B
b
L1
e
SEE DETAIL A
A1
A
A2
E
SMD SPECIFICATIONS
SYMBOL
A
A1
A2
B
b
D
D1
D2
E
e
R
L1
MIN
0.123
0.118
0.000
MAX
0.200
0.186
0.020
0.010 REF
0.013
0.017
0.800 BSC
0.870
0.980
0.936
0.890
1.000
0.956
0.050 BSC
0.005
0.035
--0.045
*All measurements are in inches.
AS8S512K32 & AS8S512K32A
Rev. 6.0 6/05
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
9
SRAM
AS8S512K32
& AS8S512K32A
Austin Semiconductor, Inc.
MECHANICAL DEFINITIONS*
ASI Package Designator Q2
D2
D1
D
1
b
D3
e
ASI PACKAGE SPECIFICATION
Symbol
Max
Min
A
.200
A1
.070
.080
b
.013
.017
.010 REF
B
.800 BSC
D
D1
.870
.890
1.010
1.030
D2
.975
D3
.995
.050 BSC
e
.010 TYP
R
.050
L1
.065
A
R
L1
B
A1
Dimensions in inches
*All measurements are in inches.
AS8S512K32 & AS8S512K32A
Rev. 6.0 6/05
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
10
SRAM
AS8S512K32
& AS8S512K32A
Austin Semiconductor, Inc.
MECHANICAL DEFINITIONS*
ASI Case #904 (Package Designator P )
SMD 5962-94611, Case Outline T
4xD
D1
A
D2
Pin 56
A1
Pin 1
φb1
(identified by
0.060 square pad)
E1
e
φb
Pin 66
e
Pin 11
L
SMD SPECIFICATIONS
SYMBOL
A
A1
φb
φb1
D
D1/E1
D2
e
L
MIN
0.144
0.025
0.016
0.045
1.065
MAX
0.181
0.035
0.020
0.055
1.085
1.000 TYP
0.600 TYP
0.100 TYP
0.145
0.155
*All measurements are in inches.
AS8S512K32 & AS8S512K32A
Rev. 6.0 6/05
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
11
SRAM
Austin Semiconductor, Inc.
AS8S512K32
& AS8S512K32A
MECHANICAL DEFINITIONS*
ASI Case (Package Designator Q1)
SMD 5962-94611, Case Outline A
SYMBOL
A
A1
b
B
c
D/E
D1/E1
D2/E2
e
L
R
SMD SPECIFICATIONS
MIN
MAX
--0.200
0.054
--0.013
0.017
0.010 TYP
0.009
0.012
0.980
1.000
0.870
0.890
0.800 BSC
0.050 BSC
0.035
0.045
0.010 TYP
*All measurements are in inches.
AS8S512K32 & AS8S512K32A
Rev. 6.0 6/05
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
12
SRAM
Austin Semiconductor, Inc.
AS8S512K32
& AS8S512K32A
ORDERING INFORMATION
EXAMPLE: AS8S512K32Q-15/883C
Device Number
AS8S512K32
AS8S512K32
AS8S512K32
AS8S512K32
AS8S512K32
AS8S512K32
AS8S512K32
AS8S512K32
Package
Type
Q
Q
Q
Q
Q
Q
Q
Q
Speed
ns
-12
-15
-17
-20
-25
-35
-45
-55
EXAMPLE: AS8S512K32Q1-55/IT
Device
Package
Options**
Speed ns Process
Number
Type
AS8S512K32
Q1
-12
/*
AS8S512K32
Q1
-15
/*
AS8S512K32
Q1
-17
/*
AS8S512K32
Q1
-20
/*
AS8S512K32
Q1
-25
/*
AS8S512K32
Q1
-35
/*
AS8S512K32
Q1
-45
/*
-55
AS8S512K32
Q1
/*
Options** Process
/*
/*
/*
/*
/*
/*
/*
/*
EXAMPLE: AS8S512K32P-25L/XT
Device Number
AS8S512K32
AS8S512K32
AS8S512K32
AS8S512K32
AS8S512K32
AS8S512K32
AS8S512K32
AS8S512K32
Package
Type
P
P
P
P
P
P
P
P
Speed
ns
-12
-15
-17
-20
-25
-35
-45
-55
EXAMPLE: AS8S512K32Q2-35L/XT
Device
Package
Options**
Speed ns Process
Number
Type
AS8S512K32
Q2
-12
/*
AS8S512K32
Q2
-15
/*
AS8S512K32
Q2
-17
/*
AS8S512K32
Q2
-20
/*
AS8S512K32
Q2
-25
/*
AS8S512K32
Q2
-35
/*
AS8S512K32
Q2
-45
/*
-55
AS8S512K32
Q2
/*
Options** Process
/*
/*
/*
/*
/*
/*
/*
/*
*AVAILABLE PROCESSES
-40oC to +85oC
-55oC to +125oC
-55oC to +125oC
-55oC to +125oC
IT = Industrial Temperature Range
XT = Extended Temperature Range
Q = Full Military Processing
SPACE= Class K Equivalent
**DEFINITION OF OPTIONS
no indicator = Military Pinout
AS8S512K32 & AS8S512K32A
Rev. 6.0 6/05
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
13
SRAM
Austin Semiconductor, Inc.
AS8S512K32
& AS8S512K32A
ASI TO DSCC PART NUMBER
CROSS REFERENCE
Package Designator Q
ASI Part #
Package Designator P
SMD Part #
ASI Part #
SMD Part #
AS8S512K32Q-12/Q
AS8S512K32Q-15/Q
AS8S512K32Q-17/Q
AS8S512K32Q-20/Q
AS8S512K32Q-25/Q
AS8S512K32Q-35/Q
AS8S512K32Q-45/Q
AS8S512K32Q-55/Q
5962-9461120HMX
5962-9461119HMX
5962-9461110HMX
5962-9461109HMX
5962-9461108HMX
5962-9461107HMX
5962-9461106HMX
5962-9461105HMX
AS8S512K32P-12/Q
AS8S512K32Q-15/Q
AS8S512K32P-17/Q
AS8S512K32P-20/Q
AS8S512K32P-25/Q
AS8S512K32P-35/Q
AS8S512K32P-45/Q
AS8S512K32P-55/Q
5962-9461120HTA
5962-9461119HTA
5962-9461110HTA
5962-9461109HTA
5962-9461108HTA
5962-9461107HTA
5962-9461106HTX
5962-9461105HTX
AS8S512K32Q-12/Q
AS8S512K32Q-15/Q
AS8S512K32Q-17/Q
AS8S512K32Q-20/Q
AS8S512K32Q-25/Q
AS8S512K32Q-35/Q
AS8S512K32Q-45/Q
AS8S512K32Q-55/Q
5962-9461118HMX
5962-9461117HMX
5962-9461116HMX
5962-9461115HMX
5962-9461114HMX
5962-9461113HMX
5962-9461112HMX
5962-9461111HMX
AS8S512K32Q-15/Q
AS8S512K32P-12/Q
AS8S512K32P-17/Q
AS8S512K32P-20/Q
AS8S512K32P-25/Q
AS8S512K32P-35/Q
AS8S512K32P-45/Q
AS8S512K32P-55/Q
5962-9461117HTA
5962-9461118HTA
5962-9461116HTA
5962-9461115HTA
5962-9461114HTA
5962-9461113HTA
5962-9461112HTA
5962-9461111HTA
Package Designator Q1
ASI Part #
AS8S512K32 & AS8S512K32A
Rev. 6.0 6/05
SMD Part #
AS8S512K32Q1-12/Q
AS8S512K32Q1-15/Q
AS8S512K32Q1-17/Q
AS8S512K32Q1-20/Q
AS8S512K32Q1-25/Q
AS8S512K32Q1-35/Q
AS8S512K32Q1-45/Q
AS8S512K32Q1-55/Q
5962-9461120HAX
5962-9461119HAX
5962-9461110HAX
5962-9461109HAX
5962-9461108HAX
5962-9461107HAX
5962-9461106HAX
5962-9461105HAX
AS8S512K32Q1-12/Q
AS8S512K32Q1-15/Q
AS8S512K32Q1-17/Q
AS8S512K32Q1-20/Q
AS8S512K32Q1-25/Q
AS8S512K32Q1-35/Q
AS8S512K32Q1-45/Q
AS8S512K32Q1-55/Q
5962-9461118HAX
5962-9461117HAX
5962-9461116HAX
5962-9461115HAX
5962-9461114HAX
5962-9461113HAX
5962-9461112HAX
5962-9461111HAX
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
14