LT1012A/LT1012 Picoamp Input Current, Microvolt Offset, Low Noise Op Amp DESCRIPTIO U FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ OP-07 Type Performance: at 1/8th of OP-07’s Supply Current at 1/20th of OP-07’s Bias and Offset Currents Guaranteed Offset Voltage: 25µV Max Guaranteed Bias Current: 100pA Max Guaranteed Drift: 0.6µV/°C Max Low Noise, 0.1Hz to 10Hz: 0.5µVP-P Guaranteed Low Supply Current: 500µA Max Guaranteed CMRR: 114dB Min Guaranteed PSRR: 114dB Min Guaranteed Operation at ±1.2V Supplies U APPLICATIO S ■ ■ ■ ■ ■ ■ ■ Replaces OP-07 While Saving Power Precision Instrumentation Charge Integrators Wide Dynamic Range Logarithmic Amplifiers Light Meters Low Frequency Active Filters Thermocouple Amplifiers The LT ®1012 is an internally compensated universal precision operational amplifier which can be used in practically all precision applications. The LT1012 combines picoampere bias currents (which are maintained over the full –55°C to 125°C temperature range), microvolt offset voltage (and low drift with time and temperature), low voltage and current noise, and low power dissipation. The LT1012 achieves precision operation on two Ni-Cad batteries with 1mW of power dissipation. Extremely high common mode and power supply rejection ratios, practically unmeasurable warm-up drift, and the ability to deliver 5mA load current with a voltage gain of one million round out the LT1012’s superb precision specifications. The all around excellence of the LT1012 eliminates the necessity of the time consuming error analysis procedure of precision system design in many applications; the LT1012 can be stocked as the universal internally compensated precision op amp. , LTC and LT are registered trademarks of Linear Technology Corporation. Protected by U. S. patents 4,575,685 and 4,775,884 U TYPICAL APPLICATIO ± 250V Common Mode Range Instrumentation Amplifier (AV = 1) R1 1M R5 975k 1 R2 20k 6V TO 18V 2 R3 1M +IN 7 200 4 – 50k R6 25k 7 2 6 OUT LT1012 6 5 3 + OPTIONAL CMRR TRIM 4 R4 19.608k – 6V TO –18V R1 TO R6: VISHAY 444 ACCUTRACT THIN FILM SIP NETWORK X : VISHAY 444 PIN NUMBERS VISHAY INTERTECHNOLOGY, INC 63 LINCOLN HIGHWAY MALVERN, PA 19355 COMMON MODE REJECTION RATIO = 74dB (RESISTOR LIMITED) WITH OPTIONAL TRIM = 130dB OUTPUT OFFSET (TRIMMABLE TO ZERO) = 500µV OUTPUT OFFSET DRIFT = 10µV/°C INPUT RESISTANCE = 1M LT1012A • TA01 160 NUMBER OF UNITS –IN 3 COMMON MODE INPUT ± 250V Typical Distribution of Input Offset Voltage 1140 UNITS FROM THREE RUNS VS = ±15V TA = 25°C VCM = 0V 120 80 40 0 –40 20 40 –20 0 INPUT OFFSET VOLTAGE (µV) LT1012A • TA02 sn1012 1012afbs 1 LT1012A/LT1012 W W W AXI U U ABSOLUTE RATI GS (Note 1) Supply Voltage ...................................................... ± 20V Differential Input Current (Note 1) ...................... ± 10mA Input Voltage ......................................................... ± 20V Output Short Circuit Duration .......................... Indefinite Operating Temperature Range LT1012AM/LT1012M (OBSOLETE)....– 55°C to 125°C LT1012I/LT1012AI ............................. – 40°C to 85°C LT1012AC/LT1012C LT1012D/LT1012S8 ................................ 0°C to 70°C Storage Temperature Range ................. – 65°C to 150°C Lead Temperature (Soldering, 10 sec).................. 300°C U U W PACKAGE/ORDER I FOR ATIO TOP VIEW TOP VIEW VOS TRIM 1 –IN 2 +IN 3 V– 4 8 VOS TRIM VOS TRIM 1 – 7 V+ –IN 2 + 6 OUT OVER COMP 5 VOS TRIM 8 TOP VIEW 7 V – + +IN 3 + 6 OUT 5 OVER COMP – (CASE) V 4 VOS TRIM 1 –IN 2 +IN 3 V– 4 8 VOS TRIM – 7 V+ + 6 OUT OVER COMP 5 S8 PACKAGE 8-LEAD PLASTIC SO H PACKAGE 8-LEAD TO-5 METAL CAN N8 PACKAGE 8-LEAD PDIP TJMAX = 100°C, θJA = 170°C/W TJMAX = 150°C, θJA = 150°C/W, θJC = 45°C/W TJMAX = 100°C, θJA = 130°C/W ORDER PART NUMBER ORDER PART NUMBER ORDER PART NUMBER LT1012S8 LT1012IS8 LT1012ACS8 LT1012AIS8 LT1012AMH LT1012MH LT1012ACH LT1012CH LT1012DH LT1012ACN8 LT1012AIN8 LT1012CN8 LT1012DN8 LT1012IN8 S8 PART MARKING 1012 1012I 1012A 1012AI OBSOLETE PACKAGE Consider the S8 or N8 Packages for Alternate Source Consult LTC Marketing for parts specified with wider operating temperature ranges. sn1012 1012afbs 2 LT1012A/LT1012 ELECTRICAL CHARACTERISTICS SYMBOL PARAMETER VOS CONDITIONS VS = ± 15V, VCM = OV, TA = 25°C, unless otherwise noted. LT1O12AM/AC/AI MIN TYP MAX Input Offset Voltage 8 20 (Note 3) Long Term lnput Offset Voltage Stability IOS IB MIN LT1O12M/I TYP MAX 25 90 8 20 0.3 Input Offset Current 10 25 UNITS µV µV 50 120 µV/month 0.3 15 25 100 150 15 25 100 150 20 30 150 200 pA pA (Note 3) ±25 ±35 ±100 ±150 ±25 ±35 ±100 ±150 ±30 ±40 ±150 ±200 pA pA Input Noise Voltage 0.1Hz to 10Hz 0.5 en Input Noise Voltage Density fO = 10Hz (Note 4) fO = 1000Hz (Note 5) 17 14 in Input Noise Current Density fO = 10Hz 20 AVOL Large Signal Voltage Gain VOUT = ±12V, RL ≥ 10kΩ VOUT = ±10V, RL ≥ 2kΩ 300 300 2000 1000 300 200 2000 1000 CMRR Common Mode Rejection Ratio VCM = ±13.5V 114 132 114 PSRR Power SuppIy Rejection Ratio VS = ±1.2V to ±20V 114 132 ±13.5 Input Voltage Range RL = 10kΩ Slew Rate IS LT1O12C TYP MAX (Note 3) Input Bias Current Output Voltage Swing 35 90 0.3 en VOUT MIN Supply Current (Note 3) 0.5 30 22 17 14 µVP-P 0.5 30 22 17 14 nV√Hz nV√Hz 20 fA/√Hz 200 200 2000 1000 V/mV V/mV 132 110 132 dB 114 132 110 132 dB ±14 ±13.5 ±14 ±13.5 ±14 V ±13 ±14 ±13 ±14 ±13 ±14 V 0.1 0.2 0.1 0.2 0.1 0.2 V/µs 370 380 20 30 22 500 600 380 380 600 380 380 600 µA µA sn1012 1012afbs 3 LT1012A/LT1012 ELECTRICAL CHARACTERISTICS SYMBOL PARAMETER VOS CONDITIONS VS = ± 15V, VCM = 0V, TA = 25°C, unless otherwise noted. MIN Input Offset Voltage 12 25 (Note 3) Long Term Input Offset Voltage Stability lOS IB LT1012D TYP Input Offset Current UNITS 15 25 120 180 µV µV µV/month 0.4 150 50 60 280 380 pA pA ±30 ±40 ± 150 (Note 3) ±80 ±120 ±300 ±400 pA pA 0.1Hz to 10Hz 0.5 en Input Noise Voltage Density fO = 10Hz (Note 5) fO = 1000Hz (Note 5) 17 14 in lnput Noise Current Density fO = 10Hz 20 AVOL Large-Signal Voltage Gain VOUT = ±12V,RL ≥ 10kΩ VOUT = ±10V,RL ≥ 2kΩ CMRR Common Mode Rejection Ratio VCM = ±13.5V PSRR Power Supply Rejection Ratio VS = ±1.2V to ± 20V Input Voltage Range RL = 10kΩ Slew Rate Supply Current MAX 20 30 Input Noise Voltage IS 60 LT1012S8 TYP (Note 3) Input Bias Current Output Voltage Swing MIN 0.3 en VOUT MAX (Note 3) µVP-P 0.5 30 22 17 14 30 22 nV√Hz nV√Hz 20 fA/√Hz 200 200 2000 1000 200 120 2000 1000 V/mV V/mV 110 132 110 132 dB 110 132 110 132 dB ±13.5 ±14.0 ±13.5 ±14.0 V ±13 ±14 ±13 ±14 V 0.1 0.2 0.1 0.2 V/µs 380 600 380 600 µA sn1012 1012afbs 4 LT1012A/LT1012 ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating temperature range of –55°C ≤ TA ≤ 125°C for LT1012AM and LT1012M, and –40°C ≤ TA≤ 85°C for LT1012AI and LT1012I. VS = ± 15V, VCM = 0V, unless otherwise noted. SYMBOL PARAMETER VOS CONDITIONS Input Offset Voltage (Note 3) Average Temperature Coefficient of Input Offset Voltage IOS Input Offset Current (Note 3) Average Temperature Coefficient of Input Offset Current IB Input Bias Current (Note 3) Average Temperature Coefficient of Input Bias Current MIN LT1012AM/AI TYP MAX MIN LT1012M/I TYP MAX UNITS ● ● 30 40 60 180 30 40 180 250 µV µV ● 0.2 0.6 0.2 1.5 µV/°C ● ● 30 70 250 350 30 70 250 350 pA pA ● 0.3 2.5 0.3 2.5 pA/°C ● ● ±80 ±150 ±600 ±800 ±80 ±150 ±600 ±800 ● 0.6 6.0 0.6 6.0 pA pA pA/°C AVOL Large-Signal Voltage Gain VOUT = ±12V, RL ≥ 10kΩ VOUT = ±10V, RL ≥ 2kΩ ● ● 200 200 1000 600 150 100 1000 600 V/mV V/mV CMRR Common Mode Rejection Ratio VCM = ±13.5V ● 110 128 108 128 dB PSRR Power Supply Rejection Ratio VS = ±1.5V to ± 20V ● 110 126 108 126 dB ● ±13.5 ● ±13 Input Voltage Range VOUT Output Voltage Swing IS Supply Current RL = 10kΩ ● ±13.5 ±14 400 ±13 650 V ±14 400 V 800 µA sn1012 1012afbs 5 LT1012A/LT1012 ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating temperature range of 0°C ≤ TA ≤ 70°C. VS = ± 15V, VCM = 0V, unless otherwise noted. SYMBOL PARAMETER VOS Input Offset Voltage (Note 3) Average Temperature Coefficient of Input Offset Voltage IOS Input Offset Current (Note 3) Average Temperature Coefficient of Input Offset Current IB LT1012AC TYP MAX LT1012C TYP MAX UNITS ● ● 20 30 60 160 20 30 100 200 µV µV ● 0.2 0.6 0.2 1.0 µV/°C ● ● 25 40 230 300 35 45 230 300 pA pA ● 0.3 2.5 0.3 2.5 pA/°C ● ● ± 35 ± 50 ± 230 ± 300 ± 35 ± 50 ± 230 ± 300 ● 0.3 2.5 0.3 2.5 CONDITIONS Input Bias Current (Note 3) Average Temperature Coefficient of Input Bias Current MIN MIN pA pA pA/°C AVOL Large-Signal Voltage Gain VOUT = ±12V, RL ≥ 10kΩ VOUT = ±10V, RL ≥ 2kΩ ● ● 200 200 1500 1000 150 150 1500 800 V/mV V/mV CMRR Common Mode Rejection Ratio VCM = 13.5V ● 110 130 108 130 dB PSRR Power Supply Rejection Ratio VS = ±1.3V to ± 20V ● 110 128 108 128 dB ● ±13.5 ● ±13 Input Voltage Range VOUT Output Voltage Swing IS Supply Current RL = 10kΩ ● ±13.5 ±14 400 ±13 600 V ±14 400 V 800 µA sn1012 1012afbs 6 LT1012A/LT1012 ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating temperature range of 0°C ≤ TA ≤ 70°C. VS = ± 15V, VCM = 0V, unless otherwise noted. SYMBOL PARAMETER VOS CONDITIONS Input Offset Voltage (Note 3) Average Temperature Coefficient of Input Offset Voltage IOS Input Offset Current (Note 3) Average Temperature Coefficient of Input Offset Current IB Input Bias Current (Note 3) Average Temperature Coefficient of Input Bias Current MIN LT1012D TYP MAX MIN LT1012S8 TYP MAX UNITS ● ● 25 40 140 30 45 200 270 µV µV ● 0.3 1.7 0.3 1.8 µV/°C ● ● 35 45 380 60 80 380 500 pA pA ● 0.35 4.0 0.4 4.0 pA/°C ● ● ± 50 ± 65 ± 420 ±100 ±150 ± 420 ± 550 ● 0.4 5.0 0.5 5.0 pA pA pA/°C AVOL Large-Signal Voltage Gain VOUT = ±12V, RL ≥ 10kΩ VOUT = ±10V, RL ≥ 2kΩ ● ● 150 150 1500 800 150 100 1500 800 V/mV V/mV CMRR Common Mode Rejection Ratio VCM = ±13.5V ● 108 130 108 130 dB PSRR Power Supply Rejection Ratio VS = ±1.3V to ± 20V ● 108 128 108 128 dB ● ±13.5 ● ±13 Input Voltage Range VOUT Output Voltage Swing IS Supply Current RL = 10kΩ ● Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: Differential input voltages greater than 1V will cause excessive current to flow through the input protection diodes unless limiting resistance is used. V+ 5k TO 100k POT – 8 7 LT1012 3 6 4 400 ±13 800 ±14 400 V 800 µA Note 3: These specifications apply for VMIN ≤ VS ≤ ± 20V and –13.5V ≤ VCM ≤ 13.5V (for VS = ± 15V). VMIN = ±1.2V at 25°C, ± 1.3V from 0°C to 70°C, ± 1.5V from – 55°C to 125°C. Note 4: 10Hz noise voltage density is sample tested on every lot. Devices 100% tested at 10Hz are available on request. Note 5: This parameter is tested on a sample basis only. Optional Offset Nulling and Overcompensation Circuits OUT 5 + ±14 V Input offset voltage can be adjusted over a ± 800µV range with a 5k to 100k potentiometer. 1 2 ±13.5 CS V– LT1012A • EC01 The LT1012 is internally compensated for unity gain stability. The overcompensation capacitor, CS, can be used to improve capacitive load handling capability, to narrow noise bandwidth, or to stabilize circuits with gain in the feedback loop. sn1012 1012afbs 7 LT1012A/LT1012 U W TYPICAL PERFOR A CE CHARACTERISTICS Offset Voltage vs Source Resistance (Balanced or Unbalanced) Typical Distribution of Input Bias Current 200 1000 VS = ±15V TA = 25°C VCM = 0V – 55°C TO 125°C 25°C 10 160 120 80 40 1 10k 30k 100k 300k 1M SOURCE RESISTANCE (Ω) –120 3M 10M 60 – 60 0 INPUT BIAS CURRENT (pA) Input Bias Current vs Temperature Input Bias Current Over Common Mode Range 100 60 VS = ±15V TA = 25oC 40 INPUT BIAS CURRENT (pA) UNDERCANCELLED UNIT 0 OVERCANCELLED UNIT –50 –100 DEVICE WITH POSITIVE INPUT CURRENT 20 RIN CM = 2 X 1012Ω DEVICE WITH NEGATIVE INPUT CURRENT 0 –20 –25 50 75 0 25 TEMPERATURE (°C) 100 VCM –60 –15 125 – + IB –40 –150 –50 80 –120 60 120 –60 0 INPUT OFFSET CURRENT (pA) LT1012A • TPC02 LT1012A • TPC01 50 1020 UNITS FROM THREE RUNS 120 0 120 –10 –5 0 5 10 15 LT1012A • TPC03 OFFSET VOLTAGE DRIFT WITH TEMPERATURE (µV/ °C) 3k VS = ±15V TA = 25°C VCM = 0V 40 0 1k INPUT BIAS CURRENT (pA) 200 1020 UNITS FROM THREE RUNS NUMBER OF UNITS 160 100 NUMBER OF UNITS INPUT OFFSET VOLTAGE (µV) VS = ±15V Typical Distribution of Input Offset Current Offset Voltage Drift vs Source Resistance (Balanced or Unbalanced) 100 10 1.0 TYPICAL 0.1 1k COMMON MODE INPUT VOLTAGE LT1012A • TPC04 MAXIMUM 10k 100k 1M 10M SOURCE RESISTANCE (Ω) LT1012 • TPC06 LT1012A * TPC5 Long Term Stability of Four Representative Units Warm-Up Drift 3 METAL CAN (H) PACKAGE DUAL-IN-LINE PACKAGE PLASTIC (N) OR SO (S) 1 60 8 40 6 OFFSET VOLTAGE (µV) 4 2 Offset Voltage Drift with Temperature of Four Representative Units 10 VS = ±15V TA = 25°C CHANGE IN OFFSET VOLTAGE (µV) CHANGE IN OFFSET VOLTAGE (µV) 5 100M 4 2 0 –2 –4 –6 20 0 –20 –40 –8 0 0 1 3 4 2 TIME AFTER POWER ON (MINUTES) 5 LT1012A • TPC07 –10 0 1 3 2 TIME (MONTHS) 4 5 LT1012A • TPC08 –60 –50 –25 50 25 75 0 TEMPERATURE (°C) 100 125 LT1012A • TPC09 sn1012 1012afbs 8 LT1012A/LT1012 U W TYPICAL PERFOR A CE CHARACTERISTICS 0.1Hz to 10Hz Noise Noise Spectrum Total Noise vs Source Resistance 1000 2 0 6 4 TIME (SECONDS) 8 TA = 25°C VS = ±1.2 TO ±20V 100 CURRENT NOISE VOLTAGE NOISE 10 1/f CORNER 2.5Hz 1/f CORNER 120Hz 10 1 10 100 FREQUENCY (Hz) R RESISTOR NOISE ONLY 0.01 102 1000 25°C 125°C –55°C 100 80 60 40 20 VS = ±15V TA = 25°C 1 10k 1k 100 FREQUENCY (Hz) 10 100k 120 100 NEGATIVE SUPPLY 80 POSITIVE SUPPLY 60 40 VS = ±15V TA = 25°C 20 0.1 1M Voltage Gain vs Frequency Gain, Phase Shift vs Frequency 140 GAIN 10 160 0 1 180 VS = ±15V TA = 25°C 10 100 1k 10k 100k 1M 10M FREQUENCY (Hz) LT1012A • TPC16 –10 0.01 200 0.1 1 FREQUENCY (MHz) 10 LT1012A • TPC17 – 55°C 3M VOLTAGE GAIN GAIN (dB) 120 PHASE MARGIN = 70°C –20 0.01 0.1 1M VS = ±15V V0 = ±10V PHASE SHIFT (DEGREES) VOLTAGE GAIN (dB) PHASE 20 20 100k 10M 100 30 100 100 1k 10k FREQUENCY (Hz) Voltage Gain vs Load Resistance 40 VS = ±15V TA = 25°C 10 LT1012A • TPC15 120 0 1 LT1012A • TPC14 140 108 Power Supply Rejection vs Frequency 120 LT1012A • TPC13 40 104 105 106 107 SOURCE RESISTANCE (Ω) 140 0 ± 20 60 103 LT1012A • TPC12 POWER SUPPLY REJECTION RATIO (dB) COMMON MODE REJECTION RATIO (dB) 400 80 RS = 2R AT 10Hz AT 1kHz 140 ±10 ±15 ±5 SUPPLY VOLTAGE (V) – + 0.1 Common Mode Rejection vs Frequency 500 SUPPLY CURRENT (µA) R LT1012A • TPC11 Supply Current vs Supply Voltage 0 AT 10Hz AT 1kHz 1.0 1 LT1012A • TPC10 300 TA = 25°C VS = ± 1.2V TO ± 20V TOTAL NOISE DENSITY (µV/√Hz) VOLTAGE NOISE DENSITY (nV√Hz) CURRENT NOISE DENSITY (fA√Hz) NOISE VOLTAGE 400nV/DIVISION TA = 25°C VS = ±1.2V TO ± 20V 10.0 25°C 1M 125°C 300k 100k 1 2 5 10 LOAD RESISTANCE (kΩ) 20 LT1012A • TPC18 sn1012 1012afbs 9 LT1012A/LT1012 U W TYPICAL PERFOR A CE CHARACTERISTICS Small-Signal Transient Response 2V/DIV 20mV/DIV 5µs/DIV AV = +1 CLOAD = 100pF AV = +1 CLOAD = 1000pF 5µs/DIV 1 20 20µs/DIV AV = +1 Slew Rate, Gain Bandwidth Product vs Overcompensation Capacitor Output Short-Circuit Current vs Time Closed-Loop Output Impedance 1000 1000 –55°C GBW 25°C SLEW RATE (V/µs) 10 125°C 5 VS = ±15V 0 –5 125°C SLEW 0.1 100 0.01 10 –10 25°C –15 VS = ±15V TA = 25°C –55°C 0.001 –20 0 2 1 TIME FROM OUTPUT SHORT (MINUTES) 1 3 1 10 100 1000 10,000 OVERCOMPENSATION CAPACITOR (pF) I0 = 1mA VS = ±15V TA = 25°C 0.01 0.001 1 10 100 1 FREQUENCY (Hz) 10 100 LT1012A • TPC21 ±1.8 V+ – 0.3 ±1.6 MINIMUM SUPPLY VOLTAGE (V) CM RANGE + – 0.6 V+ – 0.9 SWING R L = 2k V+ – 1.2 SWING R L = 10k V – + 1.2 – + 0.9 SWING R L = 2k V – + 0.6 ±1.4 400k ±1.2 ±1.0 ± 0.8 300k RL = 10k 200k RL = 2k 100k CM RANGE + 0.3 V– –50 AV = +1 0.1 Minimum Supply Voltage, Voltage Gain at VMIN V+ V– AV = 1000 1 VOLTAGE GAIN AT MINIMUM SUPPLY VOLTAGE (V/V) COMMON MODE RANGE OR OUTPUT VOLTAGE (V) Common Mode Range and Voltage Swing at Minimum Supply Voltage V 10 LT1012A • TPC20 LT1012A • TPC19 V 100 OUTPUT IMPEDANCE (Ω) 15 GAIN BANDWIDTH PRODUCT (kHz) SHORT-CIRCUIT CURRENT (mA) SINKING SOURCING Large-Signal Transient Response 20mV/DIV Small-Signal Transient Response –25 0 25 75 50 TEMPERATURE (°C) 100 125 LT1012A • TPC22 –50 –25 50 25 0 75 TEMPERATURE (°C) 100 0 125 LT1012A • TPC23 sn1012 1012afbs 10 LT1012A/LT1012 U W U U APPLICATIO S I FOR ATIO The LT1012 may be inserted directly into OP-07, LM11, 108A or 101A sockets with or without removal of external frequency compensation or nulling components. The LT1012 can also be used in 741, LF411, LF156 or OP-15 applications provided that the nulling circuitry is removed. Although the OP-97 is a copy of the LT1012, the LT1012 directly replaces and upgrades OP-97 applications. The LT1012C and D have lower offset voltage and drift than the OP-97F. The LT1012A has lower supply current than the OP-97A/E. In addition, all LT1012 grades guarantee operation at ±1.2V supplies. Microvolt level error voltages can also be generated in the external circuitry. Thermocouple effects caused by temperature gradients across dissimilar metals at the contacts to the input terminals can exceed the inherent drift of the amplifier. Air currents over device leads should be minimized, package leads should be short, and the two input leads should be as close together as possible and maintained at the same temperature. Noise Testing For application information on noise testing and calculations, please see the LT1008 data sheet. Achieving Picoampere/Microvolt Performance Frequency Compensation In order to realize the picoampere/microvolt level accuracy of the LT1012, proper care must be exercised. For example, leakage currents in circuitry external to the op amp can significantly degrade performance. High quality insulation should be used (e.g. Teflon, Kel-F); cleaning of all insulating surfaces to remove fluxes and other residues will probably be required. Surface coating may be necessary to provide a moisture barrier in high humidity environments. The LT1012 can be overcompensated to improve capacitive load handling capability or to narrow noise bandwidth. In many applications, the feedback loop around the amplifier has gain (e.g. Iogarithmic amplifiers); overcompensation can stabilize these circuits with a single capacitor. Board leakage can be minimized by encircling the input circuitry with a guard ring operated at a potential close to that of the inputs: in inverting configurations the guard ring should be tied to ground, in non-inverting connections to the inverting input at Pin 2. Guarding both sides of the printed circuit board is required. Bulk leakage reduction depends on the guard ring width. Nanoampere level leakage into the offset trim terminals can affect offset voltage and drift with temperature. OFFSET TRIM V+ 7 OUTPUT 8 1 2 5 3 PU TS 4 The inputs of the LT1012 are protected with back-to-back diodes. Current limiting resistors are not used, because the leakage of these resistors would prevent the realization of picoampere level bias currents at elevated temperatures. In the voltage follower configuration, when the input is driven by a fast, large signal pulse (>1V), the input protection diodes effectively short the output to the input during slewing, and a current, limited only by the output short-circuit protection will flow through the diodes. The use of a feedback resistor, as shown in the voltage follower feedforward diagram, is recommended because this resistor keeps the current below the short-circuit limit, resulting in faster recovery and settling of the output. 6 OVER COMP The availability of the compensation terminal permits the use of feedforward frequency compensation to enhance slew rate. The voltage follower feedforward scheme bypasses the amplifier’s gain stages and slews at nearly 10V/µs. IN V– GUARD LT1012A * AI01 sn1012 1012afbs 11 LT1012A/LT1012 U W U U APPLICATIO S I FOR ATIO Test Circuit for Offset Voltage and its Drift with Temperature Pulse Response of Feedforward Compensation Follower Feedforward Compensation 50k * 50pF 15V – 100Ω* 10k 7 LT1012 3 6 5V/DIV 2 V0 2 + – 4 50k* –15V 6 LT1012 5k 3 IN Photoo OUT 5 + 5µs/DIV V0 = 1000V0S 0.01µF *RESISTORS MUST HAVE LOW THERMOELECTRIC POTENTIAL LT1012A • AI03 LT1012A • AI02 U TYPICAL APPLICATIO S Ampmeter with Six Decade Range 10k 15V Q3 R1 2k 100µA METER 1.2k 0.1µF 100pA Q1 15V 10k 10k Q2 549Ω RANGE 1nA 2 CURRENT INPUT 7 – LT1012 3 10nA 6 549Ω 33k + 4 –15V LT1004C 549Ω Q4 PIN 13 CA3146 100nA 549Ω 1µA 549Ω 10µA Q1, Q2, Q3, Q4, RCA CA3146 TRANSISTOR ARRAY. CALIBRATION: ADJUST R1 FOR FULL-SCALE DEFLECTION WITH 1µA INPUT CURRENT AMPMETER MEASURES CURRENTS FROM 100pA TO 100µA WITHOUT THE USE OF EXPENSIVE HIGH VALUE RESISTORS. ACCURACY AT 100µA IS LIMITED BY THE OFFSET VOLTAGE BETWEEN Q1 AND Q2 AND, AT 100pA, BY THE INVERTING BIAS CURRENT OF THE LT1012 549Ω 100µA LT1012A • TA03 sn1012 1012afbs 12 LT1012A/LT1012 U TYPICAL APPLICATIO S Saturated Standard Cell Amplifier 15V 2N3609 3 7 + 6 LT1012 LT1008 2 1.018235V – + OUT 4 –15V SATURATED STANDARD CELL #101 EPPLEY LABS NEWPORT, R.I. R2 R1 THE TYPICAL 30pA BIAS CURRENT OF THE LT1012 WILL DEGRADE THE STANDARD CELL BY ONLY 1ppm/YEAR. NOISE IS A FRACTION OF A ppm. UNPROTECTED GATE MOSFET ISOLATES STANDARD CELL ON POWER DOWN LT1012A • TA05 Amplifier for Bridge Transducers R5 56M V+ R1 100k S2 T 100k S1 100k T R3 510k 2 R4 510k 3 R2 100k – LT1012 R6 56M 6 OUT + VOLTAGE GAIN ≈ 100 LT1012A • TA06 sn1012 1012afbs 13 LT1012A/LT1012 U TYPICAL APPLICATIO S Amplifier for Photodiode Sensor Buffered Reference for A-to-D Converters R1 5M 1% 15V 7k 200 3 S1 2 λ 6 1k LT1012 2 – 6 LT1012 3 7 + + LM399 OUT – 2N3904 4 3k VOUT = 10V/µA R2 5M 1% OUT 10V 1k* 6.5k 1k LT1012A • TA07 *THE 1k PRELOAD MINIMIZES GLITCHES INDUCED BY TRANSIENT LOADS LT1012A • TA08 Instrumentation Amplifier with ±100V Common Mode Range Low Power Comparator with <10µV Hysteresis 100Ω 10M 5V 1k 100k 330k 15V 100M – IN 100M +IN 2 +IN 7 – LT1012 3 10k 100k + 6 10k –IN OUT 7 2 3 – 1 LT1012 3 + 4 620k 6 OUT 2N3904 100k 4 –5V LT1012A • TA10 10M –15V A V = 100 ALL RESISTORS 1% OR BETTER LT1012A • TA09 sn1012 1012afbs 14 LT1012A/LT1012 U TYPICAL APPLICATIO S Air Flow Detector Input Amplifier for 4.5 Digit Voltmeter 15V 15V R2 10M 15V R1 1k + 2 TYPE J 2 1 100k IN 0.1V – 8 7 LT1012 3 3 + 4 – COLD JUNCTION AT AMBIENT 6 OUT 9M 900k – 15V 1V 100k 5% 7 – 3 + 1V 4 5 10V 0.1V 6 LT1012 10V 9k* –15V 100V 1000pF 1000V 1k* 90k MOUNT R1 IN AIRFLOW. ADJUST R2 SO OUTPUT GOES HIGH WHEN AIRFLOW STOPS 100V * RATIO MATCH ±0.01% 1000V LT1012A • TA11 TO 1V FULL SCALE ANALOG TO DIGITAL CONVERTER 10k FN507 ALLEN BRADLEY DECADE VOLTAGE DIVIDER THIS APPLICATION REQUIRES LOW BIAS CURRENT AND OFFSET VOLTAGE, LOW NOISE, AND LOW DRIFT WITH TIME AND TEMPERATURE LT1012A • TA12 Resistor Multiplier “No Trims” 12-Bit Multiplying DAC Output Amplifier 3 RFEEDBACK RIN 1G + 2 IOUT1 6 LT1012 VOUT – 10k R1 10M R2 1k R3 100k REFERENCE IN 0.1V TO 10V 12-BIT CMOS MULTIPLYING DAC 2 – LT1012 3 6 OUT + IOUT2 ( RIN = R1 1 + R3 R2 WHEN THE REFERENCE INPUT DROPS TO 0.1V, THE LEAST SIGNIFICANT BIT DECREASES TO THE MICROVOLT/PICOAMPERE RANGE ) LT1012 • TA14 LT1012 • TA13 sn1012 1012afbs 15 LT1012A/LT1012 W W SCHE ATIC DIAGRA TRIM TRIM OVER COMP 1 8 5 V+ 7 800Ω 800Ω 22k 22k 1.3k 4.2k Q20 1.3k Q30 Q14 Q29 Q7 Q22 Q8 1.5k 30pF 1.5k 2.5k Q43 Q25 Q21 Q6 Q5 Q16 Q27 Q37 S Q24 40Ω Q4 100Ω Q3 3k Q13 40Ω Q11 Q23 S –IN 2 S Q2 Q1 1.5k Q28 S Q15 50k 1.5k Q38 Q26 Q42 J1 Q9 +IN OUT 6 Q33 Q12 Q31 Q10 Q32 Q39 3 3.7k Q18 Q17 Q19 Q36 Q40 20k 3.3k 3.3k Q41 Q34 Q35 320Ω 4.3k – V 4.8k 3.7k 3.7k 16k 40Ω 330Ω 4 LT1012A • SD01 sn1012 1012afbs 16 LT1012A/LT1012 U PACKAGE DESCRIPTIO H Package 8-Lead TO-5 Metal Can (.200 Inch PCD) (Reference LTC DWG # 05-08-1320) .335 – .370 (8.509 – 9.398) DIA .305 – .335 (7.747 – 8.509) .040 (1.016) MAX .050 (1.270) MAX SEATING PLANE .165 – .185 (4.191 – 4.699) GAUGE PLANE .010 – .045* (0.254 – 1.143) REFERENCE PLANE .500 – .750 (12.700 – 19.050) .016 – .021** (0.406 – 0.533) .027 – .045 (0.686 – 1.143) PIN 1 45°TYP .028 – .034 (0.711 – 0.864) .200 (5.080) TYP .110 – .160 (2.794 – 4.064) INSULATING STANDOFF *LEAD DIAMETER IS UNCONTROLLED BETWEEN THE REFERENCE PLANE AND THE SEATING PLANE .016 – .024 **FOR SOLDER DIP LEAD FINISH, LEAD DIAMETER IS (0.406 – 0.610) H8(TO-5) 0.200 PCD 0801 OBSOLETE PACKAGE sn1012 1012afbs 17 LT1012A/LT1012 U PACKAGE DESCRIPTIO N8 Package 8-Lead PDIP (Narrow .300 Inch) (Reference LTC DWG # 05-08-1510) .400* (10.160) MAX 8 7 6 5 1 2 3 4 .255 ± .015* (6.477 ± 0.381) .300 – .325 (7.620 – 8.255) .008 – .015 (0.203 – 0.381) ( +.035 .325 –.015 8.255 +0.889 –0.381 ) .045 – .065 (1.143 – 1.651) .130 ± .005 (3.302 ± 0.127) .065 (1.651) TYP .100 (2.54) BSC .120 (3.048) .020 MIN (0.508) MIN .018 ± .003 (0.457 ± 0.076) N8 1002 NOTE: 1. DIMENSIONS ARE INCHES MILLIMETERS *THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .010 INCH (0.254mm) sn1012 1012afbs 18 LT1012A/LT1012 U PACKAGE DESCRIPTIO S8 Package 8-Lead Plastic Small Outline (Narrow .150 Inch) (Reference LTC DWG # 05-08-1610) .189 – .197 (4.801 – 5.004) NOTE 3 .045 ±.005 .050 BSC 8 7 6 5 N N .245 MIN .160 ±.005 1 .030 ±.005 TYP .150 – .157 (3.810 – 3.988) NOTE 3 .228 – .244 (5.791 – 6.197) 2 3 N/2 N/2 RECOMMENDED SOLDER PAD LAYOUT .010 – .020 × 45° (0.254 – 0.508) .008 – .010 (0.203 – 0.254) 1 .053 – .069 (1.346 – 1.752) 0°– 8° TYP .016 – .050 (0.406 – 1.270) NOTE: 1. DIMENSIONS IN .014 – .019 (0.355 – 0.483) TYP INCHES (MILLIMETERS) 2. DRAWING NOT TO SCALE 3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm) 2 3 4 .004 – .010 (0.101 – 0.254) .050 (1.270) BSC SO8 0502 sn1012 1012afbs Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 19 LT1012A/LT1012 U TYPICAL APPLICATIO Kelvin-Sensed Platinum Temperature Sensor Amplifier 10V REFERENCE LT1021-10 10M R2 100k R1 182k 5k RF* 654k 6.65M 235k* R4 5k R3 1k 10k 24.3k 20V 2 200k 5k* 392k* 4.75k ROSEMOUNT 78S OR EQUIVALENT RS 3 100Ω AT 0°C –15V 7 – LT1012 + 4 6 VOUT = 100mV/°C – 50°C TO 150°C –15V 619k * = WIRE WOUND RESISTORS ALL OTHER RESISTORS ARE 1% METAL FILM TRIM R2 AT 0°C FOR V0 = 0V TRIM R3 AT 100°C FOR V0 = 10V TRIM R4 AT 50°C FOR V0 = 5V IN THE ORDER INDICATED POSITIVE FEEDBACK (R1) LINEARIZES THE INHERENT PARABOLIC NONLINEARITY OF THE PLATINUM SENSOR AND REDUCES ERRORS FROM 1.2°C TO 0.004°C OVER THE – 50°C TO 150°C RANGE LT1012A • TA04 sn1012 1012afbs 20 Linear Technology Corporation LW/TP 1202 1K REV B • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com LINEAR TECHNOLOGY CORPORATION 1991