GSI GS78132AB-10 256k x 32 8mb asynchronous sram Datasheet

GS78132AB
256K x 32
8Mb Asynchronous SRAM
BGA
Commercial Temp
Industrial Temp
Features
8, 10, 12 ns
3.3 V VDD
Symbol
Pin Descriptions
Description
A0 to A17
Address input
CE
Chip enable input
DQA1 TO DQA8
Byte A Data input/output
DQB1 TO DQB8
Byte B Data input/output
DQC1 TO DQC8
Byte C Data input/output
DQD1 TO DQD8
Byte D Data input/output
BA
Byte A Byte enable input
BB
Byte B Byte enable input
Description
BC
Byte C Byte enable input
The GS78132A is a high speed CMOS Static RAM organized
as 262,144-words by 32-bits. Static design eliminates the need
for external clocks or timing strobes. The GS78132A operates
on a single 3.3 V power supply, and all inputs and outputs are
TTL-compatible. The GS78132A is available in a
14 mm x 22 mm BGA package.
BD
Byte D Byte enable input
WE
Write enable input
OE
Output enable input
VDD
+3.3 V power supply
VSS
Ground
NC
No connect
• Fast access time: 8, 10, 12 ns
• CMOS low power operation: 260/210/180 mA at minimum
cycle time
• Single 3.3 V ± 0.3 V power supply
• All inputs and outputs are TTL-compatible
• Byte control
• Fully static operation
• Industrial Temperature Option: –40° to 85°C
• 14 mm x 22 mm, 119-bump, 1.27 mm Pitch Ball Grid Array
package
• RoHS-compliant package available
Block Diagram
A0
Address
Input
Buffer
Row
Decoder
Memory Array
Column
Decoder
A17
CE
WE
Control
OE
____
Bx
I/O Buffer
DQ1
Rev: 1.04 5/2006
DQ32
1/12
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 2003, GSI Technology
GS78132AB
256K x 32 Async SRAM in 119-bump, 14 mm x 22 mm BGA—Top View (Package B)
1
2
3
4
5
6
7
A
NC
A15
A14
A16
A13
A12
NC
B
BC
A11
A10
CE
A9
A8
BB
C
DQC6
NC
VDD,
NC
A17
VSS,
NC
NC
DQB6
D
DQC5
VDD
VSS
VSS
VSS
VDD
DQB5
E
DQC4
DQC8
VDD
VSS
VDD
DQB8
DQB4
F
DQC3
VDD
VSS
VSS
VSS
VDD
DQB3
G
DQC2
DQC7
VDD
VSS
VDD
DQB7
DQB2
H
DQC1
VDD
VSS
VSS
VSS
VDD
DQB1
J
VDD
VSS
VDD
VSS
VDD
VSS
VDD
K
DQD1
VDD
VSS
VSS
VSS
VDD
DQA1
L
DQD2
DQD7
VDD
VSS
VDD
DQA7
DQA2
M
DQD3
VDD
VSS
VSS
VSS
VDD
DQA3
N
DQD4
DQD8
VDD
VSS
VDD
DQA8
DQA4
P
DQD5
VDD
VSS
VSS
VSS
VDD
DQA5
R
DQD6
NC
NC
NC
NC
NC
DQA6
T
BD
A7
A6
WE
A5
A4
BA
U
NC
A3
A2
OE
A1
A0
NC
Note:
Bumps 3C and 5C are actually NC’s but should be wired 3C = VDD and 5C = Vss to assure compatibility with future versions.
Rev: 1.04 5/2006
2/12
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 2003, GSI Technology
GS78132AB
Truth Table
CE OE WE BA BB BC BD
H
L
L
X
L
X
X
H
L
DQA1–A8
DQB1–B8
DQC1–C8
DQD1–D8
Supply
Current
ISB1, ISB2
X
X
X
X
Not Selected
Not Selected
Not Selected
Not Selected
L
L
L
L
Read
Read
Read
Read
H
L
L
L
High Z
Read
Read
Read
L
H
L
L
Read
High Z
Read
Read
L
L
H
L
Read
Read
High Z
Read
L
L
L
H
Read
Read
Read
High Z
L
L
L
L
Write
Write
Write
Write
H
L
L
L
High Z
Write
Write
Write
L
H
L
L
Write
High Z
Write
Write
L
L
H
L
Write
Write
High Z
Write
L
L
L
H
Write
Write
Write
High
L
H
H
X
X
X
X
High Z
High Z
High Z
High Z
L
X
X
H
H
H
H
High Z
High Z
High Z
High Z
IDD
X: “H” or “L”
Absolute Maximum Ratings
Parameter
Symbol
Rating
Unit
Supply Voltage
VDD
–0.5 to +4.6
V
Input Voltage
VIN
–0.5 to VDD +0.5
(≤ 4.6 V max.)
V
Output Voltage
VOUT
–0.5 to VDD +0.5
(≤ 4.6 V max.)
V
Allowable power dissipation
PD
1.5
W
Storage temperature
TSTG
–55 to 150
oC
Note:
Permanent device damage may occur if Absolute Maximum Ratings are exceeded. Functional operation shall be restricted to Recommended
Operating Conditions. Exposure to higher than recommended voltages for extended periods of time could affect device reliability.
Rev: 1.04 5/2006
3/12
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 2003, GSI Technology
GS78132AB
Recommended Operating Conditions
Parameter
Symbol
Min
Typ
Max
Unit
Supply Voltage for -8/10/12
VDD
3.0
3.3
3.6
V
Input High Voltage
VIH
2.0
—
VDD +0.3
V
Input Low Voltage
VIL
–0.3
—
0.8
V
Ambient Temperature,
Commercial Range
TAc
0
—
70
o
Ambient Temperature,
Industrial Range
TAi
–40
—
85
oC
C
Notes:
1. Input overshoot voltage should be less than VDD +2 V and not exceed 20 ns.
2. Input undershoot voltage should be greater than –2 V and not exceed 20 ns.
Capacitance
Parameter
Symbol
Test Condition
Max
Unit
Input Capacitance
CIN
VIN = 0 V
10
pF
Output Capacitance
COUT
VOUT = 0 V
7
pF
Notes:
1. Tested at TA = 25°C, f = 1 MHz
2. These parameters are sampled and are not 100% tested
DC I/O Pin Characteristics
Parameter
Symbol
Test Conditions
Min
Max
Input Leakage Current
IIL
VIN = 0 to VDD
–2 uA
2 uA
Output Leakage Current
IOL
Output High Z,
VOUT = 0 to VDD
–1 uA
1 uA
Output High Voltage
VOH
IOH = –4 mA
2.4
Output Low Voltage
VOL
IOL = +4 mA
Rev: 1.04 5/2006
4/12
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
0.4 V
© 2003, GSI Technology
GS78132AB
Power Supply Currents
Parameter
Symbol
Test Conditions
0 to 70°C
–40 to 85°C
8 ns
10 ns
12 ns
8 ns
10 ns
12 ns
IDD
E ≤ VIL
All other inputs
≥ VIH or ≤ VIL
Min. cycle time
IOUT = 0 mA
260 mA
210 mA
180 mA
280 mA
230 mA
200 mA
Standby
Current
ISB1
E ≥ VIH
All other inputs
≥ VIH or ≤VIL
Min. cycle time
60 mA
50 mA
50 mA
80 mA
70 mA
70 mA
Standby
Current
ISB2
E ≥ VDD - 0.2V
All other inputs
≥ VDD - 0.2V or ≤ 0.2V
Operating
Supply
Current
20 mA
40 mA
AC Test Conditions
Output Load 1
Parameter
Conditions
Input high level
VIH = 2.4 V
Input low level
VIL = 0.4 V
Input rise time
tr = 1 V/ns
Input fall time
tf = 1 V/ns
Input reference level
1.4 V
Output Load 2
Output reference level
1.4 V
3.3 V
Output load
Fig. 1& 2
DQ
50Ω
VT = 1.4 V
589Ω
DQ
Notes:
1. Include scope and jig capacitance.
2. Test conditions as specified with output loading as shown in Fig. 1
unless otherwise noted
3. Output load 2 for tLZ, tHZ, tOLZ and tOHZ.
Rev: 1.04 5/2006
30pF1
5/12
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
5pF1
434Ω
© 2003, GSI Technology
GS78132AB
AC Characteristics
Read Cycle
Parameter
Symbol
Read cycle time
-8
-10
-12
Unit
Min
Max
Min
Max
Min
Max
tRC
8
—
10
—
12
—
ns
Address access time
tAA
—
8
—
10
—
12
ns
Chip enable access time (CE)
tAC
—
8
—
10
—
12
ns
Output enable to output valid (OE)
tOE
—
3.5
—
4
—
5
ns
Output hold from address change
tOH
3
—
3
—
3
—
ns
Chip enable to output in low Z (CE)
tLZ*
3
—
3
—
3
—
ns
Output enable to output in low Z (OE)
tOLZ*
0
—
0
—
0
—
ns
Chip disable to output in High Z (CE)
tHZ*
—
4
—
5
—
6
ns
Output disable to output in High Z (OE)
tOHZ*
—
3.5
—
4
—
5
ns
Read Cycle 1:CE = OE = VIL , WE = VIH, BA = BB = BC = BD = VIL
tRC
Address
tAA
tOH
Data Out
Rev: 1.04 5/2006
Previous Data
Data valid
6/12
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 2003, GSI Technology
GS78132AB
Read Cycle 2: WE = VIH
tRC
Address
tAA
CE
tAC
tHZ
tLZ
BA, BB,
BC, BD
tAB
tBHZ
tBLZ
OE
tOE
Data Out
tOLZ
High impedance
tOHZ
Data valid
* These parameters are sampled and are not 100% tested
Write Cycle
Parameter
Symbol
Write cycle time
-8
-10
-12
Unit
Min
Max
Min
Max
Min
Max
tWC
8
—
10
—
12
—
ns
Address valid to end of write
tAW
5.5
—
7
—
8
—
ns
Chip enable to end of write
tCW
5.5
—
7
—
8
—
ns
Data set up time
tDW
4
—
5
—
6
—
ns
Data hold time
tDH
0
—
0
—
0
—
ns
Write pulse width
tWP
5.5
—
7
—
8
—
ns
Address set up time
tAS
0
—
0
—
0
—
ns
Write recovery time (WE)
tWR
0
—
0
—
0
—
ns
Write recovery time (CE)
tWR1
0
—
0
—
0
—
ns
Output Low Z from end of write
tWLZ*
3
—
3
—
3
—
ns
Write to output in High Z
tWHZ*
—
3.5
—
4
—
5
ns
Rev: 1.04 5/2006
7/12
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 2003, GSI Technology
GS78132AB
Write Cycle 1: WE Controlled
tWC
Address
tAW
tWR
OE
tCW
CE
BA, BB,
BC, BD
tBW
tAS
tWP
WE
tDW
tDH
Data valid
Data In
tWHZ
tWLZ
Data Out
High impedance
Write Cycle 2: CE Controlled
tWC
Address
tAW
tWR1
OE
tAS
tCW
CE
tBW
BA, BB,
BC, BD
tWP
WE
tDW
Data valid
Data In
Data Out
Rev: 1.04 5/2006
tDH
High impedance
8/12
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 2003, GSI Technology
GS78132AB
Package Dimensions—119-Bump FPBGA (Package B, Variation 1)
(Date Code: yyww.31)
Pin #1 Corner
BOTTOM VIEW
A1
Ø0.10S C
Ø0.30S C AS B S
Ø0.60~0.90 (119x)
1 2 3 4 5 6 7
Ø1.00(3x) REF
20.32
22±0.20
19.50
B
0.70 REF
1.27
7.62
12.00
C
Rev: 1.04 5/2006
0.15 C
30 TYP.
14±0.20
SEATING PLANE
0.50~0.70
2.06.±0.13
0.90±0.10
0.15 C
A
0.20(4x)
0.56±0.05
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
T
U
1.27
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
T
U
7 6 5 4 3 2 1
9/12
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 2003, GSI Technology
GS78132AB
Package Dimensions—119-Bump FPBGA (Package B, Variation 2)
(Date Code: yyww.3H)
TOP VIEW
A1
1
2
3
4
5
6
BOTTOM VIEW
A1
Ø0.10S C
Ø0.30S C AS B S
Ø0.60~0.90 (119x)
7
7 6 5 4 3 2 1
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
T
U
20.32
22±0.10
1.27
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
T
U
B
1.27
C
Rev: 1.04 5/2006
SEATING PLANE
A
0.20(4x)
14±0.10
0.50~0.70
1.86.±0.13
0.15 C
7.62
10/12
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 2003, GSI Technology
GS78132AB
Ordering Information
Part Number1
Package
Access Time
Temp. Range
GS78132AB-8
119-Bump BGA2
8 ns
Commercial
GS78132AB-10
119-Bump BGA2
10 ns
Commercial
GS78132AB-12
119-Bump BGA2
12 ns
Commercial
GS78132AB-8I
119-Bump BGA2
8 ns
Industrial
GS78132AB-10I
119-Bump BGA2
10 ns
Industrial
GS78132AB-12I
119-Bump BGA2
12 ns
Industrial
GS78132AB-15I
119-Bump BGA2
15 ns
Industrial
GS78132AGB-8
RoHS-compliant
119-Bump BGA2
8 ns
Commercial
GS78132AGB-10
RoHS-compliant
119-Bump BGA2
10 ns
Commercial
GS78132AGB-12
RoHS-compliant
119-Bump BGA2
12 ns
Commercial
GS78132AGB-8I
RoHS-compliant
119-Bump BGA2
8 ns
Industrial
GS78132AGB-10I
RoHS-compliant
119-Bump BGA2
10 ns
Industrial
GS78132AGB-12I
RoHS-compliant
119-Bump BGA2
12 ns
Industrial
GS78132AGB-15I
RoHS-compliant
119-Bump BGA2
15 ns
Industrial
Status
Notes:
1. Customers requiring delivery in Tape and Reel should add the character “T” to the end of the part number.
For example: GS78132AB-12T
2. Please see pages 9 and 10 for date code information for Variation 1 and Variation 2 of the 119-bump BGA.
Rev: 1.04 5/2006
11/12
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 2003, GSI Technology
GS78132AB
Revision History
Rev. Code: Old;
New
Types of Changes
Format or Content
• Creation of new datasheet
GS78132AB_r1
GS78132AB_r1_01
Content
GS78132AB_r1_01;
GS78132AB_r1_02
Content/Format
GS78132AB_r1_02;
GS78132AB_r1_03
Content
GS78132AB_r1_03;
GS78132AB_r1_04
Content
Rev: 1.04 5/2006
Page #/Revisions/Reason
• Added AC specifications to datasheet
• Updated format
• Added variation information to package mechanical
• Added Variation 2 119 BGA to datasheet
• Added date codes to mechanicals
• Added RoHS-compliant package information
12/12
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 2003, GSI Technology
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