Fairchild FDN5618P 60v p-channel logic level powertrench mosfet Datasheet

FDN5618P
60V P-Channel Logic Level PowerTrench MOSFET
General Description
Features
This 60V P-Channel MOSFET uses Fairchild’s high
voltage PowerTrench process. It has been optimized for
power management applications.
• –1.25 A, –60 V. RDS(ON) = 0.170 Ω @ VGS = –10 V
RDS(ON) = 0.230 Ω @ VGS = –4.5 V
Applications
• Fast switching speed
• DC-DC converters
• High performance trench technology for extremely
low RDS(ON)
• Load switch
• Power management
D
D
S
TM
SuperSOT -3
Absolute Maximum Ratings
Symbol
S
G
G
TA=25oC unless otherwise noted
Ratings
Units
VDSS
Drain-Source Voltage
Parameter
–60
V
VGSS
Gate-Source Voltage
±20
V
ID
Drain Current
–1.25
A
– Continuous
(Note 1a)
– Pulsed
–10
Maximum Power Dissipation
PD
TJ, TSTG
(Note 1a)
0.5
(Note 1b)
0.46
W
–55 to +150
°C
(Note 1a)
250
°C/W
(Note 1)
75
°C/W
Operating and Storage Junction Temperature Range
Thermal Characteristics
RθJA
Thermal Resistance, Junction-to-Ambient
RθJC
Thermal Resistance, Junction-to-Case
Package Marking and Ordering Information
Device Marking
Device
Reel Size
Tape width
Quantity
618
FDN5618P
7’’
8mm
3000 units
2000 Fairchild Semiconductor Corporation
FDN5618P Rev B(W)
FDN5618P
July 2000
PRELIMINARY
Symbol
Parameter
TA = 25°C unless otherwise noted
Test Conditions
Min
Typ
Max Units
–58
mV/°C
Off Characteristics
BVDSS
Drain–Source Breakdown Voltage
VGS = 0 V, ID = –250 µA
∆BVDSS
===∆TJ
IDSS
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
ID = –250 µA,Referenced to 25°C
VDS = –48 V,
VGS = 0 V
–1
µA
IGSSF
Gate–Body Leakage, Forward
VGS = 20V,
VDS = 0 V
100
nA
IGSSR
Gate–Body Leakage, Reverse
VGS = –20 V
VDS = 0 V
–100
nA
On Characteristics
-60
V
(Note 2)
VGS(th)
Gate Threshold Voltage
VDS = VGS, ID = –250 µA
∆VGS(th)
===∆TJ
RDS(on)
Gate Threshold Voltage
Temperature Coefficient
ID = –250 µA,Referenced to 25°C
4
Static Drain–Source
On–Resistance
0.148
0.185
0.245
ID(on)
On–State Drain Current
VGS = –10 V,
ID = –1.25 A
VGS = –4.5 V,
ID = –1.0 A
VGS = –10 V, ID = –3 A TJ=125°C
VGS = –10 V,
VDS = –5 V
gFS
Forward Transconductance
VDS = –5 V,
ID = –1.25 A
4.3
VDS = –30 V,
f = 1.0 MHz
V GS = 0 V,
430
pF
52
pF
19
pF
–1
–1.6
–3
V
mV/°C
0.170
0.230
0.315
–5
Ω
A
S
Dynamic Characteristics
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
Switching Characteristics
td(on)
Turn–On Delay Time
tr
Turn–On Rise Time
td(off)
Turn–Off Delay Time
tf
Turn–Off Fall Time
Qg
Total Gate Charge
Qgs
Gate–Source Charge
Qgd
Gate–Drain Charge
(Note 2)
VDD = –30 V,
VGS = –10 V,
VDS = –30 V,
VGS = –10 V
ID = –1 A,
RGEN = 6 Ω
ID = –1.25 A,
6.5
13
ns
8
16
ns
16.5
30
ns
4
8
ns
8.6
13.8
nC
1.5
nC
1.3
nC
Drain–Source Diode Characteristics and Maximum Ratings
IS
VSD
Maximum Continuous Drain–Source Diode Forward Current
Drain–Source Diode Forward
VGS = 0 V, IS = –0.42
Voltage
(Note 2)
–0.7
–0.42
–1.2
A
V
Notes:
1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design.
a) 250°C/W when mounted on a
0.02 in2 pad of 2 oz. copper.
b) 270°C/W when mounted on a
minimum pad.
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width ≤=300 µs, Duty Cycle ≤=2.0
FDN5618P Rev B(W)
FDN5618P
Electrical Characteristics
FDN5618P
Typical Characteristics
5
2.2
VGS = -10V
2
-6.0V
4
-4.5V
VGS = -3.0V
-4.0V
-3.5V
1.8
-3.0V
3
1.6
-3.5V
1.4
2
-4.0V
-4.5V
1.2
1
-2.5V
-6.0V
-10V
1
0.8
0
0
1
2
3
0
4
1
2
3
4
5
-ID, DRAIN CURRENT (A)
-VDS, DRAIN-SOURCE VOLTAGE (V)
Figure 1. On-Region Characteristics.
Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
0.6
1.3
ID = -1.25A
VGS = -10V
ID = -0.65 A
1.2
0.5
1.1
0.4
1
0.3
0.9
0.2
o
TA = 125 C
o
TA = 25 C
0.8
-50
-25
0
25
50
75
100
125
150
0.1
2
4
o
TJ, JUNCTION TEMPERATURE ( C)
Figure 3. On-Resistance Variation
withTemperature.
10
10
VGS = 0V
o
o
25 C
TA = 125 C
5
8
Figure 4. On-Resistance Variation with
Gate-to-Source Voltage.
6
VDS = - 5V
6
-VGS, GATE TO SOURCE VOLTAGE (V)
1
o
-55 C
4
o
TA = 125 C
0.1
o
25 C
3
o
-55 C
0.01
2
0.001
1
0.0001
0
1
1.5
2
2.5
3
3.5
-VGS, GATE TO SOURCE VOLTAGE (V)
Figure 5. Transfer Characteristics.
4
0
0.2
0.4
0.6
0.8
1
1.2
1.4
-VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 6. Body Diode Forward Voltage Variation
with Source Current and Temperature.
FDN5618P Rev B(W)
FDN5618P
Typical Characteristics
10
700
VDS = -20V
ID = -1.25A
8
f = 1MHz
VGS = 0 V
600
-30V
-40V
500
6
CISS
400
300
4
200
2
COSS
100
CRSS
0
0
0
2
4
6
8
10
0
2
Qg, GATE CHARGE (nC)
Figure 7. Gate Charge Characteristics.
6
8
10
20
10
12
Figure 8. Capacitance Characteristics.
100
-ID, DRAIN CURRENT (A)
4
-VDS, DRAIN TO SOURCE VOLTAGE (V)
RDS(ON) LIMIT
1ms
SINGLE PULSE
RθJA = 270°C/W
TA = 25°C
15
10ms
1
100ms
0.1
DC
VGS =-10V
SINGLE PULSE
RθJA = 270oC/W
0.01
10s
10
1s
5
o
TA = 25 C
0
0.001
0.1
1
10
100
0.001
0.01
0.1
-VDS, DRAIN-SOURCE VOLTAGE (V)
Figure 9. Maximum Safe Operating Area.
1
1
100
1000
Figure 10. Single Pulse Maximum
Power Dissipation.
D = 0.5
RθJA(t) = r(t) + RθJA
0.2
0.1
0.1
10
t1, TIME (sec)
RθJA = 270 °C/W
0.05
0.02
P(pk)
0.01
t1
t2
0.01
SINGLE PULSE
TJ - TA = P * RθJA(t)
Duty Cycle, D = t1 / t2
0.001
0.0001
0.001
0.01
0.1
1
10
100
1000
t1, TIME (sec)
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1b.
Transient thermal response will change depending on the circuit board design.
FDN5618P Rev B(W)
SuperSOTTM-3 Tape and Reel Data and Package Dimensions
SSOT-3 Packaging
Configuration: Figure 1.0
Customize Label
Packaging Description:
SSOT-3 parts are shipped in tape. The carrier tape is
made from a dissipative (carbon filled) polycarbonate
resin. The cover tape is a multilayer film (Heat Activated
Adhesive in nature) primarily composed of polyester film,
adhesive layer, sealant, and anti-static sprayed agent.
These reeled parts in standard option are shipped with
3,000 units per 7" or 177cm diameter reel. The reels are
dark blue in color and is made of polystyrene plastic (antistatic coated). Other option comes in 10,000 units per 13"
or 330cm diameter reel. This and some other options are
described in the Packaging Information table.
Antistatic Cover Tape
These full reels are individually labeled and placed inside
a standard intermediate made of recyclable corrugated
brown paper with a Fairchild logo printing. One pizza box
contains eight reels maximum. And these intermediate
boxes are placed inside a labeled shipping box which
comes in different sizes depending on the number of parts
shipped.
Human Readable Embossed
Label
Carrier Tape
3P
3P
3P
3P
SSOT-3 Std Packaging Information
Packaging Option
Packaging type
Qty per Reel/Tube/Bag
Reel Size
Box Dimension (mm)
Standard
(no flow code)
TNR
D87Z
SSOT-3 Std Unit Orientation
TNR
3,000
10,000
7" Dia
13"
187x107x183 343x343x64
Max qty per Box
24,000
30,000
Weight per unit (gm)
0.0097
0.0097
Weight per Reel (kg)
0.1230
0.4150
343mm x 342mm x 64mm
Intermediate box for D87Z Option
Human Readable Label
Note/Comments
Human Readable Label sample
Human Readable
Label
187mm x 107mm x 183mm
Intermediate Box for Standard Option
SSOT-3 Tape Leader and Trailer
Configuration: Figure 2.0
Carrier Tape
Cover Tape
Components
Trailer Tape
300mm minimum or
75 empty pockets
Leader Tape
500mm minimum or
125 empty pockets
August 1999, Rev. C
SuperSOTTM-3 Tape and Reel Data and Package Dimensions, continued
SSOT-3 Embossed Carrier Tape
Configuration: Figure 3.0
P0
P2
D0
D1
T
E1
W
F
E2
Wc
B0
Tc
A0
P1
K0
User Direction of Feed
Dimensions are in millimeter
Pkg type
A0
B0
SSOT-3
(8mm)
3.15
+/-0.10
2.77
+/-0.10
W
8.0
+/-0.3
D0
D1
E1
E2
1.55
+/-0.05
1.125
+/-0.125
1.75
+/-0.10
F
6.25
min
3.50
+/-0.05
P1
P0
4.0
+/-0.1
4.0
+/-0.1
K0
T
1.30
+/-0.10
0.228
+/-0.013
Notes: A0, B0, and K0 dimensions are determined with respect to the EIA/Jedec RS-481
rotational and lateral movement requirements (see sketches A, B, and C).
Wc
0.06
+/-02
0.5mm
maximum
20 deg maximum
Typical
component
cavity
center line
B0
5.2
+/-0.3
Tc
0.5mm
maximum
20 deg maximum component rotation
Typical
component
center line
Sketch A (Side or Front Sectional View)
A0
Component Rotation
Sketch C (Top View)
Component lateral movement
Sketch B (Top View)
SSOT-3 Reel Configuration: Figure 4.0
Component Rotation
W1 Measured at Hub
Dim A
Max
Dim A
max
See detail AA
Dim N
7" Diameter Option
B Min
Dim C
See detail AA
W3
13" Diameter Option
Dim D
min
W2 max Measured at Hub
DETAIL AA
Dimensions are in inches and millimeters
Tape Size
Reel
Option
Dim A
Dim B
0.059
1.5
512 +0.020/-0.008
13 +0.5/-0.2
0.795
20.2
2.165
55
0.331 +0.059/-0.000
8.4 +1.5/0
0.567
14.4
0.311 – 0.429
7.9 – 10.9
0.059
1.5
512 +0.020/-0.008
13 +0.5/-0.2
0.795
20.2
4.00
100
0.331 +0.059/-0.000
8.4 +1.5/0
0.567
14.4
0.311 – 0.429
7.9 – 10.9
8mm
7" Dia
7.00
177.8
8mm
13" Dia
13.00
330
Dim C
Dim D
Dim N
Dim W1
Dim W2
Dim W3 (LSL-USL)
July 1999, Rev. C
SuperSOTTM-3 Tape and Reel Data and Package Dimensions, continued
SuperSOT-3 (FS PKG Code 32)
1:1
Scale 1:1 on letter size paper
Di mensions shown below are in:
inches [mil limeters]
Part Weight per unit (gram): 0.0097
September 1998, Rev. A
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
HiSeC™
ISOPLANAR™
MICROWIRE™
POP™
PowerTrench 
QFET™
QS™
Quiet Series™
SuperSOT™-3
SuperSOT™-6
ACEx™
Bottomless™
CoolFET™
CROSSVOLT™
E2CMOSTM
FACT™
FACT Quiet Series™
FAST
FASTr™
GTO™
SuperSOT™-8
SyncFET™
TinyLogic™
UHC™
VCX™
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
2. A critical component is any component of a life
support device or system whose failure to perform can
systems which, (a) are intended for surgical implant into
be reasonably expected to cause the failure of the life
the body, or (b) support or sustain life, or (c) whose
support device or system, or to affect its safety or
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
effectiveness.
reasonably expected to result in significant injury to the
user.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Rev. E