ON NCV7420D23G Lin transceiver with 3.3 v or 5 v voltage regulator Datasheet

NCV7420
LIN Transceiver with 3.3V
or 5 V Voltage Regulator
General Description
LIN−Bus Transceiver
V BB
1
14
VCC
LIN
2
13
RxD
GND
3
12
TxD
11
GND
10
STB
9
EN
8
TEST
GND
4
WAKE
5
INH
6
OTP_ZAP
7
SOIC 14
D SUFFIX
CASE 751AP
ORDERING INFORMATION
Voltage Regulator
• LIN compliant to specification revision 2.0 and 2.1
•
•
•
•
(backward compatible to version 1.3) and J2602
I3T high voltage technology
Bus voltage ±45 V
Transmission rate up to 20 kBaud
SOIC 14 Green package
This is a Pb−Free Device
Output voltage 5 V / ~50 mA or 3.3 V / ~50 mA
Wake−up input
Enable inputs for stand−by and sleep mode
INH output for auxiliary purposes (switching of an
external pull−up or resistive divider towards battery,
control of an external voltage regulator etc.)
Modes
• Normal mode: LIN communication in either low (up to
Protection
• Thermal shutdown
• Indefinite short−circuit protection on pins LIN and
•
WAKE towards supply and ground
•
• Load dump protection (45 V)
• Bus pins protected against transients in an automotive
•
PIN CONFIGURATION
See detailed ordering and shipping information in the package
dimensions section on page 19 of this data sheet.
KEY FEATURES
•
•
•
•
•
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NCV7420
The NCV7420 is a fully featured local interconnect network (LIN)
transceiver designed to interface between a LIN protocol controller
and the physical bus. The transceiver is implemented in I3T
technology enabling both high−voltage analog circuitry and digital
functionality to co−exist on the same chip.
The NCV7420 LIN device is a member of the in−vehicle
networking (IVN) transceiver family of ON Semiconductor that
integrates a LIN v2.0/2.1 physical transceiver and either a 3.3 V or a
5 V voltage regulator. It is designed to work in harsh automotive
environment and is submitted to the TS16949 qualification flow.
The LIN bus is designed to communicate low rate data from control
devices such as door locks, mirrors, car seats, and sunroofs at the
lowest possible cost. The bus is designed to eliminate as much wiring
as possible and is implemented using a single wire in each node. Each
node has a slave MCU−state machine that recognizes and translates
the instructions specific to that function. The main attraction of the
LIN bus is that all the functions are not time critical and usually relate
to passenger comfort.
•
environment
System ESD protection level for LIN, WAKE and Vbb
up to ±12 kV
EMI Compatibility
• Integrated slope control
• Meets most demanding EMS/EME requirements
10 kBaud) or normal slope
Sleep mode: VCC is switched “off” and no
communication on LIN bus
Stand−by mode: VCC is switched “on” but there is no
communication on LIN bus
Wake−up bringing the component from sleep mode into
standby mode is possible either by LIN command or
digital input signal on WAKE pin. Wake−up from LIN
bus can also be detected and flagged when the chip is
already in standby mode.
Quality
• Automotive Qualification According to AEC−Q100,
Grade 1
© Semiconductor Components Industries, LLC, 2012
April, 2012 − Rev. 7
1
Publication Order Number:
NCV7420/D
NCV7420
Table 1. KEY TECHNICAL CHARACTERISTICS − 3.3 V version
Symbol
Vbb
Parameter
Nominal battery operating voltage (Note 1)
Min
Typ
Max
Unit
5
12
26
V
Load dump protection (Note 2)
45
Ibb_SLP
Supply current in sleep mode
20
mA
Vcc_out
(Note 4)
Regulated Vcc output, Vcc load 1 mA−30 mA
3.23
3.30
3.37
V
Regulated Vcc output, Vcc load 0 mA−50 mA
3.19
3.30
3.41
Iout_max
Maximum Vcc output current (Note 3)
50
V_wake
Operating DC voltage on WAKE pin
0
Vbb
Maximum rating voltage on WAKE pin
−45
45
Junction thermal shutdown temperature
165
195
°C
Operating junction temperature
−40
+150
°C
Tj
Tjunc
mA
V
Table 2. KEY TECHNICAL CHARACTERISTICS − 5 V version
Symbol
Vbb
Parameter
Nominal battery operating voltage (Note 1)
Min
Typ
Max
Unit
6
12
26
V
Load dump protection
45
Ibb_SLP
Supply current in sleep mode
20
mA
Vcc_out
(Note 4)
Regulated Vcc output, Vcc load 1 mA−30 mA
4.9
5.0
5.1
V
Regulated Vcc output, Vcc load 0 mA−50 mA
4.83
5.0
5.17
Iout_max
Maximum Vcc output current (Note 3)
50
V_wake
Operating DC voltage on WAKE pin
0
Vbb
Maximum rating voltage on WAKE pin
−45
45
Junction thermal shutdown temperature
165
195
°C
Operating junction temperature
−40
+150
°C
Tj
Tjunc
mA
V
1. Below 5 V on VBB in normal mode, the bus will either stay recessive or comply with the voltage level specifications and transition time
specifications as required by SAE J2602. It is ensured by the battery monitoring circuit.
2. The applied transients shall be in accordance with ISO 7637 part 1, test pulse 5. The device complies with functional class C; class A can
be reached depending on the application and external conditions.
3. Thermal aspects of the entire end−application have to be taken into account in order to avoid thermal shutdown of NCV7420.
4. Vcc voltage regulator output must be properly decoupled by external capacitor of min. 8 mF with ESR < 1 W to ensure stability.
Table 3. THERMAL CHARACTERISTICS
Symbol
Parameter
Conditions
Value
Unit
Rth(vj−a)_1
Thermal resistance junction−to−ambient on JEDEC 1S0P PCB
free air
140
K/W
Rth(vj−a)_4
Thermal resistance junction−to−ambient on JEDEC 2S2P PCB
free air
80
K/W
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NCV7420
VBB
VCC
INH
NCV7420
Osc
Band−
gap
V−reg
VBB
WAKE
VCC
VBB
POR
STB
VCC
Thermal
shutdown
Control Logic
VBB
EN
VCC
Stand−by,
Sleep
Normal
mode
RxD
LIN
Receiver
VCC
Timeout
TxD
TEST
Driver &
Slope
Control
OTP_ZAP
GND
Figure 1. Block Diagram
Typical Application
determined by the length and capacitance of the LIN bus, the
number and capacitance of Slave devices, the pull−up
resistance of all devices (Master & Slave), and the required
time constant of the system, respectively.
Vcc voltage must be properly stabilized by external
capacitor: capacitor of min. 8 mF (ESR < 1 W).
Application Schematic
The EMC immunity of the Master−mode device can be
further enhanced by adding a capacitor between the LIN
output and ground. The optimum value of this capacitor is
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NCV7420
10uF
VBB
10nF
GND
WAKE
OTP_ZAP
LIN
Micro
controller
EN
WAKE
STB
TEST
GND
GND
GND
LIN
220pF
TxD
WAKE
OTP_ZAP
Slave Node
VCC
VCC
RxD
INH
10nF
WAKE
NCV7420
1kW
1 nF
LIN
VBB
VCC
VCC
10uF
10uF 100nF
VBAT
RxD
INH
LIN
Master Node
NCV7420
10uF 100nF
VBAT
GND
TxD
EN
Micro
controller
STB
TEST
GND
KL30
LIN−BUS
KL31
Figure 2. Typical Application Diagram
Table 4. PIN DESCRIPTION
Pin
Name
Description
1
VBB
Battery supply input
2
LIN
LIN bus output/input
3
GND
Ground
4
GND
Ground
5
WAKE
6
INH
7
OTP_ZAP
8
TEST
9
EN
Enable input, transceiver in normal operation mode when high
10
STB
Standby mode control input
11
GND
Ground
12
TxD
Transmit data input, low in dominant state
13
RxD
Receive data output; low in dominant state; push−pull output
14
Vcc
Supply voltage (output)
High voltage digital input pin to switch the part from sleep− to standby mode
Inhibit output
Supply for programming of trimming bits at factory testing, should be grounded in the application
Digital input for factory testing, should be grounded in the application
Overall Functional Description
with EMC performance due to reduced slew rate of the LIN
output.
The junction temperature is monitored via a thermal
shutdown circuit that switches the LIN transmitter and
voltage regulator off when temperature exceeds the TSD
trigger level.
NCV7420 has four operating states (normal mode, low
slope mode, stand−by mode, and sleep mode) that are
determined by the input signals EN, WAKE, STB, and TxD.
LIN is a serial communication protocol that efficiently
supports the control of mechatronic nodes in distributed
automotive applications. The domain is class−A multiplex
buses with a single master node and a set of slave nodes.
NCV7420 is designed as a master or slave node for the
LIN communication interface with an integrated 3.3 V or
5 V voltage regulator having a current capability up to
50 mA for supplying any external components
(microcontroller).
NCV7420 contains the LIN transmitter, LIN receiver,
voltage regulator, power−on−reset (POR) circuits and
thermal shutdown (TSD). The LIN transmitter is optimized
for the maximum specified transmission speed of 20 kBaud
Operating States
NCV7420 provides four operating states, two modes for
normal operation with communication, one stand-by
without communication and one low power mode with very
low current consumption. See Figure 3.
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NCV7420
Normal mode
(normal slope)
−Vcc: “on”
−LIN TX: “on”
−Term: 30 kW
−INH: “high”/“floating”
−RxD: LIN Data (push−pull)
EN goes from 1 to 0
EN goes from 1 to 0
Note:
LIN Transmitter is “off” when
Vbb < Vbb_UV_th
EN goes from 1 to 0
while STB = 1 or Vbb < Vbb_UV_th
while STB = 1 or Vbb < Vbb_UV_th
EN goes from 0 to 1 while TxD = 0,
−Vcc: “on”
−LIN TX: “off”
−Term: “current source”
−INH: “floating”
−RxD: pull−up to Vcc/low
and Vcc > Vcc_UV_th, Vbb > Vbb_UV_th
from any mode
Vbb < PORL_Vbb
Power off
and Vcc > Vcc_UV_th and Vbb > Vbb_UV_th
Local wake−up
or LIN wake−up
Normal mode
(low slope)
while STB = 0 and Vbb > Vbb_UV_th
EN goes from 0 to 1 while TxD = 1,
Stand−by mode
Power up Vbb
Vbb > Vbb_UV_th
Sleep mode
−Vcc: “on”
−LIN TX: “on”
−Term: 30 kW
−INH: “high”/“floating”
−RxD: LIN data (push−pull)
EN goes from 1 to 0
while STB = 0 and Vbb > Vbb_UV_th
−Vcc: “off”
−LIN TX: “off”
−Term: “current source”
−INH: “floating”
−RxD: pull−up to Vcc
Figure 3. State Diagram
Table 5. MODE SELECTION
Mode
Vcc
RxD
INH
LIN
30 kW on LIN
Note
Normal −
Slope
ON
Low = Dominant State
High = Recessive State
High if STB=High during state
transition; Floating otherwise
Normal
Slope
ON
(Note 5)
Normal −
Low Slope
ON
Low = Dominant State
High = Recessive State
High if STB=High during state
transition; Floating otherwise
Low Slope
ON
(Note 6)
Stand−by
ON
Low after LIN wakeup,
high otherwise
Floating
OFF
OFF
(Notes 7
and 8)
Sleep
OFF
Clamped to Vcc
Floating
OFF
OFF
5. The normal slope mode is entered when pin EN goes HIGH while TxD is in HIGH state during EN transition.
6. The low slope mode is entered when pin EN goes HIGH while TxD is in LOW state during EN transition. LIN transmitter gets on only after
TxD returns to high after the state transition.
7. The stand−by mode is entered automatically after power−up.
8. In Stand−by mode, RxD High state is achieved by internal pull-up resistor to VCC.
Normal Slope Mode
HIGH. If STB pin is high during the standby-to-normal
slope mode transition, INH pin is pulled high. Otherwise, it
stays floating.
In normal slope mode the transceiver can transmit and
receive data via LIN bus with speed up to 20 kBaud. The
transmit data stream of the LIN protocol is present on the
TxD pin and converted by the transmitter into a LIN bus
signal with controlled slew rate to minimize EMC emission.
The receiver consists of the comparator that has a threshold
with hysteresis in respect to the supply voltage and an input
filter to remove bus noise. The LIN output is pulled HIGH
via an internal 30 kW pull-up resistor. For master
applications it is needed to put an external 1 kW resistor with
a serial diode between LIN and Vbb (or INH). See Figure 2.
The mode selection is done by EN=HIGH when TxD pin is
Low Slope Mode
In low slope mode the slew rate of the signal on the LIN
bus is reduced (rising and falling edges of the LIN bus signal
are longer). This further reduces the EMC emission. As a
consequence the maximum speed on the LIN bus is reduced
up to 10 kBaud. This mode is suited for applications where
the communication speed is not critical. The mode selection
is done by EN=HIGH when TxD pin is LOW. In order not
to transmit immediately a dominant state on the bus (because
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NCV7420
Sleep Mode
TxD=LOW), the LIN transmitter is enabled only after TxD
returns to HIGH. If STB pin is high during the
standby−to−low slope mode transition, INH pin is pulled
high. Otherwise, it stays floating.
The Sleep Mode provides extreme low current
consumption. This mode is entered when both EN and STB
pins are LOW coming from normal mode. The internal
termination resistor of 30 kW between LIN and Vbb is
disconnected and also the Vcc regulator is switched off to
minimize current consumption.
Stand−by Mode
The stand−by mode is always entered after power−up of
the NCV7420. It can also be entered from normal mode
when the EN pin is low and the stand−by pin is high. From
sleep mode it can be entered after a local wake−up or LIN
wakeup. In stand−by mode the Vcc voltage regulator for
supplying external components (e.g. a microcontroller)
stays active. Also the LIN receiver stays active to be able to
detect a remote wake−up via bus. The LIN transmitter is
disabled and the slave internal termination resistor of 30 kW
between LIN and Vbb is disconnected in order to minimize
current consumption. Only a pull−up current source
between Vbb and LIN is active.
Detection of Local Wake−Up
Wake
Wake−up
NCV7420 has two possibilities to wake−up from sleep or
stand−by mode (see Figure 3):
• Local wake−up: enables the transition from sleep mode
to stand−by mode
• Remote wake−up via LIN: enables the transition from
sleep− to stand−by mode and can be also detected when
already in standby mode.
A local wake−up is only detected in sleep mode if a
transition from LOW to HIGH or from HIGH to LOW is
seen on the wake pin.
Detection of Local Wake−Up
Wake
VBB
VBB
50% VBB typ.
Sleep Mode
Stand−by Mode
50% VBB typ.
t
Sleep Mode
t
Stand−by Mode
Figure 4. Local Wake−up Signal
A remote wake−up is only detected if a combination of (1)
a falling edge at the LIN pin (transition from recessive to
dominant) is followed by (2) a dominant level maintained
for a time period > tWAKE and (3) again a rising edge at pin
LIN (transition from dominant to recessive) happens.
LIN
Detection of Remote Wake−Up
VBB
LIN recessive level
tWAKE
60% Vbb
40% Vbb
LIN dominant level
Sleep Mode
Stand−by Mode
t
Figure 5. Remote Wake−up Behavior
• RxD is kept LOW until normal mode is entered after a
The wake−up source is distinguished by pin RxD in the
stand−by mode:
• RxD remains HIGH after power−up or local wake−up.
remote wake−up (LIN).
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NCV7420
Vbb_UV_th
PORL_Vbb
VBB
VCC
Power off
Stand−by
Normal
normal slope
Normal
low slope
Stand−by
Sleep
EN
STB
TxD
Wake−up (Local or LIN)
Figure 6. Operating Modes Transitions
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Stand−by
Power off
NCV7420
Electrical Characteristics
Definitions
All voltages are referenced to GND (Pin 11). Positive currents flow into the IC.
Table 6. ABSOLUTE MAXIMUM RATINGS – 3.3 V and 5 V versions
Symbol
Parameter
Min
Max
Unit
Vbb
Battery voltage on pin Vbb (Note 9)
−0.3
+45
V
Vcc
DC voltage on pin Vcc
0
+7
V
I_Vcc
Current delivered by the Vcc regulator
50
V_LIN
LIN bus voltage (Note 10)
−45
+45
V
V_INH
DC voltage on inhibit pin
−0.3
Vbb + 0.3
V
V_WAKE
DC voltage on WAKE pin
−45
45
V
V_Dig_in
mA
DC input voltage on pins TxD, RxD, EN, STB
−0.3
Vcc + 0.3
V
Tjunc
Maximum junction temperature
−40
+165
°C
Vesd
Electrostatic discharge voltage on all pins; HBM (Note 11)
−2
+2
kV
Electrostatic discharge voltage on LIN, INH, WAKE and Vbb towards GND; HBM (Note
11)
−4
+4
kV
Electrostatic discharge on LIN, WAKE and Vbb; system HBM (Note 12)
−8
+8
kV
Electrostatic discharge voltage on all pins; CDM (Note 14)
−500
+500
V
Electrostatic discharge voltage on all pins; HBM (Note 11)
−4
+4
kV
Electrostatic discharge voltage on LIN, INH, WAKE and Vbb towards GND; HBM (Note
11)
−6
+6
kV
Electrostatic discharge on LIN, WAKE and Vbb; system HBM (Note 13)
−12
+12
kV
Electrostatic discharge voltage on all pins; CDM (Note 14)
−750
+750
V
Vesd
(EMC/ESD
improved
versions)
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
9. The applied transients shall be in accordance with ISO 7637 part 1, test pulses 1, 2, 3a, 3b, and 5. The device complies with functional class
C; class A can be reached depending on the application and external components.
10. The applied transients shall be in accordance with ISO 7637 part 1, test pulses 1, 2, 3a, and 3b. The device complies with functional class
C; class A can be reached depending on the application and external components.
11. Equivalent to discharging a 100 pF capacitor through a 1500 W resistor.
12. Equivalent to discharging a 150 pF capacitor through a 330 W resistor conform to IEC Standard 61000−4−2. LIN bus filter 220 pF, Vbb blocking
capacitor 100 nF, 3k3/10n R/C network on WAKE.
13. Equivalent to discharging a 150 pF capacitor through a 330 W resistor conform to IEC Standard 61000−4−2. No filter on LIN, Vbb blocking
capacitor 100 nF, 3k3/10n R/C network on WAKE.
14. Charged device model according ESD-STM5.3.1.
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NCV7420
DC Characteristics – 3.3 V version (VBB = 5 V to 26 V; Tjunc = −40°C to +150°C; unless otherwise specified.)
Table 7. DC CHARACTERISTICS, SUPPLY − Pin VBB
Symbol
Max
Unit
Ibb_ON
Supply current
Parameter
Normal mode; LIN recessive
Conditions
Min
Typ
1.6
mA
Ibb_STB
Supply current
Stand−by mode, Vbb =
5–18 V, Tjunc < 105°C
70
mA
Ibb_SLP
Supply current
Sleep mode, Vbb = 5–18 V,
Tjunc < 105°C
20
mA
V
Table 8. DC CHARACTERISTICS, VOLTAGE REGULATOR − Pin VCC
Vcc_out
Iout_max_abs
Iout_lim
DVcc_out
Vdo
Regulator output voltage
Absolute maximum output current
Vcc load 1 mA − 30 mA
3.23
3.30
3.37
Vcc load 0 mA − 50 mA
3.19
3.30
3.41
Thermal shutdown must be
taken into account
Over−current limitation
50
100
50
mA
170
mA
Line Regulation (Note 20)
Vbb 5−26 V, Iout = 5 mA,
Tj = 25°C
0.5
mV
Load Regulation (Note 20)
Iout 1−50 mA, Vbb = 14 V,
Tj = 25°C
45
mV
Iout = 1 mA, Tj = 25°C
13
mV
Iout = 10 mA, Tj = 25°C
134
mV
Iout = 50 mA, Tj = 25°C
732
mV
Dropout Voltage (Vbb−Vcc_out)
Figure 11, (Notes 19, 20)
Table 9. DC CHARACTERISTICS LIN TRANSMITTER − Pin LIN
Symbol
Parameter
Conditions
VLin_dom_LoSup
LIN dominant output voltage
TXD = low; Vbb = 7.3 V
VLin_dom_HiSup
LIN dominant output voltage
TXD = low; Vbb = 18 V
Vser_diode
ILIN_lim
Rslave
CLIN
LIN Voltage drop at serial diode (Note 15)
Min
Typ
Max
Unit
1.2
V
2.0
V
TXD = high; Ilin = 10 mA
0.3
1
V
VLin = Vbb_max
40
200
mA
33
47
kW
15
25
pF
Short circuit current limitation
Internal pull−up resistance
20
Capacitance on pin LIN (Note 17)
ILIN_off_dom
LIN output current bus in dominant state
Driver off; Vbb = 12 V
ILIN_off_rec
LIN output current bus in recessive state
Driver off; Vbb < 18 V
Vbb < VLin < 18 V
ILIN_no_GND
Communication not affected
Vbb = GND = 12 V;
0 < VLin < 18 V
ILIN_no_Vbb
LIN bus remains operational
Vbb = GND = 0 V;
0 < VLin < 18 V
−1
mA
−1
1
mA
1
mA
5
mA
Max
Unit
0.4
Vbb
Table 10. DC CHARACTERISTICS LIN RECEIVER − Pin LIN
Symbol
Parameter
Conditions
Min
Typ
Vbus_dom
Bus voltage for dominant state
Vbus_rec
Bus voltage for recessive state
Vrec_dom
Receiver threshold
LIN bus recessive → dominant
0.4
0.6
Vbb
Vrec_rec
Receiver threshold
LIN bus dominant → recessive
0.4
0.6
Vbb
0.6
Vbb
15. The voltage drop in Normal mode between LIN and VBB pin is the sum of the diode drop and the drop at serial pull up resistor. The drop
at the switch is negligible. See Figure 1.
16. By one of the trimming bits, following reconfiguration can be done during chip−level testing in order to fit the NCV7420_3 into different
interface: pins TxD and EN will have typ. 10 kW pull−down resistor to ground and pin WAKE will have typ. 10 mA pull−up current source.
17. Guaranteed by design. Not tested.
18. Vbb under−voltage threshold is always higher than Vbb POR low level (Vbb_UV_th > PORL_VBB)
19. Measured at output voltage Vcc_out = (Vcc_out@Vbb = 5 V) – 2%.
20. Values based on design and characterization. Not tested in production.
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NCV7420
DC Characteristics – 3.3 V version (VBB = 5 V to 26 V; Tjunc = −40°C to +150°C; unless otherwise specified.)
Table 10. DC CHARACTERISTICS LIN RECEIVER − Pin LIN
Symbol
Parameter
Vrec_cnt
Receiver centre voltage
Vrec_hys
Receiver hysteresis
Conditions
Min
Max
Unit
(Vbus_dom + Vbus_rec) / 2
0.475
Typ
0.525
Vbb
0.05
0.175
Vbb
Max
Unit
0.65
Vbb
1
mA
54
ms
0.8
V
Table 11. DC CHARACTERISTICS I/Os
Symbol
Parameter
Conditions
Min
Typ
Pin WAKE
V_wake_th
I_leak
T_wake_min
Threshold voltage
0.35
Input leakage current (Note 16)
Vwake = 0 V; Vbb = 18 V
−1
Sleep mode; rising
and falling edge
8
Debounce time
−0.5
Pins TxD and STB
Vil
Low level input voltage
Vih
High level input voltage
2.0
Rpu
Pull−up resistance to Vcc (Note 16)
50
V
200
kW
0.75
V
1
mA
0.8
V
Pin INH
Delta_VH
I_leak
High level voltage drop
IINH = 15 mA
Leakage current
Sleep mode; VINH = 0 V
0.35
−1
Pin EN
Vil
Low level input voltage
Vih
High level input voltage
2.0
Rpd
Pull−down resistance to ground (Note 16)
50
V
200
kW
0.65
V
Pin RxD
Vol
Low level output voltage
Isink = 2 mA
Voh
High level output voltage
(In Normal mode)
Normal mode,
Isource = −2 mA
Vcc −
0.65 V
Rpu
Pull−up resistance to Vcc
(In Standby and Sleep mode)
Standby mode,
Sleep mode
5
10
15
kW
Conditions
Min
Typ
Max
Unit
3
4.2
4.75
V
V
Table 12. DC CHARACTERISTICS
Symbol
Parameter
POR
Vbb_UV_th
Vbb under-voltage threshold (Note 18)
PORL_Vbb
Vbb POR low level comparator
VCC_UV_th
NCV7420D23
2.5
4.2
V
NCV7420D24
1.7
3.8
V
2
3
V
165
195
°C
9
18
°C
VCC under-voltage threshold
TSD
Tj
Tj_hyst
Junction temperature
For shutdown
Thermal shutdown hysteresis
15. The voltage drop in Normal mode between LIN and VBB pin is the sum of the diode drop and the drop at serial pull up resistor. The drop
at the switch is negligible. See Figure 1.
16. By one of the trimming bits, following reconfiguration can be done during chip−level testing in order to fit the NCV7420_3 into different
interface: pins TxD and EN will have typ. 10 kW pull−down resistor to ground and pin WAKE will have typ. 10 mA pull−up current source.
17. Guaranteed by design. Not tested.
18. Vbb under−voltage threshold is always higher than Vbb POR low level (Vbb_UV_th > PORL_VBB)
19. Measured at output voltage Vcc_out = (Vcc_out@Vbb = 5 V) – 2%.
20. Values based on design and characterization. Not tested in production.
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10
NCV7420
DC Characteristics – 5 V version − (VBB = 6 V to 26 V; Tjunc = −40°C to +150°C; unless otherwise specified.)
Table 13. DC CHARACTERISTICS, SUPPLY − Pin VBB
Symbol
Max
Unit
Ibb_ON
Supply current
Parameter
Normal mode; LIN recessive
Conditions
Min
Typ
1.6
mA
Ibb_STB
Supply current
Stand−by mode,
Vbb = 6–18 V,
Tjunc < 105°C
70
mA
Ibb_SLP
Supply current
Sleep mode, Vbb = 6–18 V,
Tjunc < 105°C
20
mA
V
Table 14. DC CHARACTERISTICS, VOLTAGE REGULATOR − Pin VCC
Vcc_out
Iout_max_abs
Iout_lim
DVcc_out
Vdo
Regulator output voltage
Absolute maximum output current
Vcc load 1 mA − 30 mA
4.9
5.0
5.1
Vcc load 0 mA − 50 mA
4.83
5.0
5.17
Thermal shutdown must be
taken into account
Over−current limitation
50
100
50
mA
170
mA
Line Regulation (Note 26)
Vbb 6−26 V, Iout = 5 mA,
Tj = 25°C
0.9
mV
Load Regulation (Note 26)
Iout 1−50 mA, Vbb = 14 V,
Tj = 25°C
74
mV
Iout = 1 mA, Tj = 25°C
13
mV
Iout = 10 mA, Tj = 25°C
136
mV
Iout = 50 mA, Tj = 25°C
794
mV
Dropout Voltage (Vbb−Vcc_out)
Figure 19 (Notes 25, 26)
Table 15. DC CHARACTERISTICS LIN TRANSMITTER − Pin LIN
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VLin_dom_LoSup
LIN dominant output voltage
TXD = low; Vbb = 7.3 V
1.2
V
VLin_dom_HiSup
LIN dominant output voltage
TXD = low; Vbb = 18 V
2.0
V
LIN Voltage drop at serial diode (Note 21)
TXD = high; Ilin = 10 mA
0.3
1
V
VLin = Vbb_max
40
200
mA
33
47
kW
15
25
pF
Vser_diode
ILIN_lim
Rslave
CLIN
Short circuit current limitation
Internal pull−up resistance
20
Capacitance on pin LIN (Note 23)
ILIN_off_dom
LIN output current bus in dominant state
Driver off; Vbb = 12 V
ILIN_off_rec
LIN output current bus in recessive state
Driver off; Vbb < 18 V
Vbb < VLin < 18 V
ILIN_no_GND
Communication not affected
Vbb = GND = 12 V;
0 < VLin < 18 V
ILIN_no_Vbb
LIN bus remains operational
Vbb = GND = 0 V;
0 < VLin < 18 V
−1
mA
−1
1
mA
1
mA
5
mA
Max
Unit
0.4
Vbb
Table 16. DC CHARACTERISTICS LIN RECEIVER − Pin LIN
Symbol
Parameter
Vbus_dom
Bus voltage for dominant state
Vbus_rec
Bus voltage for recessive state
Vrec_dom
Receiver threshold
Conditions
Min
Typ
0.6
LIN bus recessive → dominant
0.4
Vbb
0.6
Vbb
21. The voltage drop in Normal mode between LIN and VBB pin is the sum of the diode drop and the drop at serial pull up resistor. The drop
at the switch is negligible. See Figure 1.
22. By one of the trimming bits, following reconfiguration can be done during chip−level testing in order to fit the NCV7420_5 into different
interface: pins TxD and EN will have typ. 10 kW pull−down resistor to ground and pin WAKE will have typ. 10 mA pull−up current source.
23. Guaranteed by design. Not tested.
24. Vbb under−voltage threshold is always higher than Vbb POR low level (Vbb_UV_th > PORL_VBB)
25. Measured at output voltage Vcc_out = (Vcc_out@Vbb = 6 V) – 2%.
26. Values based on design and characterization. Not tested in production.
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NCV7420
DC Characteristics – 5 V version − (VBB = 6 V to 26 V; Tjunc = −40°C to +150°C; unless otherwise specified.)
Symbol
Parameter
Conditions
Min
LIN bus dominant → recessive
(Vbus_dom + Vbus_rec) / 2
Typ
Max
Unit
0.4
0.6
Vbb
0.475
0.525
Vbb
0.05
0.175
Vbb
Max
Unit
0.65
Vbb
1
mA
54
ms
0.8
V
Table 16. DC CHARACTERISTICS LIN RECEIVER − Pin LIN
Vrec_rec
Receiver threshold
Vrec_cnt
Receiver center voltage
Vrec_hys
Receiver hysteresis
Table 17. DC CHARACTERISTICS I/OS
Symbol
Parameter
Conditions
Min
Typ
Pin WAKE
V_wake_th
I_leak
T_wake_min
Threshold voltage
0.35
Input leakage current (Note 22)
Vwake = 0 V; Vbb = 18 V
−1
Sleep mode; rising and
falling edge
8
Debounce time
−0.5
Pins TxD and STB
Vil
Low level input voltage
Vih
High level input voltage
2.0
Rpu
Pull−up resistance to Vcc (Note 22)
50
V
200
kW
0.75
V
1
mA
0.8
V
Pin INH
Delta_VH
I_leak
High level voltage drop
IINH = 15 mA
Leakage current
Sleep mode; VINH = 0 V
0.35
−1
Pin EN
Vil
Low level input voltage
Vih
High level input voltage
2.0
Rpd
Pull−down resistance to ground (Note 22)
50
V
200
kW
0.65
V
Pin RxD
Vol
Low level output voltage
Isink = 2 mA
Voh
High level output voltage
(In Normal mode)
Normal mode,
Isource = −2 mA
Vcc −
0.65 V
Rpu
Pull−up resistance to Vcc
(In Standby and Sleep mode)
Standby mode,
Sleep mode
5
10
15
kW
Conditions
Min
Typ
Max
Unit
3
4.2
4.75
V
V
Table 18. DC CHARACTERISTICS
Symbol
Parameter
POR
Vbb_UV_th
Vbb under-voltage threshold (Note 24)
PORL_Vbb
Vbb POR low level comparator
VCC_UV_th
NCV7420D25
2.5
4.2
V
NCV7420D26
1.7
3.8
V
3
4.5
V
165
195
°C
9
18
°C
VCC under-voltage threshold
TSD
Tj
Tj_hyst
Junction temperature
For shutdown
Thermal shutdown hysteresis
21. The voltage drop in Normal mode between LIN and VBB pin is the sum of the diode drop and the drop at serial pull up resistor. The drop
at the switch is negligible. See Figure 1.
22. By one of the trimming bits, following reconfiguration can be done during chip−level testing in order to fit the NCV7420_5 into different
interface: pins TxD and EN will have typ. 10 kW pull−down resistor to ground and pin WAKE will have typ. 10 mA pull−up current source.
23. Guaranteed by design. Not tested.
24. Vbb under−voltage threshold is always higher than Vbb POR low level (Vbb_UV_th > PORL_VBB)
25. Measured at output voltage Vcc_out = (Vcc_out@Vbb = 6 V) – 2%.
26. Values based on design and characterization. Not tested in production.
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NCV7420
AC Characteristics – 3.3 V and 5 V versions − (VBB = 7 V to 18 V; Tjunc = −40°C to +150°C; unless otherwise specified.)
Table 19. AC CHARACTERISTICS LIN TRANSMITTER − Pin LIN
Symbol
Conditions
Min
D1
Duty Cycle 1 = tBUS_REC(min) / (2 x TBIT)
see Figure 23
Parameter
Normal slope mode
THREC(max) = 0.744 x VBB
THDOM(max) = 0.581 x VBB
TBIT = 50 ms
V(VBB) = 7 V to 18 V
0.396
Typ
Max
0.5
D2
Duty Cycle 2 = tBUS_REC(max) / (2 x TBIT)
see Figure 23
Normal slope mode
THREC(min) = 0.422 x VBB
THDOM(min) = 0.284 x VBB
TBIT = 50 ms
V(VBB) = 7.6 V to 18 V
0.5
0.581
D3
Duty Cycle 3 = tBUS_REC(min) / (2 x TBIT)
see Figure 23
Normal slope mode
THREC(max) = 0.778 x VBB
THDOM(max) = 0.616 x VBB
TBIT = 96 ms
V(VBB) = 7 V to 18 V
0.417
0.5
D4
Duty Cycle 4 = tBUS_REC(max) / (2 x TBIT)
see Figure 23
Normal slope mode
THREC(min) = 0.389 x VBB
THDOM(min) = 0.251 x VBB
TBIT = 96 ms
V(VBB) = 7.6 V to 18 V
0.5
0.590
Unit
Ttrx_prop_down
Propagation Delay of TxD to LIN. TxD
high to low
(Note 27)
6
ms
Ttrx_prop_up
Propagation Delay of TxD to LIN. TxD
low to high
(Note 27)
6
ms
T_fall_norm
LIN falling edge
Normal slope mode;
VBB = 12 V; L1, L2
(Note 28)
22.5
ms
T_rise_norm
LIN rising edge
Normal slope mode;
VBB = 12 V; L1, L2
(Note 28)
22.5
ms
T_sym_norm
LIN slope symmetry
Normal slope mode;
VBB = 12 V; L1, L2
(Note 28)
4
ms
T_fall_norm
LIN falling edge
Normal slope mode;
VBB = 12 V; L3 (Note 28)
27
ms
T_rise_norm
LIN rising edge
Normal slope mode;
VBB = 12 V; L3 (Note 28)
27
ms
T_sym_norm
LIN slope symmetry
Normal slope mode;
VBB = 12 V; L3 (Note 28)
5
ms
−4
−5
T_fall_low
LIN falling edge
Low slope mode (Note 29);
VBB = 12 V; L3 (Note 28)
62
ms
T_rise_low
LIN rising edge
Low slope mode (Note 29);
VBB = 12 V; L3 (Note 28)
62
ms
30
150
ms
6
20
ms
T_wake
Dominant time−out for wake−up via LIN bus
T_dom
TxD dominant time−out
TxD = low
27. Values based on design and characterization. Not tested in production.
28. The AC parameters are specified for following RC loads on the LIN bus: L1 = 1 kW / 1 nF; L2 = 660 W / 6.8 nF; L3 = 500 W / 10 nF.
29. Low slope mode is not compliant to the LIN standard.
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13
NCV7420
REGULATOR TYPICAL PERFORMANCE CHARACTERISTICS − 3.3 V VERSION
Load Transient Responses
50
trise, tfall = 10 ms
0.1
VBB = 14 V
CVBB = 10 mF + 100 nF
CVCC = 10 mF X7R
DVCC
(20 mV/DIV)
LOAD CURRENT (mA)
LOAD CURRENT (mA)
DVCC
(20 mV/DIV)
VBB = 14 V
CVBB = 10 mF + 100 nF
CVCC = 10 mF X7R
50
1
trise, tfall = 10 ms
TIME (500 ms/DIV)
TIME (500 ms/DIV)
Figure 7. Load Transient Response
(Icc 100 mA to 50 mA)
Figure 8. Load Transient Response
(Icc 1 mA to 50 mA)
30
20
10
ICC = 5 mA
CVCC = 10 mF
DVCC
(50 mV/DIV)
ICC = 100 mA
CVCC = 10 mF
trise, tfall = 10 ms
0
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
DVCC
(20 mV/DIV)
Line Transient Responses
30
20
10
trise, tfall = 10 ms
0
TIME (2 ms/DIV)
TIME (1 ms/DIV)
Figure 9. Line Transient Response
(Vbb 5 V to 26 V)
Figure 10. Line Transient Response
(Vbb 5 V to 26 V)
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NCV7420
REGULATOR TYPICAL PERFORMANCE CHARACTERISTICS − 3.3 V VERSION
Static Characteristics
1.4
50 mA
1.0
0.8
0.6
25 mA
(PORL_VBB
reached at low
temperatures)
0.4
10 mA
0.2
0
−50
200
−25
0
25
50
75
100
125
140
120
−40°C
3.28
25°C
3.27
3.26
85°C
135°C
3.25
0
5
10
15
20
25
30
35
150°C
40
45
50
Figure 11. Dropout Voltage vs. Temperature
Figure 12. Output Voltage vs. Output Current
3.32
80
60
40
20
0
3.29
ICC OUTPUT CURRENT (mA)
100
0
3.30
TEMPERATURE (°C)
VCC OUTPUT VOLTAGE (V)
160
VBB = 14 V
CVBB = 10 mF + 100 nF
CVCC = 10 mF X7R
3.31
3.24
150
VBB = 14 V
CVBB = 10 mF + 100 nF
CVCC = 10 mF X7R
Standby Mode
T = 25°C
180
IBB−ICC (mA)
VCC OUTPUT VOLTAGE (V)
1.2
DROPOUT VOLTAGE (V)
3.32
CVCC = 10 mF X7R
5
10
15
20
25
30
35
40
45
10 mA
3.30
3.29
25 mA
3.28
3.27
3.26
3.25
3.24
−50
50
1 mA
3.31
50 mA
VBB = 14 V
CVBB = 10 mF + 100 nF
CVCC = 10 mF X7R
−25
0
25
50
75
100
125
ICC OUTPUT CURRENT (mA)
TEMPERATURE (°C)
Figure 13. Ground Current vs. Output Current
Figure 14. Output Voltage vs. Temperature
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15
150
NCV7420
REGULATOR TYPICAL PERFORMANCE CHARACTERISTICS − 5 V VERSION
Load Transient Responses
50
trise, tfall = 10 ms
0.1
VBB = 14 V
CVBB = 10 mF + 100 nF
CVCC = 10 mF X7R
DVCC
(50 mV/DIV)
LOAD CURRENT (mA)
LOAD CURRENT (mA)
DVCC
(50 mV/DIV)
VBB = 14 V
CVBB = 10 mF + 100 nF
CVCC = 10 mF X7R
50
1
trise, tfall = 10 ms
TIME (500 ms/DIV)
TIME (500 ms/DIV)
Figure 15. Load Transient Response
(Icc 100 mA to 50 mA)
Figure 16. Load Transient Response
(Icc 1 mA to 50 mA)
Line Transient Responses
20
10
ICC = 5 mA
CVCC = 10 mF
DVCC
(50 mV/DIV)
30
trise, tfall = 10 ms
0
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
DVCC
(20 mV/DIV)
ICC = 100 mA
CVCC = 10 mF
30
20
10
trise, tfall = 10 ms
0
TIME (2 ms/DIV)
TIME (1 ms/DIV)
Figure 17. Line Transient Response
(Vbb 6 V to 26 V)
Figure 18. Line Transient Response
(Vbb 6 V to 26 V)
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NCV7420
REGULATOR TYPICAL PERFORMANCE CHARACTERISTICS − 5 V VERSION
Static Characteristics
1.2
DROPOUT VOLTAGE (V)
5.03
CVCC = 10 mF X7R
50 mA
1.0
0.8
0.6
25 mA
0.4
10 mA
0.2
0
−50
200
0
25
50
75
100
125
140
120
4.99
4.98
4.97
4.96
25°C
85°C
4.95
135°C
0
5
10
15
20
25
30
150°C
35
40
50
Figure 19. Dropout Voltage vs. Temperature
Figure 20. Output Voltage vs. Output Current
5.03
1 mA
5.02
80
60
40
5.01
10 mA
5.00
4.99
25 mA
4.98
VBB = 14 V
CVBB = 10 mF + 100 nF
CVCC = 10 mF X7R
4.97
4.96
4.95
4.94
20
0
45
ICC OUTPUT CURRENT (mA)
100
0
5.00 −40°C
TEMPERATURE (°C)
VCC OUTPUT VOLTAGE (V)
160
5.01
4.94
4.93
150
VBB = 14 V
CVBB = 10 mF + 100 nF
CVCC = 10 mF X7R
Standby Mode
T = 25°C
180
IBB−ICC (mA)
−25
VBB = 14 V
CVBB = 10 mF + 100 nF
CVCC = 10 mF X7R
5.02
VCC OUTPUT VOLTAGE (V)
1.4
5
10
15
20
25
30
35
40
45
4.93
−50
50
50 mA
−25
0
25
50
75
100
125
ICC OUTPUT CURRENT (mA)
TEMPERATURE (°C)
Figure 21. Ground Current vs. Output Current
Figure 22. Output Voltage vs. Temperature
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150
NCV7420
TxD
tBIT
tBIT
50%
t
tBUS_dom(max)
LIN
tBUS_rec(min)
THRec(max)
THDom(max)
Thresholds of
receiving node 1
THRec(min)
THDom(min)
Thresholds of
receiving node 2
t
tBUS_dom(min)
tBUS_rec(max)
Figure 23. LIN Transmitter Duty Cycle
t BIT
TxD
t BIT
50%
t
LIN
Vbb
60% Vbb
40% Vbb
t
ttrx_prop_down
ttrx_prop_up
Figure 24. LIN Transmitter Timing
LIN
100%
60%
60%
40%
40%
0%
T_fall
T_rise
Figure 25. LIN Transmitter Rising and Falling Times
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18
t
NCV7420
Table 20. AC CHARACTERISTICS LIN RECEIVER
Symbol
Pin LIN
Parameter
Conditions
Trec_prop_down
Propagation delay of receiver falling edge
Trec_prop_up
Propagation delay of receiver rising edge
Trec_sym
Propagation delay symmetry
Min
Trec_prop_down −
Trec_prop_up
Typ
Max
Unit
0.1
6
ms
0.1
6
ms
−2
2
ms
LIN
Vbb
60% Vbb
40% Vbb
t
RxD
trec_prop_down
trec_prop_up
50%
t
Figure 26. LIN Receiver Timing
ORDERING INFORMATION
Container
Qty
Temperature
Range
Description
Package
Shipping†
NCV7420D23G
LIN Transceiver + 3.3 V Vreg.
SOIC 150 14 GREEN
(JEDEC MS−012)
Tube/Rail
55
−40°C to 125°C
NCV7420D23R2G
LIN Transceiver + 3.3 V Vreg.
SOIC 150 14 GREEN
(JEDEC MS−012)
Tape & Reel
3000
−40°C to 125°C
NCV7420D24G
EMC/ESD Improved LIN
Transceiver + 3.3 V Vreg.
SOIC 150 14 GREEN
(JEDEC MS−012)
Tube/Rail
55
−40°C to 125°C
NCV7420D24R2G
EMC/ESD Improved LIN
Transceiver + 3.3 V Vreg.
SOIC 150 14 GREEN
(JEDEC MS−012)
Tape & Reel
3000
−40°C to 125°C
NCV7420D25G
LIN Transceiver + 5 V Vreg.
SOIC 150 14 GREEN
(JEDEC MS−012)
Tube/Rail
55
−40°C to 125°C
NCV7420D25R2G
LIN Transceiver + 5 V Vreg.
SOIC 150 14 GREEN
(JEDEC MS−012)
Tape & Reel
3000
−40°C to 125°C
NCV7420D26G
EMC/ESD Improved LIN
Transceiver + 5 V Vreg.
SOIC 150 14 GREEN
(JEDEC MS−012)
Tube/Rail
55
−40°C to 125°C
NCV7420D26R2G
EMC/ESD Improved LIN
Transceiver + 5 V Vreg.
SOIC 150 14 GREEN
(JEDEC MS−012)
Tape & Reel
3000
−40°C to 125°C
Part Number
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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19
NCV7420
PACKAGE DIMENSIONS
SOIC 14
CASE 751AP−01
ISSUE A
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NCV7420
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
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Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
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