LTC6084/LTC6085 Dual/Quad 1.5MHz, Rail-to-Rail, CMOS Amplifiers DESCRIPTION FEATURES n n n n n n n n n n n Low Offset Voltage: 750μV Maximum Low Offset Drift: 5μV/°C Maximum Low Input Bias Current: 1pA (Typical at 25°C) 40pA (≤85°C) Rail-to-Rail Inputs and Outputs 2.5V to 5.5V Operation Voltage Gain Bandwidth Product: 1.5MHz CMRR: 70dB Minimum PSRR: 95dB Minimum Supply Current: 110μA per Amplifier Shutdown Current: 1.1μA per Amplifier Available in 8-Lead MSOP and 10-Lead DFN Packages (LTC6084) and 16-Lead SSOP and DFN Packages (LTC6085) APPLICATIONS n n n n Portable Test Equipment Medical Equipment Consumer Electronics Data Acquisition The LTC®6084/LTC6085 are dual/quad, low cost, low offset, rail-to-rail input/output, unity-gain stable CMOS operational amplifiers that feature 1pA of input bias current. A 1.5MHz gain bandwidth, and 0.5V/μs slew rate, along with the wide supply range and a low 0.75mV offset, make the LTC6084/LTC6085 useful in an extensive variety of applications from data acquisition to medical equipment and consumer electronics. The 110μA supply current and the shutdown mode are ideal for signal processing applications which demand performance with minimal power. The LTC6084/LTC6085 have an output stage which swings within 5mV of either supply rail to maximize signal dynamic range in low supply applications. The input common mode range includes the entire supply voltage. These op amps are specified on power supply voltages of 2.5V and 5V from –40°C to 125°C. The dual amplifier LTC6084 is available in 8-lead MSOP and 10-lead DFN packages. The quad amplifier LTC6085 is available in 16-lead SSOP and DFN packages. L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. TYPICAL APPLICATION Shock Sensor Amplifier Input Bias Current vs Common Mode Voltage 200k 470pF 20M – 100k 2k * 1/2 LTC6084 + 3V VS = 5V 1000 3V VOUT = 120mV/g 100k 0.22μF 60845 TA01 INPUT BIAS CURRENT (pA) 20M 10000 TA = 125°C 100 TA = 85°C 10 TA = 25°C 1 0.1 7Hz TO 5kHz *SHOCK SENSOR MURATA ERIE PKGS-OOMX1 www.murata.com 0.01 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 COMMON MODE VOLTAGE (V) 5 60845 TA01b 60845f 1 LTC6084/LTC6085 ABSOLUTE MAXIMUM RATINGS (Note 1) Total Supply Voltage (V+ to V–) ...................................6V Input Voltage......................................................V – to V+ Input Current........................................................±10mA SHDNA/SHDNB Voltage .....................................V – to V+ Output Short Circuit Duration (Note 2)............. Indefinite Operating Temperature Range (Note 3) LTC6084C/LTC6085C ........................... –40°C to 85°C LTC6084H/LTC6085H ......................... –40°C to 125°C Specified Temperature Range (Note 4) LTC6084C/LTC6085C ............................... 0°C to 70°C LTC6084H/LTC6085H ........................... –40°C to 125° Junction Temperature ........................................... 150°C Storage Temperature Range................... –65°C to 125°C Lead Temperature (Soldering, 10 sec) MS8, GN Only ................................................... 300°C PIN CONFIGURATION TOP VIEW 1 2 3 4 – +A + – OUTA –INA +INA V– B OUTA –INA 2 7 OUTB 6 –INB 5 +INB +INA V– 3 SHDNA 5 MS8 PACKAGE 8-LEAD PLASTIC MSOP 10 V+ 1 8 V+ – +A 9 OUTB 11 8 –INB + – TOP VIEW B 4 7 +INB 6 SHDNB DD PACKAGE 10-LEAD (3mm × 3mm) PLASTIC DFN TJMAX = 150°C, θJA = 200°C/W TJMAX = 150°C, θJA = 43°C/W EXPOSED PAD (PIN 11) IS V–, MUST BE SOLDERED TO PCB TOP VIEW TOP VIEW 1 2 +INA 3 V+ 4 +INB 5 –INB 6 OUTB 7 NC 8 – +A + – –INA D 16 OUTD OUTA 1 15 –IND –INA 2 14 +IND +INA 3 V+ 4 12 +INC +INB 5 11 –INC –INB 6 10 OUTC OUTB 7 10 OUTC NC 8 9 13 + –B + C– 9 V– NC GN PACKAGE 16-LEAD PLASTIC SSOP NARROW TJMAX = 150°C, θJA = 110°C/W 16 OUTD – +A + – OUTA D 14 +IND 13 V– 17 + –B 15 –IND + C– 12 +INC 11 –INC NC DHC PACKAGE 16-LEAD (5mm × 3mm) PLASTIC DFN TJMAX = 150°C, θJA = 43°C/W EXPOSED PAD (PIN 17) IS V–, MUST BE SOLDERED TO PCB ORDER INFORMATION LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION SPECIFIED TEMPERATURE RANGE LTC6084CMS8#PBF LTC6084CMS8#TRPBF LTDNG 8-Lead Plastic MSOP 0°C to 70°C LTC6084HMS8#PBF LTC6084HMS8#TRPBF LTDNG 8-Lead Plastic MSOP –40°C to 125°C LTC6084CDD#PBF LTC6084CDD#TRPBF LDNH 10-Lead (3mm × 3mm) Plastic DFN 0°C to 70°C LTC6084HDD#PBF LTC6084HDD#TRPBF LDNH 10-Lead (3mm × 3mm) Plastic DFN –40°C to 125°C 60845f 2 LTC6084/LTC6085 ORDER INFORMATION LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION SPECIFIED TEMPERATURE RANGE LTC6085CGN#PBF LTC6085CGN#TRPBF 6085 16-Lead Plastic SSOP 0°C to 70°C LTC6085HGN#PBF LTC6085HGN#TRPBF 6085 16-Lead Plastic SSOP –40°C to 125°C LTC6085CDHC#PBF LTC6085CDHC#TRPBF 6085 16-Lead (5mm × 3mm) Plastic DFN 0°C to 70°C LTC6085HDHC#PBF LTC6085HDHC#TRPBF 6085 16-Lead (5mm × 3mm) Plastic DFN –40°C to 125°C Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. Consult LTC Marketing for information on non-standard lead based finish parts. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. Test conditions are V+ = 2.5V, V– = 0V, VCM = 0.5V unless otherwise noted. C SUFFIX SYMBOL PARAMETER CONDITIONS VOS Offset Voltage (Note 5) LTC6084MS8, LTC6085GN LTC6084DD, LTC6085DHC LTC6084MS8, LTC6085GN LTC6084DD, LTC6085DHC MIN l l l H SUFFIX TYP MAX 300 300 2 MIN TYP MAX UNITS 750 1100 900 1350 300 300 750 1100 1100 1600 μV μV μV μV 5 2 5 ΔVOS/ΔT Input Offset Voltage Drift (Note 6) IB Input Bias Current (Notes 5, 7) Guaranteed by 5V Test Input Offset Current (Notes 5, 7) Guaranteed by 5V Test Input Noise Voltage Density f = 1kHz f = 10kHz 31 27 31 27 nV/√Hz nV/√Hz Input Noise Voltage 0.1Hz to 10Hz 3 3 μVP-P 0.56 0.56 fA/√Hz IOS en in 0.5 l l Input Capacitance Differential Mode Common Mode 1 40 V– 750 pA pA 150 pA pA 0.5 30 Input Noise Current Density (Note 8) Input Common Mode Range CIN 1 l V+ V– μV/°C V+ V f = 100kHz 5 9 5 9 pF pF CMRR Common Mode Rejection 0 ≤ VCM ≤ 2.5V Ratio l 64 63 80 64 61 80 dB dB PSRR Power Supply Rejection Ratio VS = 2.5V to 5.5V l 94 91 115 94 89 115 dB dB VOUT Output Voltage, High, (Referred to V+) No Load ISOURCE = 1mA ISOURCE = 5mA l l l 0.5 39 220 5 85 460 0.5 39 220 10 100 mV mV mV Output Voltage, Low, (Referred to V–) No Load ISINK = 1mA ISINK = 5mA l l l 0.5 36 200 5 85 460 0.5 36 200 10 100 mV mV mV AVOL Large-Signal Voltage Gain RLOAD = 10k l 400 200 2000 400 150 2000 V/mV V/mV 60845f 3 LTC6084/LTC6085 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. Test conditions are V+ = 2.5V, V– = 0V, VCM = 0.5V unless otherwise noted. C SUFFIX SYMBOL PARAMETER CONDITIONS MIN TYP ISC Output Short-Circuit Current Source and Sink 7.7 6 12.5 SR Slew Rate AV = 1 GBW Gain Bandwidth Product (fTEST = 10kHz) RLOAD = 50k Φ0 Phase Margin RL = 10k, CL = 150pF, AV = 1 tS Settling Time 0.1% VSTEP = 1V, AV = 1 IS Supply Current (Per Amplifier) No Load Shutdown Current (Per Amplifier) Shutdown, VSHDNx ≤ 0.5V l Supply Voltage Range Guaranteed by the PSRR Test l Channel Separation fS = 10kHz Shutdown Logic SHDNx High SHDNx Low VS tON Turn On Time tOFF Turn Off Time VSHDNx = 1.8V to 0.5V Leakage of SHDN Pin VSHDNx = 0V l H SUFFIX MAX MIN TYP 7.7 4.5 12.5 mA mA 0.5 V/μs 1.5 MHz 45 45 Deg 6 6 μs 0.5 l 0.9 0.7 l 1.5 0.9 0.6 130 140 110 130 145 μA μA 0.2 0.3 0.2 0.5 μA 5.5 V 5.5 2.5 –120 –120 1.8 dB 1.8 0.5 0.5 7 7 1 l UNITS 110 2.5 VSHDNx = 0.5V to 1.8V MAX 0.2 μs 1 0.3 0.2 V V μs 0.5 μA The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. Test conditions are V+ = 5V, V– = 0V, VCM = 0.5V unless otherwise noted. C SUFFIX SYMBOL PARAMETER CONDITIONS VOS Offset Voltage (Note 5) LTC6084MS8, LTC6085GN LTC6084DD, LTC6085DHC LTC6084MS8, LTC6085GN LTC6084DD, LTC6085DHC MIN l l l ΔVOS/ΔT Input Offset Voltage Drift (Note 6) IB Input Bias Current (Notes 5, 7) l Input Offset Current (Notes 5, 7) l IOS en in Input Noise Voltage Density f = 1kHz f = 10kHz Input Noise Voltage 0.1Hz to 10Hz CIN Input Capacitance Differential Mode Common Mode TYP MAX 300 300 2 MIN TYP MAX UNITS 750 1100 900 1350 300 300 750 1100 1100 1600 μV μV μV μV 5 2 5 1 1 40 0.5 31 27 l μV/°C 750 pA pA 150 pA pA 0.5 30 Input Noise Current Density (Note 8) Input Common Mode Range H SUFFIX 31 27 nV/√Hz nV/√Hz 3 3 μVP-P 0.56 0.56 fA/√Hz V– V+ V– V+ V f = 100kHz 5 9 5 9 pF pF 60845f 4 LTC6084/LTC6085 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. Test conditions are V+ = 5V, V– = 0V, VCM = 0.5V unless otherwise noted. C SUFFIX CONDITIONS H SUFFIX SYMBOL PARAMETER CMRR Common Mode Rejection 0 ≤ VCM ≤ 5V Ratio MIN TYP MIN TYP l 70 68 84 70 66 84 dB dB PSRR Power Supply Rejection Ratio VS = 2.5V to 5.5V l 94 91 115 94 89 115 dB dB VOUT Output Voltage, High, (Referred to V+) No Load ISOURCE = 1mA ISOURCE = 5mA l l l 0.5 39 220 5 85 460 0.5 39 220 10 100 mV mV mV Output Voltage, Low, (Referred to V–) No Load ISINK = 1mA ISINK = 5mA l l l 0.5 36 200 5 85 460 0.5 36 200 10 100 mV mV mV AVOL Large-Signal Voltage Gain RLOAD = 10k ISC Output Short-Circuit Current Source and Sink SR Slew Rate AV = 1 GBW Gain Bandwidth Product (fTEST = 10kHz) RLOAD = 50k Φ0 Phase Margin RL = 10k, CL = 150pF, AV = 1 tS Settling Time 0.1% VSTEP = 1V, AV = 1 IS Supply Current (Per Amplifier) No Load Shutdown Current (Per Amplifier) Shutdown, VSHDNx ≤ 1.2V l Supply Voltage Range Guaranteed by the PSRR Test l VS Channel Separation fS = 10kHz Shutdown Logic SHDNx High SHDNx Low MAX MAX UNITS l 1000 400 5000 1000 300 5000 V/mV V/mV l 7.7 6 12.5 7.7 4.5 12.5 mA mA 0.5 V/μs 1.5 MHz 45 Deg 0.5 l 0.9 0.7 1.5 0.9 0.6 45 5 l 5 μs 110 130 140 110 130 145 μA μA 1.1 1.8 1.1 2 μA 5.5 V 2.5 5.5 2.5 –120 –120 3.5 dB 3.5 1.2 1.2 V V tON Turn On Time VSHDNx = 1.2V to 3.5V 7 7 μs tOFF Turn Off Time VSHDNx = 3.5V to 1.2V 1 1 μs Leakage of SHDN Pin VSHDNx = 0V Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: A heat sink may be required to keep the junction temperature below the absolute maximum. This depends on the power supply voltage and the total output current. Note 3: The LTC6084C/LTC6085C are guaranteed functional over the operating temperature range of –40°C to 85°C. The LTC6084H/LTC6085H are guaranteed functional over the operating temperature range of –40°C to 125°C. Note 4: The LTC6084C/LTC6085C are guaranteed to meet specified performance from 0°C to 70°C. The LTC6084C/LTC6085C are designed, characterized and expected to meet specified performance from –40°C l 0.5 0.9 0.5 1.2 μA to 85°C but are not tested or QA sampled at these temperatures. The LTC6084H/LTC6085H are guaranteed to meet specified performance from –40°C to 125°C. Note 5: ESD (Electrostatic Discharge) sensitive device. ESD protection devices are used extensively internal to the LTC6084/LTC6085; however, high electrostatic discharge can damage or degrade the device. Use proper ESD handling precautions. Note 6: This parameter is not 100% tested. Note 7: This specification is limited by high speed automated test capability. See Typical Performance Characteristic curves for actual performance. Note 8: Current noise is calculated from in = √2qIB, where q = 1.6 • 10–19 coulombs. 60845f 5 LTC6084/LTC6085 TYPICAL PERFORMANCE CHARACTERISTICS VOS Distribution VOS vs VCM VS = 5V 0.8 TA = 25°C REPRESENTATIVE PARTS 0.6 PERCENT OF UNITS (%) LTC6084 MS8 18 VS = 5V VCM = 0.5V 16 T = 25°C A 14 100 UNITS 0.4 12 10 8 0.2 0.0 –0.2 6 –0.4 4 –0.6 2 –0.8 0 VOS Drift Distribution 1.0 VOS (mV) PERCENTAGE OF UNITS (%) 20 –1 –0.8 –0.6 –0.4 –0.2 0 0.2 0.4 0.6 0.8 VOS (mV) –1.0 1 0 0.5 1 1.5 2 2.5 3 VCM (V) 3.5 4 60845 G01 10000 INPUT BIAS CURRENT (pA) 100 10 Input Noise Voltage vs Frequency 100 VS = 5V VS = 5V VCM = 2.5V TA = 25°C 90 INPUT NOISE VOLTAGE (nV/√Hz) VS = 5V VCM = 2.5V –1 –0.5 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 DISTRIBUTION (μV/°C) 60845 G03 Input Bias Current vs Common Mode Voltage 1000 INPUT BIAS CURRENT (pA) 5 LTC6084 MS8 VS = 5V VCM = 2.5V TA = –40°C TO 125°C 78 UNITS 60845 G02 Input Bias vs Temperature 1000 4.5 30 28 26 24 22 20 18 16 14 12 10 8 6 4 2 0 TA = 125°C 100 TA = 85°C 10 TA = 25°C 1 0.1 80 70 60 50 40 30 20 10 1 25 40 55 70 85 100 TEMPERATURE (°C) 115 0.01 130 0 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 COMMON MODE VOLTAGE (V) 60845 G04 5 OUTPUT HIGH SATURATION VOLTAGE (V) 5.0 NOISE CURRENT (fA/√Hz) 500 400 300 200 100 0 100k Output Saturation Voltage vs Load Current (Output High) 600 VS = 5V VCM = 2.5V INPUT NOISE VOLTAGE (2μV/DIV) 1k 10k FREQUENCY (Hz) 60845 G06 Input Noise Current vs Frequency 60845 G07 100 60845 G05 0.1Hz to 10Hz Output Voltage Noise TIME (1s/DIV) 10 1 10 100 1k FREQUENCY (Hz) 10k 100k 60845 G08 VS = 5V 4.5 V = 2.5V CM SOURCE 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 0.1 TA = –55°C TA = 25°C TA = 125°C 1 10 LOAD CURRENT (mA) SINK 100 60845 G09 60845f 6 LTC6084/LTC6085 TYPICAL PERFORMANCE CHARACTERISTICS Supply Current vs Supply Voltage Supply Current vs Temperature 140 140 120 PER AMPLIFIER VCM = 0.5V SUPPLY CURRENT (μA) SUPPLY CURRENT (μA) 130 100 80 60 40 0 0 0.5 1 1.5 2 2.5 3 3.5 4 TOTAL SUPPLY VOLTAGE (V) 4.5 VS = 5V 110 VS = 2.5V 100 PER AMPLIFIER VCM = 0.5V TA = 25°C 20 120 90 –55 –40 –25 –10 5 20 35 50 65 80 95 110 125 TEMPERATURE (°C) 5 60845 G10 CMRR vs Frequency 120 110 100 90 80 70 60 50 40 30 20 10 0 –10 100 40 GAIN 20 0 –20 VS = 5V VS = 2.5V 1k 10k –40 10M 100k 1M FREQUENCY (Hz) VS = 5V VCM = 2.5V RL = 1k TA = 25°C 50 40 10 0 1k 10k 100k 1M FREQUENCY (Hz) –10 100 10M AV = 10 AV = 2 AV = 1 0.1 1k 10k 100k FREQUENCY (Hz) 1M Capacitive Load Handling 40 VS = 5V VCM = 1V AV = 1 TA = 25°C 100 10M 60845 G14 VS = 5V 35 VCM = 2.5V AV = 1 10 1 RS = 10Ω 30 OVERSHOOT (%) OUTPUT IMPEDANCE (kΩ) OUTPUT IMPEDANCE (Ω) 60 20 1000 VS = 5V V = 2.5V 1000 T CM= 25°C A – + 25 20 RS CL RS = 50Ω 15 10 0.01 0.001 100 70 Disabled Output Impedance vs Frequency 10000 1 80 60845 G13 Output Impedance vs Frequency 100 VS = 5V VCM = 2.5V TA = 25°C 90 30 60845 G12 10 100 PSRR (dB) PHASE PSRR vs Frequency CMRR (dB) CL = 5pF RL = 10k VCM = VS/2 80 TA = 25°C 60 PHASE (DEG) GAIN (dB) Open-Loop Gain vs Frequency 100 90 80 70 60 50 40 30 20 10 0 –10 –20 –30 –40 60845 G11 5 1k 10k 100k 1M FREQUENCY (Hz) 10M 100M 60845 G14 0.1 100 1k 10k 100k FREQUENCY (Hz) 1M 10M 60845 G16 0 10 100 CAPACITIVE LOAD (pF) 1000 60845 G17 60845f 7 LTC6084/LTC6085 TYPICAL PERFORMANCE CHARACTERISTICS Capacitive Load Handling –90 50 OVERSHOOT (%) RS = 50Ω 25 20 1k 15 10 – + 1k 5 RS 100 1000 CAPACITIVE LOAD (pF) –105 –110 –115 –120 0.01 0.1 1 FREQUENCY (MHz) AV = 1, VIN = 1VP-P 0.001 0.01 10 0.01 AV = –2, VIN = 1VP-P 1 10 FREQUENCY (kHz) 100 Total Harmonic Distortion and Noise vs Load Resistance 0.1 VS = 3V AT 20kHz 0.1 VS = 5V AT 20kHz 0.01 VS = 3V AT 1kHz 0.001 AV = 1, VIN = 1VP-P 0.1 60845 G20 RL = 10k VCM = VS/2 AV = 1 1 THD AND NOISE (%) THD AND NOISE (%) 10 AV = 2, VIN = 1VP-P AV = 1 VCM = VS/2 AT 1kHz 0.01 VS = 3V, VIN = 1VP-P 0.001 VS = 5V, VIN = 2VP-P 0.001 VS = 5V AT 1kHz 1 10 FREQUENCY (kHz) 100 0.0001 0 60845 G21 0.5 1 1.5 2 2.5 3 3.5 4 OUTPUT VOLTAGE (VP-P) 4.5 5 0.0001 0.1 Large Signal Response 1V/DIV 100mV/DIV 2μs/DIV 60845 G24 100 60845 G23 Small Signal Response 100mV/DIV 1 10 LOAD RESISTANCE TO GROUND (kΩ) 60845 G22 Small Signal Response VS = 5V AV = 1 RL = ∞ 0.01 Total Harmonic Distortion and Noise vs Output Voltage 0.1 0.1 AV = 2, VIN = 1VP-P 60845 G19 VS = 5V VCM = 2.5V RL = 10k 0.0001 0.01 AV = –2, VIN = 1VP-P AV = 1, VIN = 2VP-P –135 0.001 10000 Total Harmonic Distortion and Noise vs Frequency AV = 1, VIN = 2VP-P 0.1 –125 60845 G17 1 VS = 3V VCM = 1.5V RL = 10k –130 CL 10 –100 THD AND NOISE (%) RS = 10Ω 30 0 CHANNEL SEPARATION (dB) –95 35 1 VS = 5V VCM = 2.5V TA = 25°C THD AND NOISE (%) VS = 5V 45 VCM = 2.5V A = –1 40 V Total Harmonic Distortion and Noise vs Frequency Channel Separation vs Frequency VS = 5V AV = 1 RL = ∞ CL = 220pF 2μs/DIV 60845 G25 VS = 5V AV = 1 RL = ∞ 20μs/DIV 60845 G26 60845f 8 LTC6084/LTC6085 TYPICAL PERFORMANCE CHARACTERISTICS Large Signal Response Large Signal Response 1V/DIV Large Signal Response 1V/DIV 1V/DIV VS = 5V AV = –1 RL = 1k 20μs/DIV 60845 G27 VS = 5V AV = 1 RL = ∞ 20μs/DIV 60845 G28 VS = 5V AV = –1 RL = 1k 20μs/DIV 60845 G29 PIN FUNCTIONS OUT: Amplifier Output. –IN: Inverting Input. +IN: Noninverting Input. V+: Positive Supply. V–: Negative Supply. SHDNB: Shutdown Pin of Amplifier B, active low and only available with the LTC6084DD. An internal current source pulls the pin to V+ when floating. NC: Not Internally Connected. Exposed Pad: Connected to V–. SHDNA: Shutdown Pin of Amplifier A, active low and only available with the LTC6084DD. An internal current source pulls the pin to V+ when floating. 60845f 9 LTC6084/LTC6085 APPLICATIONS INFORMATION OUT R NO SOLDER MASK OVER THE GUARD RING NO LEAKAGE CURRENT OUT LTC6084 IN– R LTC6084 R IN– VIN IN+ IN+ LEAKAGE CURRENT GUARD RING GND V– V– 60845 F01 60845 F02 Figure 1. Sample Layout. Unity-Gain Configuration. Using Guard Ring to Shield High Impedance Input from Board Leakage Figure 2. Sample Layout. Inverting Gain Configuration. Using Guard Ring to Shield High Impedance Input from Board Leakage Rail-to-Rail Input than the bias current of the operational amplifier. A guard ring around the high impedance input traces driven by a low impedance source equal to the input voltage prevents such leakage problems. The guard ring should extend as far as necessary to shield the high impedance signal from any and all leakage paths. Figure 1 shows the use of a guard ring in a unity-gain configuration. In this case the guard ring is connected to the output and is shielding the high impedance noninverting input from V–. Figure 2 shows the inverting gain configuration. The input stage of LTC6084/LTC6085 combines both PMOS and NMOS differential pairs, extending its input common mode voltage to both positive and negative supply voltages. At high input common mode range, NMOS pair is on. At low common mode range, the PMOS pair is on. The transition happens when the common voltage is between 1.3 and 0.9V below the positive supply. Achieving Low Input Bias Current The DD and DHC packages are leadless and make contact to the PCB beneath the package. Solder flux used during the attachment of the part to the PCB can create leakage current paths and can degrade the input bias current performance of the part. All inputs are susceptible because the backside paddle is connected to V– internally. As the input voltage or V– changes, a leakage path can be formed and alter the observed input bias current. For lowest bias current use the LTC6084/LTC6085 in the leaded MSOP/GN package. With fine PCB design rules, you can also provide a guard ring around the inputs. Rail-to-Rail Output For example, in high source impedance applications such as pH probes, photo diodes, strain gauges, etc., the low input bias current of these parts requires a clean board layout to minimize additional leakage current into a high impedance signal node. A mere 100GΩ of PC board resistance between a 5V supply trace and input trace near ground potential adds 50pA of leakage current. This leakage is far greater Capacitive Load The output stage of the LTC6084/LTC6085 swings within 5mV of the supply rails when driving high impedance loads, in other words when no DC load current is present. See the Typical Performance Characteristics for curves of output swing versus load current. The class AB design of the output stage enables the op amp to supply load currents which are much greater than the quiescent supply current. For example, the room temperature short circuit current is typically 12.5mA. LTC6084/LTC6085 can drive a capacitive load up to 300pF in unity gain. The capacitive load driving capability increases as the amplifier is used in higher gain configurations. A small series resistance between the output and the load further increases the amount of capacitance the amplifier can drive. 60845f 10 LTC6084/LTC6085 APPLICATIONS INFORMATION SHDN Pins ESD Pins 5 and 6 are used for power shutdown of the LTC6084 in the DD package. If they are floating, internal current sources pull pins 5 and 6 to V+ and the amplifiers operate normally. In shutdown the amplifier output is high impedance, and each amplifier draws less than 1μA current. This feature allows the part to be used in muxed output applications as shown in Figure 3. The LTC6084/LTC6085 has reverse-biased ESD protection diodes on all inputs and outputs as shown in the Simplified Schematic. If these pins are forced beyond either supply, unlimited current will flow through these diodes. If the current is transient and limited to 100mA or less, no damage to the device will occur. 10k 10k 5V 5V The amplifier input bias current is the leakage current of these ESD diodes. This leakage is a function of the temperature and common mode voltage of the amplifier, as shown in the Typical Performance Characteristics. + A 10k – INA LTC6084 (DD PACKAGE) Noise OUT In the frequency region above 1kHz, the LTC6084/LTC6085 shows good noise voltage performance. In this region, noise can be dominated by the total source resistance of the particular application. Specifically, these amplifiers exhibit the noise of a 58k resistor, meaning it is desirable to keep the source and feedback resistance at or below this value, i.e., RS + RG||RFB ≤ 58k. Above this total source impedance, the noise voltage is dominated by the resistors. SHDN A 10k 10k + 5V 10k B 10k – INB SEL = 5V, OUT = –INA SEL = 0V, OUT = –INB 10k 5V SEL SHDN B FAIRCHILD NC7SZ04 OR EQUIVALENT 60845 F03 Figure 3. Inverting Amplifier with Muxed Output At low frequency, noise current can be estimated from the expression in = √2qIB, where q = 1.6 • 10–19 coulombs. Equating √4kTRΔf and R√2qIBΔf shows that for a source resistor below 50GΩ the amplifier noise is dominated by the source resistance. Noise current rises with frequency. See the curve Input Noise Current vs Frequency in the Typical Performance Characteristics section. 60845f 11 LTC6084/LTC6085 SIMPLIFIED SCHEMATIC Simplified Schematic of the Amplifier V+ R1 M10 R2 M11 M8 I1 1μA I2 V– C1 + – V+ A1 VBIAS D4 M5 V+ +IN V+ D7 V+ D3 OUTPUT CONTROL M6 M7 M1 M2 D8 –IN V– D5 D2 BIAS GENERATION SHDN A2 + – V– C2 D1 V– OUT D6 V– NOTE: SHDN IS ONLY AVAILABLE IN THE DFN PACKAGE M9 M4 M3 R3 V– R4 60845 SS TYPICAL APPLICATIONS Gain Selectable Amplifier 5V 10k + A – VIN SHDNA 4.02k 1k 10k + – VOUT B SHDNB 24.3k 1k 5V SEL SEL = 5V, GAIN = 25 SEL = 0V, GAIN = 5 A, B: LTC6084 in DFN10 FAIRCHILD NC7SZ04 OR EQUIVALENT 60845 TA02 60845f 12 LTC6084/LTC6085 PACKAGE DESCRIPTION DD Package 10-Lead Plastic DFN (3mm × 3mm) (Reference LTC DWG # 05-08-1699) 0.675 ±0.05 3.50 ±0.05 1.65 ±0.05 2.15 ±0.05 (2 SIDES) PACKAGE OUTLINE 0.25 ± 0.05 0.50 BSC 2.38 ±0.05 (2 SIDES) RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS R = 0.115 TYP 6 3.00 ±0.10 (4 SIDES) 0.38 ± 0.10 10 1.65 ± 0.10 (2 SIDES) PIN 1 TOP MARK (SEE NOTE 6) (DD) DFN 1103 5 0.200 REF 1 0.25 ± 0.05 0.50 BSC 0.75 ±0.05 0.00 – 0.05 2.38 ±0.10 (2 SIDES) BOTTOM VIEW—EXPOSED PAD NOTE: 1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-2). CHECK THE LTC WEBSITE DATA SHEET FOR CURRENT STATUS OF VARIATION ASSIGNMENT 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 60845f 13 LTC6084/LTC6085 PACKAGE DESCRIPTION DHC Package 16-Lead Plastic DFN (5mm × 3mm) (Reference LTC DWG # 05-08-1706) 0.65 ±0.05 3.50 ±0.05 1.65 ±0.05 2.20 ±0.05 (2 SIDES) PACKAGE OUTLINE 0.25 ± 0.05 0.50 BSC 4.40 ±0.05 (2 SIDES) RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS R = 0.115 TYP 5.00 ±0.10 (2 SIDES) R = 0.20 TYP 3.00 ±0.10 (2 SIDES) 9 0.40 ± 0.10 16 1.65 ± 0.10 (2 SIDES) PIN 1 TOP MARK (SEE NOTE 6) PIN 1 NOTCH (DHC16) DFN 1103 8 0.200 REF 1 0.25 ± 0.05 0.50 BSC 0.75 ±0.05 4.40 ±0.10 (2 SIDES) 0.00 – 0.05 BOTTOM VIEW—EXPOSED PAD NOTE: 1. DRAWING PROPOSED TO BE MADE VARIATION OF VERSION (WJED-1) IN JEDEC PACKAGE OUTLINE MO-229 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 60845f 14 LTC6084/LTC6085 PACKAGE DESCRIPTION MS8 Package 8-Lead Plastic MSOP (Reference LTC DWG # 05-08-1660) 0.889 ± 0.127 (.035 ± .005) 5.23 (.206) MIN 3.20 – 3.45 (.126 – .136) 3.00 ± 0.102 (.118 ± .004) (NOTE 3) 0.65 (.0256) BSC 0.42 ± 0.038 (.0165 ± .0015) TYP 8 0.52 (.0205) REF 7 6 5 RECOMMENDED SOLDER PAD LAYOUT 3.00 ± 0.102 (.118 ± .004) (NOTE 4) 4.90 ± 0.152 (.193 ± .006) DETAIL “A” 0.254 (.010) 0° – 6° TYP GAUGE PLANE 1 0.53 ± 0.152 (.021 ± .006) DETAIL “A” 2 3 4 1.10 (.043) MAX 0.86 (.034) REF 0.18 (.007) SEATING PLANE 0.22 – 0.38 (.009 – .015) TYP 0.1016 ± 0.0508 (.004 ± .002) 0.65 (.0256) BSC MSOP (MS8) 0307 REV F NOTE: 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX GN Package 16-Lead Plastic SSOP (Narrow .150 Inch) (Reference LTC DWG # 05-08-1641) .189 – .196* (4.801 – 4.978) .045 ±.005 .009 (0.229) REF 16 15 14 13 12 11 10 9 .254 MIN .150 – .165 .229 – .244 (5.817 – 6.198) .0165 ± .0015 .150 – .157** (3.810 – 3.988) .0250 BSC RECOMMENDED SOLDER PAD LAYOUT 1 .015 ± .004 × 45° (0.38 ± 0.10) .007 – .0098 (0.178 – 0.249) .0532 – .0688 (1.35 – 1.75) 2 3 4 5 6 7 8 .004 – .0098 (0.102 – 0.249) 0° – 8° TYP .016 – .050 (0.406 – 1.270) NOTE: 1. CONTROLLING DIMENSION: INCHES INCHES 2. DIMENSIONS ARE IN (MILLIMETERS) .008 – .012 (0.203 – 0.305) TYP .0250 (0.635) BSC GN16 (SSOP) 0204 3. DRAWING NOT TO SCALE *DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE **DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE 60845f Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 15 LTC6084/LTC6085 TYPICAL APPLICATION Bipolar Analog Isolation Amplifier VCC 1M 1% 10pF OC1 VCC OC1 – + VIN 1M 1% 1M 3pF 2k +5V 1/2 LTC6084 OC1 OC2 10pF – + VOUT = VIN LTC6240HV –5V OC2 – + 1/2 LTC6084 GNDB 2k GNDA OC2 VCC = 5V, VIN = ±5V RELATIVE TO GNDA BW ≈ 40kHz, EITHER POLARITY LARGE SIGNAL TRANSITION DELAY ≈ 50μs SMALL SIGNAL DEAD ZONE: |VIN| ≤ 10mV OC1, OC2: AVAGO TECHNOLOGIES HCNR201 www.avagotech.com VOUT = ±5V, RELATIVE TO GNDB 60845 TA03 RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LTC6078/LTC6079 Dual/Quad Micropower Precision Rail-to-Rail Op Amps 25μV VOS(MAX), 0.7μV/°C VOS Drift(MAX), 1pA IBIAS(MAX) LTC6081/LTC6082 Dual/Quad Precision Rail-to-Rail Input/Output Amps 70μV VOS(MAX), 0.8μV/°C VOS Drift(MAX), 1pA IBIAS(MAX) LTC6087/LTC6088 Dual/Quad 14MHz Rail-to-Rail Input/Output Amps 750μV VOS(MAX), 5μV/°C VOS Drift(MAX), 1pA IBIAS LTC6240/LTC6241/ LTC6242 Single/Dual/Quad Low Noise Rail-to-Rail Output Op Amps 7nV/√Hz Noise, 0.2pA IBIAS, 18MHz Gain Bandwidth LTC6244 Dual Low Noise Rail-to-Rail Output Op Amps 8nV/√Hz Noise, 1pA IBIAS, 50MHz Gain Bandwidth 60845f 16 Linear Technology Corporation LT 0708 • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com © LINEAR TECHNOLOGY CORPORATION 2008