TI LMV2011MFX/NOPB Lmv2011 high precision, rail-to-rail output operational amplifier Datasheet

LMV2011
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SNOSA32C – AUGUST 2003 – REVISED MARCH 2013
LMV2011 High Precision, Rail-to-Rail Output Operational Amplifier
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FEATURES
DESCRIPTION
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The LMV2011 is a new precision amplifier that offers
unprecedented accuracy and stability at an affordable
price and is offered in a miniature (5-pin SOT-23)
package and in an 8-lead SOIC package. This device
utilizes patented techniques to measure and
continually correct the input offset error voltage. The
result is an amplifier which is ultra stable over time
and temperature. It has excellent CMRR and PSRR
ratings, and does not exhibit the familiar 1/f voltage
and current noise increase that plagues traditional
amplifiers. The combination of the LMV2011
characteristics makes it a good choice for transducer
amplifiers, high gain configurations, ADC buffer
amplifiers, DAC I-V conversion, and any other 2.7V5V application requiring precision and long term
stability.
1
2
(For Vs = 5V, Typical Unless Otherwise Noted)
Low Ensured Vos Over Temperature 35µV
Low Noise with no 1/f 35nV/√Hz
High CMRR 130dB
High PSRR 120dB
High AVOL 130dB
Wide Gain-Bandwidth Product 3MHz
High Slew Rate 4V/µs
Low Supply Current 930µA
Rail-to-Rail Output 30mV
No External Capacitors Required
APPLICATIONS
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Precision Instrumentation Amplifiers
Thermocouple Amplifiers
Strain Gauge Bridge Amplifier
Other useful benefits of the LMV2011 are rail-to-rail
output, a low supply current of 930µA, and wide gainbandwidth product of 3MHz. These extremely
versatile features found in the LMV2011 provide high
performance and ease of use.
Connection Diagrams
N/C
-
2
+
3
-
4
VIN
VIN
V
Figure 1. 5-Pin SOT-23 (Top View)
See DBV Package
1
8
-
7
+
6
5
N/C
+
V
VOUT
N/C
Figure 2. 8-Pin SOIC (Top View)
See D Package
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
1
2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2003–2013, Texas Instruments Incorporated
LMV2011
SNOSA32C – AUGUST 2003 – REVISED MARCH 2013
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Absolute Maximum Ratings (1) (2)
Human Body Model
ESD Tolerance
2000V
Machine Model
200V
Supply Voltage
5.5V
−0.3≤ VCM ≤ VCC +0.3V
Common-Mode Input Voltage
Differential Input Voltage
± Supply Voltage
Current At Input Pin
30mA
Current At Output Pin
30mA
Current At Power Supply Pin
50mA
Junction Temperature (TJ)
150°C
Lead Temperature (soldering 10 sec.)
(1)
(2)
+300°C
Absolute Maximum Ratings indicate limits beyond which damage may occur. Operating Ratings indicate conditions for which the device
is intended to be functional, but specific performance is not ensured. For ensured specifications and test conditions, see the Electrical
Characteristics.
If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and
specifications.
Operating Ratings (1)
Supply Voltage
2.7V to 5.25V
−65°C to 150°C
Storage Temperature Range
Operating Temperature Range
(1)
0°C to 70°C
Absolute Maximum Ratings indicate limits beyond which damage may occur. Operating Ratings indicate conditions for which the device
is intended to be functional, but specific performance is not ensured. For ensured specifications and test conditions, see the Electrical
Characteristics.
2.7V DC Electrical Characteristics
Unless otherwise specified, all limits ensured for T J = 25°C, V+ = 2.7V, V-= 0V, V CM = 1.35V, VO = 1.35V and RL > 1MΩ.
Boldface limits apply at the temperature extremes.
Symbol
VOS
Parameter
Conditions
Min
Input Offset Voltage
Offset Calibration Time
TCVOS
Typ
Max
Units
0.8
25
35
μV
0.5
10
12
ms
Input Offset Voltage
0.015
μV/°C
Long-Term Offset Drift
0.006
μV/month
2.5
Input Current
-3
IOS
Input Offset Current
6
pA
RIND
Input Differential Resistance
9
MΩ
CMRR
PSRR
pA
Common Mode Rejection Ratio
−0.3 ≤ VCM ≤ 0.9V
0 ≤ VCM ≤ 0.9V
130
95
90
dB
Power Supply Rejection Ratio
2.7V ≤ V+ ≤ 5V
120
95
90
dB
130
95
90
124
90
85
AVOL
RL = 10kΩ
Open Loop Voltage Gain
RL = 2kΩ
VO
RL = 10kΩ to 1.35V
VIN(diff) = ±0.5V
Output Swing
RL = 2kΩ to 1.35V
VIN(diff) = ±0.5V
2
5
μV
Lifetime VOS Drift
IIN
2.665
2.655
2.68
0.033
2.630
2.615
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dB
0.060
0.075
V
2.65
0.061
0.085
0.105
V
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2.7V DC Electrical Characteristics (continued)
Unless otherwise specified, all limits ensured for T J = 25°C, V+ = 2.7V, V-= 0V, V CM = 1.35V, VO = 1.35V and RL > 1MΩ.
Boldface limits apply at the temperature extremes.
Symbol
Parameter
IO
Output Current
ROUT
Output Impedance
IS
Supply Current
Typ
Max
Sourcing, VO = 0V
VIN(diff) = ±0.5V
Conditions
Min
12
5
3
Sinking, VO = 5V
V IN(diff) = ±0.5V
18
5
3
Units
mA
Ω
0.05
0.919
1.20
1.50
mA
2.7V AC Electrical Characteristics
TJ = 25°C, V+ = 2.7V, V -= 0V, VCM = 1.35V, VO = 1.35V, and RL > 1MΩ. Boldface limits apply at the temperature extremes.
Symbol
Parameter
Conditions
Min
Typ
Max
Units
GBW
Gain-Bandwidth Product
3
MHz
SR
Slew Rate
4
V/μs
θm
Phase Margin
60
Deg
Gm
Gain Margin
−14
dB
en
Input-Referred Voltage Noise
35
nV/√Hz
in
Input-Referred Current Noise
150
fA/√Hz
enp-p
Input-Referred Voltage Noise
850
nVpp
trec
Input Overload Recovery Time
50
ms
RS = 100Ω, DC to 10Hz
ts
1%
AV = −1, RL = 2kΩ
1V Step
Output Settling Time
0.9
0.1%
49
0.01%
100
μs
5V DC Electrical Characteristics
Unless otherwise specified, all limits ensured for T J = 25°C, V+ = 5V, V-= 0V, V CM = 2.5V, VO = 2.5V and RL > 1MΩ. Boldface
limits apply at the temperature extremes.
Symbol
VOS
Parameter
Conditions
Min
Input Offset Voltage
Offset Calibration Time
TCVOS
Typ
Max
Units
0.12
25
35
μV
0.5
10
12
ms
Input Offset Voltage
0.015
μV/°C
Long-Term Offset Drift
0.006
μV/month
2.5
Input Current
-3
IOS
Input Offset Current
6
pA
RIND
Input Differential Resistance
9
MΩ
CMRR
PSRR
5
μV
Lifetime VOS Drift
IIN
pA
Common Mode Rejection Ratio
−0.3 ≤ VCM ≤ 3.2
0 ≤ VCM ≤ 3.2
130
100
90
dB
Power Supply Rejection Ratio
2.7V ≤ V+ ≤ 5V
120
95
90
dB
130
105
100
132
95
90
AVOL
RL = 10kΩ
Open Loop Voltage Gain
RL = 2kΩ
dB
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5V DC Electrical Characteristics (continued)
Unless otherwise specified, all limits ensured for T J = 25°C, V+ = 5V, V-= 0V, V CM = 2.5V, VO = 2.5V and RL > 1MΩ. Boldface
limits apply at the temperature extremes.
Symbol
Parameter
Conditions
VO
RL = 10kΩ to 2.5V
VIN(diff) = ±0.5V
Output Swing
RL = 2kΩ to 2.5V
VIN(diff) = ±0.5V
IO
Output Current
ROUT
Min
Typ
4.96
4.95
4.978
0.040
4.895
4.875
0.070
0.085
Units
V
4.919
0.091
0.115
0.140
Sourcing, VO = 0V
VIN(diff) = ±0.5V
15
8
6
Sinking, VO = 5V
V IN(diff) = ±0.5V
17
8
6
Output Impedance
IS
Max
mA
Ω
0.05
0.930
Supply Current per Channel
V
1.20
1.50
mA
5V AC Electrical Characteristics
TJ = 25°C, V+ = 5V, V -= 0V, VCM = 2.5V, VO = 2.5V, and RL > 1MΩ. Boldface limits apply at the temperature extremes.
Symbol
Parameter
Conditions
Min
Typ
Max
Units
GBW
Gain-Bandwidth Product
3
MHz
SR
Slew Rate
4
V/μs
θm
Phase Margin
60
deg
Gm
Gain Margin
−15
dB
en
Input-Referred Voltage Noise
35
nV/√Hz
in
Input-Referred Current Noise
150
fA/√Hz
enp-p
Input-Referred Voltage Noise
850
nVpp
trec
Input Overload Recovery Time
50
ms
RS = 100Ω, DC to 10Hz
ts
1%
Output Settling Time
4
AV = −1, RL = 2kΩ
1V Step
0.8
0.1%
36
0.01%
100
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Typical Performance Characteristics
TA=25C, VS= 5V unless otherwise specified.
Supply Current vs. Supply Voltage
Offset Voltage vs. Supply Voltage
5
1.20
4
0°C
70°C
1.10
1.05
1.00
0.95
3
OFFSET VOLTAGE (PV)
SUPPLY CURRENT (mA)
1.15
25°C
0.90
0.85
2
1
70°C
0
-1
-2
-3
0°C
-4
-5
0.80
2.5
3
3.5
4.5
4
5
2.5
5.5
3
Figure 3.
Offset Voltage vs. Common Mode
5.5
5
Offset Voltage vs. Common Mode
10
0°C
8
25°C
6
4
70°C
2
0
-2
-4
-6
25°C
6
4
70°C
2
0
-2
-4
-6
-8
VS = 2.7V
-10
-0.2
0°C
8
OFFSET VOLTAGE (PV)
OFFSET VOLTAGE (PV)
4.5
Figure 4.
10
0.3
0.8
1.3
1.8
VS = 5V
-10
-0.2
2.3
0.8
1.8
2.8
3.8
COMMON MODE VOLTAGE (V)
COMMON MODE VOLTAGE (V)
Figure 5.
Figure 6.
Voltage Noise vs. Frequency
4.8
Input Bias Current vs. Common Mode
500
10000
VS = 5V
VS = 5V
400
300
BIAS CURRENT (pA)
VOLTAGE NOISE (nV/ Hz)
4
3.5
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
-8
25°C
1000
100
200
100
0
-100
-200
-300
-400
10
0.1
1
10
100
1k
10k 100k
1M
-500
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
VCM (V)
FREQUENCY (Hz)
Figure 7.
Figure 8.
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Typical Performance Characteristics (continued)
TA=25C, VS= 5V unless otherwise specified.
PSRR vs. Frequency
PSRR vs. Frequency
120
120
VS = 2.7V
100
80
VCM = 2.5V
100
80
NEGATIVE
PSRR
(dB)
PSRR
(dB)
VS = 5V
VCM = 1V
60
40
NEGATIVE
60
40
POSITIVE
POSITIVE
20
20
0
0
10
100
1k
10k
1M
100k
10M
10
1k
100
FREQUENCY (Hz)
Figure 9.
Output Sourcing @ 2.7V
Output Sourcing @ 5V
VS = 2.7V
16
14
70°C
12
10
0°C
0°C
8
70°C
6
25°C
4
VS = 5V
18
SOURCING CURRENT (mA)
SOURCING CURRENT (mA)
10M
20
18
70°C
16
14
12
0°C
0°C
10
70°C
8
6
25°C
4
2
2
0
0
0
0.5
1
1.5
2
2.5
3
0
1
OUTPUT VOLTAGE (V)
2
3
4
5
OUTPUT VOLTAGE (V)
Figure 11.
Figure 12.
Output Sinking @ 2.7V
Output Sinking @ 5V
20
20
0°C
18
18
16
SINKING CURRENT (mA)
SINKING CURRENT (mA)
1M
100k
Figure 10.
20
14
25°C
12
10
70°C
8
6
4
2
0°C
16
14
12
25°C
10
70°C
8
6
4
2
VS = 2.7V
0
VS = 5V
0
0
0.5
1
1.5
2
2.5
3
OUTPUT VOLTAGE (V)
0
1
2
3
4
5
OUTPUT VOLTAGE (V)
Figure 13.
6
10k
FREQUENCY (Hz)
Figure 14.
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Typical Performance Characteristics (continued)
TA=25C, VS= 5V unless otherwise specified.
Max Output Swing vs. Supply Voltage
Max Output Swing vs. Supply Voltage
120
+
100
80
60
40
70°C
25°C
RL = 2k:
OUTPUT VOLTAGE (mV FROM V )
RL = 10k:
+
OUTPUT VOLTAGE (mV FROM V )
120
20
100
80
60
0°C
40
20
0°C
0
2.5
3
3.5
25°C
70°C
0
4
4.5
5
5.5
2.5
3
SUPPLY VOLTAGE (V)
3.5
4.5
5
5.5
SUPPLY VOLTAGE (V)
Figure 15.
Figure 16.
Min Output Swing vs. Supply Voltage
Min Output Swing vs. Supply Voltage
120
120
-
100
80
70°C
60
70°C
OUTPUT VOLTAGE (mV FROM V )
RL = 10k:
-
OUTPUT VOLTAGE (mV FROM V )
4
25°C
40
20
0°C
25°C
100
80
60
0°C
40
20
RL = 2k:
0
0
2.5
3
3.5
4
4.5
5
5.5
2.5
3
SUPPLY VOLTAGE (V)
3.5
4
4.5
5
5.5
SUPPLY VOLTAGE (V)
Figure 17.
Figure 18.
CMRR vs. Frequency
Open Loop Gain and Phase vs. Supply Voltage
100
140
150.0
VS = 5V
VS = 5V
120
80
120.0
PHASE
80
60
90.0
60.0
40
GAIN
PHASE (°)
VS = 5V
60
GAIN (dB)
CMRR (dB)
100
30.0
20
40
RL = 1M
0
20
0.0
VS = 2.7V
CL = < 20pF
VS = 2.7V OR 5V
-20
0
10
100
100k
1k
FREQUENCY (Hz)
100k
100
1k
10k
100k
1M
-30.0
10M
FREQUENCY (Hz)
Figure 19.
Figure 20.
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Typical Performance Characteristics (continued)
TA=25C, VS= 5V unless otherwise specified.
Open Loop Gain and Phase vs. RL @ 2.7V
100
Open Loop Gain and Phase vs. RL @ 5V
150.0
100
120.0
80
150.0
RL = >1M
80
120.0
PHASE
PHASE
RL = >1M
40
30.0
VS = 2.7V
20
RL = >1M
0.0
CL = < 20pF
RL = >1M & 2k
RL = 2k
CL = < 20pF
-30.0
10M
1M
100
100k
10k
1k
FREQUENCY (Hz)
Figure 22.
Open Loop Gain and Phase vs. CL @ 5V
150.0
100
150.0
10pF
10pF
80
120.0
80
120.0
PHASE
PHASE
60.0
40
GAIN
30.0
20
CL = 10,50,200 & 500pF
100k
10k
1k
1M
GAIN
0
500pF
-20
60.0
500pF
20
0.0
VS = 2.7V, RL = >1M
40
30.0
0.0
VS = 5V, RL = >1M
500pF
CL = 10,50,200 & 500pF
-20
100
1M
1k
10k
100k
FREQUENCY (Hz)
-30.0
10M
FREQUENCY (Hz)
Figure 23.
Open Loop Gain and Phase vs. Temperature @ 5V
113
100
113
100
PHASE
PHASE
90
0°C
80
90
0°C
0°C
45
20
70°C
VS = 2.7V
23
68
60
GAIN (dB)
GAIN
70°C
PHASE (deg)
GAIN (dB)
0°C
68
60
25°C
GAIN
40
70°C
20
0
0
CL = <20pF
-20
100k
1M
-23
10M
-20
1k
FREQUENCY (Hz)
10k
100k
1M
-23
10M
FREQUENCY (Hz)
Figure 25.
8
23
0
RL = >1M
CL = <20pF
10k
70°C
VS = 5V
VOUT = 200mVPP
RL = >1M
1k
45
25°C
VOUT = 200mVPP
0
-30.0
10M
Figure 24.
Open Loop Gain and Phase vs. Temperature @ 2.7V
40
90.0
PHASE (°)
500pF
10pF
60
90.0
GAIN (dB)
10pF
PHASE (°)
GAIN (dB)
60
80
1M
Figure 21.
Open Loop Gain and Phase vs. CL @ 2.7V
100
-30.0
10M
-20
FREQUENCY (Hz)
100
0
0.0
RL = >1M & 2k
100k
10k
1k
0
RL = 2k
-20
100
30.0
VS = 5V
RL = >1M
0
60.0
RL = >1M
GAIN
PHASE (deg)
20
60.0
90.0
PHASE (°)
RL = >1M
GAIN (dB)
GAIN (dB)
GAIN
40
60
90.0
PHASE (°)
RL = 2k
60
Figure 26.
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Typical Performance Characteristics (continued)
TA=25C, VS= 5V unless otherwise specified.
THD+N vs. AMPL
THD+N vs. Frequency
10
10
MEAS FREQ = 1 KHz
MEAS BW = 22 KHz
VOUT = 2 VPP
MEAS BW = 500 kHz
RL = 10k
RL = 10k
1
AV = +10
1
THD+N (%)
THD+N (%)
AV = +10
VS = 2.7V
0.1
VS = 2.7V
VS = 5V
0.1
VS = 5V
VS = 5V
VS = 2.7V
0.01
0.1
0.01
1
10
10
100
1k
10k
OUTPUT VOLTAGE (VPP)
FREQUENCY (Hz)
Figure 27.
Figure 28.
100k
NOISE (200 nV/DIV)
0.1Hz − 10Hz Noise vs. Time
1 sec/DIV
Figure 29.
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APPLICATION INFORMATION
THE BENEFITS OF LMV2011 NO 1/f NOISE
Using patented methods, the LMV2011 eliminates the 1/f noise present in other amplifiers. That noise, which
increases as frequency decreases, is a major source of measurement error in all DC-coupled measurements.
Low-frequency noise appears as a constantly-changing signal in series with any measurement being made. As a
result, even when the measurement is made rapidly, this constantly-changing noise signal will corrupt the result.
The value of this noise signal can be surprisingly large. For example: If a conventional amplifier has a flat-band
noise level of 10nV/√Hz and a noise corner of 10Hz, the RMS noise at 0.001Hz is 1µV/√Hz. This is equivalent to
a 0.50µV peak-to-peak error, in the frequency range 0.001 Hz to 1.0 Hz. In a circuit with a gain of 1000, this
produces a 0.50mV peak-to-peak output error. This number of 0.001 Hz might appear unreasonably low, but
when a data acquisition system is operating for 17 minutes, it has been on long enough to include this error. In
this same time, the LMV2011 will only have a 0.21mV output error. This is smaller by 2.4 x. Keep in mind that
this 1/f error gets even larger at lower frequencies. At the extreme, many people try to reduce this error by
integrating or taking several samples of the same signal. This is also doomed to failure because the 1/f nature of
this noise means that taking longer samples just moves the measurement into lower frequencies where the noise
level is even higher.
The LMV2011 eliminates this source of error. The noise level is constant with frequency so that reducing the
bandwidth reduces the errors caused by noise.
Another source of error that is rarely mentioned is the error voltage caused by the inadvertent thermocouples
created when the common "Kovar type" IC package lead materials are soldered to a copper printed circuit board.
These steel-based leadframe materials can produce over 35μV/°C when soldered onto a copper trace. This can
result in thermocouple noise that is equal to the LMV2011 noise when there is a temperature difference of only
0.0014°C between the lead and the board!
For this reason, the lead-frame of the LMV2011 is made of copper. This results in equal and opposite junctions
which cancel this effect. The extremely small size of the SOT-23 package results in the leads being very close
together. This further reduces the probability of temperature differences and hence decreases thermal noise.
OVERLOAD RECOVERY
The LMV2011 recovers from input overload much faster than most chopper-stabilized opamps. Recovery from
driving the amplifier to 2X the full scale output, only requires about 40ms. Many chopper-stabilized amplifiers will
take from 250ms to several seconds to recover from this same overload. This is because large capacitors are
used to store the unadjusted offset voltage.
Figure 30. Overload Recovery Test
The wide bandwidth of the LMV2011 enhances performance when it is used as an amplifier to drive loads that
inject transients back into the output. ADCs (Analog-to-Digital Converters) and multiplexers are examples of this
type of load. To simulate this type of load, a pulse generator producing a 1V peak square wave was connected
to the output through a 10pF capacitor (Figure 30). The typical time for the output to recover to 1% of the applied
pulse is 80ns. To recover to 0.1% requires 860ns. This rapid recovery is due to the wide bandwidth of the output
stage and large total GBW.
NO EXTERNAL CAPACITORS REQUIRED
The LMV2011 does not need external capacitors. This eliminates the problems caused by capacitor leakage and
dielectric absorption, which can cause delays of several seconds from turn-on until the amplifier's error has
settled.
10
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MORE BENEFITS
The LMV2011 offers the benefits mentioned above and more. It has a rail-to-rail output and consumes only
950µA of supply current while providing excellent DC and AC electrical performance. In DC performance, the
LMC2001 achieves 130dB of CMRR, 120dB of PSRR and 130dB of open loop gain. In AC performance, the
LMV2011 provides 3MHz of gain-bandwidth product and 4V/µs of slew rate.
HOW THE LMV2011 WORKS
The LMV2011 uses new, patented techniques to achieve the high DC accuracy traditionally associated with
chopper-stabilized amplifiers without the major drawbacks produced by chopping. The LMV2011 continuously
monitors the input offset and corrects this error. The conventional chopping process produces many mixing
products, both sums and differences, between the chopping frequency and the incoming signal frequency. This
mixing causes large amounts of distortion, particularly when the signal frequency approaches the chopping
frequency. Even without an incoming signal, the chopper harmonics mix with each other to produce even more
trash. If this sounds unlikely or difficult to understand, look at the plot (Figure 31), of the output of a typical
(MAX432) chopper-stabilized opamp. This is the output when there is no incoming signal, just the amplifier in a
gain of -10 with the input grounded. The chopper is operating at about 150Hz; the rest is mixing products. Add
an input signal and the noise gets much worse. Compare this plot with Figure 32 of the LMV2011. This data was
taken under the exact same conditions. The auto-zero action is visible at about 30kHz but note the absence of
mixing products at other frequencies. As a result, the LMV2011 has very low distortion of 0.02% and very low
mixing products.
Figure 31. The Output of a Chopper Stabilized Op Amp (MAX432)
10000
VOLTAGE NOISE (nV/ Hz)
VS = 5V
1000
100
10
0.1
1
10
100
1k
10k 100k
1M
FREQUENCY (Hz)
Figure 32. The Output of the LMV2011
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INPUT CURRENTS
The LMV2011's input currents are different than standard bipolar or CMOS input currents in that it appears as a
current flowing in one input and out the other. Under most operating conditions, these currents are in the
picoamp level and will have little or no effect in most circuits. These currents tend to increase slightly when the
common-mode voltage is near the minus supply (See the Typical Performance Characteristics). At high
temperatures such as 85°C, the input currents become larger, 0.5nA typical, and are both positive except when
the VCM is near V−. If operation is expected at low common-mode voltages and high temperature, do not add
resistance in series with the inputs to balance the impedances. Doing this can cause an increase in offset
voltage. A small resistance such as 1kΩ can provide some protection against very large transients or overloads,
and will not increase the offset significantly.
PRECISION STRAIN-GAUGE AMPLIFIER
This Strain-Gauge amplifier (Figure 32) provides high gain (1006 or ~60 dB) with very low offset and drift. Using
the resistors' tolerances as shown, the worst case CMRR will be greater than 108 dB. The CMRR is directly
related to the resistor mismatch. The rejection of common-mode error, at the output, is independent of the
differential gain, which is set by R3. The CMRR is further improved, if the resistor ratio matching is improved, by
specifying tighter-tolerance resistors, or by trimming.
Figure 33. Precision Strain Gauge Amplifier
Extending Supply Voltages and Output Swing by Using a Composite Amplifier Configuration:
In cases where substantially higher output swing is required with higher supply voltages, arrangements like the
ones shown in Figure 34 and Figure 35 could be used. These configurations utilize the excellent DC performance
of the LMV2011 while at the same time allow the superior voltage and frequency capabilities of the LM6171 to
set the dynamic performance of the overall amplifier. For example, it is possible to achieve ±12V output swing
with 300MHz of overall GBW (AV = 100) while keeping the worst case output shift due to VOS less than 4mV. The
LMV2011 output voltage is kept at about mid-point of its overall supply voltage, and its input common mode
voltage range allows the V- terminal to be grounded in one case (Figure 34, inverting operation) and tied to a
small non-critical negative bias in another (Figure 35, non-inverting operation). Higher closed-loop gains are also
possible with a corresponding reduction in realizable bandwidth. Table 1 shows some other closed loop gain
possibilities along with the measured performance in each case.
12
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Figure 34. Composite Amplifier Configuration
Table 1. Composite Amplifier Measured Performance
AV
R1 (Ω)
R2 (Ω)
C2 (pF)
BW (MHz)
SR (V/μs)
en p-p (mVPP)
50
200
10k
8
3.3
178
37
100
100
10k
10
2.5
174
70
100
1k
100k
0.67
3.1
170
70
500
200
100k
1.75
1.4
96
250
1000
100
100k
2.2
0.98
64
400
In terms of the measured output peak-to-peak noise, the following relationship holds between output noise
voltage, en p-p, for different closed-loop gain, AV, settings, where −3dB Bandwidth is BW:
(1)
Figure 35. Composite Amplifier Configuration
It should be kept in mind that in order to minimize the output noise voltage for a given closed-loop gain setting,
one could minimize the overall bandwidth. As can be seen from Equation 1 above, the output noise has a
square-root relationship to the Bandwidth.
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In the case of the inverting configuration, it is also possible to increase the input impedance of the overall
amplifier, by raising the value of R1, without having to increase the feed-back resistor, R2, to impractical values,
by utilizing a "Tee" network as feedback. See the LMC6442 data sheet (Application Notes section) for more
details on this.
Figure 36. AC Coupled ADC Driver
LMV2011 AS ADC INPUT AMPLIFIER
The LMV2011 is a great choice for an amplifier stage immediately before the input of an ADC (Analog-to-Digital
Converter), whether AC or DC coupled. See Figure 36 and Figure 37. This is because of the following important
characteristics:
A)
Very low offset voltage and offset voltage drift over time and temperature allow a high closed-loop gain
setting without introducing any short-term or long-term errors. For example, when set to a closed-loop gain
of 100 as the analog input amplifier for a 12-bit A/D converter, the overall conversion error over full
operation temperature and 30 years life of the part (operating at 50°C) would be less than 5 LSBs.
B)
Fast large-signal settling time to 0.01% of final value (1.4μs) allows 12 bit accuracy at 100KHZ or more
sampling rate.
C)
No flicker (1/f) noise means unsurpassed data accuracy over any measurement period of time, no matter
how long. Consider the following opamp performance, based on a typical low-noise, high-performance
commercially-available device, for comparison:
Opamp flatband noise = 8nV/√Hz
1/f corner frequency = 100Hz
AV = 2000
Measurement time = 100 sec
Bandwidth = 2Hz
This example will result in about 2.2 mVPP (1.9 LSB) of output noise contribution due to the opamp alone,
compared to about 594μVPP (less than 0.5 LSB) when that opamp is replaced with the LMV2011 which
has no 1/f contribution. If the measurement time is increased from 100 seconds to 1 hour, the
improvement realized by using the LMV2011 would be a factor of about 4.8 times (2.86mVPP compared to
596μV when LMV2011 is used) mainly because the LMV2011 accuracy is not compromised by increasing
the observation time.
D)
Copper leadframe construction minimizes any thermocouple effects which would degrade low level/high
gain data conversion application accuracy (see THE BENEFITS OF LMV2011 NO 1/f NOISE).
E)
Rail-to-Rail output swing maximizes the ADC dynamic range in 5-Volt single-supply converter applications.
Below are some typical block diagrams showing the LMV2011 used as an ADC amplifier (Figure 36 and
Figure 37).
14
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Figure 37. DC Coupled ADC Driver
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REVISION HISTORY
Changes from Revision B (March 2013) to Revision C
•
16
Page
Changed layout of National Data Sheet to TI format .......................................................................................................... 15
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PACKAGE OPTION ADDENDUM
www.ti.com
11-Apr-2013
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
(2)
MSL Peak Temp
Op Temp (°C)
Top-Side Markings
(3)
(4)
LMV2011MA
ACTIVE
SOIC
D
8
95
TBD
Call TI
Call TI
0 to 70
LMV20
11MA
LMV2011MA/NOPB
ACTIVE
SOIC
D
8
95
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
0 to 70
LMV20
11MA
LMV2011MAX
ACTIVE
SOIC
D
8
2500
TBD
Call TI
Call TI
0 to 70
LMV20
11MA
LMV2011MAX/NOPB
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
0 to 70
LMV20
11MA
LMV2011MF
ACTIVE
SOT-23
DBV
5
1000
TBD
Call TI
Call TI
0 to 70
A84A
LMV2011MF/NOPB
ACTIVE
SOT-23
DBV
5
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
0 to 70
A84A
LMV2011MFX
ACTIVE
SOT-23
DBV
5
3000
TBD
Call TI
Call TI
0 to 70
A84A
LMV2011MFX/NOPB
ACTIVE
SOT-23
DBV
5
3000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
0 to 70
A84A
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
11-Apr-2013
(4)
Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a
continuation of the previous line and the two combined represent the entire Top-Side Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
8-Apr-2013
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
LMV2011MAX
Package Package Pins
Type Drawing
SOIC
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
D
8
2500
330.0
12.4
6.5
5.4
2.0
8.0
12.0
Q1
LMV2011MAX/NOPB
SOIC
D
8
2500
330.0
12.4
6.5
5.4
2.0
8.0
12.0
Q1
LMV2011MF
SOT-23
DBV
5
1000
178.0
8.4
3.2
3.2
1.4
4.0
8.0
Q3
LMV2011MF/NOPB
SOT-23
DBV
5
1000
178.0
8.4
3.2
3.2
1.4
4.0
8.0
Q3
LMV2011MFX
SOT-23
DBV
5
3000
178.0
8.4
3.2
3.2
1.4
4.0
8.0
Q3
LMV2011MFX/NOPB
SOT-23
DBV
5
3000
178.0
8.4
3.2
3.2
1.4
4.0
8.0
Q3
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
8-Apr-2013
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
LMV2011MAX
SOIC
D
8
2500
367.0
367.0
35.0
LMV2011MAX/NOPB
SOIC
D
8
2500
367.0
367.0
35.0
LMV2011MF
SOT-23
DBV
5
1000
210.0
185.0
35.0
LMV2011MF/NOPB
SOT-23
DBV
5
1000
210.0
185.0
35.0
LMV2011MFX
SOT-23
DBV
5
3000
210.0
185.0
35.0
LMV2011MFX/NOPB
SOT-23
DBV
5
3000
210.0
185.0
35.0
Pack Materials-Page 2
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