LTC2053 Precision, Rail-to-Rail Input and Output, Zero-Drift Instrumentation Amplifier with Resistor-Programmable Gain U FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ DESCRIPTIO 116dB CMRR Independent of Gain Maximum Offset Voltage: 10µV Maximum Offset Voltage Drift: 50nV/°C Rail-to-Rail Input Rail-to-Rail Output 2-Resistor Programmable Gain Supply Operation: 2.7V to ±5.5V Typical Noise: 2.5µVP-P (0.01Hz to 10Hz) Typical Supply Current: 750µA Available in an MS8 and 3mm × 3mm × 0.8mm DFN Packages U APPLICATIO S ■ ■ ■ ■ ■ The LTC®2053 is a high precision instrumentation amplifier. The CMRR is typically 116dB with a single or dual 5V supply and is independent of gain. The input offset voltage is guaranteed below 10µV with a temperature drift of less than 50nV/°C. The LTC2053 is easy to use; the gain is adjustable with two external resistors, like a traditional op amp. The LTC2053 uses charge balanced sampled data techniques to convert a differential input voltage into a single ended signal that is in turn amplified by a zero-drift operational amplifier. The differential inputs operate from rail-to-rail and the single ended output swings from rail-to-rail. The LTC2053 can be used in single supply applications, as low as 2.7V. It can also be used with dual ±5.5V supplies. The LTC2053 is available in an MS8 surface mount package. For space limited applications, the LTC2053 is available in a 3mm × 3mm × 0.8mm dual fine pitch leadless package (DFN). Thermocouple Amplifiers Electronic Scales Medical Instrumentation Strain Gauge Amplifiers High Resolution Data Acquisition , LTC and LT are registered trademarks of Linear Technology Corporation. U TYPICAL APPLICATIO Typical Input Referred Offset vs Input Common Mode Voltage (VS = 3V) Differential Bridge Amplifier 15 3V VS = 3V VREF = 0V TA = 25°C R < 10k 8 2 – 7 LTC2053 3 OUT 6 + 5 R2 10k 1, 4 GAIN = 1+ R2 R1 0.1µF R1 10Ω INPUT OFFSET VOLTAGE (µV) 0.1µF 10 5 0 G = 1000 G = 100 –5 G = 10 –10 G=1 –15 2053 TA01 0 1.0 1.5 2.0 2.5 0.5 INPUT COMMON MODE VOLTAGE (V) 3.0 2053 G01 2053fa 1 LTC2053 W W U W ABSOLUTE AXI U RATI GS (Note 1) Total Supply Voltage (V + to V –) ............................... 11V Input Current ...................................................... ±10mA VIN+ – VREF ........................................................ 5.5V VIN– – VREF ........................................................ 5.5V Output Short Circuit Duration .......................... Indefinite Operating Temperature Range LTC2053C ............................................... 0°C to 70°C LTC2053I ............................................ – 40°C to 85°C LTC2053H ........................................ – 40°C to 125°C Storage Temperature Range MS8 Package ................................... – 65°C to 150°C DD Package ...................................... – 65°C to 125°C Lead Temperature (Soldering, 10 sec).................. 300°C U W U PACKAGE/ORDER I FOR ATIO ORDER PART NUMBER LTC2053CMS8 LTC2053IMS8 LTC2053HMS8 TOP VIEW EN –IN +IN V– 1 2 3 4 8 7 6 5 V+ OUT RG REF MS8 PART MARKING MS8 PACKAGE 8-LEAD PLASTIC MSOP LTVT LTJY LTAFB TJMAX = 150°C, θJA = 200°C/W ORDER PART NUMBER* TOP VIEW EN 1 8 V+ –IN 2 7 OUT +IN 3 6 RG V– 4 5 REF LTC2053CDD LTC2053IDD LTC2053HDD DD PART MARKING LAEQ DD PACKAGE 8-LEAD (3mm × 3mm) PLASTIC DFN TJMAX = 125°C, θJA = 160°C/W UNDERSIDE METAL INTERNALLY CONNECTED TO V– (PCB CONNECTION OPTIONAL) *The temperature grade (C, I, or H) of the LTC2053 in the DFN package is indicated on the shipping container. Consult LTC Marketing for parts specified with wider operating temperature ranges. ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. V + = 3V, V – = 0V, REF = 200mV. Output voltage swing is referenced to V –. All other specifications reference the OUT pin to the REF pin. PARAMETER CONDITIONS TYP MAX UNITS Gain Error AV = 1 ● 0.001 0.01 % Gain Nonlinearity AV = 1 ● 3 12 Input Offset Voltage (Note 2) VCM = 200mV –5 ±10 µV Average Input Offset Drift (Note 2) TA = – 40°C to 85°C TA = 85°C to 125°C ● ● –1 ±50 –2.5 nV/°C µV/°C VCM = 1.2V ● 4 10 Average Input Offset Current (Note 3) VCM = 1.2V ● 1 3 Input Noise Voltage DC to 10Hz Common Mode Rejection Ratio (Notes 4, 5) AV = 1, VCM = 0V to 3V, LTC2053C AV = 1, VCM = 0.1V to 2.9V, LTC2053I AV = 1, VCM = 0V to 3V, LTC2053I AV = 1, VCM = 0.1V to 2.9V, LTC2053H AV = 1, VCM = 0V to 3V, LTC2053H Average Input Bias Current (Note 3) MIN ● ● ● ● ● 105 105 95 100 90 ppm nA nA 2.5 µVP-P 113 113 113 dB dB dB dB dB 2053fa 2 LTC2053 ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. V + = 3V, V – = 0V, REF = 200mV. Output voltage swing is referenced to V –. All other specifications reference the OUT pin to the REF pin. PARAMETER CONDITIONS MIN TYP Power Supply Rejection Ratio (Note 6) VS = 2.7V to 6V ● 110 116 dB = 2k to V – ● ● 2.85 2.95 2.94 2.98 V V Output Voltage Swing High RL RL = 10k to V – Output Voltage Swing Low ● Supply Current VEN ≤ 0.5V, No Load Supply Current, Shutdown VEN ≥ 2.5V 0.75 ● EN Pin Input Low Voltage, VIL EN Pin Input High Voltage, VIH EN Pin Input Current MAX UNITS 20 mV 1 mA 10 µA 0.5 V 2.5 VEN = V– V – 0.5 µA –10 Internal Op Amp Gain Bandwidth 200 kHz Slew Rate 0.2 V/µs 3 kHz Internal Sampling Frequency The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. V+ = 5V, V– = 0V, REF = 200mV. Output voltage swing is referenced to V–. All other specifications reference the OUT pin to the REF pin. PARAMETER CONDITIONS Gain Error AV = 1 ● MIN Gain Nonlinearity AV = 1 ● Input Offset Voltage (Note 2) VCM = 200mV Average Input Offset Drift (Note 2) TA = – 40°C to 85°C TA = 85°C to 125°C Average Input Bias Current (Note 3) Average Input Offset Current (Note 3) Common Mode Rejection Ratio (Notes 4, 5) AV = 1, VCM = 0V to 5V, LTC2053C AV = 1, VCM = 0.1V to 4.9V, LTC2053I AV = 1, VCM = 0V to 5V, LTC2053I AV = 1, VCM = 0.1V to 4.9V, LTC2053H AV = 1, VCM = 0V to 5V, LTC2053H ● ● ● ● ● Power Supply Rejection Ratio (Note 6) VS = 2.7V to 6V ● Output Voltage Swing High RL = 2k to V – RL = 10k to V – ● ● TYP MAX UNITS 0.001 0.01 % 3 10 ppm –5 ±10 µV ● ● –1 ±50 –2.5 nV/°C µV/°C VCM = 1.2V ● 4 10 nA VCM = 1.2V ● 1 3 nA Output Voltage Swing Low 105 105 95 100 90 116 116 116 dB dB dB dB dB 110 116 dB 4.85 4.95 4.94 4.98 V V ● Supply Current VEN ≤ 0.5V, No Load Supply Current, Shutdown VEN ≥ 4.5V 0.85 ● EN Pin Input Low Voltage, VIL EN Pin Input High Voltage, VIH EN Pin Input Current 20 mV 1.1 mA 10 µA 0.5 V 4.5 VEN = V– V –1 –10 µA Internal Op Amp Gain Bandwidth 200 kHz Slew Rate 0.2 V/µs 3 kHz Internal Sampling Frequency 2053fa 3 LTC2053 ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. V + = 5V, V – = – 5V, REF = 0V. PARAMETER CONDITIONS Gain Error AV = 1 Gain Nonlinearity AV = 1 Input Offset Voltage (Note 2) VCM = 0V Average Input Offset Drift (Note 2) TA = – 40°C to 85°C TA = 85°C to 125°C TYP MAX ● 0.001 0.01 ● 3 10 10 ±20 µV ● ● –1 ±50 –2.5 nV/°C µV/°C VCM = 1V ● 4 10 nA Average Input Offset Current (Note 3) VCM = 1V ● 1 3 nA Common Mode Rejection Ratio (Notes 4, 5) AV = 1, VCM = – 5V to 5V, LTC2053C AV = 1, VCM = – 4.9V to 4.9V, LTC2053I AV = 1, VCM = – 5V to 5V, LTC2053I AV = 1, VCM = –4.9V to 4.9V, LTC2053H AV = 1, VCM = –5V to 5V, LTC2053H ● ● ● ● ● 105 105 95 100 90 118 118 118 dB dB dB dB dB Power Supply Rejection Ratio (Note 6) VS = 2.7V to 11V ● 110 116 dB Maximum Output Voltage Swing RL = 2k to GND, LTC2053C, LTC2053I RL = 10k to GND, LTC2053C, LTC2053I, LTC2053H RL = 2k to GND, LTC2053H ● ● ● ±4.5 ±4.6 ±4.4 ±4.8 ±4.9 ±4.8 V V V Supply Current VEN ≤ – 4.5V, No Load ● Supply Current, Shutdown VEN ≥ 4.5V Average Input Bias Current (Note 3) MIN 0.95 EN Pin Input Low Voltage, VIL EN Pin Input High Voltage, VIH EN Pin Input Current VEN % ppm 1.3 mA 20 µA – 4.5 V 4.5 = V– UNITS V –3 – 20 µA Internal Op Amp Gain Bandwidth 200 kHz Slew Rate 0.2 V/µs 3 kHz Internal Sampling Frequency Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: These parameters are guaranteed by design. Thermocouple effects preclude measurement of these voltage levels in high speed automatic test systems. VOS is measured to a limit determined by test equipment capability. Note 3: If the total source resistance is less than 10k, no DC errors result from the input bias currents or the mismatch of the input bias currents or the mismatch of the resistances connected to –IN and +IN. Note 4: The CMRR with a voltage gain, AV, larger than 10 is 120dB (typ). Note 5: At temperatures above 70°C, the common mode rejection ratio lowers when the common mode input voltage is within 100mV of the supply rails. Note 6: The power supply rejection ratio (PSRR) measurement accuracy depends on the proximity of the power supply bypass capacitor to the device under test. Because of this, the PSRR is 100% tested to relaxed limits at final test. However, their values are guaranteed by design to meet the data sheet limits. 2053fa 4 LTC2053 U W TYPICAL PERFOR A CE CHARACTERISTICS Input Offset Voltage vs Input Common Mode Voltage 15 5 0 G = 1000 G = 100 –5 G = 10 –10 G = 1000 5 0 G = 100 –5 G=1 –10 –15 0 1.0 1.5 2.0 2.5 0.5 INPUT COMMON MODE VOLTAGE (V) 3.0 0 2 3 4 1 INPUT COMMON MODE VOLTAGE (V) Input Offset Voltage vs Input Common Mode Voltage 5 0 TA = 85°C TA = 25°C –10 TA = 70°C TA = –55°C –15 –20 0 1.0 1.5 2.0 2.5 0.5 INPUT COMMON MODE VOLTAGE (V) TA = 85°C 5 TA = 70°C 0 –5 TA = 25°C –10 –15 –20 3.0 –20 –40 –60 TA = 125°C 0 1.0 1.5 2.0 2.5 0.5 INPUT COMMON MODE VOLTAGE (V) 3.0 2053 G07 TA = 25°C 5 TA = 85°C 0 TA = 70°C –5 –10 –20 0 2 3 4 1 INPUT COMMON MODE VOLTAGE (V) 5 TA = –55°C –5 –1 1 3 –3 INPUT COMMON MODE VOLTAGE (V) Input Offset Voltage vs Input Common Mode Voltage 100 20 0 TA = 85°C TA = 25°C –20 –40 –60 5 2053 G06 H-GRADE PARTS VS = 5V VREF = 0V G = 10 40 5 10 2053 G05 INPUT OFFSET VOLTAGE (µV) INPUT OFFSET VOLTAGE (µV) TA = 25°C TA = 85°C –1 1 3 –3 INPUT COMMON MODE VOLTAGE (V) –15 TA = –55°C 60 20 –5 VS = ±5V 15 VREF = 0V G = 10 Input Offset Voltage vs Input Common Mode Voltage H-GRADE PARTS VS = 3V VREF = 0V G = 10 0 –10 20 10 Input Offset Voltage vs Input Common Mode Voltage 40 G=100 –5 Input Offset Voltage vs Input Common Mode Voltage VS = 5V 15 VREF = 0V G = 10 2053 G04 60 G=1 0 2053 G03 20 INPUT OFFSET VOLTAGE (µV) INPUT OFFSET VOLTAGE (µV) 20 10 G=1000 5 Input Offset Voltage vs Input Common Mode Voltage VS = 3V 15 VREF = 0V G = 10 G=10 2053 G02 2053 G01 –5 10 –20 5 INPUT OFFSET VOLTAGE (µV) –15 VS = ±5V 15 VREF = 0V TA = 25°C –15 G = 10 G=1 INPUT OFFSET VOLTAGE (µV) 10 20 VS = 5V VREF = 0V 10 TA = 25°C INPUT OFFSET VOLTAGE (µV) VS = 3V VREF = 0V TA = 25°C INPUT OFFSET VOLTAGE (µV) INPUT OFFSET VOLTAGE (µV) 15 Input Offset Voltage vs Input Common Mode Voltage Input Offset Voltage vs Input Common Mode Voltage TA = 125°C H-GRADE PARTS 80 VS = ±5V 60 VREF = 0V G = 10 40 20 TA = 85°C 0 TA = 25°C –20 –40 –60 TA = 125°C –80 –100 0 2 3 4 1 INPUT COMMON MODE VOLTAGE (V) 5 2053 G08 –5 –1 1 3 –3 INPUT COMMON MODE VOLTAGE (V) 5 2053 G09 2053fa 5 LTC2053 U W TYPICAL PERFOR A CE CHARACTERISTICS Error Due to Input RS vs Input Common Mode (CIN < 100pF) RS = 5k RS = 0k 0 RS = 10k –20 SMALL CIN –40 –60 RS = 15k RS + RS = 20k – RS = 15k RS = 10k 0 RS = 5k –10 –20 –30 1.0 1.5 2.0 2.5 0.5 INPUT COMMON MODE VOLTAGE (V) 3.0 ADDITIONAL OFFSET ERROR (µV) 30 20 2 3 4 1 INPUT COMMON MODE VOLTAGE (V) 40 R+ = 0k, R– = 15k R+ = 0k, R– = 10k R+ = 0k, R– = 5k 10 0 R+ = 5k, R– = 0k + – + R = 10k, R = 0k –10 –20 R –30 SMALL CIN –40 + – R– –50 0 R+ =15k, R– = 0k 2.5 1.0 1.5 2.0 0.5 INPUT COMMON MODE VOLTAGE (V) VS = 5V 30 VREF = 0V CIN < 100pF 20 G = 10 TA = 25°C RIN+ = 0k, RIN– = 15k RIN+ =10k, RIN– = 0k –10 RIN+ =15k, RIN– = 0k –20 –30 ADDITIONAL OFFSET ERROR (µV) ADDITIONAL OFFSET ERROR (µV) RS = 10k RS + – RS –40 0 VS = ±5V 30 VREF = 0V CIN < 100pF 20 G = 10 TA = 25°C 10 3.0 2053 G16 R+ = 0k, R– = 15k 0 –10 R+ =15k, R– = 0k –20 R+ =20k, R– = 0k –30 –5 5 –1 1 3 –3 INPUT COMMON MODE VOLTAGE (V) 2053 G15 80 RS = 10k RS = 5k RS = 1k 10 RS = 500Ω –10 –30 –50 0 5 Error Due to Input RS vs Input Common Mode (CIN > 1µF) –70 1.0 1.5 2.0 2.5 0.5 INPUT COMMON MODE VOLTAGE (V) R+ = 0k, R– = 20k 2053 G14 VS = 5V VREF = 0V 50 R+ = R– = RS CIN > 1µF 30 G = 10 TA = 25°C 5 –40 2 3 4 1 INPUT COMMON MODE VOLTAGE (V) 70 RS = 15k –1 1 3 –3 INPUT COMMON MODE VOLTAGE (V) 2053 G12 Error Due to Input RS vs Input Common Mode (CIN > 1µF) –10 –30 –5 RIN+ =20k, RIN– = 0k 0 3.0 RS = 5k BIG CIN –15 40 0 –40 40 –20 –10 Error Due to Input RS Mismatch vs Input Common Mode (CIN < 100pF) RIN+ = 0k, RIN– = 10k 10 Error Due to Input RS vs Input Common Mode (CIN > 1µF) 0 RS = 15k RS = 10k –5 5 RIN+ = 0k, RIN– = 20k 2053 G13 VS = 3V = 0V 30 VREF R+ = R– = RS C > 1µF 20 IN G = 10 T = 25°C 10 A 0 Error Due to Input RS Mismatch vs Input Common Mode (CIN < 100pF) ADDITIONAL OFFSET ERROR (µV) VS = 3V VREF = 0V CIN < 100pF G = 10 TA = 25°C 5 2053 G11 Error Due to Input RS Mismatch vs Input Common Mode (CIN < 100pF) 40 10 RS = 20k –25 0 2053 G10 50 15 –20 RS 0 10 VS = ±5V VREF = 0V R+ = R– = RS CIN < 100pF G = 10 TA = 25°C 20 ADDITIONAL OFFSET ERROR (µV) 20 20 25 RS = 20k ADDITIONAL OFFSET ERROR (µV) 40 VS = 5V VREF = 0V R+ = R– = RS CIN < 100pF G = 10 TA = 25°C ADDITIONAL OFFSET ERROR (µV) 30 VS = 3V VREF = 0V R+ = R– = RS CIN < 100pF G = 10 TA = 25°C ADDITIONAL OFFSET ERROR (µV) ADDITIONAL OFFSET ERROR (µV) 60 Error Due to Input RS vs Input Common Mode (CIN < 100pF) Error Due to Input RS vs Input Common Mode (CIN < 100pF) 2 3 4 1 INPUT COMMON MODE VOLTAGE (V) 5 2053 G17 VS = ±5V = 0V 60 VREF R+ = R– = RS 40 CIN > 1µF G = 10 20 TA = 25°C RS = 10k RS = 5k RS = 1k 0 RS = 500Ω –20 –40 –60 –80 –5 –1 1 3 –3 INPUT COMMON MODE VOLTAGE (V) 5 2053 G18 2053fa 6 LTC2053 U W TYPICAL PERFOR A CE CHARACTERISTICS Error Due to Input RS Mismatch vs Input Commom Mode (CIN >1µF) 200 R+ = 0k, R– = 1k 100 R+ = 0k, R– = 500Ω R+ = 0k, R– = 100Ω 50 0 R+ = 100Ω, R– = 0k R+ = 500Ω, R– = 0k R+ –100 R+ =1k, R– = 0k – –150 100 R+ = 0k, R– = 1k R+ = 0k, R– = 500Ω R+ = 0k, R– = 100Ω 50 0 R+ = 100Ω, R– = 0k 50 R+ = 500Ω, R– = 0k R+ =1k, R– = 0k –150 R– 1.0 1.5 2.0 2.5 0.5 INPUT COMMON MODE VOLTAGE (V) 0 3.0 2 3 4 1 INPUT COMMON MODE VOLTAGE (V) Offset Voltage vs Temperature R+ = 0k, R– = 500Ω 50 R+ = 0k, R– = 100Ω 0 R+ = 100Ω, R– = 0k –50 R+ = 500Ω, R– = 0k –150 5 R+ =1k, R– = 0k –5 –1 1 3 –3 INPUT COMMON MODE VOLTAGE (V) 30 60 VOS vs REF (Pin 5) 60 VIN+ = VIN– = REF G = 10 TA = 25°C 20 5 2053 G21 VOS vs REF (Pin 5) 80 VIN+ = VIN– = REF G = 10 TA = 25°C 40 40 VS = 5V VS = ±5V 20 10 0 VS = 3V –20 VOS (µV) 20 VOS (µV) INPUT OFFSET VOLTAGE (µV) R+ = 0k, R– = 1k 2053 G20 2053 G19 0 VS = 5V VS = 3V –10 0 VS = 10V –20 –40 –40 –20 –60 –80 –50 –25 0 25 50 75 100 –30 125 –60 0 1 TEMPERATURE (°C) 2 VREF (V) 3 2053 G22 4 2 0 –2 –4 VS = ±2.5V 8 VREF = 0V G = 10 6 RL = 10k 4 TA = 25°C –2 –8 2053 G25 –10 –2.4 8 9 VS = 3V, 5V, ±5V VIN = 1VP-P R+ = R– = 1k R+ = R– = 10k 100 R+ = 10k, R– = 0k 90 –4 –8 1.6 7 6 110 0 –6 1.1 5 4 VREF (V) 120 2 –6 –10 –2.4 –1.9 –1.4 –0.9 –0.4 0.1 0.6 OUTPUT VOLTAGE (V) 130 CMRR (db) 6 3 2 CMRR vs Frequency Gain Nonlinearity, G = 10 VS = ±2.5V VREF = 0V G=1 RL = 10k TA = 25°C 1 2053 G24 10 NONLINEARITY (ppm) 8 0 4 2053 G23 Gain Nonlinearity, G = 1 10 NONLINEARITY (ppm) VS = ±5V VREF = 0V 100 TA = 25°C –100 –200 –200 0 150 –100 + BIG CIN 150 VS = 5V VREF = 0V TA = 25°C ADDITIONAL OFFSET ERROR (µV) VS = 3V 150 VREF = 0V TA = 25°C ADDITIONAL OFFSET ERROR (µV) ADDITIONAL OFFSET ERROR (µV) 200 –50 Error Due to Input RS Mismatch vs Input Commom Mode (CIN >1µF) Error Due to Input RS Mismatch vs Input Commom Mode (CIN >1µF) R+ + 80 – R– –1.4 –0.4 0.6 1.6 OUTPUT VOLTAGE (V) 2.6 2053 G26 70 1 R+ = 0k, R– = 10k 10 100 FREQUENCY (Hz) 1000 2053 G27 2053fa 7 LTC2053 U W TYPICAL PERFOR A CE CHARACTERISTICS Input Voltage Noise Density vs Frequency 3 250 VS = ±5V 200 VS = 5V 150 VS = 3V 100 50 0 2 1 0 –1 –2 –3 1 10 100 1000 FREQUENCY (Hz) 3 VS = 3V TA = 25°C INPUT REFFERED NOISE VOLTAGE (µV) G = 10 TA = 25°C INPUT REFFERED NOISE VOLTAGE (µV) INPUT REFERRED NOISE DENSITY (nV/√Hz) 300 Input Referred Noise in 10Hz Bandwidth Input Referred Noise in 10Hz Bandwidth 10000 2 0 4 6 TIME (s) 8 Output Voltage Swing vs Output Current 5 VS = 5V, SOURCING 3.5 VS = 3V, SOURCING 2.5 2.0 1.5 VS = 3V, SINKING 1.0 VS = 5V, SINKING 0.5 0 0.01 TA = 125°C 1 0 –1 –2 0.65 1 0.1 OUTPUT CURRENT (mA) 0.60 2.5 10 0.1 2053 G34 4.5 6.5 8.5 SUPPLY VOLTAGE (V) 2053 G33 3.40 VS = 5V dVOUT = 1V 0.1% ACCURACY TA = 25°C 25 3.35 20 15 10 0 10.5 Internal Clock Frequency vs Supply Voltage 3.30 TA = 125°C 3.25 TA = 85°C 3.20 3.15 5 1 TA = –55°C SINKING CLOCK FREQUENCY (kHz) 2 0.01 0.001 SETTLING ACCURACY (%) TA = 0°C 0.75 –3 30 3 TA = 85°C 0.80 0.70 35 4 0 0.0001 0.85 2053 G32 VS = 5V dVOUT = 1V G < 100 TA = 25°C 10 8 0.95 Settling Time vs Gain 5 6 TIME (s) 0.90 –5 0.01 10 SETTLING TIME (ms) SETTLING TIME (ms) 6 4 Supply Current vs Supply Voltage 2 Low Gain Settling Time vs Settling Accuracy 7 2 3 2053 G31 8 0 SOURCING –4 1 0.1 OUTPUT CURRENT (mA) –2 1.00 VS = ±5V TA = 25°C 4 4.0 3.0 –1 2053 G30 SUPPLY CURRENT TA = 25°C 0 Output Voltage Swing vs Output Current OUTPUT VOLTAGE SWING (V) OUTPUT VOLTAGE SWING (V) 4.5 1 2053 G29 2053 G27 5.0 2 –3 10 VS = 5V TA = 25°C TA = 25°C 1 10 100 GAIN (V/V) 1000 10000 2053 G35 3.10 2.5 4.5 TA = –55°C 6.5 8.5 SUPPLY VOLTAGE (V) 10.5 2053 G36 2053fa 8 LTC2053 U U U PI FU CTIO S EN (Pin 1): Active Low Enable Pin. +IN (Pin 3): Noninverting Input. RG (Pin 6): Inverting Input of Internal Op Amp. With a resistor, R2, connected between the OUT pin and the RG pin and a resistor, R1, between the RG pin and the REF pin, the DC gain is given by 1 + R2 / R1. V – (Pin 4): Negative Supply. OUT (Pin 7): Amplifier Output. –IN (Pin 2): Inverting Input. REF (Pin 5): Voltage Reference (VREF) for Amplifier Output. VOUT = GAIN (V+IN – V–IN) + VREF V + (Pin 8): Positive Supply. W BLOCK DIAGRA 8 V+ ZERO-DRIFT OP AMP +IN + 3 –IN OUT CH CS 7 – 2 REF 5 V– RG 6 4 EN 1 2053 BD U W U U APPLICATIO S I FOR ATIO Theory of Operation The LTC2053 uses an internal capacitor (CS) to sample a differential input signal riding on a DC common mode voltage (see Block Diagram). This capacitor’s charge is transferred to a second internal hold capacitor (CH) translating the common mode of the input differential signal to that of the REF pin. The resulting signal is amplified by a zero-drift op amp in the noninverting configuration. The RG pin is the negative input of this op amp and allows external programmability of the DC gain. Simple filtering can be realized by using an external capacitor across the feedback resistor. Input Voltage Range The input common mode voltage range of the LTC2053 is rail-to-rail. However, the following equation limits the size of the differential input voltage: Where V+IN and V–IN are the voltages of the +IN and –IN pins respectively, VREF is the voltage at the REF pin and V+ is the positive supply voltage. For example, with a 3V single supply and a 0V to 100mV differential input voltage, VREF must be between 0V and 1.6V. ±5 Volt Operation When using the LTC2053 with supplies over 5.5V, care must be taken to limit the maximum difference between any of the input pins (+IN or –IN) and the REF pin to 5.5V; if not, the device will be damaged. For example, if rail-torail input operation is desired when the supplies are at ±5V, the REF pin should be 0V, ±0.5V. As a second example, if V + is 10V and V – and REF are at 0V, the inputs should not exceed 5.5V. V – ≤ (V+IN – V–IN) + VREF ≤ V + – 1.3 2053fa 9 LTC2053 U U W U APPLICATIO S I FOR ATIO Settling Time The sampling rate is 3kHz and the input sampling period during which CS is charged to the input differential voltage VIN is approximately 150µs. First assume that on each input sampling period, CS is charged fully to VIN. Since CS = CH (= 1000pF), a change in the input will settle to N bits of accuracy at the op amp noninverting input after N clock cycles or 333µs(N). The settling time at the OUT pin is also affected by the settling of the internal op amp. Since the gain bandwidth of the internal op amp is typically 200kHz, the settling time is dominated by the switched capacitor front end for gains below 100 (see Typical Performance Characteristics). Input Current Whenever the differential input VIN changes, CH must be charged up to the new input voltage via CS. This results in an input charging current during each input sampling period. Eventually, CH and CS will reach VIN and, ideally, the input current would go to zero for DC inputs. In reality, there are additional parasitic capacitors which disturb the charge on CS every cycle even if VIN is a DC voltage. For example, the parasitic bottom plate capacitor on CS must be charged from the voltage on the REF pin to the voltage on the –IN pin every cycle. The resulting input charging current decays exponentially during each input sampling period with a time constant equal to RSCS. If the voltage disturbance due to these currents settles before the end of the sampling period, there will be no errors due to source resistance or the source resistance mismatch between –IN and +IN. With RS less than 10k, no DC errors occur due to this input current. In the Typical Performance Characteristics section of this data sheet, there are curves showing the additional error from non-zero source resistance in the inputs. If there are no large capacitors across the inputs, the amplifier is less sensitive to source resistance and source resistance mismatch. When large capacitors are placed across the inputs, the input charging currents described above result in larger DC errors, especially with source resistor mismatches. Power Supply Bypassing The LTC2053 uses a sampled data technique and therefore contains some clocked digital circuitry. It is therefore sensistive to supply bypassing. For single or dual supply operation, a 0.1µF ceramic capacitor must be connected between Pin 8 (V +) and Pin 4 (V –) with leads as short as possible. SINGLE SUPPLY, UNITY GAIN DUAL SUPPLY 5V 5V 8 V+IN 3 + VD V–IN – 8 + V+IN 7 2 6 – 5 VOUT 3 + VD V–IN – + 7 2 – 5 4 4 6 R2 VOUT R1 –5V VREF 0V < V+IN < 5V 0V < V–IN < 5V 0V < VD < 3.7V VOUT = VD –5V < V–IN < 5V AND V–IN – VREF < 5.5V –5V < V+IN < 5V AND V+IN – VREF < 5.5V –5V < VD + VREF < 3.7V ( VOUT = 1 + R2 R1 ) VD + VREF 2053 F01 Figure 1 2053fa 10 LTC2053 U PACKAGE DESCRIPTIO MS8 Package 8-Lead Plastic MSOP (Reference LTC DWG # 05-08-1660) DETAIL “A” 0.254 (.010) 0° – 6° TYP GAUGE PLANE 0.53 ± 0.152 (.021 ± .006) DETAIL “A” 1.10 (.043) MAX 0.18 (.007) SEATING PLANE 0.22 – 0.38 (.009 – .015) TYP 3.00 ± 0.102 (.118 ± .004) (NOTE 3) 0.86 (.034) REF 8 NOTE: 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX 0.889 ± 0.127 (.035 ± .005) 3.00 ± 0.102 (.118 ± .004) 5.23 (NOTE 4) (.206) MIN 4.90 ± 0.152 0.127 ± 0.076 (.193 ± .006) (.005 ± .003) 0.65 (.0256) BSC 0.52 (.0205) REF 7 6 5 1 2 3 4 3.20 – 3.45 (.126 – .136) 0.42 ± 0.038 (.0165 ± .0015) TYP 0.65 (.0256) BSC RECOMMENDED SOLDER PAD LAYOUT MSOP (MS8) 0603 DD Package 8-Lead Plastic DFN (3mm × 3mm) (Reference LTC DWG # 05-08-1698) R = 0.115 TYP 5 0.38 ± 0.10 8 0.675 ±0.05 3.00 ±0.10 (4 SIDES) 1.65 ± 0.10 (2 SIDES) 3.5 ±0.05 1.65 ±0.05 2.15 ±0.05 (2 SIDES) PIN 1 TOP MARK 0.200 REF PACKAGE OUTLINE 0.75 ±0.05 0.00 – 0.05 4 0.28 ± 0.05 1 0.50 BSC 0.28 ± 0.05 0.50 BSC 2.38 ±0.05 (2 SIDES) 2.38 ±0.10 (2 SIDES) BOTTOM VIEW—EXPOSED PAD NOTE: 1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-1) 2. ALL DIMENSIONS ARE IN MILLIMETERS 3. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 4. EXPOSED PAD SHALL BE SOLDER PLATED RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS (DD8) DFN 0203 2053fa Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 11 LTC2053 U TYPICAL APPLICATIO S Precision ÷2 (Low Noise 2.5V Reference) Precision Current Source – 8 1 LT1027 4 –5 2 1µF 8 LTC2053 RG REF 6 0.1µF 3 + 5 EN 4 1 VOUT i 5V 0.1µF 7 R Precision Inversion (General Purpose) 8V 5V 2 Precision Doubler (General Purpose) 3 2 – 1 7 4 5 6 3 VIN 2.5V (110nV/√Hz) + 3 8 7 LTC2053 2 – 4 5 1 + VOUT 0.1µF 8 7 LTC2053 6 2 VIN – 4 1 1k V i = —C , i ≤ 5mA R 10k 8 LTC2053 2.7k LOAD + 5V 0.1µF 5 VOUT 6 VOUT = 2VIN 0.1µF 0.1µF 0.1µF 0.1µF VOUT = –VIN 2053 TA05 0 < VOUT < (5V – VC) VC 2053 TA06 –5V 2053 TA07 –5V 0.1µF 2053 TA08 Differential Thermocouple Amplifier 5V 10M 0°C → 500°C TYPE K THERMOCOUPLE (40.6µV/°C) YELLOW + ORANGE – 10M 1M 1M 10k 8 3 + LTC2053 – RG 10k 2 1 0.001µF 0.001µF Linearized Platinum RTD Amplifier 0.1µF REF 5 EN 7 10mV/°C 6 249k 1% 4 0.1µF 100Ω 5V 0.1µF 2 – 1.21k + 1 4 5 6 5V – 3 + SCALE FACTOR TRIM 1 2 10k i ≈ 1mA 2053 TA03 5V – 0.1µF + 1 4 5 10mV/°C 0°C – 400°C (±0.1°C) 49.9Ω 7 6 LT1634-1.25 249k 8 LTC2053 PT100* 3-WIRE RTD 6 LTC2050 LT1025 3 VO R– 4 5 200k 16.9k 3 1k 1% 5V 4 0.1µF 2.7k 2 0.1µF 2 7 LTC2053 3 THERMAL COUPLING *CONFORMING TO IEC751 OR DIN43760 RT = RO (1 + 3.908 • 10–3T – 5.775 • 10–7T2), RO = 100Ω (e.g. 100Ω AT 0°C, 175.9Ω AT 200°C, 247.1Ω AT 400°C) 8 5V 1M 0.1µF 16.2k LINEARITY 10k ILOAD 0.0015Ω VREG CW 39.2k High Side Power Supply Current Sense 11k 100Ω ZERO 0.1µF CW 0.1µF GAIN CW LOAD 953Ω 24.9k 5k 2 8 – 2053 TA09 LTC2053 3 7 6 10k + 5 OUT 100mV/A OF LOAD CURRENT 0.1µF 1,4 150Ω 2053 TA04 RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LT1167 Single Resistor Gain Programmable, Precision Instrumentation Amplifier Single Gain Set Resistor: G = 1 to 10,000, Low Noise: 7.5nV√Hz LTC2050 Zero-Drift Operation Amplifier SOT-23 Package LTC2051 Dual Zero-Drift Operational Amplifier MS8 Package LTC6800 Single Supply, Zero Drift, Rail-to-Rail Input and Output Instrumentation Amplifier MS8 Package, 100µV Max VOS, 250nV/°C Max Drift 2053fa 12 Linear Technology Corporation LT/TP 0903 1K • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com LINEAR TECHNOLOGY CORPORATION 2001