Revised May 2005 MM74HCT245 Octal 3-STATE Transceiver General Description Features The MM74HCT245 3-STATE bi-directional buffer utilizes advanced silicon-gate CMOS technology and is intended for two-way asynchronous communication between data buses. It has high drive current outputs which enable high speed operation even when driving large bus capacitances. This circuit possesses the low power consumption of CMOS circuitry, yet has speeds comparable to low power Schottky TTL circuits. ■ TTL input compatible ■ 3-STATE outputs for connection to system busses ■ High output drive current: 6 mA (min) ■ High speed: 16 ns typical propagation delay ■ Low power: 80 PA (74HCT Series) This device is TTL input compatible and can drive up to 15 LS-TTL loads, and all inputs are protected from damage due to static discharge by diodes to VCC and ground. The MM74HCT245 has one active low enable input (G), and a direction control (DIR). When the DIR input is HIGH, data flows from the A inputs to the B outputs. When DIR is LOW, data flows from B to A. MM74HCT devices are intended to interface between TTL and NMOS components and standard CMOS devices. These parts are also plug-in replacements for LS-TTL devices and can be used to reduce power consumption in existing designs. Ordering Code: Order Number Package Number MM74HCT245WM M20B MM74HCT245SJ MM74HCT245MTC MM74HCT245N M20D MTC20 N20A Package Description 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram Truth Table Pin Assignments for DIP, SOIC, SOP and TSSOP Control Operation Inputs G DIR 245 L L B data to A bus L H A data to B bus H X isolation H HIGH Level L LOW Level X Irrelevant Top View © 2005 Fairchild Semiconductor Corporation DS005366 www.fairchildsemi.com MM74HCT245 Octal 3-STATE Transceiver February 1984 MM74HCT245 Logic Diagram www.fairchildsemi.com 2 Recommended Operating Conditions 0.5 to 7.0V 1.5 to VCC 1.5V 0.5 to VCC 0.5V r20 mA r35 mA r70 mA 65qC to 150qC Supply Voltage (VCC ) DC Input Voltage (VIN) DC Output Voltage (VOUT) Clamp Diode Current (IIK, IOK) DC Output Current, DC VCC or GND Current, per pin (ICC) Storage Temperature Range (TSTG) Supply Voltage (VCC) 600 mW S.O. Package only 500 mW Max Units 4.5 5.5 V 0 VCC V 40 85 qC 500 ns DC Input or Output Voltage (VIN, VOUT) Operating Temperature Range (TA) Input Rise or Fall Times (tr, tf) Power Dissipation (PD) (Note 3) Min Note 1: Absolute Maximum Ratings are those values beyond which damage to the device may occur. Note 2: Unless otherwise specified all voltages are referenced to ground. Note 3: Power Dissipation temperature derating — plastic “N” package: 12 mW/qC from 65qC to 85qC. Lead Temperature (TL) 260qC (Soldering 10 seconds) DC Electrical Characteristics (VCC 5V r 10%, unless otherwise specified.) Symbol VIH Parameter TA Conditions 25qC Typ Minimum HIGH Level TA 40 to 85qC TA 55 to 125qC Guaranteed Limits Units 2.0 2.0 2.0 V 0.8 0.8 0.8 V Input Voltage VIL Maximum LOW Level Input Voltage VOH Minimum HIGH Level VIN Output Voltage |IOUT | VIH or VIL 20 PA VCC VCC 0.1 VCC 0.1 VCC 0.1 V |IOUT | 6.0 mA, VCC 4.5V 4.2 3.98 3.84 3.7 V 7.2 mA, VCC 5.5V 5.2 4.98 4.84 4.7 V |IOUT | VOL Maximum LOW Level VIN VIH or VIL Voltage |IOUT | 20 PA 0 0.1 0.1 0.1 V |IOUT | 6.0 mA, VCC 4.5V 0.2 0.26 0.33 0.4 V 7.2 mA, VCC 5.5V 0.2 0.26 0.33 0.4 V r0.1 r1.0 r1.0 PA r0.5 r5.0 r10 PA 8 80 160 PA 1.0 1.3 1.5 mA |IOUT | IIN IOZ Maximum Input VIN VCC or GND, Current VIH or VIL, Pin 1 or 19 Maximum 3-STATE VOUT Output Leakage G VCC or GND VIH Current ICC Maximum Quiescent VIN Supply Current IOUT VIN VCC or GND 0 PA 2.4V or 0.5V (Note 4) 0.6 Note 4: Measured per input. All other inputs at VCC or ground. 3 www.fairchildsemi.com MM74HCT245 Absolute Maximum Ratings(Note 1) (Note 2) MM74HCT245 AC Electrical Characteristics VCC 5.0V, tr tf Symbol tPHL, tPLH 25qC (unless otherwise specified) 6 ns, TA Parameter Conditions Maximum Output Typ Guaranteed Limit Units CL 45 pF 16 20 ns Maximum Output CL 45 pF 29 40 ns Enable Time RL 1 k: Maximum Output CL 5 pF 20 25 ns Disable Time RL 1 k: Propagation Delay tPZL, tPZH tPLZ, tPHZ AC Electrical Characteristics VCC 5.0V r 10%, tr Symbol tf 6 ns (unless otherwise specified) Parameter TA Conditions 25qC Typ tPHL, tPLH tPZL tPZH tPHZ, tPLZ tTHL, tTLH TA 40 to 85qC TA 55 to 125qC Units Guaranteed Limits Maximum Output CL 50 pF 17 23 29 34 ns Propagation Delay CL 150 pF 24 30 38 45 ns Maximum Output RL 1 k: 31 42 53 63 ns Enable Time CL 50 pF Maximum Output RL 1 k: 23 33 41 49 ns Enable Time CL 50 pF Maximum Output RL 1 k: 21 30 38 45 ns Disable Time CL 50 pF Maximum Output CL 50 pF 8 12 15 18 ns 10 15 15 15 pF 20 25 25 25 pF Rise and Fall Time CIN Maximum Input Capacitance COUT Maximum Output/Input Capacitance CPD Power Dissipation G VCC (Note 5) Capacitance G GND Note 5: CPD determines the no load power consumption, PD IS CPD V CC f ICC. www.fairchildsemi.com 7 pF 100 pF CPD VCC2 f I CCVCC, and the no load dynamic current consumption, 4 MM74HCT245 Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide Package Number M20B 5 www.fairchildsemi.com MM74HCT245 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M20D www.fairchildsemi.com 6 MM74HCT245 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC20 7 www.fairchildsemi.com MM74HCT245 Octal 3-STATE Transceiver Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Package Number N20A Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. 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