DTP4N60/DTP4N60F/DTU4N60/DTL4N60 www.din-tek.jp Power MOSFET FEATURES PRODUCT SUMMARY • • • • • • • 600 VDS (V) RDS(on) () VGS = 10 V 2.2 Qg (Max.) (nC) 39 Qgs (nC) 10 Qgd (nC) 19 Configuration TO-220AB Single Ultra Low Gate Charge Reduced Gate Drive Requirement Enhanced 30 V, VGS Rating Reduced Ciss, Coss, Crss Extremely High Frequency Operation Repetitive Avalanche Rated Compliant to RoHS Directive 2002/95/EC Available RoHS* COMPLIANT TO-251 TO-220 FULLPAK TO-252 D G G D S G G D S D S S Top View Top View N-Channel MOSFET G D S Top View Top View DTP4N60DTP4N60FDTU4N60DTL4N60 ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted) PARAMETER SYMBOL LIMIT Drain-Source Voltage VDS Gate-Source Voltage VGS 600 ± 30 4 2.9 25 1.0 530 6.2 13 125 3.0 - 55 to + 150 300d 10 1.1 Continuous Drain Current VGS at 10 V TC = 25 °C TC = 100 °C Currenta Pulsed Drain Linear Derating Factor Single Pulse Avalanche Energyb Repetitive Avalanche Currenta Repetitive Avalanche Energya Maximum Power Dissipation Peak Diode Recovery dV/dtc Operating Junction and Storage Temperature Range Soldering Recommendations (Peak Temperature) Mounting Torque ID IDM TC = 25 °C for 10 s 6-32 or M3 screw EAS IAR EAR PD dV/dt TJ, Tstg UNIT V A W/°C mJ A mJ W V/ns °C lbf · in N·m Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. VDD = 50 V, starting TJ = 25 °C, L = 25 mH, Rg = 25 , IAS = 6.2 A (see fig. 12). c. ISD 6.2 A, dI/dt 80 A/μs, VDD VDS, TJ 150 °C. d. 1.6 mm from case. * Pb containing terminations are not RoHS compliant, exemptions may apply 1 DTP4N60/DTP4N60F/DTU4N60/DTL4N60 www.din-tek.jp THERMAL RESISTANCE RATINGS SYMBOL TYP. MAX. Maximum Junction-to-Ambient PARAMETER RthJA - 62 Case-to-Sink, Flat, Greased Surface RthCS 0.50 - Maximum Junction-to-Case (Drain) RthJC - 1.0 UNIT °C/W SPECIFICATIONS (TJ = 25 °C, unless otherwise noted) PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. VDS VGS = 0 V, ID = 250 μA 600 - - V VDS/TJ Reference to 25 °C, ID = 1 mA - 0.70 - V/°C VGS(th) VDS = VGS, ID = 250 μA 2.0 - 4.0 V Gate-Source Leakage IGSS VGS = 20 - - ± 100 nA Zero Gate Voltage Drain Current IDSS VDS = 600 V, VGS = 0 V - - 100 VDS = 480 V, VGS = 0 V, TJ = 125 °C - - 500 UNIT Static Drain-Source Breakdown Voltage VDS Temperature Coefficient Gate-Source Threshold Voltage Drain-Source On-State Resistance Forward Transconductance RDS(on) gfs ID = 3.7 Ab VGS = 10 V VDS = 100 V, ID = 3.7 Ab μA - - 2.2 3.7 - - S - 1100 - - 140 - - 15 - - - 39 - - 10 Dynamic Input Capacitance Ciss Output Capacitance Coss Reverse Transfer Capacitance Crss Total Gate Charge Qg Gate-Source Charge Qgs VGS = 0 V VDS = 25 V f = 1.0 MHz, see fig. 5 VGS = 10 V ID = 4 A, V DS = 360 V, see fig. 6 and 13b pF nC Gate-Drain Charge Qgd - - 19 Turn-On Delay Time td(on) - 12 - - 20 - - 27 - - 17 - - 4.5 - - 7.5 - - - 4.0 S - - 25 = 0 Vb - - 1.5 V - 440 680 ns - 2.1 3.2 μC Rise Time Turn-Off Delay Time tr td(off) Fall Time tf Internal Drain Inductance LD Internal Source Inductance LS VDD = 300 V, ID = 4 A Rg = 9.1 , RD = 47, see fig. 10b Between lead, 6 mm (0.25") from package and center of die contact D ns nH G S Drain-Source Body Diode Characteristics Continuous Source-Drain Diode Current IS Pulsed Diode Forward Currenta ISM Body Diode Voltage VSD Body Diode Reverse Recovery Time trr Body Diode Reverse Recovery Charge Qrr Forward Turn-On Time ton MOSFET symbol showing the integral reverse p - n junction diode TJ = 25 °C, IS = 4 A, V A G GS TJ = 25 °C, IF = 4 A, dI/dt = 100 A/μs b Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD) Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. Pulse width 300 μs; duty cycle 2 %. 2 D DTP4N60/DTP4N60F/DTU4N60/DTL4N60 www.din-tek.jp TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted) 100 VGS 15 V 10 V 8.0 V 7.0 V 6.0 V 5.5 V 5.0 V Bottom 4.5 V Top 101 4.5 V 10-1 ID, Drain Current (A) ID, Drain Current (A) 101 25 °C 100 20 µs Pulse Width TC = 25 °C 10-2 10-2 10-1 100 101 91114_01 4 4.5 V 10-1 10-2 10-2 91114_02 20 µs Pulse Width TC = 150 °C 10-1 100 101 3.5 3.0 Fig. 2 - Typical Output Characteristics, TC = 150 °C 7 8 9 10 ID = 4 A VGS = 10 V 2.5 2.0 1.5 1.0 0.5 0.0 - 60 - 40 - 20 0 102 VDS, Drain-to-Source Voltage (V) 6 Fig. 3 - Typical Transfer Characteristics RDS(on), Drain-to-Source On Resistance (Normalized) ID, Drain Current (A) 100 VGS 15 V 10 V 8.0 V 7.0 V 6.0 V 5.5 V 5.0 V Bottom 4.5 V Top 5 VGS, Gate-to-Source Voltage (V) 91114_03 Fig. 1 - Typical Output Characteristics, TC = 25 °C 101 20 µs Pulse Width VDS = 100 V 10-1 102 VDS, Drain-to-Source Voltage (V) 150 °C 91114_04 20 40 60 80 100 120 140 160 TJ, Junction Temperature (°C) Fig. 4 - Normalized On-Resistance vs. Temperature 3 DTP4N60/DTP4N60F/DTU4N60/DTL4N60 www.din-tek.jp 2400 Capacitance (pF) 2000 ISD, Reverse Drain Current (A) VGS = 0 V, f = 1 MHz Ciss = Cgs + Cgd, Cds Shorted Crss = Cgd Coss = Cds + Cgd 1600 Ciss 1200 Coss 800 Crss 400 101 25 °C 0 101 0.6 VDS, Drain-to-Source Voltage (V) 91114_05 103 2 VDS = 300 V VDS = 180 V 12 Operation in this area limited by RDS(on) 5 VDS = 240 V 8 102 5 10 µs 2 10 100 µs 5 2 1 ms 1 10 ms 5 2 0.1 4 TC = 25 °C TJ = 150 °C Single Pulse 5 For test circuit see figure 13 0 0 8 16 24 32 2 10-2 0.1 40 QG, Total Gate Charge (nC) Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage 1.4 1.2 Fig. 7 - Typical Source-Drain Diode Forward Voltage ID = 3.2 A 16 1.0 VSD, Source-to-Drain Voltage (V) ID, Drain Current (A) VGS, Gate-to-Source Voltage (V) 20 0.8 91114_07 Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage 4 VGS = 0 V 100 100 91114_06 150 °C 91114_08 2 5 1 2 5 10 2 5 102 2 5 103 2 5 VDS, Drain-to-Source Voltage (V) Fig. 8 - Maximum Safe Operating Area 104 DTP4N60/DTP4N60F/DTU4N60/DTL4N60 www.din-tek.jp RD VDS VGS D.U.T. Rg + - VDD 5.0 10 V ID, Drain Current (A) 4.0 Pulse width ≤ 1 µs Duty factor ≤ 0.1 % 3.5 Fig. 10a - Switching Time Test Circuit 3.0 2.5 VDS 2.0 90 % 1.0 0.0 25 50 75 100 125 150 10 % VGS TC, Case Temperature (°C) 91114_09 td(on) Fig. 9 - Maximum Drain Current vs. Case Temperature td(off) tf tr Fig. 10b - Switching Time Waveforms Thermal Response (ZthJC) 10 1 0 − 0.5 PDM 0.2 0.1 0.1 t1 0.05 t2 0.02 0.01 Notes: 1. Duty Factor, D = t1/t2 2. Peak Tj = PDM x ZthJC + TC Single Pulse (Thermal Response) 10-2 10-5 91114_11 10-4 10-3 10-2 0.1 1 10 t1, Rectangular Pulse Duration (s) Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case 5 DTP4N60/DTP4N60F/DTU4N60/DTL4N60 www.din-tek.jp L Vary tp to obtain required IAS VDS VDS tp VDD D.U.T. Rg + - IAS V DD VDS 10 V 0.01 Ω tp IAS Fig. 12a - Unclamped Inductive Test Circuit Fig. 12b - Unclamped Inductive Waveforms EAS, Single Pulse Energy (mJ) 1200 ID 1.8 A 2.9 A Bottom 4 A Top 1000 800 600 400 200 0 VDD = 50 V 25 91114_12c 50 75 100 150 125 Starting TJ, Junction Temperature (°C) Fig. 12c - Maximum Avalanche Energy vs. Drain Current Current regulator Same type as D.U.T. 50 kΩ QG 10 V 12 V 0.2 µF 0.3 µF QGS QGD + D.U.T. VG - VDS VGS 3 mA Charge IG ID Current sampling resistors Fig. 13a - Basic Gate Charge Waveform 6 Fig. 13b - Gate Charge Test Circuit Package Information www.din-tek.jp TO-220AB MILLIMETERS A E F D H(1) Q ØP 3 2 L(1) 1 M* L b(1) INCHES DIM. MIN. MAX. MIN. A 4.25 4.65 0.167 MAX. 0.183 b 0.69 1.01 0.027 0.040 b(1) 1.20 1.73 0.047 0.068 c 0.36 0.61 0.014 0.024 D 14.85 15.49 0.585 0.610 E 10.04 10.51 0.395 0.414 e 2.41 2.67 0.095 0.105 e(1) 4.88 5.28 0.192 0.208 F 1.14 1.40 0.045 0.055 H(1) 6.09 6.48 0.240 0.255 J(1) 2.41 2.92 0.095 0.115 L 13.35 14.02 0.526 0.552 L(1) 3.32 3.82 0.131 0.150 ØP 3.54 3.94 0.139 0.155 Q 2.60 3.00 0.102 0.118 ECN: X12-0208-Rev. N, 08-Oct-12 DWG: 5471 Notes * M = 1.32 mm to 1.62 mm (dimension including protrusion) Heatsink hole for HVM C b e J(1) e(1) 1 Package Information www.din-tek.jp TO-220 FULLPAK (HIGH VOLTAGE) A E A1 ØP n d1 d3 D u L1 V L b3 A2 b2 c b e MILLIMETERS DIM. A A1 A2 b b2 b3 c D d1 d3 E e L L1 n ØP u v ECN: X09-0126-Rev. B, 26-Oct-09 DWG: 5972 MIN. 4.570 2.570 2.510 0.622 1.229 1.229 0.440 8.650 15.88 12.300 10.360 INCHES MAX. 4.830 2.830 2.850 0.890 1.400 1.400 0.629 9.800 16.120 12.920 10.630 MIN. 0.180 0.101 0.099 0.024 0.048 0.048 0.017 0.341 0.622 0.484 0.408 13.730 3.500 6.150 3.450 2.500 0.500 0.520 0.122 0.238 0.120 0.094 0.016 2.54 BSC 13.200 3.100 6.050 3.050 2.400 0.400 MAX. 0.190 0.111 0.112 0.035 0.055 0.055 0.025 0.386 0.635 0.509 0.419 0.100 BSC 0.541 0.138 0.242 0.136 0.098 0.020 Notes 1. To be used only for process drawing. 2. These dimensions apply to all TO-220, FULLPAK leadframe versions 3 leads. 3. All critical dimensions should C meet Cpk > 1.33. 4. All dimensions include burrs and plating thickness. 5. No chipping or package damage. 1 Package Information www.din-tek.jp TO-252AA CASE OUTLINE E MILLIMETERS A C2 e b2 C A1 D1 e1 L gage plane height (0.5 mm) L4 b L5 H D L3 b3 MIN. MAX. MIN. MAX. A 2.18 2.38 0.086 0.094 A1 - 0.127 - 0.005 b 0.64 0.88 0.025 0.035 b2 0.76 1.14 0.030 0.045 b3 4.95 5.46 0.195 0.215 C 0.46 0.61 0.018 0.024 C2 0.46 0.89 0.018 0.035 D 5.97 6.22 0.235 0.245 D1 5.21 - 0.205 0.265 E 6.35 6.73 0.250 E1 4.32 - 0.170 - H 9.40 10.41 0.370 0.410 e 2.28 BSC 0.090 BSC e1 4.56 BSC 0.180 BSC L 1.40 1.78 0.055 0.070 L3 0.89 1.27 0.035 0.050 L4 - 1.02 - 0.040 L5 1.14 1.52 0.045 0.060 ECN: X12-0247-Rev. M, 24-Dec-12 DWG: 5347 E1 Note • Dimension L3 is for reference only. 1 INCHES DIM. Package Information www.din-tek.jp TOĆ251AA (DPAK) E A L2 b2 Dim A A1 b b1 b2 c c1 D E e L L1 L2 L3 D L3 L1 b1 L b MILLIMETERS c1 e c A1 INCHES Min Max Min Max 2.21 2.38 0.087 0.094 0.89 1.14 0.035 0.045 0.71 0.89 0.028 0.035 0.76 1.14 0.030 0.045 5.23 5.43 0.206 0.214 0.46 0.58 0.018 0.023 0.46 0.58 0.018 0.023 5.97 6.22 0.235 0.245 6.48 6.73 0.255 0.265 2.28 BSC 0.090 BSC 8.89 9.53 0.350 0.375 1.91 2.28 0.075 0.090 0.89 1.27 0.035 0.050 1.15 1.52 0.045 0.060 ECN: S-03946—Rev. E, 09-Jul-01 DWG: 5346 Note: Dimension L3 is for reference only. www.GD\VHPLMS 1 Legal Disclaimer Notice Disclaimer www.din-tek.jp ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. Din-Tek Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Din-Tek”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other disclosure relating to any product. Din-Tek makes no warranty, representation or guarantee regarding the suitability of the products for any particular purpose or the continuing production of any product. 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