PHILIPS N74F777A Triple bidirectional latched bus transceiver 3-state open collector Datasheet

INTEGRATED CIRCUITS
74F777
Triple bidirectional latched bus
transceiver (3-State + open collector)
Product specification
IC15 Data Handbook
1992 May 19
Philips Semiconductors
Product specification
Triple bidirectional latched bus transceiver (3–State +
Open Collector)
74F777
range of 20 to 50 ohms and is terminated on each end with a 30 to
40 ohm resistor.
FEATURES
• Latching transceiver
• High drive Open Collector output current with minimum output
The 74F777 is a triple bidirectional transceiver with Open Collector
B and 3–State A port output drivers. A latch function is provided for
the A port signals. The B port output driver is designed to sink
100mA from 2 volts to minimize crosstalk and ringing on the bus.
swing
• Compatible with Test Mode (TM) bus specification
• Controlled output ramp
• Multiple package options
• Industrial temperature range available (–40°C to +85°C)
A separate output threshold clamp voltage (VX) is provided to
prevent the A port output High level from exceeding future high
density processor supply voltage levels. For 5 volt systems, VX is
simply tied to VCC.
DESCRIPTION
TYPE
The 74F777 is a triple bidirectional latched bus transceiver and is
intended to provide the electrical interface to a high performance
wired–OR bus. This bus has a loaded characteristics impedance
TYPICAL
PROPAGATION DELAY
TYPICAL SUPPLY CURRENT( TOTAL)
7.0ns
45mA
74F777
ORDERING INFORMATION
ORDER CODE
DESCRIPTION
COMMERCIAL RANGE
INDUSTRIAL RANGE
VCC = 5V ±10%, Tamb = 0°C to +70°C
VCC = 5V ±10%,
Tamb = –40°C to +85°C
PKG DWG #
20–pin plastic DIP (300 mil)
N74F777N
I74F777N
SOT146-1
20–pin PLCC
N74F777A
I74F777A
SOT380-1
INPUT AND OUTPUT LOADING AND FAN OUT TABLE
PINS
DESCRIPTION
74F (U.L.)
HIGH/LOW
LOAD VALUE
HIGH/LOW
A0 – A2
PNP latched inputs
3.5/0.117
70µA/70µA
B0 – B2
Data inputs with threshold circuitry
5.0/0.167
100µA/100µA
OEA0 – OEA2
A output enable inputs (active–High)
1.0/0.033
20µA/20µA
OEB0 – OEB2
B output enable inputs (active–Low)
1.0/0.033
20µA/20µA
Latch enable inputs (active–Low)
1.0/0.033
20µA/20µA
150/40
3mA/24mA
OC/166.7
OC/100mA
LE0 – LE2
A0 – A2
3–State outputs
B0 – B2
Open Collector outputs
Note to input and output loading and fan out table
One (1.0) FAST unit load is defined as: 20µA in the High state and 0.6mA in the Low state.
OC = Open Collector.
May 19, 1992
2
853–1645 06772
Philips Semiconductors
Product specification
Triple bidirectional latched bus transceiver (3–State +
Open Collector)
PIN CONFIGURATION
LOGIC DIAGRAM
LE0
1
20
VCC
LE1
2
19
VX
LE2
3
18
GND
OEA0
4
17
B0
A0
5
16
B1
OEA1
6
15
B2
OEB0
A1
7
14
GND
OEA2
8
13
OEB0
A2
9
12
OEB1
GND 10
11
LE0
A0
OEA0
OEB1
LE1
A1
OEB2
SF00432
OEA1
OEB2
PIN CONFIGURATION PLCC
LE2
OEA0
A0
5
OEA1
6
LE2
LE1
LE0
Vcc
Vx
A2
4
74F777
3
2
1
20
19
OEA2
13
1
LE
5
17
Q
4
12
2
LE
7
16
Q
6
11
3
LE
9
15
Q
8
10
11
12
13
OEB1
OEB0
14 GND
GND
15 B2
OEB2
7
A2
SF00436
16 B1
8
9
IEC/IEEE SYMBOL
13
EN
1
C1
5
ID
4
EN
17
SF00433
12
2
LOGIC SYMBOL
16
7
5
1
LE0
2
LE1
3
LE2
4
OEA0
6
OEA1
8
OEA2
13
OEB0
12
OEB1
11
OEB2
VX
7
6
9
11
A0 A1 A2
3
15
9
8
SF00435
B0 B1 B2
17 16 15
SF00434
May 19, 1992
B2
Data
VCC = Pin 20, VX = Pin 19,
GND = Pin 10, 14, 18
17 B0
PLCC
A1
VCC = Pin 20, VX = Pin 19,
GND = Pin 10, 14, 18
B1
Data
18 GND
OEA2
19
B0
Data
3
Philips Semiconductors
Product specification
Triple bidirectional latched bus transceiver (3–State +
Open Collector)
74F777
FUNCTION TABLE
INPUTS
LATCH
OUTPUTS
OPERATING MODE
An
Bn*
LEn
OEAn
OEBn
STATE
An
Bn
H
X
L
L
L
H
Z
H**
L
X
L
L
L
L
Z
L
X
X
H
L
L
Qn
Z
Qn
A 3-State, latched data to B
Feedback: A to B, B to A
A 3-State, data from A to B
–
–
L
H
L
(1)
(1)
(1)
–
H
H
H
L
H (2)
H
Z(2)
Preconditioned latch enabling
–
L
H
H
L
H (2)
L
Z(2)
data transfer from B to A
Latch state to A and B
–
–
H
H
L
Qn
Qn
Qn
H
X
L
L
H
H
Z
Z
L
X
L
L
H
L
Z
Z
X
X
H
L
H
Qn
Z
Z
–
H
L
H
H
H
H
Z
–
L
L
H
H
L
L
Z
–
H
H
H
H
Qn
H
Z
–
L
H
H
H
Qn
L
Z
B and A 3–State
B 3-State, data from B to A
Qn
Notes to function table
H = High voltage level
L = Low voltage level
X = Don’t care
– = Input not externally driven
Z = High impedance (off) state
Qn = High or Low voltage level one setup time prior to the Low–to–High LE transition.
(1) = Condition will cause a feedback loop path: A to B and B to A.
(2) = The latch must be preconditioned such that B inputs may assume a High or Low level while OEB0 and OEB1 are Low and LE is High.
Bn* =Precaution should be taken to insure the B inputs do not float. If they do they are equal to Low state.
H**= Goes to level of pull-up voltage.
Each latch is independent. The latches may be run in any combination of modes.
ABSOLUTE MAXIMUM RATINGS
(Operation beyond the limit set forth in this table may impair the useful life of the device. Unless otherwise noted these limits are over the
operating free air temperature range.)
SYMBOL
PARAMETER
VCC
Supply voltage
VX
Threshold control
VIN
Input voltage
RATING
UNIT
–0.5 to +7.0
V
–0.5 to +7.0
V
OEBn, OEAn, LEn
–0.5 to +7.0
V
A0 – A2, B0 – B2
–0.5 to +5.5
V
–30 to +5
mA
–0.5 to VCC
V
IIN
Input current
VOUT
Voltage applied to output in High output state
IOUT
Current applied to output in
A0 – A2
48
mA
Low output state
B0 – B2
200
mA
Operating free air
Commercial range
0 to +70
°C
temperature range
Industrial range
–40 to +85
°C
–65 to +150
°C
Tamb
Tstg
May 19, 1992
Storage temperature range
4
Philips Semiconductors
Product specification
Triple bidirectional latched bus transceiver (3–State +
Open Collector)
74F777
RECOMMENDED OPERATING CONDITIONS
PARAMETER
SYMBOL
VCC
Supply voltage
VIH
High–level input voltage
VIL
Low–level input voltage
IIk
Input clamp current
IOH
High–level output current
IOL
Low–level output current
Tamb
Operating free–air temperature range
LIMITS
NOM
MAX
4.5
5.0
5.5
Except B0 – B2
2.0
B0 – B2
1.6
V
V
V
Except B0 – B2
0.8
V
B0 – B2
1.43
V
Except A0 – A2
A0 – A2
–18
mA
–40
mA
Except A0 – A2
A0 – A2
–3
mA
24
mA
B0 – B2
100
mA
Commercial range
Industrial range
May 19, 1992
UNIT
MIN
5
0
+70
–40
+85
°C
°C
Philips Semiconductors
Product specification
Triple bidirectional latched bus transceiver (3–State +
Open Collector)
74F777
DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.)
SYMBOL
PARAMETER
IOH
IOFF
High–level output current
Power–off output current
B0 – B2
B0 – B2
VOH
High-level output voltage
A0 – A24
A24
VOL
Low-level output voltage
VIK
Input clamp voltage
II
Input current at
maximum input voltage
IIH
IIL
High–level input current
Low–level input current
A0 –
B0 – B2
A0 – A2
Except A0 – A2
OEBn, OEAn,
LEn
A0 – A2,
B0 – B2
OEBn, OEAn,
LEn
B0 – B2
OEBn, OEAn,
LEn
B0 – B2
TEST
CONDITIONS1
VCC = MAX, VIL = MAX, VIH = MIN, VOH = 2.1V
VCC = 0.0V, VIL = MAX, VIH = MIN, VOH = 2.1V
VCC = MIN,
IOH = –3mA, VX =VCC
VIL = MAX,
IOH = –4mA, VX = 3.13V
VIH = MIN
and 3.47V
VCC = MIN,
IOL = 20mA, VX = Vcc
VIL = MAX,
IOL = 100mA
VIH = MIN
IOL = 4mA
VCC = MIN, II = IIK
VCC = MIN, II = IIK
MIN
2.5
LIMITS
TYP2 MAX
100
100
VCC
2.5
UNIT
µA
µA
V
VX
V
0.50
1.15
-0.5
-1.2
V
V
V
V
V
VCC = MAX, VI = 7.0V
100
µA
VCC = MAX, VI = 5.5V
1
mA
20
100
µA
µA
VCC = MAX, VI = 0.3V
–20
–100
µA
µA
0.40
VCC = MAX, VI = 2.7V, Bn – An = 0V
VCC = MAX, VI = 2.1V
VCC = MAX, VI = 0.5V
IOZH + IIH
Off–state output current,
High level voltage applied
A0 – A2
VCC = MAX, VO = 2.7V
70
µA
IOZL + IIL
Off–state output current,
Low level voltage applied
A0 – A2
VCC = MAX, VI = 0.5V
–70
µA
IX
High level control current
VCC = MAX, VX = VCC, LE = OEAn = OEBn = 2.7V,
A0 – A2 = 2.7V, B0 – B2 = 2.0V,
–100
100
µA
VCC = MAX, VX = 3.13 & 3.47V, LE = OEAn =
2.7V, OEBn = A0 – A2 = 2.7V, B0 – B2 = 2.0V
–10
10
µA
-60
-150
mA
60
80
67
mA
mA
mA
IOS
Short circuit output
current3
A0 – A2 only
VCC = MAX, Bn = 1.8V, OEAn = 2.0V,
OEBn = 2.7V
ICC
Supply current (total)
ICCH
ICCL
ICCZ
VCC = MAX
VCC = MAX, VIL = 0.5V
VCC = MAX, VIL = 0.5V
40
55
45
Notes to DC electrical characteristics
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.
Unless otherwise specified, VX =VCC for all test condition.
2. All typical values are at VCC = 5V, Tamb = 25°C.
3. Not more than one output should be shorted at a time. For testing IOS, the use of high-speed test apparatus and/or sample-and-hold
techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting
of a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any
sequence of parameter tests, IOS tests should be performed last.
4. Due to test equipment limitations, actual test conditions are for VIH =1.8v and VIL = 1.3V.
May 19, 1992
6
Philips Semiconductors
Product specification
Triple bidirectional latched bus transceiver (3–State +
Open Collector)
74F777
AC ELECTRICAL CHARACTERISTICS
A PORT LIMITS
SYMBOL
TEST
CONDITION
PARAMETER
Tamb = +25°C
VCC = +5.0V
CL = 30pF, RL = 9Ω
MIN
TYP
Tamb = 0°C to +70°C
VCC = +5.0V ±10%
CL = 30pF, RL = 9Ω
Tamb = –40°C to
+85°C
VCC = +5.0V ±10%
CL = 30pF, RL = 9Ω
UNIT
MAX
MIN
MAX
MIN
MAX
14.5
12.5
8.0
7.5
14.5
12.5
ns
Waveform 1
8.5
7.5
10.5
9.5
13.0
12.0
8.0
7.5
Output enable time to
High or Low
OEAn to An
Waveform 3, 4
8.0
9.0
10.0
11.0
13.0
14.0
7.0
8.0
14.5
15.5
7.0
8.0
14.5
15.5
ns
Output Disable time from
High or Low
OEAn to An
Waveform 3, 4
1.5
1.5
3.0
3.0
6.0
6.0
1.0
1.0
6.5
6.0
1.0
1.0
6.5
6.0
ns
tPLH
tPHL
Propagation delay
Bn to An
tPZH
tPZL
tPHZ
tPLZ
B PORT LIMITS
SYMBOL
TEST
CONDITION
PARAMETER
Tamb = +25°C
VCC = +5.0V
CD= 30pF, RU = 9Ω
Tamb = 0°C to +70°C
VCC = +5.0V ± 10%
CD = 30pF, RU = 9Ω
Tamb = –40°C to
+85°C
VCC = +5.0V ±10%
CD= 30pF, RU = 9Ω
MIN
TYP
MAX
MIN
MAX
MIN
MAX
UNIT
tPLH
tPHL
Propagation delay
An to Bn
Waveform 1
3.0
5.0
4.5
6.5
7.0
9.0
2.5
4.5
8.0
10.0
2.5
4.5
8.0
10.0
ns
tPLH
tPHL
Propagation delay
LEn to Bn
Waveform 1
3.5
5.5
5.5
7.5
8.0
10.5
3.0
5.0
9.0
11.5
3.0
5.0
9.0
11.5
ns
tPLH
tPHL
Enable/disable time
OEBn to An
Waveform 1
3.0
6.0
5.0
8.0
7.5
10.5
3.0
5.5
8.0
12.0
3.0
5.5
8.0
12.0
ns
tTLH
tTHL
Transition time, B port
1.3V to 1.7V, 1.7V to 1.3V
Test Circuits and
Waveforms
0.5
0.5
4.0
2.0
4.5
4.5
0.5
0.5
7.0
4.5
0.5
0.5
7.0
4.5
ns
AC SETUP REQUIREMENTS
LIMITS
SYMBOL
TEST
CONDITION
PARAMETER
Tamb = +25°C
VCC = +5.0V
CD= 30pF, RU = 9Ω
MIN
TYP
Tamb = 0°C to +70°C
VCC = +5.0V ± 10%
CD = 30pF, RU = 9Ω
MAX
MIN
MAX
Tamb = –40°C to
+85°C
VCC = +5.0V ±10%
CD= 30pF, RU = 9Ω
MIN
UNIT
MAX
tsu (H)
tsu (L)
Setup time
An to LEn
Waveform 2
4.0
4.5
4.5
4.5
4.5
4.5
ns
th (H)
th (L)
Hold time
An to LEn
Waveform 2
0.0
0.0
0.0
0.0
0.0
0.0
ns
tw (L)
LEn pulse width, Low
Waveform 2
5.5
6.5
6.5
ns
AC WAVEFORMS
An, Bn, OEBn
VM
An
VM
tPLH
VM
VM
VM
tsu(H)
th(L)
tPHL
tsu(L)
An, Bn
VM
LEn
VM
th(H)
tw(L)
VM
VM
VM
SF00438
SF00437
Waveform 2. Data set-up and hold times and LE pulse width
Waveform 1. Propagation delay, data to output and
enable/disable time OEBn to Bn
May 19, 1992
VM
7
Philips Semiconductors
Product specification
Triple bidirectional latched bus transceiver (3–State +
Open Collector)
OEAn
OEAn
VM
VM
tPZH
VM
VM
tPZL
tPLZ
VOH -0.3V
tPHZ
An
74F777
VM
An
VM
0V
VOL +0.3V
SF00439
SF00440
Waveform 3. 3-State output enable time to High level and
Waveform 4. 3-State output enable time to Low level and output
output disable time from High level
disable time from Low level
Notes to AC waveforms
For all waveforms, VM = 1.5V.
The shaded areas indicate when the input is permitted to change for predictable output performance.
TEST CIRCUITS AND WAVEFORMS
SWITCH POSITION
TEST
SWITCH
tPLZ, tPZL
closed
All other
open
tw
90%
NEGATIVE
PULSE
VCC
10%
RL
VOUT
PULSE
GENERATOR
AMP (V)
VM
VM
7.0V
VIN
90%
10%
tTHL (tf )
tTLH (tr )
tTLH (tr )
tTHL (tf )
low V
D.U.T.
RT
CL
AMP (V)
RL
90%
POSITIVE
PULSE
90%
VM
VM
10%
VCC
7.0V
10%
tw
Test circuit for 3–State outputs on A port
low V
Input pulse definition
INPUT PULSE REQUIREMENTS
VIN
RU
VOUT
PULSE
GENERATOR
family
RT
VM
rep. rate
0.0V
1.5V
1MHz
500ns 2.5ns
2.5ns
1.0V
1.0V
1MHz
500ns 4.0ns
4.0ns
amplitude Low V
D.U.T.
CD
A port
3.0V
B port
2.0V
tw
tTLH
tTHL
Test circuit for outputs on B port
DEFINITIONS:
RL = Load resistor; see AC electrical characteristics for value.
CL = Load capacitance includes jig and probe capacitance; see AC electrical characteristics for value.
RU = Pull up resistor; see AC electrical characteristics for value.
CD = Load capacitance includes jig and probe capacitance; see AC electrical characteristics for value.
RT = Termination resistance should be equal to ZOUT of pulse generators.
May 19, 1992
8
SF00431
Philips Semiconductors
Product specification
Triple bidirectional latched bus transceiver
(3-State + open collector)
DIP20: plastic dual in-line package; 20 leads (300 mil)
1992 May 19
9
74F777
SOT146-1
Philips Semiconductors
Product specification
Triple bidirectional latched bus transceiver
(3-State + open collector)
PLCC20: plastic leaded chip carrier; 20 leads
1992 May 19
74F777
SOT380-1
10
Philips Semiconductors
Product specification
Triple bidirectional latched bus transceiver
(3-State + open collector)
NOTES
1992 May 19
11
74F777
Philips Semiconductors
Product specification
Triple bidirectional latched bus transceiver
(3-State + open collector)
74F777
Data sheet status
Data sheet
status
Product
status
Definition [1]
Objective
specification
Development
This data sheet contains the design target or goal specifications for product development.
Specification may change in any manner without notice.
Preliminary
specification
Qualification
This data sheet contains preliminary data, and supplementary data will be published at a later date.
Philips Semiconductors reserves the right to make chages at any time without notice in order to
improve design and supply the best possible product.
Product
specification
Production
This data sheet contains final specifications. Philips Semiconductors reserves the right to make
changes at any time without notice in order to improve design and supply the best possible product.
[1] Please consult the most recently issued datasheet before initiating or completing a design.
Definitions
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended
periods may affect device reliability.
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or
modification.
Disclaimers
Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless
otherwise specified.
 Copyright Philips Electronics North America Corporation 1998
All rights reserved. Printed in U.S.A.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Sunnyvale, California 94088–3409
Telephone 800-234-7381
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Document order number:
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Date of release: 10-98
9397-750-05178