Features • Low-voltage and Standard-voltage Operation • • • • • • • • • • • • – VCC = 1.7V to 5.5V Internally Organized 256 x 8 (2K) Two-wire Serial Interface Schmitt Trigger, Filtered Inputs for Noise Suppression Bidirectional Data Transfer Protocol 1MHz (5V), 400kHz (1.7V, 2.5V, 2.7V) Compatibility Write Protect Pin for Hardware Data Protection 8-byte Page (2K) Write Modes Partial Page Writes Allowed Self-timed Write Cycle (5ms max) High-reliability – Endurance: 1 Million Write Cycles – Data Retention: 100 Years Green (Pb/Halide-free/RoHS Compliant) Package Options Die Sales: Wafer Form and Tape and Reel Two-wire Serial Electrically Erasable and Programmable Read-only Memory 2K (256 x 8) Description The Atmel® AT24C02C provides 2048-bits of serial electrically erasable and programmable read-only memory (EEPROM) organized as 256-words of 8-bits each. The device is optimized for use in many industrial and commercial applications where lowpower and low-voltage operation are essential. The AT24C02C is available in spacesaving 8-lead PDIP, 8-lead TSSOP, 8-lead JEDEC SOIC, 8-lead UDFN , 5-lead SOT23 and 8-ball VFBGA packages and is accessed via a two-wire serial interface. Table 0-1. Pin Configuration Pin Name Function A0 - A2 Address Inputs SDA Serial Data SCL Serial Clock Input WP Write Protect GND Ground VCC Power Supply Note: Atmel AT24C02C For use of 5-lead SOT23, the software A2, A1, and A0 bits in the device address word must be set to zero to properly communicate 8-lead PDIP 8-lead SOIC A0 1 8 VCC A0 1 8 VCC A1 2 7 WP A1 2 7 WP A2 3 6 SCL A2 3 6 SCL GND 4 5 SDA GND 4 5 SDA 8-lead UDFN 8-lead TSSOP A0 1 8 VCC VCC 8 1 A0 A1 2 7 WP WP 7 2 A1 A2 3 6 SCL SCL 6 3 A2 GND 4 5 SDA SDA 5 4 GND Bottom View 8-ball VFBGA 5-lead SOT23 SCL 1 GND 2 SDA 3 5 4 WP VCC VCC 8 1 A0 WP 7 2 A1 SCL 6 3 A2 SDA 5 4 GND Bottom View 8700D–SEEPR–8/10 Absolute Maximum Ratings *NOTICE: Operating Temperature ........................–55°C to +125°C Storage Temperature ...........................–65°C to +150°C Voltage on Any Pin with Respect to Ground........................... –1.0V to +7.0V Maximum Operating Voltage................................. 6.25V DC Output Current .............................................. 5.0 mA Figure 0-1. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Block Diagram VCC GND WP START STOP LOGIC SERIAL CONTROL LOGIC LOAD R/W H.V. PUMP/TIMING COMP DEVICE ADDRESS COMPARATOR A2 A1 A0 EN LOAD DATA RECOVERY INC DATA WORD ADDR/COUNTER Y DEC X DEC SCL SDA EEPROM SERIAL MUX DOUT/ACK LOGIC DIN DOUT 2 Atmel AT24C02C 8700D–SEEPR–8/10 Atmel AT24C02C 1. Pin Description SERIAL CLOCK (SCL): The SCL input is used to positive edge clock data into each EEPROM device and negative edge clock data out of each device. SERIAL DATA (SDA): The SDA pin is bidirectional for serial data transfer. This pin is open-drain driven and may be wire-ORed with any number of other open-drain or open-collector devices. DEVICE/PAGE ADDRESSES (A2, A1, A0): The A2, A1 and A0 pins are device address inputs that are hard wired for the Atmel® AT24C02C. As many as eight 2K devices may be addressed on a single bus system (device addressing is discussed in detail under the Device Addressing section). WRITE PROTECT (WP): AT24C02C has a write protect pin that provides hardware data protection. The write protect pin allows normal read/write operations when connected to ground (GND). When the write protect pin is connected to VCC, the write protection feature is enabled and operates as shown in Table 1-1. Table 1-1. WP Pin Status Write Protect Part of the Array Protected Atmel 24C02C At VCC Full (2K) Array At GND Normal Read/Write Operations 3 8700D–SEEPR–8/10 2. Memory Organization Atmel AT24C02C, 2K SERIAL EEPROM: Internally organized with 32 pages of 8-bytes each, the 2K requires an 8-bit data word address for random word addressing. Table 2-1. Pin Capacitance(1) Applicable over recommended operating range from TA = 25⋅C, f = 1.0MHz, VCC = +1.7V to +5.5V Symbol Test Condition CI/O CIN Note: Max Units Conditions Input/Output Capacitance (SDA) 8 pF VI/O = 0V Input Capacitance (A0, A1, A2, SCL) 6 pF VIN = 0V 1. This parameter is characterized and is not 100% tested Table 2-2. DC Characteristics Applicable over recommended operating range from: TAI = –40°C to +85°C, VCC = +1.7V to +5.5V (unless otherwise noted) Symbol Parameter VCC1 Supply Voltage VCC2 Test Condition Max Units 1.7 5.5 V Supply Voltage 2.5 5.5 V VCC3 Supply Voltage 2.7 5.5 V VCC4 Supply Voltage 4.5 5.5 V ICC Supply Current VCC = 5.0V READ at 100kHz 0.4 1.0 mA ICC Supply Current VCC = 5.0V WRITE at 100kHz 2.0 3.0 mA ISB1 Standby Current VCC = 1.7V VIN = VCC or VSS 0.6 3.0 µA ISB2 Standby Current VCC = 2.5V VIN = VCC or VSS 1.4 4.0 µA ISB3 Standby Current VCC = 2.7V VIN = VCC or VSS 1.6 4.0 µA ISB4 Standby Current VCC = 5.0V VIN = VCC or VSS 8.0 18.0 µA ILI Input Leakage Current VIN = VCC or VSS 0.10 3.0 µA ILO Output Leakage Current VOUT = VCC or VSS 0.05 3.0 µA VIL Input Low Level(1) –0.6 VCC x 0.3 V VCC x 0.7 VCC + 0.5 V (1) Min Typ VIH Input High Level VOL2 Output Low Level VCC = 3.0V IOL = 2.1mA 0.4 V VOL1 Output Low Level VCC = 1.7V IOL = 0.15mA 0.2 V Note: 4 1. VIL min and VIH max are reference only and are not tested Atmel AT24C02C 8700D–SEEPR–8/10 Atmel AT24C02C Table 2-3. AC Characteristics Applicable over recommended operating range from TAI = –40°C to +85°C, VCC = +1.7V to +5.5V, CL = 1TTL Gate and 100pF (unless otherwise noted) 1.7, 2.5, 2.7 Min Symbol Parameter fSCL Clock Frequency, SCL tLOW Clock Pulse Width Low 1.2 0.4 µs tHIGH Clock Pulse Width High 0.6 0.4 µs tI Noise Suppression Time tAA Clock Low to Data Out Valid 0.1 tBUF Time the bus must be free before a new transmission can start 1.2 0.5 µs tHD.STA Start Hold Time 0.6 0.25 µs tSU.STA Start Setup Time 0.6 0.25 µs tHD.DAT Data In Hold Time 0 0 µs tSU.DAT Data In Setup Time 100 100 ns Inputs Rise Time tR Max 5.0V Min 400 50 (1) (1) 0.9 0.05 Max Units 1000 kHz 50 ns 0.55 µs 0.3 0.3 µs 300 100 ns tF Inputs Fall Time tSU.STO Stop Setup Time 0.6 .25 µs tDH Data Out Hold Time 50 50 ns tWR Write Cycle Time Endurance(1) 5.0V, 25⋅C, Byte Mode Note: 5 5 1 Million ms Write Cycles 1. This parameter is ensured by characterization only 5 8700D–SEEPR–8/10 3. Device Operation CLOCK and DATA TRANSITIONS: The SDA pin is normally pulled high with an external device. Data on the SDA pin may change only during SCL low time periods (see Figure 5-2 on page 8). Data changes during SCL high periods will indicate a start or stop condition as defined below. START CONDITION: A high-to-low transition of SDA with SCL high is a start condition which must precede any other command (see Figure 5-3 on page 8). STOP CONDITION: A low-to-high transition of SDA with SCL high is a stop condition. After a read sequence, the stop command will place the EEPROM in a standby power mode (see Figure 5-3 on page 8). ACKNOWLEDGE: All addresses and data words are serially transmitted to and from the EEPROM in 8-bit words. The EEPROM sends a zero to acknowledge that it has received each word. This happens during the ninth clock cycle. STANDBY MODE: The Atmel® AT24C02C features a low-power standby mode which is enabled: (a) upon powerup and (b) after the receipt of the STOP bit and the completion of any internal operations. 2-Wire Software Reset: After an interruption in protocol, power loss or system reset, any 2-wire part can be reset by following these steps: (a) Create a start bit condition, (b) clock 9 cycles, (c) create another start bit followed by stop bit condition as shown below. The device is ready for next communication after above steps have been completed. Figure 3-1. Software reset Dummy Clock Cycles Start bit SCL 1 2 3 Start bit 8 Stop bit 9 SDA 6 Atmel AT24C02C 8700D–SEEPR–8/10 Atmel AT24C02C 4. Bus Timing Figure 4-1. SCL: Serial Clock, SDA: Serial Data I/O tHIGH tF tR tLOW SCL tSU.STA tLOW tHD.STA tHD.DAT tSU.DAT tSU.STO SDA IN tAA tDH tBUF SDA OUT 5. Write Cycle Timing Figure 5-1. SCL: Serial Clock, SDA: Serial Data I/O SCL SDA 8th BIT ACK WORDn (1) twr STOP CONDITION Notes: START CONDITION 1. The write cycle time tWR is the time from a valid stop condition of a write sequence to the end of the internal clear/write cycle 7 8700D–SEEPR–8/10 Figure 5-2. Data Validity SDA SCL DATA STABLE DATA STABLE DATA CHANGE Figure 5-3. Start and Stop Definition SDA SCL START Figure 5-4. STOP Output Acknowledge 1 SCL 8 9 DATA IN DATA OUT START 8 ACKNOWLEDGE Atmel AT24C02C 8700D–SEEPR–8/10 Atmel AT24C02C 6. Device Addressing The 2K EEPROM device requires an 8-bit device address word following a start condition to enable the chip for a read or write operation (refer to Figure 8-1). The device address word consists of a mandatory one, zero sequence for the first four most significant bits as shown. This is common to all the EEPROM devices. The next three bits are the A2, A1 and A0 device address bits for the 2K EEPROM. These three bits must compare to their corresponding hard-wired input pins. The eighth bit of the device address is the read/write operation select bit. A read operation is initiated if this bit is high and a write operation is initiated if this bit is low. Upon a compare of the device address, the EEPROM will output a zero. If a compare is not made, the chip will return to a standby state. 7. Write Operations BYTE WRITE: A write operation requires an 8-bit data word address following the device address word and acknowledgment. Upon receipt of this address, the EEPROM will again respond with a zero and then clock in the first 8-bit data word. Following receipt of the 8-bit data word, the EEPROM will output a zero and the addressing device, such as a microcontroller, must terminate the write sequence with a stop condition. At this time the EEPROM enters an internally timed write cycle, tWR, to the nonvolatile memory. All inputs are disabled during this write cycle and the EEPROM will not respond until the write is complete (see Figure 8-2 on page 10). PAGE WRITE: The 2K EEPROM is capable of an 8-byte page write. A page write is initiated the same as a byte write, but the microcontroller does not send a stop condition after the first data word is clocked in. Instead, after the EEPROM acknowledges receipt of the first data word, the microcontroller can transmit up to seven data words. The EEPROM will respond with a zero after each data word received. The microcontroller must terminate the page write sequence with a stop condition (see Figure 8-3 on page 10). The data word address lower three bits are internally incremented following the receipt of each data word. The higher data word address bits are not incremented, retaining the memory page row location. When the word address, internally generated, reaches the page boundary, the following byte is placed at the beginning of the same page. If more than eight data words are transmitted to the EEPROM, the data word address will “roll over” and previous data will be overwritten. ACKNOWLEDGE POLLING: Once the internally timed write cycle has started and the EEPROM inputs are disabled, acknowledge polling can be initiated. This involves sending a start condition followed by the device address word. The read/write bit is representative of the operation desired. Only if the internal write cycle has completed will the EEPROM respond with a zero allowing the read or write sequence to continue. 8. Read Operations Read operations are initiated the same way as write operations with the exception that the read/write select bit in the device address word is set to one. There are three read operations: current address read, random address read and sequential read. CURRENT ADDRESS READ: The internal data word address counter maintains the last address accessed during the last read or write operation, incremented by one. This address stays valid between operations as long as the chip power is maintained. The address “roll over” during read is from the last byte of the last memory page to the 9 8700D–SEEPR–8/10 first byte of the first page. The address “roll over” during write is from the last byte of the current page to the first byte of the same page. Once the device address with the read/write select bit set to one is clocked in and acknowledged by the EEPROM, the current address data word is serially clocked out. The microcontroller does not respond with an input zero but does generate a following stop condition (see Figure 8-4 on page 11). RANDOM READ: A random read requires a “dummy” byte write sequence to load in the data word address. Once the device address word and data word address are clocked in and acknowledged by the EEPROM, the microcontroller must generate another start condition. The microcontroller now initiates a current address read by sending a device address with the read/write select bit high. The EEPROM acknowledges the device address and serially clocks out the data word. The microcontroller does not respond with a zero but does generate a following stop condition (see Figure 8-5 on page 11). SEQUENTIAL READ: Sequential reads are initiated by either a current address read or a random address read. After the microcontroller receives a data word, it responds with an acknowledge. As long as the EEPROM receives an acknowledge, it will continue to increment the data word address and serially clock out sequential data words. When the memory address limit is reached, the data word address will “roll over” and the sequential read will continue. The sequential read operation is terminated when the microcontroller does not respond with a zero but does generate a following stop condition (see Figure 8-6 on page 11). Figure 8-1. Device Address MSB 10 LSB Figure 8-2. Byte Write Figure 8-3. Page Write Atmel AT24C02C 8700D–SEEPR–8/10 Atmel AT24C02C Figure 8-4. Current Address Read Figure 8-5. Random Read Figure 8-6. Sequential Read 11 8700D–SEEPR–8/10 9. Ordering Code Detail AT 2 4 C 0 2 C - S S H M - B Atmel Designator Shipping Carrier Option B or blank = Bulk (tubes) T = Tape and Reel Product Family Operating Voltage M Device Density 02 = 2k = 1.7V to 5.5V Package Device Grade or Wafer/Die Thickness H Device Revision = Green, NiPdAu lead finish, Industrial Temperature Range (-40˚C to +85˚C) U = Green, matte Sn lead finish, Industrial Temperature range (-40˚C to +85˚C) 11 = 11mil wafer thickness Package Option P = PDIP SS = JEDEC SOIC X = TSSOP MA = UDFN ST = SOT23 C = VFBGA WWU = Wafer unsawn WDT = Die in Tape and Reel 12 Atmel AT24C02C 8700D–SEEPR–8/10 Atmel AT24C02C 10. Part Markings Atmel AT24C02C-PUM Top Mark Seal Year | Seal Week | | | |---|---|---|---|---|---|---|---| A T M L U Y W W |---|---|---|---|---|---|---|---| 0 2 C M @ |---|---|---|---|---|---|---|---| * LOT NUMBER |---|---|---|---|---|---|---|---| | PIN 1 INDICATOR (DOT) U = Y = WW = 02C= @ = M = *Lot Material Set Seal Year Seal Week Device Country of Assembly Voltage Indicator Number to Use ALL Characters in Marking BOTTOM MARK No Bottom Mark Atmel AT24C02C-SSHM Top Mark Seal Year | Seal Week | | | |---|---|---|---|---|---|---|---| A T M L H Y W W |---|---|---|---|---|---|---|---| 0 2 C M @ |---|---|---|---|---|---|---|---| * LOT NUMBER |---|---|---|---|---|---|---|---| | PIN 1 INDICATOR (DOT) H = Y = WW = 02C= M = @ = *Lot Material Set Seal Year Seal Week Device Voltage Indicator Country of Assembly Number to Use ALL Characters in Marking BOTTOM MARK No Bottom Mark Atmel AT24C02C-XHM Top Mark PIN 1 INDICATOR (DOT) | |---|---|---|---|---|---| * A T H Y W W |---|---|---|---|---|---| 0 2 C M @ |---|---|---|---|---|---| ATMEL LOT NUMBER |---|---|---|---|---|---|---| H = Y = WW = 02C= M = @ = Material Set Seal Year Seal Week Device Voltage Indicator Country of Assembly BOTTOM MARK No Bottom Mark 13 8700D–SEEPR–8/10 Atmel AT24C02C-MAHM Top Mark |---|---|---| 0 2 C |---|---|---| H M @ |---|---|---| Y T C |---|---|---| * | PIN 1 INDICATOR (DOT) 02C= H = M = @ = Y = TC = Device Material Set Voltage Indicator Country of Assembly Year of Assembly Trace Code 2C M B U Device Voltage Indicator Write Protection Material Set Atmel AT24C02C-STUM Top Mark |---|---|---|---|---| 2 C M B U |---|---|---|---|---| * | PIN 1 INDICATOR (DOT) Line 1 --------> = = = = Bottom Mark |---|---|---|---| Y M T C |---|---|---|---| Y = One Digit Year Code M = Seal Month TC = Trace Code Atmel AT24C02C-CUM Top Mark Line 1 -------> 02CU Line 2 -------> YMTC |<--PIN 1 THIS CORNER 14 02C= U = Y = M = TC = Device Material Set One Digit Year Code Seal Month Trace Code Atmel AT24C02C 8700D–SEEPR–8/10 Atmel AT24C02C 11. Ordering Codes Atmel AT24C02C Ordering Information Ordering Code Voltage Package 1.7V to 5.5V 8P3 (NiPdAu Lead Finish) 1.7V to 5.5V 8S1 AT24C02C-SSHM-T(2) (NiPdAu Lead Finish) 1.7V to 5.5V 8S1 (NiPdAu Lead Finish) 1.7V to 5.5V 8A2 AT24C02C-XHM-T(2) (NiPdAu Lead Finish) 1.7V to 5.5V 8A2 AT24C02C-PUM (Bulk form only) AT24C02C-SSHM-B AT24C02C-XHM-B (1) (1) (2) 1.7V to 5.5V 8Y6 AT24C02C-STUM-T(2) 1.7V to 5.5V 5TS1 AT24C02C-CUM-T(2) 1.7V to 5.5V 8U3-1 AT24C02C-WWU11(3) 1.7V to 5.5V Die Sale AT24C02C-MAHM-T Notes: (NiPdAu Lead Finish) Operation Range Lead-free/Halogen-free/ Industrial Temperature (–40°C to 85°C) Industrial Temperature (–40°C to 85°C) 1. “-B” denotes bulk 2. “-T” denotes tape and reel. SOIC = 4K per reel. TSSOP, UDFN, SOT23, and VFBGA = 5K per reel 3. For Wafer sales, please contact Atmel Sales Package Type 8P3 8-lead, 0.300" Wide, Plastic Dual Inline Package (PDIP) 8S1 8-lead, 0.150" Wide, Plastic Gull Wing Small Outline (JEDEC SOIC) 8A2 8-lead, 4.4mm Body, Plastic Thin Shrink Small Outline Package (TSSOP) 8Y6 8-lead, 2.00mm x 3.00mm Body, 0.50mm Pitch, Dual No Lead Package (UDFN) 5TS1 5-lead, 2.90mm x 1.60mm Body, Plastic Thin Shrink Small Outline Package (SOT23) 8U3-1 8-ball, die Ball Grid Array Package (VFBGA) 15 8700D–SEEPR–8/10 12. Packaging Information 8P3 – PDIP E 1 E1 N Top View c eA End View D COMMON DIMENSIONS (Unit of Measure = inches) e D1 A2 A b2 b3 b 4 PLCS Side View L SYMBOL MAX NOM 0.210 NOTE 2 A2 0.115 0.130 0.195 b 0.014 0.018 0.022 5 b2 0.045 0.060 0.070 6 b3 0.030 0.039 0.045 6 c 0.008 0.010 0.014 D 0.355 0.365 0.400 D1 0.005 E 0.300 0.310 0.325 4 E1 0.240 0.250 0.280 3 3 3 e 0.100 BSC eA 0.300 BSC L Notes: MIN A 0.115 0.130 4 0.150 2 1. This drawing is for general information only; refer to JEDEC Drawing MS-001, Variation BA for additional information. 2. Dimensions A and L are measured with the package seated in JEDEC seating plane Gauge GS-3. 3. D, D1 and E1 dimensions do not include mold Flash or protrusions. Mold Flash or protrusions shall not exceed 0.010 inch. 4. E and eA measured with the leads constrained to be perpendicular to datum. 5. Pointed or rounded lead tips are preferred to ease insertion. 6. b2 and b3 maximum dimensions do not include Dambar protrusions. Dambar protrusions shall not exceed 0.010 (0.25mm). 07/19/10 TITLE Package Drawing Contact: 8P3, 8-lead, 0.300” Wide Body, Plastic Dual [email protected] In-line Package (PDIP) 16 GPC PTC DRAWING NO. 8P3 REV. C Atmel AT24C02C 8700D–SEEPR–8/10 Atmel AT24C02C 8S1 – JEDEC SOIC C 1 E E1 L N Ø TOP VIEW END VIEW e b A COMMON DIMENSIONS (Unit of Measure = mm) A1 D SIDE VIEW SYMBOL MIN A 1.35 – 1.75 A1 0.10 – 0.25 b 0.31 – 0.51 C 0.17 – 0.25 D 4.80 – 5.05 E1 3.81 – 3.99 E 5.79 – 6.20 e Notes: This drawing is for general information only. Refer to JEDEC Drawing MS-012, Variation AA for proper dimensions, tolerances, datums, etc. MAX NOM NOTE 1.27 BSC L 0.40 – 1.27 Ø 0° – 8° 5/19/10 TITLE Package Drawing Contact: 8S1, 8-lead (0.150” Wide Body), Plastic Gull [email protected] Wing Small Outline (JEDEC SOIC) GPC SWB DRAWING NO. 8S1 REV. F 17 8700D–SEEPR–8/10 8A2 – TSSOP 3 2 1 Pin 1 indicator this corner E1 E L1 N L Top View End View COMMON DIMENSIONS (Unit of Measure = mm) SYMBOL D A b A2 D NOTE 2.90 3.00 3.10 2, 5 4.50 3, 5 6.40 BSC 4.30 4.40 A – – 1.20 A2 0.80 1.00 1.05 b 0.19 – 0.30 L L1 4 0.65 BSC 0.45 0.60 0.75 1.00 REF 1. This drawing is for general information only. Refer to JEDEC Drawing MO-153, Variation AA, for proper dimensions, tolerances, datums, etc. 2. Dimension D does not include mold Flash, protrusions or gate burrs. Mold Flash, protrusions and gate burrs shall not exceed 0.15mm (0.006in) per side. 3. Dimension E1 does not include inter-lead Flash or protrusions. Inter-lead Flash and protrusions shall not exceed 0.25mm (0.010in) per side. 4. Dimension b does not include Dambar protrusion. Allowable Dambar protrusion shall be 0.08mm total in excess of the b dimension at maximum material condition. Dambar cannot be located on the lower radius of the foot. Minimum space between protrusion and adjacent lead is 0.07mm. 5. Dimension D and E1 to be determined at Datum Plane H. 5/19/10 TITLE Package Drawing Contact: 8A2, 8-lead 4.4mm Body, Plastic Thin [email protected] Shrink Small Outline Package (TSSOP) 18 MAX e Side View Notes: NOM E E1 e MIN GPC TNR DRAWING NO. 8A2 REV. E Atmel AT24C02C 8700D–SEEPR–8/10 Atmel AT24C02C 8Y6 - UDFN D2 A b (8X) E E2 Pin 1 Index Area Pin 1 ID L (8X) D A2 e (6X) A1 1.50 REF. A3 COMMON DIMENSIONS (Unit of Measure = mm) SYMBOL Notes: 1. This drawing is for general information only. Refer to JEDEC Drawing MO-229, for proper dimensions, tolerances, datums, etc. 2. Dimension b applies to metallized terminal and is measured between 0.15mm and 0.30mm from the terminal tip. If the terminal has the optional radius on the other end of the terminal, the dimension should not be measured in that radius area. 3. Soldering the large thermal pad is optional, but not recommended. No electrical connection is accomplished to the device through this pad, so if soldered it should be tied to ground MIN NOM MAX D 2.00 BSC E 3.00 BSC D2 1.40 1.50 1.60 E2 – – 1.40 A – – 0.60 A1 0.00 0.02 0.05 A2 – – 0.55 A3 L 0.20 REF 0.20 e b NOTE 0.40 0.30 0.50 BSC 0.20 0.25 0.30 2 11/21/08 TITLE 8Y6, 8-lead, 2.0x3.0mm Body, 0.50mm Pitch, Package Drawing Contact: [email protected] UltraThin Mini-MAP, Dual No Lead Package (Sawn)(UDFN) GPC YNZ DRAWING NO. REV. 8Y6 E 19 8700D–SEEPR–8/10 5TS1 – SOT23 e1 5 C 4 E1 CL E L1 1 3 2 End View Top View b A2 SEATING PLANE e A A1 COMMON DIMENSIONS (Unit of Measure = mm) D Side View SYMBOL Notes: 1. Dimensions D does not include mold flash, protrusions or gate burrs. Mold flash protrusions or gate burrs shall not exceed 0.15mm per end. Dimensions E1 does not include interlead flash or protrusion. Interlead flasg or protrusion shall not exceed 0.15mm per side. 2. The package top may be smaller than the package bottom. Dimensions D and E1 are deteremined at the outermost extremes of the plastic body exclusive of mold flash, tie bar burrs, gate burrs, and interlead flash, but including any mismatch between the top and bottom of the plastic body. 3. These dimensions apply to the flat section of the lead between 0.08mm and 0.15mm from the lead tip. 4. Dimension “b” does not include dambar protrusion. Allowable dambar protrusion shall be 0.80mm total in excess of the “b” dimension at maximum material condition. The dambar cannot be located on the lower radius of the foot. Minimum space between protrusion and an adjacent lead shall not be less than 0.07mm. 5. This drawing is for general information only. Refer to JEDEC Drawing MO-193, Variation AB for additional information. MIN NOM MAX A – – 1.10 A1 0.00 – 0.10 A2 0.70 0.90 1.00 c 0.08 – 0.20 NOTE 3 D 2.90 BSC 1, 2 E 2.80 BSC 1, 2 E1 1.60 BSC 1, 2 L1 0.60 REF e 0.95 BSC e1 1.90 BSC b 0.30 – 0.50 3, 4 11/05/08 TITLE 5TS1, 5-lead, 1.60mm Body, Plastic Thin Package Drawing Contact: [email protected] Shrink Small Outline Package (Shrink SOT) 20 GPC TSZ DRAWING NO. REV. 5TS1 B Atmel AT24C02C 8700D–SEEPR–8/10 Atmel AT24C02C 8U3-1 – VFBGA E D 5. PIN 1 BALL PAD CORNER b A1 A2 TOP VIEW A SIDE VIEW PIN 1 BALL PAD CORNER 1 2 4 3 d (d1) 8 6 7 5 COMMON DIMENSIONS (Unit of Measure - mm) e (e1) BOTTOM VIEW 8 SOLDER BALLS Notes: SYMBOL MIN NOM MAX A 0.73 0.79 0.85 A1 0.09 0.14 0.19 A2 0.40 0.45 0.50 b 0.20 0.25 0.30 1. This drawing is for general information only. D 1.50 BSC 2. Dimension ‘b’ is measured at maximum solder ball diameter. E 2.0 BSC 3. Solder ball composition shall be 95.5Sn-4.0Ag-.5Cu. e 0.50 BSC e1 0.25 REF d 1.00 BSC d1 0.25 REF NOTE 2 07/14/10 TITLE Package Drawing Contact: 8U3-1, 8-ball, 1.50 x 2.00mm Body, [email protected] 0.50 pitch, VFBGA Package (dBGA2) GPC GXU DRAWING NO. 8U3-1 REV. D 21 8700D–SEEPR–8/10 13. Revision History Doc. Rev. 8700D 22 Date Comments 08/2010 Changed AT24C02C-XHM Part Marking from C02CM@ to 02CM @ 8700C 07/2010 Ordering Information: - Changed Atmel AT24C02C-TSUM-T to Atmel AT24C02C-STUM-T - Changed Atmel AT24C02CY6-MAHM-T to Atmel AT24C02C-MAHM-T - Changed Atmel AT24C02CU3-CUM-T to Atmel AT24C02C-CUM-T Catalog Numbering Scheme, changed TS = SOT23 to ST = SOT23 Part Marking SOT23: - Changed 2CMWU to 2CMBU - Changed W = Write Protection Feature to B = Write Protection Part Marking PDIP and SOIC: Added @ = Country of Assembly Part Marking TSSOP: Replaced and removed bottom mark Part Marking UDFN: Added HM@ Remove Preliminary Status Changed tI Max 40 to 50 in Table AC Characteristics 8700B 02/2010 Corrected Catalog Numbering Scheme and Ordering Information 8700A 12/2009 Initial Document Release Atmel AT24C02C 8700D–SEEPR–8/10 Headquarters International Atmel Corporation 2325 Orchard Parkway San Jose, CA 95131 USA Tel: (+1) (408) 441-0311 Fax: (+1) (408) 487-2600 www.atmel.com Atmel Asia Limited Unit 01-5 & 16, 19F BEA Tower, Millennium City 5 418 Kwun Tong Road Kwun Tong, Kowloon HONG KONG Tel: (+852) 2245-6100 Fax: (+852) 2722-1369 Atmel Munich GmbH Business Campus Parkring 4 D-85748 Garching b. Munich GERMANY Tel: (+49) 89-31970-0 Fax: (+49) 89-3194621 Atmel Japan 9F, Tonetsu Shinkawa Bldg. 1-24-8 Shinkawa Chuo-ku, Tokyo 104-0033 JAPAN Tel: (+81) (3) 3523-3551 Fax: (+81) (3) 3523-7581 Sales Contact www.atmel.com/contacts Literature Requests www.atmel.com/literature Product Contact Technical Support [email protected] Disclaimer: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Atmel products. EXCEPT AS SET FORTH IN ATMEL’S TERMS AND CONDITIONS OF SALE LOCATED ON ATMEL’S WEB SITE, ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS, IMPLIED OR STATUTORY WARRANTY RELATING TO ITS PRODUCTS INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, CONSEQUENTIAL, PUNITIVE, SPECIAL OR INCIDENTAL DAMAGES (INCLUDING, WITHOUT LIMITATION, DAMAGES FOR LOSS OF PROFITS, BUSINESS INTERRUPTION, OR LOSS OF INFORMATION) ARISING OUT OF THE USE OR INABILITY TO USE THIS DOCUMENT, EVEN IF ATMEL HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. Atmel makes no representations or warranties with respect to the accuracy or completeness of the contents of this document and reserves the right to make changes to specifications and product descriptions at any time without notice. Atmel does not make any commitment to update the information contained herein. Unless specifically provided otherwise, Atmel products are not suitable for, and shall not be used in, automotive applications. Atmel’s products are not intended, authorized, or warranted for use as components in applications intended to support or sustain life. © 2010 Atmel Corporation. All rights reserved. Atmel ®, logo and combinations thereof, and others, are registered trademarks or trademarks of Atmel Corporation or its subsidiaries. Other terms and product names may be trademarks of others. 8700D–SEEPR–8/10