IRF IRLHS6276TR2PBF Hexfet power mosfet Datasheet

PD - 97570B
IRLHS6276PbF
HEXFET® Power MOSFET
20
V
VGS
±12
V
RDS(on) max
45
mΩ
'
D1
D1
*
D2
6
A
'
d
'
3.4
G1
S1
2mm x 2mm Dual PQFN
7
)(
(@Tc(Bottom) = 25°C)
mΩ
'
ID
62
*
(@VGS = 2.5V)
S2
G2
D2
7
)(
RDS(on) max
6
(@VGS = 4.5V)
:
,(
9
3
2
7
VDS
Applications
• Charge and discharge switch for battery application
• Load/System Switch
Features and Benefits
Features
Low RDSon (≤ 45mΩ)
Low Thermal Resistance to PCB (≤ 19°C/W)
Low Profile (≤ 1.0mm)
Industry-Standard Pinout
Compatible with Existing Surface Mount Techniques
RoHS Compliant Containing no Lead, no Bromide and no Halogen
Orderable part number Package Type
IRLHS6276TRPBF
IRLHS6276TR2PBF
PQFN Dual 2mm x 2mm
PQFN Dual 2mm x 2mm
results in
⇒
Resulting Benefits
Lower Conduction Losses
Enable better thermal dissipation
Increased Power Density
Multi-Vendor Compatibility
Easier Manufacturing
Environmentally Friendlier
Standard Pack
Form
Quantity
Tape and Reel
4000
Tape and Reel
400
Note
Absolute Maximum Ratings
Parameter
Max.
VDS
Drain-to-Source Voltage
20
VGS
Gate-to-Source Voltage
±12
ID @ TA = 25°C
Continuous Drain Current, VGS @ 4.5V
4.5
ID @ TA = 70°C
Continuous Drain Current, VGS @ 4.5V
3.6
ID @ TC(Bottom) = 25°C
Continuous Drain Current, VGS @ 4.5V
ID @ TC(Bottom) = 100°C
Continuous Drain Current, VGS @ 4.5V
ID @ TC(Bottom) = 25°C
IDM
Continuous Drain Current, VGS @ 4.5V (Package Limited)
Pulsed Drain Current
PD @TA = 25°C
Power Dissipation
c
PD @TC(Bottom) = 25°C
f
Power Dissipation f
TJ
Linear Derating Factor
Operating Junction and
TSTG
Storage Temperature Range
d
d
9.6d
6.1d
3.4d
V
A
40
1.5
f
Units
6.6
0.012
-55 to + 150
W
W/°C
°C
Notes  through † are on page 2
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1
07/19/11
IRLHS6276PbF
Static @ TJ = 25°C (unless otherwise specified)
Min.
Typ.
Drain-to-Source Breakdown Voltage
Parameter
20
–––
–––
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
–––
–––
9.3
33
–––
45
Gate Threshold Voltage
–––
0.5
46
0.8
62
1.1
Gate Threshold Voltage Coefficient
Drain-to-Source Leakage Current
–––
–––
–––
-3.8
–––
–––
–––
1.0
150
IGSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
–––
–––
–––
–––
100
-100
gfs
Qg
Qgs
Forward Transconductance
8.8
–––
–––
3.1
–––
–––
S
VDS = 10V, ID = 3.4A
VDS = 10V
Gate-to-Drain Charge
Gate Resistance
Turn-On Delay Time
Rise Time
–––
–––
0.22
1.3
–––
–––
nC
Qgd
VGS = 4.5V
ID = 3.4A (See Fig.17 & 18)
–––
–––
–––
4.0
4.4
9.3
–––
–––
–––
Ω
Turn-Off Delay Time
Fall Time
–––
–––
10
4.9
–––
–––
Input Capacitance
Output Capacitance
–––
–––
310
79
–––
–––
Reverse Transfer Capacitance
–––
49
–––
Min.
Typ.
BVDSS
ΔΒVDSS/ΔTJ
RDS(on)
VGS(th)
ΔVGS(th)
IDSS
RG
td(on)
tr
td(off)
tf
Ciss
Coss
Crss
h
Total Gate Charge
Gate-to-Source Charge
h
h
Max. Units
V
Conditions
VGS = 0V, ID = 250μA
mV/°C Reference to 25°C, ID = 1mA
VGS = 4.5V, ID = 3.4A
mΩ
VGS = 2.5V, ID = 3.4A
V
VDS = VGS, ID = 10μA
mV/°C
VDS = 16V, VGS = 0V
μA
VDS = 16V, VGS = 0V, TJ = 125°C
ed
ed
nA
ns
pF
VGS = 12V
VGS = -12V
d
d
VDD = 10V, VGS = 4.5V
ID = 3.4A
d
RG=1.8Ω
See Fig.15
VGS = 0V
VDS = 10V
ƒ = 1.0MHz
Diode Characteristics
Parameter
IS
Continuous Source Current
ISM
(Body Diode)
Pulsed Source Current
VSD
trr
Qrr
ton
–––
c
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Forward Turn-On Time
–––
Max. Units
d
9.6
–––
–––
40
–––
–––
–––
5.2
1.2
7.8
Conditions
D
MOSFET symbol
A
showing the
integral reverse
V
ns
p-n junction diode.
TJ = 25°C, IS = 3.4A , VGS = 0V
TJ = 25°C, IF = 3.4A , VDD = 10V
di/dt = 126A/μs
–––
5.0
7.5
nC
Time is dominated by parasitic Inductance
G
e
d
d
S
e
Thermal Resistance
RθJC (Bottom)
RθJC (Top)
RθJA
RθJA (<10s)
g
g
Junction-to-Case
Junction-to-Case
Junction-to-Ambient
Junction-to-Ambient
Parameter
f
f
Typ.
–––
–––
–––
–––
Max.
19
175
86
69
Units
°C/W
Notes:
 Repetitive rating; pulse width limited by max. junction temperature.
‚ Current limited by package.
ƒ Pulse width ≤ 400μs; duty cycle ≤ 2%.
„ When mounted on 1 inch square copper board.
Rθ is measured at T J of approximately 90°C.
† For DESIGN AID ONLY, not subject to production testing.
2
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IRLHS6276PbF
100
100
10
BOTTOM
1
1.4V
0.1
≤60μs PULSE WIDTH
TOP
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
TOP
VGS
10V
4.5V
3.0V
2.5V
2.0V
1.8V
1.5V
1.4V
10
BOTTOM
1
1.4V
≤60μs PULSE WIDTH
Tj = 25°C
Tj = 150°C
0.01
0.1
0.1
1
10
100
0.1
V DS, Drain-to-Source Voltage (V)
10
100
Fig 2. Typical Output Characteristics
100
1.6
10
T J = 150°C
1
T J = 25°C
VDS = 10V
≤60μs PULSE WIDTH
RDS(on) , Drain-to-Source On Resistance
(Normalized)
ID, Drain-to-Source Current (A)
1
V DS, Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
ID = 3.4A
VGS = 4.5V
1.4
1.2
1.0
0.8
0.6
0.1
0.0
1.0
2.0
3.0
4.0
5.0
-60 -40 -20 0
Fig 4. Normalized On-Resistance vs. Temperature
Fig 3. Typical Transfer Characteristics
10000
14.0
VGS = 0V,
f = 1 MHZ
C iss = C gs + C gd, C ds SHORTED
C rss = C gd
VGS, Gate-to-Source Voltage (V)
ID= 3.4A
C oss = C ds + C gd
1000
Ciss
Coss
100
Crss
10
12.0
VDS= 16V
VDS= 10V
10.0
VDS= 4.0V
8.0
6.0
4.0
2.0
0.0
1
10
100
VDS, Drain-to-Source Voltage (V)
Fig 5. Typical Capacitance vs.Drain-to-Source Voltage
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20 40 60 80 100 120 140 160
T J , Junction Temperature (°C)
VGS, Gate-to-Source Voltage (V)
C, Capacitance (pF)
VGS
10V
4.5V
3.0V
2.5V
2.0V
1.8V
1.5V
1.4V
0
2
4
6
8
10
QG, Total Gate Charge (nC)
Fig 6. Typical Gate Charge vs.Gate-to-Source Voltage
3
IRLHS6276PbF
100
10
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
100
T J = 150°C
T J = 25°C
1
OPERATION IN THIS AREA
LIMITED BY R DS(on)
10
100μsec
Limited by
Wire Bond
1
10msec
Tc = 25°C
Tj = 150°C
Single Pulse
VGS = 0V
0.1
DC
0.1
0.0
0.4
0.8
1.2
1.6
2.0
0
VSD, Source-to-Drain Voltage (V)
1
10
100
VDS, Drain-to-Source Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
1.2
9
VGS(th) , Gate threshold Voltage (V)
10
Limited By Package
8
ID, Drain Current (A)
1msec
7
6
5
4
3
2
1
1.0
0.8
ID = 25μA
0.6
0.4
0.2
0
25
50
75
100
125
-75 -50 -25
150
0
25
50
75 100 125 150
T J , Temperature ( °C )
T C , Case Temperature (°C)
Fig 9. Maximum Drain Current vs.
Case (Bottom) Temperature
Fig 10. Threshold Voltage vs. Temperature
Thermal Response ( Z thJC ) °C/W
100
10
D = 0.50
0.20
0.10
1
0.05
0.02
0.01
0.1
SINGLE PULSE
( THERMAL RESPONSE )
0.01
1E-006
1E-005
0.0001
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.001
0.01
0.1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case (Bottom)
4
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100
RDS(on), Drain-to -Source On Resistance ( mΩ)
RDS(on), Drain-to -Source On Resistance (m Ω)
IRLHS6276PbF
ID = 3.4A
80
60
T J = 125°C
40
TJ = 25°C
20
0
0
2
4
6
8
10
200
VGS = 2.5V
150
100
VGS = 4.5V
50
0
12
0
5
10
15
20
25
30
ID, Drain Current (A)
VGS, Gate -to -Source Voltage (V)
Fig 12. On-Resistance vs. Gate Voltage
Fig 13. Typical On-Resistance vs. Drain Current
60
1000
ID
TOP
0.89A
1.8A
BOTTOM 3.4A
50
800
Single Pulse Power (W)
EAS , Single Pulse Avalanche Energy (mJ)
250
40
30
20
600
400
200
10
0
25
50
75
100
125
0
1E-5
150
1E-4
Starting T J , Junction Temperature (°C)
Driver Gate Drive
-
‚
-
P.W.
P.W.
Period
D.U.T. ISD Waveform
Reverse
Recovery
Current
+
• dv/dt controlled by R G
• Driver same type as D.U.T.
• I SD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
D=
Period
*

RG
1E+0
VGS=10V
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
„
-
1E-1
Fig 15. Typical Power vs. Time
+
ƒ
+
1E-2
Time (sec)
Fig 14. Maximum Avalanche Energy vs. Drain Current
D.U.T
1E-3
V DD
+
-
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
VDD
Forward Drop
Inductor Curent
Ripple ≤ 5%
ISD
* VGS = 5V for Logic Level Devices
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Fig 16. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
5
IRLHS6276PbF
Id
Vds
Vgs
L
VCC
DUT
0
1K
Vgs(th)
S
Qgs1 Qgs2
Qgd
Qgodr
Fig 17b. Gate Charge Waveform
Fig 17a. Gate Charge Test Circuit
V(BR)DSS
15V
DRIVER
L
VDS
D.U.T
RG
+
V
- DD
IAS
20V
tp
A
I AS
0.01Ω
tp
Fig 18a. Unclamped Inductive Test Circuit
V DS
VGS
RG
RD
VDS
90%
D.U.T.
+
-V DD
V10V
GS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1
Fig 19a. Switching Time Test Circuit
6
Fig 18b. Unclamped Inductive Waveforms
10%
VGS
td(on)
tr
td(off)
tf
Fig 19b. Switching Time Waveforms
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IRLHS6276PbF
PQFN Dual 2x2 Outline Package Details
For footprint and stencil design recommendations, please refer to application note AN-1154 at
http://www.irf.com/technical-info/appnotes/an-1154.pdf
PQFN Dual 2x2 Outline Part Marking
Note: For the most current drawing please refer to IR website at: http://www.irf.com/package/
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7
IRLHS6276PbF
PQFN Dual 2x2 Outline Tape and Reel
8
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IRLHS6276PbF
Qualification information†
Qualification level
Moisture Sensitivity Level
RoHS compliant
†
††
†††
Cons umer
(per JE DE C JE S D47F
PQFN Dual 2mm x 2mm
††
†††
guidelines )
MS L1
†††
(per JE DE C J-S T D-020D
Yes
)
Qualification standards can be found at International Rectifier’s web site
http://www.irf.com/product-info/reliability
Higher qualification ratings may be available should the user have such requirements.
Please contact your International Rectifier sales representative for further information:
http://www.irf.com/whoto-call/salesrep/
Applicable version of JEDEC standard at the time of product release.
Data and specifications subject to change without notice.
IR WORLD HEADQUARTERS: 101 N. Sepulveda Blvd., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 07/11
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