Philips Semiconductors FAST Products Product specification Dual 4-input NAND buffer 74F40 TYPE TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT (TOTAL) 74F40 3.5ns 6mA PIN CONFIGURATION D0a 1 14 VCC D0b 2 13 D1d NC 3 12 D1c D0c 4 11 NC D0d 5 10 D1b Q0 6 9 D1a GND 7 8 Q1 ORDERING INFORMATION COMMERCIAL RANGE VCC = 5V ±10%, Tamb = 0°C to +70°C DESCRIPTION 14-pin plastic DIP N74F40N 14-pin plastic SO N74F40D SF00065 INPUT AND OUTPUT LOADING AND FAN OUT TABLE PINS DESCRIPTION Dna, Dnb, Dnc, Dnd 74F (U.L.) HIGH/LOW LOAD VALUE HIGH/LOW 1.0/2.0 20µA/1.2mA 750/106.7 15mA/64mA Data inputs Q0, Q1 Data outputs NOTE: One (1.0) FAST unit load is defined as: 20µA in the High state and 0.6mA in the Low state. LOGIC DIAGRAM FUNCTION TABLE INPUTS 1 D0a 2 D0b 6 4 D0c Q0 5 D0d 9 D1a 8 12 D1c Q1 13 D1d Dnb Dnc Dnd Qn L X X X H X L X X H X X L X H X X X X H H H L H H NOTES: 1. H = High voltage level 2. L = Low voltage level 3. X = Don’t care 10 D1b OUTPUT Dna VCC = Pin 14 GND = Pin 7 NC = Pin 3, 11 SF00081 LOGIC SYMBOL IEC/IEEE SYMBOL 1 1 2 4 5 9 10 12 & 13 2 6 4 5 D0a D0b D0c D0d D1a D1b D1c D1d 9 Q0 Q1 10 8 12 6 8 13 VCC = Pin 14 GND = Pin 7 NC = Pin 3, 11 SF00083 SF00082 April 11, 1989 1 853–0053 96314 Philips Semiconductors FAST Products Product specification Dual 4-input NAND buffer 74F40 ABSOLUTE MAXIMUM RATINGS (Operation beyond the limits set forth in this table may impair the useful life of the device. Unless otherwise noted these limits are over the operating free-air temperature range.) SYMBOL PARAMETER RATING UNIT VCC Supply voltage –0.5 to +7.0 V VIN Input voltage –0.5 to +7.0 V IIN Input current –30 to +5 mA VOUT Voltage applied to output in High output state –0.5 to VCC V IOUT Current applied to output in Low output state Tamb Operating free-air temperature range Tstg Storage temperature range 128 mA 0 to +70 °C –65 to +150 °C RECOMMENDED OPERATING CONDITIONS LIMITS SYMBOL PARAMETER UNIT MIN NOM MAX 5.0 5.5 VCC Supply voltage 4.5 V VIH High-level input voltage 2.0 VIL Low-level input voltage 0.8 V IIK Input clamp current –18 mA IOH High-level output current –15 mA IOL Low-level output current 64 mA Tamb Operating free-air temperature range +70 °C V 0 DC ELECTRICAL CHARACTERISTICS (Over recommended operating free-air temperature range unless otherwise noted.) SYMBOL VOH LIMITS TEST CONDITIONS1 PARAMETER IOH = –1mA VCC = MIN, VIL = MAX, VIH = MIN High-level output voltage IOH = –15mA VCC = MIN, VIL = MAX, VIH = MIN VOL Low-level output voltage VIK Input clamp voltage VCC = MIN, II = IIK II Input current at maximum input voltage IIH High-level input current IIL Low-level input current VCC = MAX, VI = 0.5V IOS Short-circuit output current3 VCC = MAX ICC Supply current (total) ICCH ICCL IOL = MAX MIN ±10%VCC 2.5 ±5%VCC 2.7 ±10%VCC 2.0 ±5%VCC 2.0 TYP2 MAX UNIT V 3.4 V ±10%VCC 0.55 V ±5%VCC 0.42 0.55 –0.73 –1.2 V VCC = MAX, VI = 7.0V 100 µA VCC = MAX, VI = 2.7V 20 µA –0.6 mA –225 mA –100 VCC = MAX VIN = GND 1.75 4.0 VIN = 4.5V 11 17 mA NOTES: 1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type. 2. All typical values are at VCC = 5V, Tamb = 25°C. 3. Not more than one output should be shorted at a time. For testing IOS, the use of high-speed test apparatus and/or sample-and-hold techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any sequence of parameter tests, IOS tests should be performed last. April 11, 1989 2 Philips Semiconductors FAST Products Product specification Dual 4-input NAND buffer 74F40 AC ELECTRICAL CHARACTERISTICS LIMITS SYMBOL tPLH tPHL TEST CONDITION PARAMETER Propagation delay Dna, Dnb, Dnc, Dnd to Qn VCC = +5.0V ± 10% Tamb = 0°C to +70°C CL = 50pF, RL = 500Ω VCC = +5.0V Tamb = +25°C CL = 50pF, RL = 500Ω Waveform 1 MIN TYP MAX MIN MAX 2.0 1.5 4.0 3.0 6.0 5.0 1.5 1.0 7.0 5.5 UNIT ns AC WAVEFORMS Dna, Dnb, Dnc, Dnd VM VM tPHL tPLH VM Qn VM SF00069 Waveform 1. Propagation Delay for Inverting Outputs NOTE: For all waveforms, VM = 1.5V. TEST CIRCUIT AND WAVEFORMS VCC VIN tw 90% NEGATIVE PULSE 10% D.U.T. RT CL RL AMP (V) VM VM VOUT PULSE GENERATOR 90% 10% tTHL (tf ) tTLH (tr ) tTLH (tr ) tTHL (tf ) 0V AMP (V) 90% POSITIVE PULSE VM VM 10% Test Circuit for Totem-Pole Outputs DEFINITIONS: RL = Load resistor; see AC electrical characteristics for value. CL = Load capacitance includes jig and probe capacitance; see AC electrical characteristics for value. RT = Termination resistance should be equal to ZOUT of pulse generators. 90% 10% tw 0V Input Pulse Definition INPUT PULSE REQUIREMENTS family amplitude VM 74F 3.0V 1.5V rep. rate tw tTLH tTHL 1MHz 500ns 2.5ns 2.5ns SF00006 April 11, 1989 3