Maxim MAX16821AATI+ High-power synchronous hbled drivers with rapid current pulsing Datasheet

19-0881; Rev 2; 1/10
KIT
ATION
EVALU
E
L
B
AVAILA
High-Power Synchronous HBLED
Drivers with Rapid Current Pulsing
The MAX16821A/MAX16821B/MAX16821C pulsewidth-modulation (PWM) LED driver controllers provide
high output-current capability in a compact package
with a minimum number of external components. The
MAX16821A/MAX16821B/MAX16821C are suitable for
use in synchronous and nonsynchronous step-down
(buck), boost, buck-boost, SEPIC, and Cuk LED drivers. A
logic input (MODE) allows the devices to switch between
synchronous buck and boost modes of operation. These
devices are the first high-power drivers designed specifically to accommodate common-anode HBLEDs.
The ICs offer average current-mode control that enable
the use of MOSFETs with optimal charge and on-resistance figure of merit, thus minimizing the need for
external heatsinking even when delivering up to 30A of
LED current.
The differential sensing scheme provides accurate control of the LED current. The ICs operate from a 4.75V to
5.5V supply range with the internal regulator disabled
(VCC connected to IN). These devices operate from a
7V to 28V input supply voltage with the internal regulator enabled.
The MAX16821A/MAX16821B/MAX16821C feature a
clock output with 180° phase delay to control a second
out-of-phase LED driver to reduce input and output filter capacitor size and to minimize ripple currents. The
wide switching frequency range (125kHz to 1.5MHz)
allows the use of small inductors and capacitors.
Additional features include programmable overvoltage
protection and an output enable function.
Features
♦
♦
♦
♦
♦
♦
♦
♦
♦
♦
♦
♦
♦
Up to 30A Output Current
True-Differential Remote Output Sensing
Average Current-Mode Control
4.75V to 5.5V or 7V to 28V Input-Voltage Range
0.1V/0.03V LED Current-Sense Options Maximize
Efficiency (MAX16821B/MAX16821C)
Thermal Shutdown
Nonlatching Output Overvoltage Protection
Low-Side Buck Mode with or without
Synchronous Rectification
High-Side Buck and Low-Side Boost Mode with or
without Synchronous Rectification
125kHz to 1.5MHz Programmable/Synchronizable
Switching Frequency
Integrated 4A Gate Drivers
Clock Output for 180° Out-of-Phase Operation for
Second Driver
-40°C to +125°C Operating Temperature Range
Ordering Information
TEMP RANGE
MAX16821AATI+
-40°C to +125°C
28 TQFN-EP*
MAX16821BATI+
-40°C to +125°C
28 TQFN-EP*
MAX16821CATI+
-40°C to +125°C
28 TQFN-EP*
+Denotes a lead(Pb)-free/RoHS-compliant package.
*EP = Exposed pad.
Simplified Diagram
7V TO 28V
Applications
Front Projectors/Rear Projection TVs
Portable and Pocket Projectors
PINPACKAGE
PART
C1
IN
EN
DH
Q1
Automotive Exterior Lighting
LCD TVs and Display Backlight
I.C.
Automotive Emergency Lighting and Signage
VLED
L1
MAX16821
DL
Q2
C2
Q3
OVI
CSP
CLP
PGND
R1
Typical Operating Circuit and Selector Guide appear at end
of data sheet.
.
HIGH-FREQUENCY
PULSE TRAIN
________________________________________________________________ Maxim Integrated Products
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
1
MAX16821A/MAX16821B/MAX16821C
General Description
MAX16821A/MAX16821B/MAX16821C
High-Power Synchronous HBLED
Drivers with Rapid Current Pulsing
ABSOLUTE MAXIMUM RATINGS
All Other Pins to SGND...............................-0.3V to (VCC + 0.3V)
Continuous Power Dissipation (TA = +70°C)
28-Pin TQFN 5mm x 5mm (derate 34.5mW/°C
above +70°C) ............................................................2758mW
Operating Temperature Range .........................-40°C to +125°C
Junction Temperature ......................................................+150°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
IN to SGND.............................................................-0.3V to +30V
BST to SGND..........................................................-0.3V to +35V
BST to LX..................................................................-0.3V to +6V
DH to LX ...........................................-0.3V to (VBST - VLX) + 0.3V
DL to PGND................................................-0.3V to (VDD + 0.3V)
VCC to SGND............................................................-0.3V to +6V
VCC, VDD to PGND ...................................................-0.3V to +6V
SGND to PGND .....................................................-0.3V to +0.3V
VCC Current ......................................................................300mA
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VCC = 5V, VDD = VCC, TA = TJ = -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1)
PARAMETER
SYMBOL
Input-Voltage Range
VIN
Quiescent Supply Current
IQ
CONDITIONS
Internal LDO on
Internal LDO off (VCC connected to VIN)
MIN
TYP
MAX
7
28
4.75
5.50
VEN = VCC or SGND, no switching
2.7
5.5
UNITS
V
mA
LED CURRENT REGULATOR
Differential Set Value
(VSENSE+ to VSENSE-) (Note 2)
Soft-Start Time
VIN = VCC = 4.75V to 5.5V, fSW = 500kHz
(MAX16821A)
0.594
0.600
0.606
VIN = 7V to 28V, fSW = 500kHz
(MAX16821A)
0.594
0.600
0.606
VIN = VCC = 4.75V to 5.5V, fSW = 500kHz
(MAX16821B)
0.098
0.100
0.102
V
VIN = 7V to 28V, fSW = 500kHz
(MAX16821B)
0.098
0.100
0.102
VIN = VCC = 4.75V to 5.5V, fSW = 500kHz
(MAX16821C)
0.028
0.030
0.032
VIN = 7V to 28V, fSW = 500kHz
(MAX16821C)
0.028
0.030
0.032
tSS
Clock
Cycles
1024
STARTUP/INTERNAL REGULATOR
VCC Undervoltage Lockout (UVLO)
UVLO
VCC rising
UVLO Hysteresis
VCC falling
VCC Output Voltage
VIN = 7V to 28V, ISOURCE = 0 to 60mA
4.1
4.3
4.5
200
4.85
V
mV
5.10
5.30
V
1.1
3
Ω
MOSFET DRIVER
Output Driver Impedance
Output Driver Source/Sink Current
Nonoverlap Time
2
Low or high output, ISOURCE/SINK = 20mA
IDH, IDL
tNO
CDH/DL = 5nF
4
A
35
ns
_______________________________________________________________________________________
High-Power Synchronous HBLED
Drivers with Rapid Current Pulsing
(VCC = 5V, VDD = VCC, TA = TJ = -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
1500
kHz
OSCILLATOR
Switching Frequency Range
Switching Frequency
125
fSW
Switching Frequency Accuracy
CLKOUT Phase Shift with
Respect to DH (Rising Edges)
RT = 500kΩ
120
125
130
RT = 120kΩ
495
521
547
RT = 39.9kΩ
1515
1620
1725
120kΩ < RT ≤ 500kΩ
-5
+5
40kΩ ≤ RT ≤ 120kΩ
-8
+8
fSW = 125kHz, MODE connected to SGND
kHz
%
180
Degrees
CLKOUT Phase Shift with
Respect to DL (Rising Edges)
fSW = 125kHz, MODE connected to VCC
CLKOUT Output-Voltage Low
VOL
ISINK = 2mA
CLKOUT Output-Voltage High
VOH
ISOURCE = 2mA
SYNC Input High Pulse Width
180
0.4
V
4.5
V
tSYNC
200
ns
SYNC Input Clock High Threshold
VSYNCH
2
SYNC Input Clock Low Threshold
VSYNCL
SYNC Pullup Current
ISYNC_OUT
SYNC Power-Off Level
VSYNC_OFF
VRT/SYNC = 0V
V
250
0.4
V
500
µA
0.4
V
33.0
mV
INDUCTOR CURRENT LIMIT
Average Current-Limit Threshold
VCL
CSP to CSN
Reverse Current-Limit Threshold
VCLR
CSP to CSN
-2.0
mV
CSP to CSN
60
mV
VCSP to VCSN = 75mV
260
ns
4
kΩ
Cycle-by-Cycle Current Limit
Cycle-by-Cycle Overload
26.4
27.5
CURRENT-SENSE AMPLIFIER
CSP to CSN Input Resistance
Common-Mode Range
Input Offset Voltage
Amplifier Voltage Gain
3dB Bandwidth
RCS
VCMR(CS)
VIN = 7V to 28V
0
5.5
V
VOS(CS)
0.1
mV
AV(CS)
34.5
V/V
f3dB
4
MHz
gm
550
µS
AVL(CE)
50
dB
CURRENT-ERROR AMPLIFIER (TRANSCONDUCTANCE AMPLIFIER)
Transconductance
Open-Loop Gain
_______________________________________________________________________________________
3
MAX16821A/MAX16821B/MAX16821C
ELECTRICAL CHARACTERISTICS (continued)
MAX16821A/MAX16821B/MAX16821C
High-Power Synchronous HBLED
Drivers with Rapid Current Pulsing
ELECTRICAL CHARACTERISTICS (continued)
(VCC = 5V, VDD = VCC, TA = TJ = -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
1.0
V
LED CURRENT SIGNAL DIFFERENTIAL VOLTAGE AMPLIFIER (DIFF)
Common-Mode Voltage Range
DIFF Output Voltage
Input Offset Voltage
Amplifier Voltage Gain
3dB Bandwidth
SENSE+ to SENSE- Input
Resistance
VCMR(DIFF)
VCM
VOS(DIFF)
AV(DIFF)
f3dB
RVS
0
VSENSE+ = VSENSE- = 0V
0.6
V
MAX16821A
-3.7
+3.7
MAX16821B/MAX16821C
-1.5
+1.5
MAX16821A
0.992
1
MAX16821B
5.85
6
6.1
MAX16821C
18.5
20
21.5
MAX16821A, CDIFF = 20pF
1.7
MAX16821B, CDIFF = 20pF
1600
MAX16821C, CDIFF = 20pF
550
MAX16821A
50
100
MAX16821B
30
60
MAX16821C
10
20
mV
1.008
V/V
MHz
kHz
kΩ
OUTV AMPLIFIER
Gain-Bandwidth Product
VOUTV = 2V
3dB Bandwidth
VOUTV = 2V
4
MHz
1
MHz
Output Sink Current
30
µA
Output Source Current
80
µA
Maximum Load Capacitance
50
OUTV to (CSP - CSN) Transfer
Function
4mV ≤ CSP - CSN ≤ 32mV
132.5
Input Offset Voltage
135
pF
137.7
V/V
1
mV
70
dB
VOLTAGE-ERROR AMPLIFIER (EAOUT)
Open-Loop Gain
AVOLEA
Unity-Gain Bandwidth
fGBW
EAN Input Bias Current
IB(EA)
Error Amplifier Output Clamping
Voltage
VCLAMP(EA)
3
MHz
VEAN = 2V
-0.2
+0.03
+0.2
µA
With respect to VCM
905
930
940
mV
INPUTS (MODE AND OVI)
MODE Input-Voltage High
2
V
MODE Input-Voltage Low
MODE Pulldown Current
OVI Trip Threshold
OVPTH
OVI Hysteresis
OVIHYS
OVI Input Bias Current
4
IOVI
VOVI = 1V
0.8
V
4
5
6
µA
1.244
1.276
1.308
V
200
mV
0.2
µA
_______________________________________________________________________________________
High-Power Synchronous HBLED
Drivers with Rapid Current Pulsing
(VCC = 5V, VDD = VCC, TA = TJ = -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
2.437
2.5
2.562
V
16.5
µA
ENABLE INPUT (EN)
EN Input-Voltage High
EN rising
EN Input Hysteresis
0.28
EN Pullup Current
IEN
13.5
15
V
THERMAL SHUTDOWN
Thermal Shutdown
165
°C
Thermal-Shutdown Hysteresis
20
°C
Note 1: All devices are 100% production tested at +25°C. Limits over temperature are guaranteed by design.
Note 2: Does not include an error due to finite error amplifier gain. See the Voltage-Error Amplifier section.
Typical Operating Characteristics
(VIN = 12V, VDD = VCC = 5V, TA = +25°C, unless otherwise noted.)
SUPPLY CURRENT (IQ) vs. FREQUENCY
VIN = 24V
6
5
VIN = 12V
4
VIN = 5V
3
2
55
500
700
VIN = 24V
5.1
VIN = 12V
5.0
4.9
50
900 1100 1300 1500
VIN = 7V
4.8
4.7
VIN = 12V
CDH/DL = 22nF
40
300
5.3
5.2
45
-40
-15
10
35
60
4.6
4.5
85
0
15 30 45 60 75 90 105 120 135 150
FREQUENCY (kHz)
TEMPERATURE (°C)
VCC LOAD CURRENT (mA)
DRIVER RISE TIME
vs. DRIVER LOAD CAPACITANCE
DRIVER FALL TIME
vs. DRIVER LOAD CAPACITANCE
HIGH-SIDE DRIVER (DH) SINK
AND SOURCE CURRENT
100
MAX16821A toc04
200
180
160
MAX16821A toc06
MAX16821A toc05
100
5.4
60
1
0
MAX16821A toc03
65
VCC (V)
7
5.5
MAX16821A toc02
SUPPLY CURRENT (mA)
8
SUPPLY CURRENT (mA)
EXTERNAL CLOCK
NO DRIVER LOAD
9
VCC LOAD REGULATION vs. VIN
SUPPLY CURRENT vs. TEMPERATURE
70
MAX16821A toc01
10
80
CLOAD = 22nF
VIN = 12V
120
fF (ns)
tR (ns)
140
100
80
60
2A/div
40
DL
DH
60
DH
40
20
DL
20
0
0
0
5
10
15
LOAD CAPACITANCE (nF)
20
25
0
5
10
15
20
25
100ns/div
LOAD CAPACITANCE (nF)
_______________________________________________________________________________________
5
MAX16821A/MAX16821B/MAX16821C
ELECTRICAL CHARACTERISTICS (continued)
Typical Operating Characteristics (continued)
(VIN = 12V, VDD = VCC = 5V, TA = +25°C, unless otherwise noted.)
LOW-SIDE DRIVER (DL) SINK
AND SOURCE CURRENT
HIGH-SIDE DRIVER (DH) FALL TIME
HIGH-SIDE DRIVER (DH) RISE TIME
MAX16821A toc09
MAX16821A toc08
MAX16821A toc07
CLOAD = 22nF
VIN = 12V
VIN = 12V
DH RISING
2V/div
2V/div
3A/div
40ns/div
40ns/div
100ns/div
LOW-SIDE DRIVER (DL) FALL TIME
LOW-SIDE DRIVER (DL) RISE TIME
FREQUENCY vs. RT
MAX16821A toc11
MAX16821A toc10
CLOAD = 22nF
VIN = 12V
10,000
CLOAD = 22nF
VIN = 12V
fSW (kHz)
VIN = 12V
2V/div
2V/div
MAX16821A toc12
CLOAD = 22nF
VIN = 12V
1000
100
40ns/div
40ns/div
30 70 110 150 190 230 270 310 350 390 430 470 510 550
RT (kΩ)
FREQUENCY vs. TEMPERATURE
SYNC, CLKOUT, AND DH WAVEFORMS
SYNC, CLKOUT, AND DL WAVEFORMS
MAX16821A toc14
MAX16821A toc13
260
VIN = 12V
258
256
MAX16821A toc15
RT/SYNC
5V/div
0V
254
fSW (kHz)
MAX16821A/MAX16821B/MAX16821C
High-Power Synchronous HBLED
Drivers with Rapid Current Pulsing
RT/SYNC
5V/div
0V
MODE = SGND
252
250
248
MODE = VCC
CLKOUT
5V/div
0V
CLKOUT
5V/div
0V
DH
5V/div
0V
DL
5V/div
0V
246
244
242
240
0
5
10
15
20
25
30
35
1µs/div
1µs/div
TEMPERATURE (°C)
6
_______________________________________________________________________________________
High-Power Synchronous HBLED
Drivers with Rapid Current Pulsing
PIN
NAME
1
PGND
FUNCTION
2, 7
N.C.
3
DL
Low-Side Gate-Driver Output
4
BST
Boost-Flying Capacitor Connection. Reservoir capacitor connection for the high-side MOSFET driver
supply. Connect a ceramic capacitor between BST and LX.
5
LX
6
DH
Power-Supply Ground
No Connection. Not internally connected.
High-Side MOSFET Source Connection
High-Side Gate-Driver Output
Signal Ground. SGND is the ground connection for the internal control circuitry. Connect SGND and PGND
together at one point near the IC.
8, 22, 25
SGND
9
CLKOUT
10
MODE
11
EN
12
RT/SYNC
13
OUTV
14
I.C.
Internally Connected. Connect to SGND for proper operation.
15
OVI
Overvoltage Protection. When OVI exceeds the programmed output voltage by 12.7%, the low-side and
the high-side drivers are turned off. When OVI falls 20% below the programmed output voltage, the drivers
are turned on after power-on reset and soft-start cycles are completed.
16
CLP
Current-Error-Amplifier Output. Compensate the current loop by connecting an RC network to ground.
17
EAOUT
18
EAN
Voltage-Error-Amplifier Inverting Input
19
DIFF
Differential Remote-Sense Amplifier Output. DIFF is the output of a precision amplifier with SENSE+ and
SENSE- as inputs.
20
CSN
Current-Sense Differential Amplifier Negative Input. The differential voltage between CSN and CSP is
amplified internally by the current-sense amplifier (Gain = 34.5) to measure the inductor current.
21
CSP
Current-Sense Differential Amplifier Positive Input. The differential voltage between CSP and CSN is
amplified internally by the current-sense amplifier (Gain = 34.5) to measure the inductor current.
23
SENSE-
Differential LED Current-Sensing Negative Input. Connect SENSE- to the negative side of the LED currentsense resistor or to the negative feedback point.
24
SENSE+
Differential LED Current-Sensing Positive Input. Connect SENSE+ to the positive side of the LED currentsense resistor, or to the positive feedback point.
26
IN
27
VCC
Internal +5V Regulator Output. VCC is derived from VIN. Bypass VCC to SGND with 4.7µF and 0.1µF
ceramic capacitors.
28
VDD
Low-Side Driver Supply Voltage
—
EP
Oscillator Output. If MODE is low, the rising edge of CLKOUT phase shifts from the rising edge of DH by
180°. If MODE is high, the rising edge of CLKOUT phase shifts from the rising edge of DL by 180°.
Buck/Boost Mode Selection Input. Drive MODE low for low-side buck mode operation. Drive MODE high for
boost or high-side buck mode operation. MODE has an internal 5µA pulldown current to ground.
Output Enable. Drives EN high or leave unconnected for normal operation. Drive EN low to shut down the
power drivers. EN has an internal 15µA pullup current.
Switching Frequency Programming. Connect a resistor from RT/SYNC to SGND to set the internal oscillator
frequency. Drive RT/SYNC to synchronize the switching frequency with an external clock.
Inductor Current-Sense Output. OUTV is an amplifier output voltage proportional to the inductor current.
The voltage at OUTV = 135 x (VCSP - VCSN).
Voltage-Error-Amplifier Output. Connect EAOUT to the external gain-setting network.
Supply Voltage Input. Connect IN to VCC, for a 4.75V to 5.5V input supply range.
Exposed Pad. EP is internally connected to SGND. Connect EP to a large-area ground plane for effective
power dissipation. Connect EP to SGND. Do not use as a ground connection.
_______________________________________________________________________________________
7
MAX16821A/MAX16821B/MAX16821C
Pin Description
MAX16821A/MAX16821B/MAX16821C
High-Power Synchronous HBLED
Drivers with Rapid Current Pulsing
Detailed Description
The MAX16821A/MAX16821B/MAX16821C are high-performance average current-mode PWM controllers for
high-power and high-brightness LEDs (HBLEDs). The
average current-mode control technique offers inherently
stable operation, reduces component derating and size
by accurately controlling the inductor current. The
devices achieve high efficiency at high currents (up to
30A) with a minimum number of external components. A
logic input (MODE) allows the LED driver to switch
between buck and boost modes of operation.
The MAX16821A/MAX16821B/MAX16821C feature a
CLKOUT output 180° out-of-phase with respect to either
the high-side or low-side driver, depending on MODE’s
logic level. CLKOUT provides the drive for a second
out-of-phase LED driver for applications requiring
reduced input capacitor ripple current while operating
another LED driver.
The MAX16821A/MAX16821B/MAX16821C consist of
an inner average current regulation loop controlled by
an outer loop. The combined action of the inner current
loop and outer voltage loop corrects the LED current
errors by adjusting the inductor current resulting in a
tightly regulated LED current. The differential amplifier
(SENSE+ and SENSE- inputs) senses the LED current
using a resistor in series with the LEDs and produces
an amplified version of the sense voltage at DIFF. The
resulting amplified sensed voltage is compared against
an internal 0.6V reference at the error amplifier input.
Input Voltage
The MAX16821A/MAX16821B/MAX16821C operate
with a 4.75V to 5.5V input supply range when the internal LDO is disabled (VCC connected to IN) or a 7V to
28V input supply range when the internal LDO is
enabled. For a 7V to 28V input voltage range, the internal LDO provides a regulated 5V output with 60mA of
sourcing capability. Bypass VCC to SGND with 4.7µF
and 0.1µF low-ESR ceramic capacitors.
The MAX16821A/MAX16821B/MAX16821C’s VDD input
provides supply voltage for the low-side and the highside MOSFET drivers. Connect VDD to VCC using an
R-C filter to isolate the analog circuits from the MOSFET
drivers. The internal LDO powers up the MAX16821A/
MAX16821B/MAX16821C. For applications utilizing a
5V input voltage, disable the internal LDO by connecting IN and VCC together. The 5V power source must be
in the 4.75V to 5.5V range of for proper operation of the
MAX16821A/MAX16821B/MAX16821C.
8
Undervoltage Lockout (UVLO)
The MAX16821A/MAX16821B/MAX16821C include
UVLO and a 2048 clock-cycle power-on-reset circuit.
The UVLO rising threshold is set to 4.3V with 200mV
hysteresis. Hysteresis at UVLO eliminates chattering
during startup. Most of the internal circuitry, including
the oscillator, turns on when the input voltage reaches
4V. The MAX16821A/MAX16821B/MAX16821C draw up
to 3.5mA of quiescent current before the input voltage
reaches the UVLO threshold.
Soft-Start
The MAX16821A/MAX16821B/MAX16821C include an
internal soft-start for a glitch-free rise of the output voltage. After 2048 power-on-reset clock cycles, a 0.6V
reference voltage connected to the positive input of the
internal error amplifier ramps up to its final value after
1024 clock cycles. Soft-start reduces inrush current
and stress on system components. During soft-start,
the LED current will ramp monotonically towards its
final value.
Internal Oscillator
The internal oscillator generates a clock with the frequency inversely proportional to the value of RT (see
the Typical Operating Circuit). The oscillator frequency
is adjustable from 125kHz to 1.5MHz range using a single resistor connected from RT/SYNC to SGND. The
frequency accuracy avoids the overdesign, size, and
cost of passive filter components like inductors and
capacitors. Use the following equation to calculate the
oscillator frequency:
For 120kΩ ≤ RT ≤ 500kΩ:
fSW =
6.25 x 1010
(Hz)
RT
For 40kΩ ≤ RT ≤ 120kΩ:
fSW =
6.40 x 1010
(Hz)
RT
The oscillator also generates a 2VP-P ramp signal for
the PWM comparator and a 180° out-of-phase clock
signal at CLKOUT to drive a second out-of-phase LED
current regulator.
_______________________________________________________________________________________
High-Power Synchronous HBLED
Drivers with Rapid Current Pulsing
MAX16821A/MAX16821B/MAX16821C
VCC
EN
0.5 x VCC
UVLO
POR
TEMP SEN
+5V LDO
IN
VCC
TO INTERNAL CIRCUIT
I.C.
CLP
CSP
AV = 34.5
CSN
VCM
AV = 4
gm
VCLAMP LOW
OUTV
BST
VCLAMP HIGH
PWM
COMPARATOR
CLK
RT/SYNC
S
OSCILLATOR
Q
DH
MUX
R
Q
LX
VDD
DL
PGND
2 x fS
RAMP
GENERATOR
CLKOUT
VTH
DIFF
VCM
SENSEDIFF
AMP
SENSE+
MODE
EAOUT
EAN
ERROR
AMP
VREF = 0.6V
0.12 x VREF
OVP
COMPARATOR
SOFTSTART
ENABLE
MAX16821A
MAX16821B
MAX16821C
UVLO
VCM
OVI
SGND
Figure 1. Internal Block Diagram
_______________________________________________________________________________________
9
MAX16821A/MAX16821B/MAX16821C
High-Power Synchronous HBLED
Drivers with Rapid Current Pulsing
Synchronization
MAX16821C outer LED-current control loop consists of
a differential amplifier (DIFF), a reference voltage, and
a voltage-error amplifier (VEA).
The MAX16821A/MAX16821B/MAX16821C synchronize
to an external clock connected to RT/SYNC. The application of an external clock at RT/SYNC disables the
internal oscillator. Once the MAX16821A/MAX16821B/
MAX16821C are synchronized to an external clock, the
external clock cannot be removed if reliable operation
is to be maintained.
Inductor Current-Sense Amplifier
The differential current-sense amplifier (CSA) provides a
34.5V/V DC gain. The typical input offset voltage of the
current-sense amplifier is 0.1mV with a 0 to 5.5V commonmode voltage range (VIN = 7V to 28V). The current-sense
amplifier senses the voltage across RS. The maximum
common-mode voltage is 3.2V when VIN = 5V.
Control Loop
The MAX16821A/MAX16821B/MAX16821C use an
average current-mode control scheme to regulate the
output current (Figure 2). The main control loop consists of an inner current regulation loop for controlling
the inductor current and an outer current regulation
loop for regulating the LED current. The inner current
regulation loop absorbs the double pole of the inductor
and output capacitor combination reducing the order of
the outer current regulation loop to that of a single-pole
system. The inner current regulation loop consists of a
current-sense resistor (RS), a current-sense amplifier
(CSA), a current-error amplifier (CEA), an oscillator providing the carrier ramp, and a PWM comparator
(CPWM) (Figure 2). The MAX16821A/MAX16821B/
Inductor Peak-Current Comparator
The peak-current comparator provides a path for fast
cycle-by-cycle current limit during extreme fault conditions, such as an inductor malfunction (Figure 3). Note
the average current-limit threshold of 27.5mV still limits
the output current during short-circuit conditions. To
prevent inductor saturation, select an inductor with a
saturation current specification greater than the average current limit. The 60mV threshold for triggering the
peak-current limit is twice the full-scale average current-limit voltage threshold. The peak-current comparator has only a 260ns delay.
RCF
RIN
DIFF
RF
EAN
CCZ
CF
EAOUT
CCP
CSN
CSP
CLP
CA
VIN
SENSE+
CEA
DIFF
VEA
LED
STRING
L
CPWM
DRIVER
SENSECOUT
VREF
RS
MODE = SGND
Figure 2. MAX16821A/MAX16821B/MAX16821C Control Loop
10
______________________________________________________________________________________
RLS
High-Power Synchronous HBLED
Drivers with Rapid Current Pulsing
PWM Comparator and R-S Flip-Flop
An internal PWM comparator sets the duty cycle by
comparing the output of the current-error amplifier to a
60mV
2VP-P ramp signal. At the start of each clock cycle, an
R-S flip-flop resets and the high-side driver (DH) turns
on if MODE is connected to SGND, and DL turns on if
MODE is connected to VCC. The comparator sets the
flip-flop as soon as the ramp signal exceeds the CLP
voltage, thus terminating the ON cycle. See Figure 3.
Differential Amplifier
The differential amplifier (DIFF) allows LED current sensing (Figure 2). It provides true-differential LED current
sensing, and amplifies the sense voltage by a factor of 1
(MAX16821A), 6 (MAX16821B), and 20 (MAX16821C),
while rejecting common-mode voltage errors. The VEA
provides the difference between the differential amplifier
output (DIFF) and the desired LED current-sense voltage. The differential amplifier has a bandwidth of 1.7MHz
(MAX16821A), 1.6MHz (MAX16821B), and 550kHz
(MAX16821C). The difference between SENSE+ and
SENSE- is regulated to +0.6V (MAX16821A), +0.1V
(MAX16821B), or +0.03V (MAX16821C).
PEAK-CURRENT
COMPARATOR
CLP
CSP
AV = 34.5
CSN
gm = 550µS
PWM
COMPARATOR
IN
MODE = GND
BST
S
Q
RAMP
DH
LX
VDD
R
CLK
Q
DL
PGND
SHDN
Figure 3. MAX16821A/MAX16821B/MAX16821C Phase Circuit
______________________________________________________________________________________
11
MAX16821A/MAX16821B/MAX16821C
Current-Error Amplifier
The MAX16821A/MAX16821B/MAX16821C include a
transconductance current-error amplifier with a typical
gm of 550µS and 320µA output sink and source capability. The current-error amplifier output (CLP) is connected to the inverting input of the PWM comparator.
CLP is also externally accessible to provide frequency
compensation for the inner current regulation loop
(Figure 2). Compensate CEA so the inductor current
negative slope, which becomes the positive slope to
the inverting input of the PWM comparator, is less than
the slope of the internally generated voltage ramp (see
the Compensation section). In applications without synchronous rectification, the LED driver can be turned off
and on instantaneously by shorting or opening the CLP
to ground.
MAX16821A/MAX16821B/MAX16821C
High-Power Synchronous HBLED
Drivers with Rapid Current Pulsing
Voltage-Error Amplifier (VEA)
Current Limit
The VEA sets the gain of the voltage control loop, and
determines the error between the differential amplifier
output and the internal reference voltage. The VEA output clamps to 0.93V relative to the internal commonmode voltage, VCM (+0.6V), limiting the average maximum current. The maximum average current-limit
threshold is equal to the maximum clamp voltage of the
VEA divided by the gain (34.5) of the current-sense
amplifier. This results in accurate settings for the average maximum current.
The error amplifier (VEA) output is clamped between
-0.050V and +0.93V with respect to common-mode
voltage (VCM). Average current-mode control limits the
average current sourced by the converter during a fault
condition. When a fault condition occurs, the VEA output clamps to +0.93V with respect to the commonmode voltage (0.6V) to limit the maximum current
sourced by the converter to ILIMIT = 0.0275 / RS.
MOSFET Gate Drivers
The high-side (DH) and low-side (DL) drivers drive the
gates of external n-channel MOSFETs. The drivers’ 4A
peak sink- and source-current capability provides
ample drive for the fast rise and fall times of the switching MOSFETs. Faster rise and fall times result in
reduced cross-conduction losses. Size the high-side
and low-side MOSFETs to handle the peak and RMS
currents during overload conditions. The driver block
also includes a logic circuit that provides an adaptive
nonoverlap time to prevent shoot-through currents during transition. The typical nonoverlap time is 35ns
between the high-side and low-side MOSFETs.
Overvoltage Protection
The OVP comparator compares the OVI input to the
overvoltage threshold. The overvoltage threshold is typically 1.127 times the internal 0.6V reference voltage
plus VCM (0.6V). A detected overvoltage event trips the
comparator output turning off both high-side and lowside MOSFETs. Add an RC delay to reduce the sensitivity of the overvoltage circuit and avoid unnecessary
tripping of the converter (Figure 4). After the OVI voltage falls below 1.076V (typ.), high-side and low-side
drivers turn on only after a 2048 clock-cycle POR and a
1024 clock-cycle soft-start have elapsed. Disable the
overvoltage function by connecting OVI to SGND.
BST
The MAX16821A/MAX16821B/MAX16821C provide
power to the low-side and high-side MOSFET drivers
through VDD. A bootstrap capacitor from BST to LX provides the additional boost voltage necessary for the
high-side driver. VDD supplies power internally to the
low-side driver. Connect a 0.47µF low-ESR ceramic
capacitor between BST and LX and a Schottky diode
from BST to VDD.
COVI
RA
OVI
VOUT
RB
MAX16821A
MAX16821B
MAX16821C
DIFF
Protection
The MAX16821A/MAX16821B/MAX16821C include output overvoltage protection (OVP). During fault conditions when the load goes to high impedance (output
opens), the controller attempts to maintain LED current.
The OVP disables the MAX16821A/MAX16821B/
MAX16821C whenever the output voltage exceeds the
OVP threshold, protecting the external circuits from
undesirable voltages.
12
RIN
EAN
RF
EAOUT
Figure 4. Overvoltage Protection Input Delay
______________________________________________________________________________________
High-Power Synchronous HBLED
Drivers with Rapid Current Pulsing
inductor discharges to the output. The output voltage
cannot go below the input voltage in this configuration.
Resistor R1 senses the inductor current and resistor R2
senses the LED current. The outer LED current regulation loop programs the average current in the inductor,
thus achieving tight LED current regulation.
Boost LED Driver
Figure 5 shows the MAX16821A/MAX16821B/MAX16821C
configured as a synchronous boost converter with
MODE connected to VCC. During the on-time, the input
voltage charges the inductor. During the off-time, the
VCC
R4
VLED
ON/OFF
C3
R9
VIN
7V TO 28V
R3
C2
R10
C11
14
13
12
I.C.
OUTV
RT/SYNC
10
MODE
11
EN
9
8
SGND
CLKOUT
N.C. 7
15 OVI
C10
L1
VLED
R8
Q2
16 CLP
DH 6
17 EAOUT
LX 5
R7
Q1
C9
C4
C8
MAX16821A
MAX16821B
MAX16821C
18 EAN
R5
LED
STRING
R5
19 DIFF
DL 3
20 CSN
N.C. 2
R2
D1
R1
PGND 1
21 CSP
SGND
22
C1
BST 4
SENSE23
SENSE+
24
SGND
25
IN
26
VDD
28
VCC
27
VIN
C7
C6
C5
Figure 5. Synchronous Boost LED Driver (Output Voltage Not to Exceed 28V)
______________________________________________________________________________________
13
MAX16821A/MAX16821B/MAX16821C
Applications Information
MAX16821A/MAX16821B/MAX16821C
High-Power Synchronous HBLED
Drivers with Rapid Current Pulsing
Input-Referenced Buck-Boost LED Driver
span from the output to the input. This effectively
removes the boost-only restriction of the regulator in
Figure 5, allowing the voltage across the LED to be
greater or less than the input voltage. LED currentsensing is not ground-referenced, so a high-side current-sense amplifier is used to measure current.
The circuit in Figure 6 shows a step-up/step-down regulator. It is similar to the boost converter in Figure 5 in
that the inductor is connected to the input and the
MOSFET is essentially connected to ground. However,
rather than going from the output to ground, the LEDs
VCC
R4
VLED
ON/OFF
VIN
7V TO 28V
C3
R8
R3
C2
R9
C11
14
13
12
I.C.
OUTV
RT/SYNC
10
MODE
11
EN
9
8
SGND
CLKOUT
LED
STRING
1 TO 6
LEDS
R2
C2
L1
D1
N.C. 7
15 OVI
VLED
C10
Q1
R7
16 CLP
DH 6
17 EAOUT
LX 5
VCC
R6
C1
C9
C8
MAX16821A
MAX16821B
MAX16821C
18 EAN
R5
DL 3
20 CSN
N.C. 2
R1
PGND 1
21 CSP
SGND
22
RS-
BST 4
19 DIFF
SENSE23
SENSE+
24
SGND
25
IN
26
VDD
28
VCC
27
VIN
C7
C6
C5
Figure 6. Typical Application Circuit for an Input-Referred Buck-Boost LED Driver (7V to 28V Input)
14
RS+
______________________________________________________________________________________
OUT
High-Power Synchronous HBLED
Drivers with Rapid Current Pulsing
provide current to recharge C1 and supplies the load
current. Since the voltage waveform across L1 and L2
are exactly the same, it is possible to wind both inductors on the same core (a coupled inductor). Although
voltages on L1 and L2 are the same, RMS currents can
be quite different so the windings may require a different gauge wire. Because of the dual inductors and segmented energy transfer, the efficiency of a SEPIC
converter is lower than the standard buck or boost configurations. As in the boost driver, the current-sense
resistor connects to ground, allowing the output voltage
of the LED driver to exceed the rated maximum voltage
of the MAX16821A/MAX16821B/MAX16821C.
VCC
R4
VLED
ON/OFF
VIN
7V TO 28V
C2
R8
R3
R9
C10
C9
14
13
12
I.C.
OUTV
RT/SYNC
10
MODE
11
EN
9
8
SGND
CLKOUT
15 OVI
N.C. 7
16 CLP
DH 6
17 EAOUT
LX 5
R7
L1
C3
VLED
D1
Q1
R6
L2
C8
C7
MAX16821A
MAX16821B
MAX16821C
18 EAN
R5
LED
STRING
BST 4
19 DIFF
DL 3
20 CSN
N.C. 2
R2
R1
PGND 1
21 CSP
SGND
22
C1
SENSE23
SENSE+
24
SGND
25
IN
26
VDD
28
VCC
27
VIN
C6
C5
C4
Figure 7. Typical Application Circuit for a SEPIC LED Driver
______________________________________________________________________________________
15
MAX16821A/MAX16821B/MAX16821C
SEPIC LED Driver
Figure 7 shows the MAX16821A/MAX16821B/
MAX16821C configured as a SEPIC LED driver. While
buck topologies produce an output always lower than
the input, and boost topologies produce an output
always greater than the input, a SEPIC topology allows
the output voltage to be greater than, equal to, or less
than the input. In a SEPIC topology, the voltage across
C3 is the same as the input voltage, and L1 and L2 have
the same inductance. Therefore, when Q1 turns on (ontime), the currents in both inductors (L1 and L2) ramp
up at the same rate. The output capacitor supports the
output voltage during this time. When Q1 turns off (offtime), L1 current recharges C3 and combines with L2 to
MAX16821A/MAX16821B/MAX16821C
High-Power Synchronous HBLED
Drivers with Rapid Current Pulsing
Low-Side Buck Driver
with Synchronous Rectification
In Figure 8, the input voltage goes from 7V to 28V and,
because of the ground-based current-sense resistor,
the output voltage can be as high as the input. The synchronous MOSFET keeps the power dissipation to a
minimum, especially when the input voltage is large
compared to the voltage on the LED string. For the
inner average current-loop inductor, current is sensed
by resistor R1. To regulate the LED current, R2 creates
a voltage that the differential amplifier compares to
0.6V. Capacitor C1 is small and helps reduce the ripple
current in the LEDs. Omit C1 in cases where the LEDs
can tolerate a higher ripple current. The average currentmode control scheme converts the input voltage to a
current source feeding the LED string.
VCC
R4
VLED
ON/OFF
C3
R9
R3
VIN
7V TO 28V
R10
C11
C10
14
13
12
I.C.
OUTV
RT/SYNC
10
MODE
11
EN
9
8
SGND
CLKOUT
15 OVI
N.C. 7
16 CLP
DH 6
C2
R9
Q1
R7
17 EAOUT
LX 5
C9
C8
VLED
L1
R5
MAX16821A
MAX16821B
MAX16821C
18 EAN
R6
C4
BST 4
19 DIFF
DL 3
20 CSN
N.C. 2
LED
STRING
Q2
C1
D2
R2
R1
PGND 1
21 CSP
SGND
22
SENSE23
SENSE+
24
SGND
25
IN
26
VDD
28
VCC
27
VIN
C7
C6
C5
Figure 8. Application Circuit for a Low-Side Buck LED Driver
16
______________________________________________________________________________________
High-Power Synchronous HBLED
Drivers with Rapid Current Pulsing
amplifier, U2. The voltage appearing across resistor R11
becomes the average inductor current-sense voltage for
the inner average current loop. To regulate the LED
current, R2 creates a voltage that the differential amplifier compares to its internal reference. Capacitor C1 is
small and is added to reduce the ripple current in the
LEDs. In cases where the LEDs can tolerate a higher
ripple current, capacitor C1 can be omitted.
In Figure 9, the input voltage goes from 7V to 28V, the LED
load is connected from the positive side to the currentsense resistor (R1) in series with the inductor, and MODE
is connected to VCC. For the inner average current-loop
inductor, current is sensed by resistor R1 and is then
transferred to the low side by the high-side current-sense
VCC
R4
ON/OFF
C3
R3
C11
14
13
12
I.C.
OUTV
RT/SYNC
10
MODE
11
EN
9
CLKOUT
N.C. 7
15 OVI
C10
VIN
7V TO 28V
8
SGND
R8
16 CLP
DH 6
17 EAOUT
LX 5
C1
Q1
R7
L1
C9
C8
LED
STRING
C2
I.C.
18 EAN
R6
BST 4
DL 3
20 CSN
N.C. 2
U2
Q2
RS-
R2
OUT
R11
PGND 1
21 CSP
SGND
22
RS+
D1
19 DIFF
VCC
R1
C4
R5
MAX16821A
MAX16821B
MAX16821C
SENSE23
SENSE+
24
SGND
25
IN
26
VDD
28
VCC
27
VIN
C7
C6
C5
Figure 9. Application Circuit for a High-Side Buck LED Driver
______________________________________________________________________________________
17
MAX16821A/MAX16821B/MAX16821C
High-Side Buck Driver
with Synchronous Rectification
MAX16821A/MAX16821B/MAX16821C
High-Power Synchronous HBLED
Drivers with Rapid Current Pulsing
Inductor Selection
Switching MOSFETs
The switching frequency, peak inductor current, and
allowable ripple at the output determine the value and
size of the inductor. Selecting higher switching frequencies reduces inductance requirements, but at the cost
of efficiency. The charge/discharge cycle of the gate
and drain capacitance in the switching MOSFETs create switching losses worsening at higher input voltages, since switching losses are proportional to the
square of the input voltage. The MAX16821A/
MAX16821B/MAX16821C operate up to 1.5MHz.
Choose inductors from the standard high-current, surface-mount inductor series available from various manufacturers. Particular applications may require
custom-made inductors. Use high-frequency core material for custom inductors. High ∆IL causes large peak-topeak flux excursion increasing the core losses at higher
frequencies. The high-frequency operation coupled with
high ∆IL reduces the required minimum inductance and
makes the use of planar inductors possible.
The following discussion is for buck or continuous
boost-mode topologies. Discontinuous boost, buckboost, and SEPIC topologies are quite different in
regards to component selection. Use the following
equations to determine the minimum inductance value:
When choosing a MOSFET for voltage regulators, consider the total gate charge, RDS(ON), power dissipation,
and package thermal impedance. The product of the
MOSFET gate charge and on-resistance is a figure of
merit, with a lower number signifying better performance. Choose MOSFETs optimized for high-frequency switching applications. The average current from the
MAX16821A/MAX16821B/MAX16821C gate-drive output is proportional to the total capacitance it drives
from DH and DL. The power dissipated in the
MAX16821A/MAX16821B/MAX16821C is proportional
to the input voltage and the average drive current. The
gate charge and drain capacitance losses (CV2), the
cross-conduction loss in the upper MOSFET due to
finite rise/fall time, and the I2R loss due to RMS current
in the MOSFET RDS(ON) account for the total losses in
the MOSFET. Estimate the power loss (PDMOS_) in the
high-side and low-side MOSFETs using the following
equations:
PDMOS _ HI = (QG × VDD × fSW ) +
⎡ VIN × ILED × (tR + t f ) × fSW ⎤
⎢
⎥ +
2
⎢⎣
⎥⎦
RDSON × I2RMS−HI
Buck regulators:
LMIN =
(VINMAX
− VLED ) × VLED
VINMAX × fSW × ∆IL
Boost regulators:
LMIN =
(VLED
− VINMAX ) × VINMAX
VLED × fSW × ∆IL
where VLED is the total voltage across the LED string.
The average current-mode control feature of the
MAX16821A/MAX16821B/MAX16821C limits the maximum peak inductor current and prevents the inductor
from saturating. Choose an inductor with a saturating
current greater than the worst-case peak inductor current. Use the following equation to determine the worstcase current in the average current-mode control loop.
ILPEAK =
VCL
⎛ ∆I ⎞
+ ⎜ CL ⎟
⎝ 2 ⎠
RS
where RS is the sense resistor and VCL = 0.030V. For
the buck converter, the sense current is the inductor
current and for the boost converter, the sense current is
the input current.
18
where QG, RDS(ON), tR, and tF are the upper-switching
MOSFET’s total gate charge, on-resistance, rise time,
and fall time, respectively.
IRMS−HI =
D
⎛I2 VALLEY + I2 PK + I
⎞
VALLEY × IPK ⎠ ×
⎝
3
For the buck regulator, D is the duty cycle, IVALLEY =
(IOUT - ∆IL / 2) and IPK = (IOUT + ∆IL / 2).
PDMOS _ LO = (QG × VDD × fSW ) + RDSON × I2 RMS−LO
IRMS−LO =
(1− D)
⎛I2 VALLEY + I2 PK + I
⎞
VALLEY × IPK ⎠ ×
⎝
3
Input Capacitors
The discontinuous input-current waveform of the buck
converter causes large ripple currents in the input
capacitor. The switching frequency, peak inductor current, and the allowable peak-to-peak voltage ripple
reflected back to the source dictate the capacitance
requirement. The input ripple is comprised of ∆V Q
(caused by the capacitor discharge) and ∆V ESR
(caused by the ESR of the capacitor).
______________________________________________________________________________________
High-Power Synchronous HBLED
Drivers with Rapid Current Pulsing
Output Capacitors
The function of the output capacitor is to reduce the
output ripple to acceptable levels. The ESR, ESL, and
the bulk capacitance of the output capacitor contribute
to the output ripple. In most of the applications, the output ESR and ESL effects can be dramatically reduced
by using low-ESR ceramic capacitors. To reduce the
ESL effects, connect multiple ceramic capacitors in
parallel to achieve the required bulk capacitance.
In a buck configuration, the output capacitance, COUT,
is calculated using the following equation:
(VINMAX − VLED ) × VLED
COUT ≥
∆VR × 2 × L × VINMAX × fSW 2
where ∆VR is the maximum allowable output ripple.
In a boost configuration, the output capacitance, COUT,
is calculated as:
(VLED − VINMIN ) × 2 × ILED
COUT ≥
∆VR × VLED × fSW
where ILED is the output current.
In a buck-boost configuration, the output capacitance,
COUT is:
2 × VLED × ILED
COUT ≥
∆VR × (VLED + VINMIN ) × fSW
where VLED is the voltage across the load and ILED is
the output current.
Average Current Limit
The average current-mode control technique of the
MAX16821A/MAX16821B/MAX16821C accurately limits
the maximum output current in the case of the buck configuration. The MAX16821A/MAX16821B/MAX16821C
sense the voltage across the sense resistor and limit the
peak inductor current (IL-PK) accordingly. The on-cycle
terminates when the current-sense voltage reaches
26.4mV (min). Use the following equation to calculate
the maximum current-sense resistor value:
⎛ 0.0264 ⎞
RSENSE = ⎜
⎟
⎝ ILED ⎠
Select a 5% lower value of RS to compensate for any
parasitics associated with the PCB. Select a non-inductive resistor with the appropriate wattage rating. In the
case of the boost configuration, the MAX16821A/
MAX16821B/MAX16821C accurately limits the maximum input current. Use the following equation to calculate the current-sense resistor value:
⎛ 0.0264 ⎞
RSENSE = ⎜
⎟
⎝ IIN ⎠
where IIN is the input current.
Compensation
The main control loop consists of an inner current loop
(inductor current) and an outer LED current regulation
loop. The MAX16821A/MAX16821B/MAX16821C use an
average current-mode control scheme to regulate the
LED current (Figure 2). The VEA output provides the
controlling voltage for the current source. The inner current loop absorbs the inductor pole reducing the order of
the LED current loop to that of a single-pole system. The
major consideration when designing the current control
loop is making certain that the inductor downslope
(which becomes an upslope at the output of the CEA)
does not exceed the internal ramp slope. This is a necessary condition to avoid subharmonic oscillations similar to those in peak current mode with insufficient slope
compensation. This requires that the gain at the output of
the CEA be limited based on the following equation:
Buck:
RCF ≤
VRAMP × fSW × L
AV × RS × VLED × gm
where VRAMP = 2V, gm = 550µS, AV = 34.5V/V, and
VLED is the voltage across the LED string.
The crossover frequency of the inner current loop is
given by:
fC =
RS
VIN
×
× 34.5 × gm × RCF
VRAMP
2× π ×L
For adequate phase margin place the zero formed by
RCF and CCZ at least 3 to 5 times below the crossover
frequency. The pole formed by RCF and CCP may not
be required in most applications but can be added to
minimize noise at a frequency at or above the switching
frequency.
______________________________________________________________________________________
19
MAX16821A/MAX16821B/MAX16821C
Use low-ESR ceramic capacitors with high ripple-current capability at the input. In the case of the boost
topology where the inductor is in series with the input,
the ripple current in the capacitor is the same as the
inductor ripple and the input capacitance is small.
MAX16821A/MAX16821B/MAX16821C
High-Power Synchronous HBLED
Drivers with Rapid Current Pulsing
Boost:
RCF ≤
For adequate phase margin at crossover, place the zero
formed by RCF and CCZ at least 3 to 5 times below the
crossover frequency. The pole formed by RCF and CCP
is added to eliminate noise spikes riding on the current
waveform and is placed at the switching frequency.
VRAMP × fSW × L
AV × RS × (VLED − VIN ) × gm
The crossover frequency of the inner current loop is
given by:
fC =
RS
VRAMP
×
PWM Dimming
Even though the MAX16821A/MAX16821B/MAX16821C
do not have a separate PWM input, PWM dimming can
be easily achieved by means of simple external circuitry.
See Figures 10 and 11.
VLED
× 34.5 × gm × RCF
2× π ×L
VCC
R4
VLED
ON/OFF
C3
R9
R3
VIN
7V TO 28V
R10
C11
C10
14
13
12
I.C.
OUTV
RT/SYNC
10
MODE
11
EN
9
8
SGND
CLKOUT
15 OVI
N.C. 7
16 CLP
DH 6
C2
R9
Q1
R7
17 EAOUT
LX 5
C9
C8
R5
MAX16821A
MAX16821B
MAX16821C
18 EAN
R6
C4
BST 4
19 DIFF
DL 3
20 CSN
N.C. 2
Q2
Q3
D2
R2
PGND 1
21 CSP
SGND
22
SENSE23
SENSE+
24
SGND
25
IN
26
VDD
28
VCC
27
VIN
C7
LED
STRING
PWM DIM
R1
C6
C5
Figure 10. Low-Side Buck LED Driver with PWM Dimming
20
VLED
L1
______________________________________________________________________________________
High-Power Synchronous HBLED
Drivers with Rapid Current Pulsing
MAX16821A/MAX16821B/MAX16821C
VCC
VLED
R4
VCC
R8
ON/OFF
VIN
7V TO 28V
C3
R10
R3
Q5
R9
PWM DIM
C2
Q4
C11
C10
14
13
12
I.C.
OUTV
RT/SYNC
10
MODE
11
EN
9
8
SGND
CLKOUT
15 OVI
N.C. 7
16 CLP
DH 6
R7
L1
VLED
D1
Q1
LED
STRING
R6
17 EAOUT
C1
LX 5
C9
PWM DIM
C8
MAX16821A
MAX16821B
MAX16821C
18 EAN
Q3
R5
Q2
19 DIFF
DL 3
20 CSN
N.C. 2
R2
R1
PGND 1
21 CSP
SGND
22
PWM DIM
BST 4
SENSE23
SENSE+
24
SGND
25
IN
26
VCC
27
VDD
28
VIN
C7
C6
C5
Figure 11. Boost LED Driver with PWM Dimming
Power Dissipation
Calculate power dissipation in the MAX16821A/
MAX16821B/MAX16821C as a product of the input voltage and the total VCC regulator output current (ICC).
ICC includes quiescent current (IQ) and gate-drive current (IDD):
PD = VIN x ICC
ICC = IQ + [fSW x (QG1 + QG2)]
where QG1 and QG2 are the total gate charge of the
low-side and high-side external MOSFETs at VGATE =
5V, IQ is the supply current, and fSW is the switching
frequency of the LED driver.
Use the following equation to calculate the maximum
power dissipation (PDMAX) in the chip at a given ambient temperature (TA):
PDMAX = 34.5 x (150 – TA) mW
______________________________________________________________________________________
21
Selector Guide
PCB Layout
MAX16821A
0.60
1
MAX16821B
0.10
6
MAX16821C
0.03
20
DIFF
EAOUT
CLP
OVI
20
19
18
17
16
15
SGND 22
*EP
SENSE- 23
SENSE+ 24
MAX16821A
MAX16821B
MAX16821C
SGND 25
IN 26
VCC 27
+
*EP = EXPOSED PAD.
4
5
6
7
DH
3
N.C.
2
LX
1
DL
VDD 28
8) Provide enough copper area at and around the
switching MOSFETs, inductor, and sense resistors
to aid in thermal dissipation.
9) Use 2oz or thicker copper to keep trace inductances
and resistances to a minimum. Thicker copper conducts heat more effectively, thereby reducing thermal
impedance. Thin copper PCBs compromise efficiency
in applications involving high currents.
21
EAN
TOP VIEW
CSN
Pin Configuration
BST
7) Distribute the power components evenly across the
board for proper heat dissipation.
DIFFERENTIAL
AMP GAIN
(V/V)
N.C.
2) Minimize the area and length of the high-current
switching loops.
3) Place the necessary Schottky diodes that are connected across the switching MOSFETs very close to
the respective MOSFET.
4) Use separate ground planes on different layers of
the PCB for SGND and PGND. Connect both of
these planes together at a single point and make
this connection under the exposed pad of the
MAX16821A/MAX16821B/MAX16821C.
5) Run the current-sense lines CSP and CSN very
close to each other to minimize the loop area. Run
the sense lines SENSE+ and SENSE- close to each
other. Do not cross these critical signal lines with
power circuitry. Sense the current right at the pads
of the current-sense resistors. The current-sense
signal has a maximum amplitude of 27.5mV. To prevent contamination of this signal from high dv/dt
and high di/dt components and traces, use a
ground plane layer to separate the power traces
from this signal trace.
6) Place the bank of output capacitors close to the load.
PART
DIFFERENTIAL
SET VALUE
(VSENSE+ - VSENSE-)
(V)
CSP
Use the following guidelines to layout the LED driver.
1) Place the IN, V CC , and V DD bypass capacitors
close to the MAX16821A/MAX16821B/MAX16821C.
PGND
MAX16821A/MAX16821B/MAX16821C
High-Power Synchronous HBLED
Drivers with Rapid Current Pulsing
I.C.
13
OUTV
12
RT/SYNC
11
EN
10
MODE
9
CLKOUT
8
SGND
TQFN
Chip Information
PROCESS: BiCMOS
22
14
______________________________________________________________________________________
High-Power Synchronous HBLED
Drivers with Rapid Current Pulsing
VCC
R4
VLED
ON/OFF
R9
C3
R3
VIN
7V TO 28V
R10
C11
C10
14
13
12
I.C.
OUTV
RT/SYNC
10
MODE
11
EN
9
8
SGND
CLKOUT
15 OVI
N.C. 7
16 CLP
DH 6
C2
R9
Q1
R7
17 EAOUT
LX 5
C9
C8
VLED
L1
R6
C4
R5
MAX16821A
MAX16821B
MAX16821C
18 EAN
BST 4
19 DIFF
DL 3
20 CSN
N.C. 2
LED
STRING
Q2
C1
D2
R2
R1
PGND 1
21 CSP
SGND
22
SENSE23
SENSE+
24
SGND
25
IN
26
VDD
28
VCC
27
VIN
C7
C6
C5
Package Information
For the latest package outline information and land patterns, go to www.maxim-ic.com/packages.
PACKAGE TYPE
PACKAGE CODE
DOCUMENT NO.
28 TQFN-EP
T2855-8
21-0140
______________________________________________________________________________________
23
MAX16821A/MAX16821B/MAX16821C
Typical Operating Circuit
MAX16821A/MAX16821B/MAX16821C
High-Power Synchronous HBLED
Drivers with Rapid Current Pulsing
Revision History
REVISION
NUMBER
REVISION
DATE
0
7/07
Initial release
1
3/09
Updated Electrical Characteristics table.
DESCRIPTION
PAGES
CHANGED
—
3, 4
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
24 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2009 Maxim Integrated Products
Heaney
Maxim is a registered trademark of Maxim Integrated Products, Inc.