PHILIPS CBT3306 Cbt3306 15 Datasheet

CBT3306
Dual bus switch
Rev. 7 — 1 May 2012
Product data sheet
1. General description
The CBT3306 dual FET bus switch features independent line switches. Each switch is
disabled when the associated output enable (nOE) input is HIGH.
The CBT3306 is characterized for operation from 40 C to +85 C.
2. Features and benefits





5  switch connection between two ports
TTL-compatible input levels
Multiple package options
Latch-up protection exceeds 100 mA per JESD78B
ESD protection:
 HBM JESD22-A114F exceeds 2000 V
 CDM JESD22-C101D exceeds 1000 V
3. Ordering information
Table 1.
Ordering information
Type number
Package
Name
Description
Version
CBT3306D
SO8
plastic small outline package; 8 leads; body width 3.9 mm
SOT96-1
CBT3306PW
TSSOP8
plastic thin shrink small outline package; 8 leads;
body width 4.4 mm
SOT530-1
CBT3306GT
XSON8
plastic extremely thin small outline package; no leads; 8 terminals;
body 1  1.95  0.5 mm
SOT833-1
CBT3306GM
XQFN8
plastic, extremely thin quad flat package; no leads; 8 terminals;
body 1.6  1.6  0.5 mm
SOT902-2
4. Marking
Table 2.
Marking codes
Type number
Marking code
CBT3306D
CBT3306
CBT3306PW
3306
CBT3306GT
F06
CBT3306GM
F06
CBT3306
NXP Semiconductors
Dual bus switch
5. Functional diagram
1A
1OE
2A
2OE
3
2
1B
1
6
5
2B
7
002aab985
Fig 1.
Logic diagram
6. Pinning information
6.1 Pinning
CBT3306
CBT3306
1OE
1
8
VCC
1A
2
7
2OE
1B
3
6
2B
GND
4
5
2A
1OE
1
8
VCC
1A
2
7
2OE
1B
3
6
2B
GND
4
5
2A
001aak304
001aak303
Fig 2.
Pin configuration for SO8 (SOT96-1)
Fig 3.
Pin configuration for TSSOP8 (SOT530-1)
CBT3306
1
8
VCC
1A
2
7
2OE
1B
3
6
2B
1OE
1
1A
1B
7
2OE
2
6
2B
3
5
2A
4
1OE
8
CBT3306
VCC
terminal 1
index area
4
5
2A
GND
GND
001aal337
Transparent top view
Transparent top view
Fig 4.
Pin configuration SOT833-1 (XSON8)
CBT3306
Product data sheet
001aal338
Fig 5.
Pin configuration SOT902-2 (XQFN8)
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Rev. 7 — 1 May 2012
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CBT3306
NXP Semiconductors
Dual bus switch
6.2 Pin description
Table 3.
Pin description
Symbol
Pin
Description
1OE, 2OE
1, 7
output enable input
1A, 2A
2, 5
data input/output (A port)
1B, 2B
3, 6
data input/output (B port)
GND
4
ground (0 V)
VCC
8
positive supply voltage
7. Functional description
Table 4.
Function selection[1]
Input
Input/output
nOE
nA, nB
L
nA = nB
H
Z
[1]
H = HIGH voltage level; L = LOW voltage level; Z = high-impedance OFF-state.
8. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).[1]
Tamb = 40 C to +85 C, unless otherwise specified.
Symbol
Parameter
VCC
supply voltage
VI
input voltage
IO
output current
IIK
input clamping current
Tstg
storage temperature
Conditions
[2]
VI/O = 0 V
Min
Max
Unit
0.5
+7.0
V
0.5
+7.0
V
-
128
mA
50
-
mA
65
+150
C
[1]
Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under Section 9. is not implied. Exposure to absolute-maximum-rated
conditions for extended periods may affect device reliability.
[2]
The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
9. Recommended operating conditions
Table 6.
Operating conditions
All unused control inputs of the device must be held at VCC or GND to ensure proper device operation.
Symbol
Parameter
VCC
VIH
Min
Typ
Max
Unit
supply voltage
4.5
-
5.5
V
HIGH-level input voltage
2.0
-
-
V
VIL
LOW-level input voltage
-
-
0.8
V
Tamb
ambient temperature
40
-
+85
C
CBT3306
Product data sheet
Conditions
operating in free air
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© NXP B.V. 2012. All rights reserved.
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CBT3306
NXP Semiconductors
Dual bus switch
10. Static characteristics
Table 7.
Static characteristics
Voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
40 C to +85 C
Conditions
Unit
Min
Typ[1]
Max
VIK
input clamping voltage
VCC = 4.5 V; II = 18 mA
-
-
1.2
V
II
input leakage current
VCC = 5.5 V; VI = GND or 5.5 V
-
-
1
A
ICC
supply current
VCC = 5.5 V; IO = 0 mA;
VI = VCC or GND
-
-
3
A
Vpass
pass voltage
output HIGH; VI = VCC = 5.0 V;
IO = 100 A
3.6
3.9
4.2
V
ICC
additional supply current
per input pin; VCC = 5.5 V;
one input at 3.4 V, other inputs at
VCC or GND
-
-
2.5
mA
CI
input capacitance
control pin; VI = 3 V or 0 V
-
3.15
-
pF
Cio(off)
off-state input/output
capacitance
port off; VI = 3 V or 0 V; nOE = VCC
-
6.45
-
pF
RON
ON resistance
VCC = 4.5 V; VI = 0 V; II = 64 mA
[3]
-
3.4
5

VCC = 4.5 V; VI = 0 V; II = 30 mA
[3]
-
3.4
5

VCC = 4.5 V; VI = 2.4 V; II = 15 mA
[3]
-
6.8
15

[1]
[2]
All typical values are at VCC = 5 V, Tamb = 25 C.
[2]
This is the increase in supply current for each input that is at the specified TTL voltage level rather than VCC or GND.
[3]
Measured by the voltage drop between the nA and the nB terminals at the indicated current through the switch. ON resistance is
determined by the lowest voltage of the two (nA, nB) terminals.
11. Dynamic characteristics
Table 8.
Dynamic characteristics
Voltages are referenced to GND (ground = 0 V). For test circuit see Figure 8.
Symbol
Parameter
40 C to +85 C
Conditions
tpd
propagation delay
nA, nB to nB, nA; see Figure 6
ten
enable time
nOE to nA, nB; see Figure 7
Unit
Min
Typ
Max
-
-
0.25
ns
[2]
1.0
-
5.0
ns
[2]
1.0
-
5.0
ns
[1][2]
VCC = 5.0 V  0.5 V
VCC = 5.0 V  0.5 V
disable time
tdis
nOE to nA, nB; see Figure 7
VCC = 5.0 V  0.5 V
[1]
The propagation delay is the calculated RC time constant of the typical ON resistance of the switch and the specified load capacitance,
when driven by an ideal voltage source (zero output impedance).
[2]
tpd is the same as tPLH and tPHL.
ten is the same as tPZL and tPZH.
tdis is the same as tPLZ and tPHZ.
CBT3306
Product data sheet
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Rev. 7 — 1 May 2012
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CBT3306
NXP Semiconductors
Dual bus switch
12. Waveforms
VI
nA, nB
input
VM
GND
tPHL
tPLH
VOH
nB, nA
output
VM
VOL
001aak305
Measurement points are given in Table 9.
Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.
Fig 6.
The data input (nA, nB) to output (nB, nA) propagation delay times
VI
VM
nOE input
VM
GND
tPZL
tPLZ
3.5 V
output
LOW to OFF
OFF to LOW
VM
VX
VOL
tPZH
tPHZ
VOH
VY
output
HIGH to OFF
OFF to HIGH
VM
GND
outputs
enabled
outputs
disabled
outputs
enabled
001aak298
Measurement points are given in Table 9.
Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.
Fig 7.
Table 9.
Enable and disable times
Measurement points
Supply voltage
Input
Output
VCC
VI
VM
VM
VX
VY
VCC = 5.0 V  0.5 V
GND to 3.0 V
1.5 V
1.5 V
VOL + 0.3 V
VOH  0.3 V
CBT3306
Product data sheet
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Rev. 7 — 1 May 2012
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CBT3306
NXP Semiconductors
Dual bus switch
13. Test information
VI
tW
90 %
negative
pulse
VM
0V
tf
tr
tr
tf
VI
90 %
positive
pulse
0V
VM
10 %
VM
VM
10 %
tW
VEXT
VCC
VI
RL
VO
G
DUT
RT
RL
CL
001aae331
Test data is given in Table 10.
All input pulses are supplied by generators having the following characteristics: PRR  10 MHz; Zo = 50 .
The outputs are measured one at a time with one transition per measurement.
Definitions for test circuit:
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
VEXT = External voltage for measuring switching times.
Fig 8.
Table 10.
Test circuit for measuring switching times
Test data
Supply voltage
Input
VI
VCC = 5.0 V  0.5 V
CBT3306
Product data sheet
Load
tr, tf
GND to 3.0 V  2.5 ns
VEXT
CL
RL
tPLH, tPHL
tPLZ, tPZL
tPHZ, tPZH
50 pF
500 
open
7.0 V
open
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Rev. 7 — 1 May 2012
© NXP B.V. 2012. All rights reserved.
6 of 14
CBT3306
NXP Semiconductors
Dual bus switch
14. Package outline
SO8: plastic small outline package; 8 leads; body width 3.9 mm
SOT96-1
D
E
A
X
c
y
HE
v M A
Z
5
8
Q
A2
A
(A 3)
A1
pin 1 index
θ
Lp
1
L
4
e
detail X
w M
bp
0
2.5
5 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
UNIT
A
max.
A1
A2
A3
bp
c
D (1)
E (2)
e
HE
L
Lp
Q
v
w
y
Z (1)
mm
1.75
0.25
0.10
1.45
1.25
0.25
0.49
0.36
0.25
0.19
5.0
4.8
4.0
3.8
1.27
6.2
5.8
1.05
1.0
0.4
0.7
0.6
0.25
0.25
0.1
0.7
0.3
inches
0.069
0.010 0.057
0.004 0.049
0.01
0.019 0.0100
0.014 0.0075
0.20
0.19
0.16
0.15
0.05
0.01
0.01
0.004
0.028
0.012
0.244
0.039 0.028
0.041
0.228
0.016 0.024
θ
8o
o
0
Notes
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
2. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included.
Fig 9.
REFERENCES
OUTLINE
VERSION
IEC
JEDEC
SOT96-1
076E03
MS-012
JEITA
EUROPEAN
PROJECTION
ISSUE DATE
99-12-27
03-02-18
Package outline SOT96-1 (SO8)
CBT3306
Product data sheet
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Rev. 7 — 1 May 2012
© NXP B.V. 2012. All rights reserved.
7 of 14
CBT3306
NXP Semiconductors
Dual bus switch
TSSOP8: plastic thin shrink small outline package; 8 leads; body width 4.4 mm
SOT530-1
E
A
D
X
c
y
HE
v M A
Z
8
5
A2
A
(A3)
A1
pin 1 index
θ
Lp
L
detail X
1
4
e
w M
bp
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
max.
A1
A2
A3
bp
c
D(1)
E(2)
e
HE
L
Lp
v
w
y
Z(1)
θ
mm
1.1
0.15
0.05
0.95
0.85
0.25
0.30
0.19
0.20
0.13
3.1
2.9
4.5
4.3
0.65
6.5
6.3
0.94
0.7
0.5
0.1
0.1
0.1
0.70
0.35
8°
0°
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
OUTLINE
VERSION
SOT530-1
REFERENCES
IEC
JEDEC
JEITA
EUROPEAN
PROJECTION
ISSUE DATE
00-02-24
03-02-18
MO-153
Fig 10. Package outline SOT530-1 (TSSOP8)
CBT3306
Product data sheet
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Rev. 7 — 1 May 2012
© NXP B.V. 2012. All rights reserved.
8 of 14
CBT3306
NXP Semiconductors
Dual bus switch
XSON8: plastic extremely thin small outline package; no leads; 8 terminals; body 1 x 1.95 x 0.5 mm
1
2
SOT833-1
b
4
3
4×
(2)
L
L1
e
8
7
6
e1
5
e1
e1
8×
A
(2)
A1
D
E
terminal 1
index area
0
1
2 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A(1)
max
A1
max
b
D
E
e
e1
L
L1
mm
0.5
0.04
0.25
0.17
2.0
1.9
1.05
0.95
0.6
0.5
0.35
0.27
0.40
0.32
Notes
1. Including plating thickness.
2. Can be visible in some manufacturing processes.
REFERENCES
OUTLINE
VERSION
IEC
JEDEC
JEITA
SOT833-1
---
MO-252
---
EUROPEAN
PROJECTION
ISSUE DATE
07-11-14
07-12-07
Fig 11. Package outline SOT833-1 (XSON8)
CBT3306
Product data sheet
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Rev. 7 — 1 May 2012
© NXP B.V. 2012. All rights reserved.
9 of 14
CBT3306
NXP Semiconductors
Dual bus switch
XQFN8: plastic, extremely thin quad flat package; no leads;
8 terminals; body 1.6 x 1.6 x 0.5 mm
SOT902-2
X
A
B
D
terminal 1
index area
E
A
A1
detail X
e
4
C
C A B
C
v
w
b
3
y
y1 C
5
e1
2
6
1
7
terminal 1
index area
8
L
metal area
not for soldering
L1
0
1
Dimensions
Unit(1)
mm
max
nom
min
2 mm
scale
A
0.5
A1
b
D
E
e
e1
0.05 0.25 1.65 1.65
0.20 1.60 1.60 0.55
0.00 0.15 1.55 1.55
0.5
L
L1
v
0.35 0.15
0.30 0.10
0.25 0.05
0.1
w
y
y1
0.05 0.05 0.05
Note
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.
References
Outline
version
IEC
JEDEC
JEITA
SOT902-2
---
MO-255
---
sot902-2_po
European
projection
Issue date
10-11-02
11-03-31
Fig 12. Package outline SOT902-2 (XQFN8)
CBT3306
Product data sheet
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Rev. 7 — 1 May 2012
© NXP B.V. 2012. All rights reserved.
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CBT3306
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Dual bus switch
15. Abbreviations
Table 11.
Abbreviations
Acronym
Description
CDM
Charged Device Model
ESD
ElectroStatic Discharge
FET
Field Effect Transistor
HBM
Human Body Model
PRR
Pulse Rate Repetition
TTL
Transistor-Transistor Logic
16. Revision history
Table 12.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
CBT3306 v.7
20120501
Product data sheet
-
CBT3306 v.6
Modifications:
CBT3306 v.6
Modifications:
•
For type number CBT3306GM the sot code has changed to SOT902-2.
20111122
•
Product data sheet
-
CBT3306 v.5
Legal pages updated.
CBT3306 v.5
20100325
Product data sheet
-
CBT3306 v.4
CBT3306 v.4
20100218
Product data sheet
-
CBT3306 v.3
CBT3306 v.3
20091014
Product data sheet
-
CBT3306 v.2
CBT3306 v.2
20051117
Product data sheet
-
CBT3306 v.1
CBT3306 v.1
20011108
Product data
-
-
CBT3306
Product data sheet
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Rev. 7 — 1 May 2012
© NXP B.V. 2012. All rights reserved.
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CBT3306
NXP Semiconductors
Dual bus switch
17. Legal information
17.1 Data sheet status
Document status[1][2]
Product status[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product development.
Preliminary [short] data sheet
Qualification
This document contains data from the preliminary specification.
Product [short] data sheet
Production
This document contains the product specification.
[1]
Please consult the most recently issued document before initiating or completing a design.
[2]
The term ‘short data sheet’ is explained in section “Definitions”.
[3]
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
17.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.
17.3 Disclaimers
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information. NXP Semiconductors takes no
responsibility for the content in this document if provided by an information
source outside of NXP Semiconductors.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
CBT3306
Product data sheet
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors and its suppliers accept no liability for
inclusion and/or use of NXP Semiconductors products in such equipment or
applications and therefore such inclusion and/or use is at the customer’s own
risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and operation of their applications
and products using NXP Semiconductors products, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suitable and fit for the customer’s applications and
products planned, as well as for the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
All information provided in this document is subject to legal disclaimers.
Rev. 7 — 1 May 2012
© NXP B.V. 2012. All rights reserved.
12 of 14
CBT3306
NXP Semiconductors
Dual bus switch
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
Non-automotive qualified products — Unless this data sheet expressly
states that this specific NXP Semiconductors product is automotive qualified,
the product is not suitable for automotive use. It is neither qualified nor tested
in accordance with automotive testing or application requirements. NXP
Semiconductors accepts no liability for inclusion and/or use of
non-automotive qualified products in automotive equipment or applications.
In the event that customer uses the product for design-in and use in
automotive applications to automotive specifications and standards, customer
(a) shall use the product without NXP Semiconductors’ warranty of the
product for such automotive applications, use and specifications, and (b)
whenever customer uses the product for automotive applications beyond
NXP Semiconductors’ specifications such use shall be solely at customer’s
own risk, and (c) customer fully indemnifies NXP Semiconductors for any
liability, damages or failed product claims resulting from customer design and
use of the product for automotive applications beyond NXP Semiconductors’
standard warranty and NXP Semiconductors’ product specifications.
17.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
18. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
CBT3306
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 7 — 1 May 2012
© NXP B.V. 2012. All rights reserved.
13 of 14
CBT3306
NXP Semiconductors
Dual bus switch
19. Contents
1
2
3
4
5
6
6.1
6.2
7
8
9
10
11
12
13
14
15
16
17
17.1
17.2
17.3
17.4
18
19
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features and benefits . . . . . . . . . . . . . . . . . . . . 1
Ordering information . . . . . . . . . . . . . . . . . . . . . 1
Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
Pinning information . . . . . . . . . . . . . . . . . . . . . . 2
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3
Functional description . . . . . . . . . . . . . . . . . . . 3
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3
Recommended operating conditions. . . . . . . . 3
Static characteristics. . . . . . . . . . . . . . . . . . . . . 4
Dynamic characteristics . . . . . . . . . . . . . . . . . . 4
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Test information . . . . . . . . . . . . . . . . . . . . . . . . . 6
Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 7
Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Revision history . . . . . . . . . . . . . . . . . . . . . . . . 11
Legal information. . . . . . . . . . . . . . . . . . . . . . . 12
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 12
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Contact information. . . . . . . . . . . . . . . . . . . . . 13
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2012.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
Date of release: 1 May 2012
Document identifier: CBT3306
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