Kersemi HLDD50P04 P-channel enhancement mode power mosfet Datasheet

HLDD50P04
P-Channel Enhancement Mode Power MOSFET
Description
Features
The HLDD50P04 uses advanced trench technology
□ VDS =-40V,ID =-45A
and design to provide excellent RDS(ON) with low gate
charge. It can be used in a wide variety of applications.
Application
□
□
□
Power switchingapplication
Hard switched and high frequencycircuits
□ RDS(ON):1 5mΩ@VGS=10V
□ Low gatecharge.
□ Green deviceavailable.
□ AdvancedhighcelldenitytrenchtechnologyforultraRDS(ON).
□ Excellentpackageforgoodheatdissipation.
Uninterruptible powersupply
P-Channel MOSFET
Marking and pin assignment
Absolute Maximum Ratings (TC=25℃unless otherwise noted)
Parameter
Symbol
Limit
Unit
Drain-Source Voltage
VDS
-40
V
Gate-Source Voltage
VGS
±20
V
ID
-45
A
ID (100℃)
-28
A
Pulsed Drain Current
IDM
-180
A
Maximum Power Dissipation
PD
73.5
W
0.59
W/℃
EAS
130
TJ,TSTG
-55 To 150
mJ
℃
Drain Current-Continuous
Drain Current-Continuous(TC=100℃)
Derating factor
Single pulse avalanche energy
(Note 5)
Operating Junction and Storage Temperature Range
Thermal Characteristic
(Note 2)
Thermal Resistance,Junction-to-Case
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RθJC
Page 1
1.7
℃/W
2017. sz192 . V1.0
HLDD50P04
Package Marking and Ordering Information
Part NO.
Marking
Package
HLDD50P04
D50P04
TO-252
Electrical Characteristics (TC=25℃unless otherwise noted)
Parameter
Symbol
Condition
Min
Typ
Max
Unit
Drain-Source Breakdown Voltage
BVDSS
VGS=0V ID=250μA
-40
-
-
V
Zero Gate Voltage Drain Current
IDSS
VDS=30V,VGS=0V
-
-
-1
μA
Gate-Body Leakage Current
IGSS
VGS=±20V,VDS=0V
-
-
±100
nA
Gate Threshold Voltage
VGS(th)
VDS=VGS,ID=250μA
-1.0
-1.6
-2.5
V
Drain-Source On-State Resistance
RDS(ON)
VGS=10V, ID=10A
-
Off Characteristics
On Characteristics
(Note 3)
Forward Transconductance
VGS=4.5V, ID=8A
11.5
16
15
22
gFS
VDS=10V,ID=20A
-
13
Input Capacitance
Clss
VDS=-25V,
-
2757
4000
PF
Output Capacitance
Coss
VGS=0V,
-
240
360
PF
Crss
F=1.0MHz
-
137
200
PF
-
23
40
nS
Dynamic Characteristics
-
mΩ
S
(Note4)
Reverse Transfer Capacitance
Switching Characteristics
(Note 4)
Turn-on Delay Time
td(on)
Turn-on Rise Time
tr
VDD=20V,ID=-1A,
-
10
20
nS
td(off)
VGS=-10V,RG=6Ω
-
135
250
nS
-
46
90
nS
-
22.2
-
8.2
nC
-
8.8
nC
Turn-Off Delay Time
Turn-Off Fall Time
tf
Total Gate Charge
Qg
Gate-Source Charge
Qgs
Gate-Drain Charge
Qgd
VDS=-32V,ID=10A,
VGS=-4.5V
40
nC
Drain-Source Diode Characteristics
Diode Forward Voltage
(Note 3)
VSD
Diode Forward Current
(Note 2)
IS
-
Reverse Recovery Time
VGS=0V,IS=-1A
-
-1
V
-
-45
A
trr
-
-
-
nS
Reverse Recovery Charge
Qrr
-
-
-
nC
Forward Turn-On Time
ton
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
1. Repetitive Rating: Pulse widthlimited bymaximum junction temperature.
2. Surface Mounted on FR4 Board, t ≤ 10 se c.
3. Pulse Test: PulseW idth ≤ 300μs, Duty Cycle ≤2% .
4. Guaranteed by design, not subject toproduction
5. EAS condition : VDD=25V,VGS=10V,L=0.1mH,IAS=51A.,RG=25 ,Starting TJ=25℃.
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Page 2
2017. sz192 . V1.0
HLDD50P04
N
or
m
al
iz
e
d
O
n
R
es
is
ta
n
ce
(
m
Ω
)
ID , Continuous Drain Current (A )
40V P-Channel MOSFETs
TC , Case Temperature (℃)
Continuous Drain Current vs. TC
Fig.2
TJ , Junction Temperature (℃)
Qg , Gate Charge (nC)
Normalized Vth vs. TJ
Fig.4
Square Wave Pulse Duration (s)
Fig.5
Gate Charge Waveform
-ID , Continuous Drain Current (A )
Normalized Thermal Response (RθJA)
Fig.3
Normalized RDSON vs. TJ
-VGS , Gate to Source Voltage (V )
Normalized Gate Threshold Voltage (V )
Fig.1
TJ , Junction Temperature (℃)
-VDS , Drain to Source Voltage (V)
Normalized Transient Impedance
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Page 3
Fig.6
Maximum Safe Operation Area
2017. sz192 . V1.0
HLDD50P04
40V P-Channel MOSFETs
-VDS
90%
10%
-VGS
Td(on)
Tr
Ton
Fig.7
Td(off)
Tf
Toff
Switching Time Waveform
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Fig.8
Page 4
Gate Charge Waveform
2017. sz192 . V1.0
HLDD50P04
40V P-Channel MOSFETs
TO-252 Package Information
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Page 5
2017. sz192 . V1.0
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