FDC6308P Dual P-Channel 2.5V Specified PowerTrenchTM MOSFET General Description Features This P-Channel 2.5V specified MOSFET is a rugged gate version of Fairchild Semiconductor's advanced PowerTrench process. It has been optimized for power management applications with a wide range of gate drive voltage (2.5V - 12V). Extended VGSS range (±12V) for battery applications. These devices have been designed to offer exceptional power dissipation in a very small footprint for applications where the bigger more expensive SO-8 and TSSOP-8 packages are impractical. Low gate charge (3nC typical). Fast switching speed. High performance trench technology for extremely low RDS(ON). SuperSOTTM-6 package: small footprint (72% smaller than standard SO-8); low profile (1mm thick). Applications Load switch Battery protection Power management -1.7 A, -18 V. RDS(ON) = 0.18 Ω @ VGS = -4.5 V RDS(ON) = 0.30 Ω @ VGS = -2.5 V D2 S1 D1 4 3 5 2 6 1 G2 SuperSOT TM -6 S2 G1 Absolute Maximum Ratings Symbol TA = 25°C unless otherwise noted Parameter Ratings Units VDSS Drain-Source Voltage -20 V VGSS Gate-Source Voltage V ID Drain Current (Note 1a) ±12 -1.7 -5 A PD Power Dissipation for Single Operation (Note 1a) 0.96 W (Note 1b) 0.9 - Continuous - Pulsed (Note 1c) TJ, Tstg Operating and Storage Junction Temperature Range 0.7 -55 to +150 °C Thermal Characteristics RθJA Thermal Resistance, Junction-to-Ambient RθJC Thermal Resistance, Junction-to-Case (Note 1a) 130 °C/W (Note 1) 60 °C/W Package Marking and Ordering Information Device Marking .308 1999 Fairchild Semiconductor Corporation Device Reel Size Tape Width Quantity FDC6308P 7’’ 8mm 3000 units FDC6308P Rev. C FDC6308P July 1999 Symbol TA = 25°C unless otherwise noted Parameter Test Conditions Min Typ Max Units Off Characteristics BVDSS Drain-Source Breakdown Voltage VGS = 0 V, ID = -250 µA ∆BVDSS ∆TJ IDSS Breakdown Voltage Temperature Coefficient ID = -250 µA, Referenced to 25°C Zero Gate Voltage Drain Current VDS = -16 V, VGS = 0 V -1 IGSSF Gate-Body Leakage Current, Forward VGS = 12 V, VDS = 0 V 100 µA nA IGSSR Gate-Body Leakage Current, Reverse VGS = -12 V, VDS = 0 V -100 nA -1.5 V On Characteristics -20 V -15 mV/°C (Note 2) VGS(th) Gate Threshold Voltage VDS = VGS, ID = -250 µA ∆VGS(th) ∆TJ RDS(on) Gate Threshold Voltage Temperature Coefficient ID = -250 µA, Referenced to 25°C 2.7 Static Drain-Source On-Resistance 0.143 0.22 0.25 ID(on) On-State Drain Current VGS = -4.5 V, ID = -1.7 A VGS = -4.5 V, ID = -1.7 A @125°C VGS = -2.5 V, ID = -1.4 A VGS = -4.5 V, VDS = -5 V gFS Forward Transconductance VDS = -5 V, ID = -1.7 A 4 VDS = -10 V, VGS = 0 V f = 1.0 MHz 265 pF 80 pF 45 pF -0.6 -1.1 mV/°C 0.18 0.28 0.30 -2.5 Ω A S Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance Switching Characteristics td(on) Turn-On Delay Time tr Turn-On Rise Time td(off) (Note 2) VDD = -10 V, ID = -1 A VGS = -4.5 V, RGEN = 6 Ω 6 12 9 18 ns Turn-Off Delay Time 14 25 ns tf Turn-Off Fall Time 3 9 ns Qg Total Gate Charge 3 5 Qgs Gate-Source Charge Qgd Gate-Drain Charge VDS = -10 V, ID = -1.7 A VGS = -4.5 V ns nC 0.7 nC 0.8 nC Drain-Source Diode Characteristics and Maximum Ratings IS Maximum Continuous Drain-Source Diode Forward Current VSD Drain-Source Diode Forward Voltage VGS = 0 V, IS = -0.8 A (Note 2) -0.8 -0.8 A -1.2 V Notes: 1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design. Both devices are assumed to be operating and sharing the dissipated heat energy equally. a) 130 °C/W when mounted on a 0.125 in2 pad of 2 oz. copper. b) 140 °C/W when mounted on a 0.005 in2 pad of 2 oz. copper. c) 180 °C/W when mounted on a minimum pad. Scale 1 : 1 on letter size paper 2. Pulse Test: Pulse Width ≤ 300 µs, Duty Cycle ≤ 2.0% FDC6308P Rev. C FDC6308P Electrical Characteristics FDC6308P Typical Characteristics 2.2 VGS = -4.5V RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE -ID, DRAIN-SOURCE CURRENT (A) 10 -4.0V -3.5V 8 6 -3.0v 4 -2.5V 2 -2.0V 0 2 1.8 VGS = -2.5V 1.6 -3.0V 1.4 -3.5V -4.0V 1.2 -4.5V 1 0.8 0 1 2 3 4 5 0 2 4 -VDS, DRAIN-SOURCE VOLTAGE (V) Figure 1. On-Region Characteristics. 10 0.5 ID = -1.7A VGS = -4.5V 1.4 RDS(ON), ON-RESISTANCE (OHM) RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE 8 Figure 2. On-Resistance Variation with Drain Current and Gate Voltage. 1.5 1.3 1.2 1.1 1 0.9 0.8 0.7 ID = -0.9A 0.4 0.3 TA = 125oC 0.2 TA = 25oC 0.1 0 0.6 -50 -25 0 25 50 75 100 125 1 150 2 3 4 5 -VGS, GATE TO SOURCE VOLTAGE (V) o TJ, JUNCTION TEMPERATURE ( C) Figure 3. On-Resistance Variation with Temperature. Figure 4. On-Resistance Variation with Gate-to-Source Voltage. 10 10 VDS = -5V VGS=0 o -IS, REVERSE DRAIN CURRENT (A) TA = -55 C o -ID, DRAIN CURRENT (A) 6 - ID, DRAIN CURRENT (A) 25 C 8 o 125 C 6 4 2 0 0.5 1.5 2.5 3.5 4.5 -VGS, GATE TO SOURCE VOLTAGE (V) Figure 5. Transfer Characteristics. 5.5 1 TJ=125oC 25oC 0.1 -55oC 0.01 0.001 0.0001 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 -VSD, BODY DIODE VOLTAGE (V) Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature. FDC6308P Rev. C (continued) 400 VDS = 5V ID = -1.7A f = 1MHz VGS = 0 V 10V 4 15V CAPACITANCE (pF) -VGS, GATE-SOURCE VOLTAGE (V) 5 3 2 300 CISS 200 100 COSS 1 CRSS 0 0 0 0.5 1 1.5 2 2.5 3 3.5 0 4 4 8 12 16 -VDS, DRAIN TO SOURCE VOLTAGE (V) Qg, GATE CHARGE (nC) Figure 7. Gate-Charge Characteristics. 20 Figure 8. Capacitance Characteristics. 100 5 SINGLE PULSE R θJA =180°C/W TA = 25°C 4 10 1ms 10ms 100ms 1s 1 VGS = 4.5V SINGLE PULSE o RθJA = 180 C/W 0.1 POWER (W) 100µs RDS(ON) LIMIT 3 2 DC 1 o TA = 25 C 0.01 0.1 1 10 0 0.01 100 0.1 -VDS, DRAIN-SOURCE VOLTAGE (V) Figure 9. Maximum Safe Operating Area. 1 10 SINGLE PULSE TIME (SEC) 100 300 Figure 10. Single Pulse Maximum Power Dissipation. r(t), NORMALIZED EFFECTIVE 1 TRANSIENT THERMAL RESISTANCE -ID, DRAIN CURRENT (A) FDC6308P Typical Characteristics 0.5 D = 0.5 0.2 0.2 0.1 0.05 R θJA (t) = r(t) * R θJA R θJA =180°C/W 0.1 P(pk) 0.05 t1 0.02 0.01 0.02 0.01 0.0001 t2 TJ - T A = P * R JA (t) θ Duty Cycle, D = t 1 / t 2 Single Pulse 0.001 0.01 0.1 1 10 100 300 t 1 , TIME (sec) Figure 11. Transient Thermal Response Curve. Thermal characterization performed using the conditions described in Note 1c. Transient themal response will change depending on the circuit board design. FDC6308P Rev. C SuperSOTTM-6 Tape and Reel Data and Package Dimensions SSOT-6 Packaging Configuration: Figur e 1.0 Packaging Description: Customize Label SSOT-6 parts are shipped in tape. The carrier tape is made from a dissipative (carbon filled) polycarbonate resin. The cover tape is a multilayer film (Heat Activated Adhesive in nature) primarily composed of polyester film, adhesive layer, sealant, and anti-static sprayed agent. These reeled parts in standard option are shipped with 3,000 units per 7" or 177cm diameter reel. The reels are dark blue in color and is made of polystyrene plastic (antistatic coated). Other option comes in 10,000 units per 13" or 330cm diameter reel. This and some other options are described in the Packaging Information table. Anti static Cover Tape These full reels are individually barcode labeled and placed inside a pizza box (illustrated in figure 1.0) made of recyclable corrugated brown paper with a Fairchild logo printing. One pizza box contains three reels maximum. And these pizza boxes are placed inside a barcode labeled shipping box which comes in different sizes depending on the number of parts shipped. F63TNR Label Embossed Carrier Tape 631 631 631 631 631 SSOT-6 Packaging Information Packaging Option Standard (no f l ow c ode ) Pin 1 D87Z SSOT-6 Unit Orientation Packaging type TNR TNR Qty per Reel/Tube/Bag 3,000 10,000 Reel Size 7" Dia 13" 184x187x47 343x343x64 Max qty per Box 9,000 30,000 Weight per unit (gm) 0.0158 0.0158 Weight per Reel (kg) 0.1440 0.4700 Box Dimension (mm) 343mm x 342mm x 64mm Intermediate box fo r D87Z Option F63TNR Label Note/Comments F63TNR Label F63TNR Label sa mpl e 184mm x 187mm x 47mm Pizza Box fo r Standar d Opti on F63TNR Label LOT: CBVK741B019 QTY: 3000 FSID: FDC633N SPEC: D/C1: D9842 D/C2: SSOT-6 Tape Leader and Trailer Configuration: Figur e 2.0 QTY1: QTY2: SPEC REV: CPN: N/F: F (F63TNR)3 Carrier Tape Cover Tape 1998 Fairchild Semiconductor Corporation Comp onent s Traile r Tape 300mm mi nimum or 75 empty poc kets Lead er Tape 500mm mi nimum or 125 emp ty poc kets August 1999, Rev. C SuperSOTTM-6 Tape and Reel Data and Package Dimensions, continued SSOT-6 Embossed Carrier Tape Configuration: Figure 3.0 P0 D0 T E1 F K0 Wc W E2 B0 Tc A0 D1 P1 User Direction of Feed Dimensions are in millimeter Pkg type A0 B0 SSOT-6 (8mm) 3.23 +/-0.10 3.18 +/-0.10 W 8.0 +/-0.3 D0 D1 E1 E2 1.55 +/-0.05 1.125 +/-0.125 1.75 +/-0.10 F 6.25 min 3.50 +/-0.05 P1 P0 4.0 +/-0.1 4.0 +/-0.1 K0 T 1.37 +/-0.10 0.255 +/-0.150 Notes: A0, B0, and K0 dimensions are determined with respect to the EIA/Jedec RS-481 rotational and lateral movement requirements (see sketches A, B, and C). Wc 0.06 +/-0.02 0.5mm maximum 20 deg maximum Typical component cavity center line B0 5.2 +/-0.3 Tc 0.5mm maximum 20 deg maximum component rotation Typical component center line Sketch A (Side or Front Sectional View) A0 Component Rotation Sketch C (Top View) Component lateral movement Sketch B (Top View) SSOT-6 Reel Configuration: Figure 4.0 Component Rotation W1 Measured at Hub Dim A Max Dim A max See detail AA Dim N 7" Diameter Option B Min Dim C See detail AA W3 13" Diameter Option Dim D min W2 max Measured at Hub DETAIL AA Dimensions are in inches and millimeters Tape Size Reel Option Dim A Dim B 0.059 1.5 512 +0.020/-0.008 13 +0.5/-0.2 0.795 20.2 2.165 55 0.331 +0.059/-0.000 8.4 +1.5/0 0.567 14.4 0.311 – 0.429 7.9 – 10.9 0.059 1.5 512 +0.020/-0.008 13 +0.5/-0.2 0.795 20.2 4.00 100 0.331 +0.059/-0.000 8.4 +1.5/0 0.567 14.4 0.311 – 0.429 7.9 – 10.9 8mm 7" Dia 7.00 177.8 8mm 13" Dia 13.00 330 Dim C Dim D Dim N Dim W1 Dim W2 Dim W3 (LSL-USL) July 1999, Rev. C SuperSOTTM-6 Tape and Reel Data and Package Dimensions, continued SuperSOT -6 (FS PKG Code 31, 33) 1:1 Scale 1:1 on letter size paper Dimensions shown below are in: inches [millimeters] Part Weight per unit (gram): 0.0158 1998 Fairchild Semiconductor Corporation September 1998, Rev. A TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. HiSeC™ ISOPLANAR™ MICROWIRE™ POP™ PowerTrench QFET™ QS™ Quiet Series™ SuperSOT™-3 SuperSOT™-6 ACEx™ Bottomless™ CoolFET™ CROSSVOLT™ E2CMOSTM FACT™ FACT Quiet Series™ FAST FASTr™ GTO™ SuperSOT™-8 SyncFET™ TinyLogic™ UHC™ VCX™ DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. A critical component is any component of a life support device or system whose failure to perform can systems which, (a) are intended for surgical implant into be reasonably expected to cause the failure of the life the body, or (b) support or sustain life, or (c) whose support device or system, or to affect its safety or failure to perform when properly used in accordance with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. E