Intersil IS-1845ASRH Single event radiation hardened high speed, current mode pwm Datasheet

IS-1845ASRH
ESIGNS
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MENDE 884XARH
RECOM
ISL7
September 25, 2008
Single Event Radiation Hardened
High Speed, Current Mode PWM
FN9001.4
Features
• Electrically Screened to DSCC SMD # 5962-01509
The IS-1845ASRH is designed to be
used in switching power supplies
operating in current-mode. The
rising edge of the on-chip oscillator
turns on the output. Turn-off is controlled by the current
sense comparator and occurs when the sensed current
reaches a peak controlled by the error amplifier.
• QML Qualified per MIL-PRF-38535 Requirements
TM
• Radiation Environment
- Total Dose. . . . . . . . . . . . . . . . . . . . . 300 krad(SI) (Max)
- SEL Immune. . . . . . . . . . . . . . . . . Dielectrically Isolated
- SEU Immune . . . . . . . . . . . . . . . . . . . . 35MeV/mg/cm2
- SEU Cross-Section at 89MeV/mg/cm2 . . . . 5 x 10-6cm2
Constructed with Intersil’s Rad Hard Silicon Gate (RSG)
dielectrically isolated BiCMOS process, these devices are
immune to single event latch-up and have been specifically
designed to provide a high level of immunity to single event
transients. All specified parameters are guaranteed and
tested for 300krad(Si) total dose performance.
• Low Start-up Current . . . . . . . . . . . . . . . . . . . 100µA (Typ)
• Fast Propagation Delay . . . . . . . . . . . . . . . . . . 80ns (Typ)
• Supply Voltage Range . . . . . . . . . . . . . . . . . . . 12V to 20V
• High Output Drive. . . . . . . . . . . . . . . . . . . . 1A (Peak, Typ)
• Undervoltage Lockout . . 8.8V Start (Typ), 8.2V Stop (Typ)
Detailed Electrical Specifications for these devices are
contained in SMD 5962-01509. A “hot-link” is provided on
our website for downloading the SMD.
Applications
• Current-Mode Switching Power Supplies
• Control of High Current FET Drivers
• Motor Speed and Direction Control
Pinouts
IS9-1845ASRH
(18 LD FLATPACK)
TOP VIEW
IS7-1845ASRH
(8 LD CDIP2-T8 SBDIP)
TOP VIEW
COMP
1
8
VREF
NC
1
18
NC
COMP
2
17
VREF
VFB
3
16
VCC
VFB
2
7
VCC
ISENSE
3
6
OUT
NC
4
15
VC
RTCT
4
5
GND
NC
5
14
OUT
NC
6
13
NC
ISENSE
7
12
GND
RTCT
8
11
OSCGND
NC
9
10
NC
NOTES:
1. Grounding the Comp pin does not inhibit the output. The output may be inhibited by applying >1.2V to the ISENSE pin.
2. This part should be operated with Ct = 3.3nF and Rt = 10k timing components only.
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2003, 2008. All Rights Reserved.
All other trademarks mentioned are the property of their respective owners.
IS-1845ASRH
Ordering Information
INTERNAL
MKT. NUMBER
ORDERING NUMBER
TEMP. RANGE (°C)
PKG.
DWG. #
PACKAGE
5962F0150901V9A
IS0-1845ASRH-Q
-50 to +125
IS0-1845ASRH/Sample
IS0-1845ASRH/Sample
-50 to +125
5962F0150901VPC
IS7-1845ASRH-Q
-50 to +125
8 Ld SBDIP
D8.3
5962F0150901VPC
IS7-1845ASRH-QS9000
-50 to +125
8 Ld SBDIP
D8.3
5962F0150901QPC
IS7-1845ASRH-8
-50 to +125
8 Ld SBDIP
D8.3
5962F0150901QPC
IS7-1845ASRH-8S9000
-50 to +125
8 Ld SBDIP
D8.3
5962F0150901VXC
IS9-1845ASRH-Q
-50 to +125
18 Ld Flatpack
K18.B
5962F0150901VXC
IS9-1845ASRH-QS9000
-50 to +125
18 Ld Flatpack
K18.B
5962F0150901QXC
IS9-1845ASRH-8
-50 to +125
18 Ld Flatpack
K18.B
IS7-1845ASRH/Proto
IS7-1845ASRH/Proto
-50 to +125
8 Ld SBDIP
D8.3
IS9-1845ASRH/Proto
IS9-1845ASRH/Proto
-50 to +125
18 Ld Flatpack
K18.3
Typical Performance Curves
100
DMAX
C470pF
C1000pF
1k
80
C2200pF
DMAX (%)
FREQUENCY (Hz)
10k
C4700pF
100
10
1
60
40
20
1
10
Rt TIMING RESISTANCE (kΩ)
FIGURE 1. OSCILLATOR FREQUENCY vs Rt and Ct
2
100
0
0.1
1
10
Rt TIMING RESISTANCE (kΩ)
100
FIGURE 2. MAXIMUM DUTY CYCLE vs Rt
FN9001.4
September 25, 2008
IS-1845ASRH
Die Characteristics
Substrate
Radiation Hardened Silicon Gate,
Dielectric Isolation
DIE DIMENSIONS
3090µm x 4080µm (121.6 mils x 159.0 mils)
Thickness: 483µm ± 25.4µm (19 mils ± 1 mil)
Backside Finish
Silicon
INTERFACE MATERIALS
ASSEMBLY RELATED INFORMATION
Glassivation
Substrate Potential
Type: Phosphorus Silicon Glass (PSG)
Thickness: 8.0kA ± 1.0kA
Unbiased (DI)
Top Metallization
ADDITIONAL INFORMATION
Type: AlSiCu
Thickness: 16.0kA ± 2kA
Worst Case Current Density
<2.0 x 105 A/cm2
Transistor Count
582
Metallization Mask Layout
IS-1845ASRH
VFB
ISENSE
COMP
RTCT
OSCGND
VREF
GND
GND
OUT
VC
VCC
NOTES:
3. Both the GND pads must be bonded to ground.
4. The OUT double-sized bond pad must be double bonded for
current sharing purposes.
5. The OSCGND double-sized bond pad must be double bonded to
ground for current sharing purposes.
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
3
FN9001.4
September 25, 2008
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