PHILIPS BUK9214-75B Trenchmos logic level fet Datasheet

BUK9214-75B
TrenchMOS™ logic level FET
Rev. 01 — 10 December 2002
M3D300
Objective data
1. Product profile
1.1 Description
N-channel enhancement mode field-effect power transistor in a plastic package using
Philips High-Performance Automotive (HPA) TrenchMOS™ technology, featuring very
low on-state resistance.
Product availability:
BUK9214-75B in SOT428 (D-PAK)
1.2 Features
■ TrenchMOSTM technology
■ 175 °C rated
■ Q101 compliant
■ Logic level compatible
1.3 Applications
■ Automotive systems
■ Motors, lamps and solenoids
■ 12 V, 24 V, and 42 V loads
■ General purpose power switching
1.4 Quick reference data
■ EDS(AL)S ≤ 131 mJ
■ ID ≤ 71 A
■ RDSon = 11.9 mΩ (typ)
■ Ptot ≤ 150 W
2. Pinning information
Table 1:
Pinning - SOT428 (D-PAK), simplified outline and symbol
Pin
Description
1
gate (g)
2
drain (d)
3
source (s)
mb
mounting base;
connected to
drain (d)
Simplified outline
Symbol
d
mb
[1]
g
MBB076
2
1
Top view
3
MBK091
SOT428 (D-PAK)
[1]
It is not possible to make connection to pin 2 of the SOT428 package.
s
BUK9214-75B
Philips Semiconductors
TrenchMOS™ logic level FET
3. Limiting values
Table 2:
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
VDS
drain-source voltage (DC)
VDGR
drain-gate voltage (DC)
VGS
gate-source voltage (DC)
ID
drain current (DC)
Conditions
RGS = 20 kΩ
Min
Max
Unit
-
75
V
-
75
V
-
±15
V
Tmb = 25 °C; VGS = 5 V;
Figure 2 and 3
-
71
A
Tmb = 100 °C; VGS = 5 V; Figure 2
-
50
A
IDM
peak drain current
Tmb = 25 °C; pulsed; tp ≤ 10 µs;
Figure 3
-
285
A
Ptot
total power dissipation
Tmb = 25 °C; Figure 1
-
150
W
Tstg
storage temperature
−55
+175
°C
Tj
junction temperature
−55
+175
°C
Source-drain diode
IDR
reverse drain current (DC)
Tmb = 25 °C
-
71
A
IDRM
peak reverse drain current
Tmb = 25 °C; pulsed; tp ≤ 10 µs
-
285
A
unclamped inductive load; ID = 75 A;
VDS ≤ 75 V; VGS = 5 V; RGS = 50 Ω;
starting Tj = 25 °C
-
131
mJ
Avalanche ruggedness
EDS(AL)S
non-repetitive avalanche energy
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
9397 750 10801
Objective data
Rev. 01 — 10 December 2002
2 of 10
BUK9214-75B
Philips Semiconductors
TrenchMOS™ logic level FET
03na19
120
03nl10
80
ID
(A)
Pder
(%)
60
80
40
40
20
0
0
0
50
100
150
200
Tmb (°C)
0
50
100
150
200
Tmb (°C)
VGS ≥ 5 V
P tot
P der = ----------------------- × 100%
P
°
tot ( 25 C )
Fig 1. Normalized total power dissipation as a
function of mounting base temperature.
Fig 2. Continuous drain current as a function of
mounting base temperature.
03nk99
103
ID
(A)
limit RDSon = VDS/ID
102
tp = 10 µ s
100 µ s
10
1 ms
DC
10 ms
100 ms
1
1
102
10
VDS (V)
103
Tmb = 25 °C; IDM single pulse.
Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage.
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
9397 750 10801
Objective data
Rev. 01 — 10 December 2002
3 of 10
BUK9214-75B
Philips Semiconductors
TrenchMOS™ logic level FET
4. Thermal characteristics
Table 3:
Thermal characteristics
Symbol
Parameter
Conditions
Rth(j-a)
thermal resistance from junction to
ambient
Rth(j-mb)
thermal resistance from junction to
mounting base
Figure 4
Min
Typ
Max
Unit
-
71.4
-
K/W
-
0.45
1.0
K/W
4.1 Transient thermal impedance
03nl34
1
δ = 0.5
Zth(j-mb)
(K/W)
0.2
0.1
10-1
0.05
0.02
10-2
δ=
P
single shot
T
t
tp
10-3
10-6
tp
T
10-5
10-4
10-3
10-2
10-1
tp (s)
1
Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration.
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
9397 750 10801
Objective data
Rev. 01 — 10 December 2002
4 of 10
BUK9214-75B
Philips Semiconductors
TrenchMOS™ logic level FET
5. Characteristics
Table 4:
Characteristics
Tj = 25 °C unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Static characteristics
V(BR)DSS
VGS(th)
IDSS
drain-source breakdown
voltage
ID = 0.25 mA; VGS = 0 V
Tj = 25 °C
75
-
-
V
Tj = −55 °C
70
-
-
V
Tj = 25 °C
1.1
1.5
2
V
Tj = 175 °C
0.5
-
-
V
Tj = −55 °C
-
-
2.3
V
Tj = 25 °C
-
0.02
1
µA
Tj = 175 °C
-
-
500
µA
-
2
100
nA
Tj = 25 °C
-
11.9
14
mΩ
Tj = 175 °C
-
-
29
mΩ
VGS = 4.5 V; ID = 25 A
-
-
15.5
mΩ
VGS = 10 V; ID = 25 A
-
10.7
12
mΩ
VGS = 5 V; VDS = 60 V;
ID = 25 A;
-
32
-
nC
-
6
-
nC
-
13
-
nC
-
3022
4029
pF
-
290
348
pF
-
115
158
pF
-
tbf
-
nS
gate-source threshold voltage ID = 1 mA; VDS = VGS;
Figure 5
drain-source leakage current
VDS = 75 V; VGS = 0 V
IGSS
gate-source leakage current
VGS = ±15 V; VDS = 0 V
RDSon
drain-source on-state
resistance
VGS = 5 V; ID = 25 A;
Figure 7
Dynamic characteristics
Qg(tot)
total gate charge
Qgs
gate-source charge
Qgd
gate-drain (Miller) charge
Ciss
input capacitance
Coss
output capacitance
Crss
reverse transfer capacitance
td(on)
turn-on delay time
tr
rise time
-
tbf
-
nS
td(off)
turn-off delay time
-
tbf
-
nS
tf
fall time
-
tbf
-
nS
Ld
internal drain inductance
measured from drain to
centre of die
-
2.5
-
nH
Ls
internal source inductance
measured from source lead
to source bond pad
-
7.5
-
nH
VGS = 0 V; VDS = 25 V;
f = 1 MHz;
VDS = 30 V; RL = 1.2 Ω;
VGS = 5 V; RG = 10 Ω
Source-drain diode
VSD
source-drain (diode forward)
voltage
IS = 10 A; VGS = 0 V;
Figure 7
-
0.85
1.2
V
trr
reverse recovery time
-
tbf
-
ns
Qr
recovered charge
IS = 20 A; dIS/dt = −100 A/µs
VGS = −10 V; VDS = 30 V
-
tbf
-
nC
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
9397 750 10801
Objective data
Rev. 01 — 10 December 2002
5 of 10
BUK9214-75B
Philips Semiconductors
TrenchMOS™ logic level FET
10-1
03ng52
2.5
VGS(th)
03ng53
ID
(A)
(V)
max
10-2
2.0
min
1.0
min
-3
10
typ
1.5
typ
max
10-4
10-5
0.5
10-6
0.0
-60
0
60
120
Tj (ºC)
180
0
0.5
1
1.5
2
2.5
3
VGS (V)
Tj = 25 °C; VDS = VGS
ID = 1 mA; VDS = VGS
Fig 5. Gate-source threshold voltage as a function of
junction temperature.
Fig 6. Sub-threshold drain current as a function of
gate-source voltage.
03nb25
2.4
a
1.6
0.8
0
-60
0
60
120 T (°C) 180
j
R DSon
a = ---------------------------R DSon ( 25 °C )
Fig 7. Normalized drain-source on-state resistance factor as a function of junction temperature.
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
9397 750 10801
Objective data
Rev. 01 — 10 December 2002
6 of 10
BUK9214-75B
Philips Semiconductors
TrenchMOS™ logic level FET
6. Package outline
Plastic single-ended surface mounted package (Philips version of D-PAK); 3 leads
(one lead cropped)
SOT428
seating plane
y
A
E
A2
A
A1
b2
E1
mounting
base
D1
D
HE
L2
2
L1
L
1
3
b1
w M A
b
c
e
e1
0
10
20 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
A1(1)
A2
b
b1
b2
c
D
D1
min.
E
mm
2.38
2.22
0.65
0.45
0.93
0.73
0.89
0.71
1.1
0.9
5.46
5.26
0.4
0.2
6.22
5.98
4.0
6.73
6.47
E1
e
e1
4.81 2.285 4.57
4.45
HE
L
L1
min.
L2
w
y
max.
10.4
9.6
2.95
2.55
0.5
0.9
0.5
0.2
0.2
Note
1. Measured from heatsink back to lead.
OUTLINE
VERSION
SOT428
REFERENCES
IEC
JEDEC
JEITA
TO-252
SC-63
EUROPEAN
PROJECTION
ISSUE DATE
99-09-13
01-12-11
Fig 8. SOT428 (D-PAK)
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
9397 750 10801
Objective data
Rev. 01 — 10 December 2002
7 of 10
BUK9214-75B
Philips Semiconductors
TrenchMOS™ logic level FET
7. Revision history
Table 5:
Revision history
Rev Date
01
20021210
CPCN
Description
-
Objective data (9397 750 10801)
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
9397 750 10801
Objective data
Rev. 01 — 10 December 2002
8 of 10
BUK9214-75B
Philips Semiconductors
TrenchMOS™ logic level FET
8. Data sheet status
Level
Data sheet status[1]
Product status[2][3]
Definition
I
Objective data
Development
This data sheet contains data from the objective specification for product development. Philips
Semiconductors reserves the right to change the specification in any manner without notice.
II
Preliminary data
Qualification
This data sheet contains data from the preliminary specification. Supplementary data will be published
at a later date. Philips Semiconductors reserves the right to change the specification without notice, in
order to improve the design and supply the best possible product.
III
Product data
Production
This data sheet contains data from the product specification. Philips Semiconductors reserves the
right to make changes at any time in order to improve the design, manufacturing and supply. Relevant
changes will be communicated via a Customer Product/Process Change Notification (CPCN).
[1]
Please consult the most recently issued data sheet before initiating or completing a design.
[2]
The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at
URL http://www.semiconductors.philips.com.
[3]
For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
9. Definitions
customers using or selling these products for use in such applications do so
at their own risk and agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
Short-form specification — The data in a short-form specification is
extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Right to make changes — Philips Semiconductors reserves the right to
make changes in the products - including circuits, standard cells, and/or
software - described or contained herein in order to improve design and/or
performance. When the product is in full production (status ‘Production’),
relevant changes will be communicated via a Customer Product/Process
Change Notification (CPCN). Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no
licence or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are
free from patent, copyright, or mask work right infringement, unless otherwise
specified.
Limiting values definition — Limiting values given are in accordance with
the Absolute Maximum Rating System (IEC 60134). Stress above one or
more of the limiting values may cause permanent damage to the device.
These are stress ratings only and operation of the device at these or at any
other conditions above those given in the Characteristics sections of the
specification is not implied. Exposure to limiting values for extended periods
may affect device reliability.
Application information — Applications that are described herein for any
of these products are for illustrative purposes only. Philips Semiconductors
make no representation or warranty that such applications will be suitable for
the specified use without further testing or modification.
11. Trademarks
TrenchMOS — is a trademark of Koninklijke Philips Electronics N.V.
10. Disclaimers
Life support — These products are not designed for use in life support
appliances, devices, or systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips Semiconductors
Contact information
For additional information, please visit http://www.semiconductors.philips.com.
For sales office addresses, send e-mail to: [email protected].
Objective data
Fax: +31 40 27 24825
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
9397 750 10801
Rev. 01 — 10 December 2002
9 of 10
BUK9214-75B
Philips Semiconductors
TrenchMOS™ logic level FET
Contents
1
1.1
1.2
1.3
1.4
2
3
4
4.1
5
6
7
8
9
10
11
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . .
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . .
Quick reference data. . . . . . . . . . . . . . . . . . . . .
Pinning information . . . . . . . . . . . . . . . . . . . . . .
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . .
Thermal characteristics. . . . . . . . . . . . . . . . . . .
Transient thermal impedance . . . . . . . . . . . . . .
Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . .
Package outline . . . . . . . . . . . . . . . . . . . . . . . . .
Revision history . . . . . . . . . . . . . . . . . . . . . . . . .
Data sheet status . . . . . . . . . . . . . . . . . . . . . . . .
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1
1
1
1
1
1
2
4
4
5
7
8
9
9
9
9
© Koninklijke Philips Electronics N.V. 2002.
Printed in The Netherlands
All rights are reserved. Reproduction in whole or in part is prohibited without the prior
written consent of the copyright owner.
The information presented in this document does not form part of any quotation or
contract, is believed to be accurate and reliable and may be changed without notice. No
liability will be accepted by the publisher for any consequence of its use. Publication
thereof does not convey nor imply any license under patent- or other industrial or
intellectual property rights.
Date of release: 10 December 2002
Document order number: 9397 750 10801